Clock self-calibration method, device and equipment of receiver
By self-calibrating the real-time clock when the receiver is turned on, the problem of hot start failure after the mass consumer terminal is turned on is solved, which improves the positioning success rate and shortens the first positioning time.
Patent Information
- Application Number
- CN202411998571.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-31
- Publication Date
- 2025-05-13
AI Technical Summary
After the mass consumer terminal is turned off, the punctual accuracy of the real-time clock is poor, resulting in a failed hot start after starting up, turning to cold start, increasing the first positioning time.
A clock self-calibration method for the receiver is provided, by obtaining the system time and clock deviation parameters at the last shutdown, determining the calibration amount of the real-time clock, and performing time calibration of the real-time clock upon power-on.
It improves the success rate of hot start of the receiver, shortens the first positioning time, and ensures the accuracy of system time.
Smart Images

Figure CN119986715A_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the field of satellite navigation technology, and in particular relates to a clock self-calibration method, device and equipment for a receiver. Background Art
[0002] As the application of satellite navigation penetrates into all aspects of social production and life, satellite navigation receiver chips are gradually being integrated into mass consumer terminals, such as shared bicycles, wearable devices, Internet of Things terminals and other mass consumer terminals.
[0003] At present, when mass consumer terminals perform satellite positioning, they need to rely on their internal real-time clocks (RTC) to provide time information.
[0004] However, after the existing mass consumer terminals are turned off, the internal real-time clock has poor timekeeping accuracy, which leads to hot start failure when the terminal performs positioning hot start after the user turns on the terminal, resulting in a cold start, which greatly increases the first positioning time. Summary of the invention
[0005] The embodiment of the present invention provides a clock self-calibration method, device and equipment for a receiver, which can calibrate the real-time clock inside a terminal, realize the positioning hot start of the terminal, and shorten the first positioning time.
[0006] In a first aspect, an embodiment of the present invention provides a clock self-calibration method for a receiver, comprising:
[0007] In response to the receiver being powered on again, obtaining the system time saved by the receiver when it was last powered off and a clock deviation parameter of the real-time clock of the receiver relative to the system time;
[0008] Determine a calibration amount of the real-time clock according to the clock deviation parameter and timing data of the real-time clock of the receiver from the last shutdown to the restart;
[0009] The real-time clock is time-calibrated according to the calibration amount, the system time when the system was last shut down, and the timing data.
[0010] In a second aspect, an embodiment of the present invention provides a clock self-calibration device for a receiver, comprising:
[0011] An acquisition module, configured to acquire, in response to the receiver being powered on again, a system time stored by the receiver when it was last powered off and a clock deviation parameter of a real-time clock of the receiver relative to the system time;
[0012] A determination module, configured to determine a calibration amount of the real-time clock according to the clock deviation parameter and timing data of the real-time clock of the receiver from the last shutdown to the restart;
[0013] The calibration module is used to calibrate the real-time clock according to the calibration amount, the system time when the system was last shut down, and the timing data.
[0014] In a third aspect, an embodiment of the present invention provides a receiver, comprising: a processor, and a memory storing computer program instructions; the processor reads and executes the computer program instructions to implement the method as described above.
[0015] The clock self-calibration method, device and equipment of the receiver provided in the embodiment of the present invention calibrates the RTC clock when the receiver is turned on, so that the receiver has accurate system time, thereby improving the success rate of the receiver hot start and shortening the first positioning time. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] In order to more clearly illustrate the technical solution of the embodiment of the present invention, the following is a brief introduction to the drawings required for use in the embodiment of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0017] Figure 1 A flowchart of a clock self-calibration method for a receiver provided in an embodiment of the present application;
[0018] Figure 2 A schematic diagram of a flow chart of determining a clock error of a real-time clock provided in an embodiment of the present application;
[0019] Figure 3 A schematic diagram of a mean and standard deviation determination process provided in an embodiment of the present application;
[0020] Figure 4 A schematic diagram of a clock deviation parameter determination process provided in an embodiment of the present application;
[0021] Figure 5 A schematic diagram of a satellite positioning process provided in an embodiment of the present application;
[0022] Figure 6 Another schematic diagram of a mean and standard deviation determination process provided in an embodiment of the present application;
[0023] Figure 7 A real-time clock calibration process provided in an embodiment of the present application;
[0024] Figure 8 It is a structural diagram of clock self-calibration of a receiver provided in an embodiment of the present application;
[0025] Fig. 9 A schematic diagram of the hardware structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0026] The features and exemplary embodiments of various aspects of the present invention will be described in detail below. In order to make the purpose, technical solutions and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain the present invention, rather than to limit the present invention. For those skilled in the art, the present invention can be implemented without the need for some of these specific details. The following description of the embodiments is only to provide a better understanding of the present invention by illustrating examples of the present invention.
[0027] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the statement "include..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.
[0028] There are four major satellite navigation systems, namely the Global Positioning System (GPS), BeiDou Navigation Satellite System (BDS), Galileo Navigation Satellite System (GALILEO), and Global Navigation Satellite System (GLONASS). In addition, there are other satellite navigation systems, such as the Quasi-Zenith Satellite System (QZSS) and the Indian Regional Navigational Satellite System (IRNSS), which serve as their own regional navigation systems to meet or enhance the navigation business needs of surrounding areas.
[0029] Among them, the use of the above satellite navigation system to form a global satellite navigation system (GNSS) can continuously provide users with stable, reliable, and more accurate all-weather positioning, navigation, and timing (PNT) services. At the same time, the application of satellite navigation has also penetrated into all aspects of social production and life, such as various fields of mass consumption. In the field of mass consumption, the integration of satellite navigation receiver chips into mass consumer devices has resulted in low performance of key components of various receivers in the consumer field due to limitations such as volume, power consumption, and cost, especially the requirement of low cost. However, mass consumer receivers attach great importance to user experience. Users are very sensitive to the first positioning time (TTFF) of the receiver and hope that the receiver will output results that meet the positioning accuracy requirements in the shortest possible time after power-on. This requires the receiver to have a fast hot start time, a high success rate, and a long validity period. In order to improve the hot start performance of the receiver, the timekeeping accuracy of the real-time clock (RTC) inside the receiver (or chip) related to it must be high.
[0030] However, in the consumer field, especially in the current mass consumer terminals such as shared bicycles, wearable devices, and IoT terminals, the crystal oscillator of the RTC circuit used is a low-performance, low-cost quartz crystal oscillator (Crystal Oscillator, XO), and its frequency accuracy and frequency stability are poor. If this quartz crystal is used as the RTC clock of the satellite navigation receiver, then in the later period of the validity period allowed for hot start, the time accuracy of the RTC timing circuit will be greatly reduced, resulting in the failure of the receiver's hot start and conversion to cold start, which greatly increases TTFF, which is unacceptable to users.
[0031] In view of the above technical problems, this solution provides a receiver clock self-calibration solution for realizing the self-calibration of the RTC timing circuit of the satellite navigation receiver. Specifically, after the receiver completes effective satellite positioning, the current clock error of the local clock TCXO (Temperature Compensation crystal Oscillator) is calculated, and the local clock is corrected. Then, the clock error, clock drift, and clock speed (clock drift change rate) of the clock of the RTC timing circuit are measured using the local clock, and the RTC clock is calibrated using these three parameters. When the receiver is turned off, the mean and standard deviation of these three parameters are saved. When the receiver is turned on again, the register value of the RTC circuit is read, and these three parameters are used for self-calibration to obtain accurate local system time, thereby improving the success rate of the receiver hot start and shortening the first positioning time (TTFF).
[0032] The technical solution of the present application is described in detail below through specific embodiments. It should be noted that the following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described in detail in some embodiments.
[0033] Figure 1 A flowchart of a clock self-calibration method for a receiver provided in an embodiment of the present application is shown in FIG. Figure 1 As shown, the method may specifically include the following steps:
[0034] Step S110: In response to the receiver being powered on again, the system time saved by the receiver when it was last powered off and the clock deviation parameter of the real-time clock of the receiver relative to the system time are obtained.
[0035] Step S120: Determine the calibration amount of the real-time clock according to the clock deviation parameter and the timing data of the real-time clock of the receiver from the last shutdown to the restart.
[0036] Step S130: calibrate the real-time clock according to the calibration value, the system time when the system was last shut down, and the timing data.
[0037] First, the system time in the above step S110 is introduced.
[0038] In this embodiment, after the receiver is powered on and performs effective satellite positioning, it will periodically save the current coordinated universal time (UTC), and the UTC can be regarded as the system time. For example, Beidou time can be used as the system time.
[0039] In some embodiments, taking the example of turning off the receiver after the first power-on and then turning it on again, the local time will be corrected after the receiver is turned on for the first time and performs effective satellite positioning. Specifically, the local time is provided and maintained by the baseband digital signal processing module. When the receiver is turned on and completes effective satellite positioning, the local time can be corrected. Among them, the corrected local time is the system time (the system time can be Beidou time or converted to Coordinated Universal Time).
[0040] For example, using Beidou time as the system time, the variables are defined as follows: tBDS is the system time, and the corrected local time can be considered as the system time; tu is the uncorrected local time; δtu is the difference between the uncorrected local time and the system time, which is a signed number. Assuming that the output frequency of the consumer satellite navigation receiver is 1 Hz, its PVT solution is also 1 Hz, that is, positioning solution is performed once per second, then after the receiver completes the effective satellite positioning, the local time is corrected as shown in formula (1).
[0041] t u =t BDS +δt u (1)
[0042] In an embodiment of the present application, the accuracy of the system time can be guaranteed by correcting the local time. When the receiver is turned on again, the local time at the time of power-on is determined with the help of the system time at the time of power-off. Therefore, ensuring the accuracy of the system time can ensure the accuracy of the local time at subsequent power-ons.
[0043] Among them, the local time is generated by the data FIFO sampling clock of the receiver's tracking engine, and is shared with the clock of the receiver's RF front end and baseband digital signal hardware logic unit, which can be considered as the receiver's local frequency reference. After the receiver is turned on and performs effective satellite positioning, an appropriate strategy will be adopted to correct the local time based on the clock difference and clock drift calculated by PVT.
[0044] Next, the RTC in step S110 is introduced.
[0045] In this embodiment, during the boot-up process of the receiver, in order to obtain the fastest first positioning time, the receiver often adopts the hot start mode. Therefore, the satellite navigation receiver needs to obtain a relatively accurate local time when it is powered on and initialized. In actual engineering, the local time is generally provided by the real-time clock (RTC) inside the receiver (or chip). This is because before power-on, that is, when the receiver is turned off, the receiver is timed by the RTC. When the receiver is turned off, the baseband digital signal processing module cannot provide and maintain the local time.
[0046] In this embodiment, even when the receiver is turned off, the RTC can maintain operation through an independent power supply to ensure the continuity of the local time (for example, the system time at the time of shutdown is used as the starting time, and the RTC can continue to work and time after shutdown. After restarting, the system time at the time of startup is obtained based on the timing data of the RTC and the system time at the time of shutdown, thereby achieving the continuity of the local time). Among them, the receiver timing circuit composed of the RTC clock and the external crystal oscillator (External Crystal Oscillator, XO) can maintain a continuous, stable and accurate system time after the receiver is turned off.
[0047] In this embodiment, after the receiver is turned off, the RTC circuit of the receiver continues to count under the drive of the external clock, and always maintains continuous UTC. This external clock is the crystal oscillator of the RTC timekeeping circuit, which is a very low-cost quartz crystal oscillator. It should be noted that the crystal oscillator is the abbreviation of the quartz crystal resonator. Because the crystal oscillator unit is often used as an external circuit, it is also called an external crystal oscillator. The crystal oscillator is an electronic component that uses the piezoelectric effect of a quartz crystal (also known as crystal) to generate a high-precision oscillation frequency. It is a passive component. The two important indicators for measuring a crystal oscillator are frequency accuracy and frequency stability. The crystal oscillator has a nominal frequency value, and there will be an actual measured value when it is actually used. Affected by many factors, there must be a deviation between the two. This deviation is the frequency accuracy, which is usually expressed in ppm. 1ppm=1×10-6 means that it is offset by 1 Hz at a frequency of 1 MHz. Frequency accuracy is the deviation of the actual output frequency of the crystal oscillator relative to the nominal frequency value at room temperature (such as laboratory room temperature 25 degrees Celsius ± 2 degrees Celsius). The derivative of the deviation with respect to time is the frequency stability. Frequency stability refers to whether the frequency deviation of the crystal oscillator can remain unchanged within a certain period of time. Therefore, frequency stability does not refer to whether the frequency of the crystal oscillator is accurate. Frequency stability is generally measured by Allan mean square error. Factors affecting the frequency of the crystal oscillator include: temperature change, input voltage change, load change, self-aging, external dynamic stress, etc. Among them, the impact of temperature change on the frequency of the crystal oscillator is particularly obvious. It is generally measured by the crystal oscillator frequency temperature stability, also known as: the temperature characteristic of the crystal oscillator, which refers to the maximum allowable frequency deviation without or with an implicit reference temperature under the nominal power supply and load and working within the specified temperature range. Among them, the change in the frequency stability of the crystal oscillator will cause errors in the receiver's measurement of satellite signals, which will be superimposed on the measured values of the pseudorange and carrier phase. Among them, random frequency error and aging rate are important factors that cause changes in the frequency stability of the crystal oscillator. Random frequency error mainly affects the short-term frequency stability of the crystal oscillator, and the aging rate mainly affects the long-term frequency stability of the crystal oscillator. Because its error characteristics are very complex, it is difficult to perform real-time and accurate modeling to eliminate the impact on the positioning and timing accuracy of satellite navigation receivers.
[0048] As for the RTC in the above step S110, in the field of mass consumption, modern satellite navigation receivers generally use low-cost crystal oscillators to reduce costs. The RTC timekeeping circuit generally uses XO, which is the most common crystal oscillator, so its frequency accuracy and frequency stability are relatively poor, especially the temperature characteristics are poor. Therefore, when the receiver is turned off, although the system time saved by the receiver when it is turned off is accurate UTC, it relies on the timekeeping function of the RTC circuit inside the receiver to maintain the accuracy of the system time, which will bring certain clock errors and clock drifts, resulting in inaccurate local time when it is turned on again, and cannot meet the technical indicator requirements of the first positioning time, thereby affecting the success rate of the receiver hot start.
[0049] For the RTC in the above step S110, since the system time is accurate at the moment of the last shutdown, the clock deviation parameter of the RTC relative to the system time can be obtained based on the system time at this moment. The time deviation parameter can be used to calibrate the timing data of the RTC when the receiver is turned on again to ensure the accuracy of the local time of the receiver, so that the receiver can obtain a higher hot start success rate based on the local time.
[0050] Exemplarily, after the receiver is powered on and the local time is corrected, the corrected local time (which can be regarded as the system time) can be compared with the timing data of the RTC to determine the clock deviation parameter.
[0051] Exemplarily, algorithms and control strategies can also be used to model the clock of the RTC timekeeping circuit, and use the accurate local time before the receiver is shut down to calibrate the clock of the RTC timekeeping circuit, so that when the receiver is turned on again, the model and calibration parameters can be used to self-calibrate the time of the RTC timekeeping circuit to obtain a more accurate system time.
[0052] For step S120, when the receiver is turned off, the RTC will continue to time. The timing data of the real-time clock from the last shutdown to the restart of the receiver can be determined by the timing time of the RTC at the shutdown time and the timing time of the RTC when the receiver is restarted.
[0053] For step S130, the calibration value is used to calibrate the timing data of the real-time clock of the receiver from the last shutdown to the restart. After the timing data is calibrated, based on the system time saved at the last shutdown and the calibrated timing data, the accurate local time of the receiver at the time of this startup can be determined. The receiver can obtain a higher hot start success rate based on the local time.
[0054] In the embodiment of the present application, the RTC clock is calibrated when the receiver is turned on, so that the receiver has accurate system time, thereby improving the success rate of hot starting the receiver and shortening the first positioning time.
[0055] In some embodiments, after completing the time calibration of the real-time clock, the satellite ephemeris, satellite almanac and the receiver's location range saved by the receiver can be obtained; then, based on the time-calibrated real-time clock, satellite ephemeris, satellite almanac and the receiver's location range, in response to the receiver being turned on, a hot start is performed to achieve satellite positioning.
[0056] In this embodiment, the process from when the receiver is turned on to when the positioning result that meets the accuracy requirement is obtained for the first time is called the start-up process of the receiver.
[0057] The receiver needs to receive signals from at least four satellites and keep tracking the satellite signals, demodulate the navigation messages from the satellites, and perform calculations based on the acquired ephemeris information to ultimately achieve navigation, positioning, and timing functions. The receiver uses different startup methods, and the startup process and time of each process are different.
[0058] Among them, the receiver hot start refers to the start-up mode adopted when the satellite ephemeris and satellite almanac stored in the receiver are valid, and the receiver stores relatively accurate local time and local approximate position. The hot start mode requires that the local time error of the receiver does not exceed 10 milliseconds, and the current position is within 150 kilometers of the stored position. Among them, the ephemeris update cycle of each satellite navigation system is different. For example, the satellite ephemeris update cycle of the Beidou system is 1 hour, while the satellite ephemeris update cycle of GPS is 2 hours, and the validity period of the ephemeris is generally 4 hours.
[0059] It should be noted that the validity period of the ephemeris limits the time range of the hot start. For example, taking the Beidou system's satellite ephemeris update period of 1 hour as an example, when the receiver is turned off and then turned on within 1 hour, the valid ephemeris can be used for hot start.
[0060] It should be noted that when the computer is turned off, the accuracy of the RTC timing will deteriorate as the shutdown time increases. The longer the shutdown time, the greater the error of the RTC timing. It is understandable that when the shutdown time is short, such as a few seconds before turning the computer back on, the RTC timing data can actually be used directly as the local time during a hot start. This is because the shutdown time is short and the error of the RTC will not be large.
[0061] In this embodiment, the satellite ephemeris contains accurate information such as the current satellite clock error, orbital parameters, and orbital perturbation correction. Compared with the almanac, the satellite ephemeris can calculate the satellite position with higher accuracy. In the hot start mode, the receiver can obtain a more accurate frequency domain search range of visible satellites, and the saved code phase information is still valid at startup. Therefore, after searching for enough satellite signals, the receiver only needs to complete frame synchronization to use the known ephemeris parameters for positioning, thereby greatly shortening the first positioning time. At present, due to the use of satellite signal transmission time prediction technology, the hot start time only takes about 3 seconds, or even shorter.
[0062] Among them, the receiver hot start performance is basically an indicator of the first positioning time, and whether the hot start can succeed has a certain probability. If the local RTC clock is accurate, the hot start success rate is high. In addition, the effective time of the hot start is 4 hours. If the current time is close to 4 hours or slightly exceeds 4 hours compared with the obtained valid ephemeris time, and if the RTC clock is inaccurate at this time, the hot start will often fail. For this reason, this solution needs to be used to correct the RTC clock.
[0063] In the embodiment of the present application, by calibrating the RTC clock of the receiver when it is powered on again, an accurate local time can be obtained, so that a hot start can achieve a higher startup success rate and shorten the time required for the hot start, thereby greatly shortening the first positioning time.
[0064] In some embodiments, after the receiver is turned on and completes effective satellite positioning, the RTC will be calibrated at regular intervals to ensure its accuracy. Since the satellite ephemeris must be valid in the receiver hot start mode, and the validity period is generally 2 to 4 hours, the RTC can ensure the accuracy of the local time required for hot start in a short period of time. If the receiver is turned off for a long time, it may cause inaccurate time and fail to hot start when it is turned on again.
[0065] In this embodiment, in the hot start mode, the first positioning time is generally required to be less than 5 seconds, or even 2 seconds. In order to meet such stringent technical requirements, the receiver often adopts a method of predicting the transmission time and a method of directly capturing the signal by the tracking engine. This method can shorten the first positioning time, but it requires the RTC timing circuit to have a high accuracy to ensure that the tracking engine of the receiver can capture the visible satellite signal and predict the pseudorange. However, due to the inaccuracy of the RTC timing circuit, the clock error and clock drift of the RTC timing circuit will cause the receiver to introduce time uncertainty in the pseudo code phase dimension search, which will seriously affect the success rate of the tracking engine capturing the signal when the receiver is hot started, and the number of channels occupied by the tracking engine when capturing the signal when multi-channel capture is adopted.
[0066] In this embodiment, the local time saved by the local RTC timing circuit is not needed when the receiver is cold started, so the frequency change of the external crystal oscillator of the RTC circuit can be ignored. However, in actual applications, if the receiver has no information such as ephemeris and almanac, and only has time information provided by the local RTC, this can also be understood as a cold start. In this startup mode, since there is accurate local time and the mean square error of the time information is known, technical conditions can be provided for high-sensitivity capture.
[0067] In the embodiment of the present application, by periodically calibrating the RTC, the time accuracy of the RTC can be guaranteed when the receiver is turned on, and a large error of the RTC can be avoided. In this way, when the receiver is turned off and on again in a short period of time (for example, within 2 to 4 hours), the error of the RTC will not be too large because the time between the turn-off and the turn-on is short, and thus the RTC time can even be directly used for hot start, avoiding the calibration process.
[0068] In some embodiments, the clock deviation parameter includes at least one of a clock error, a mean of the clock error, a standard deviation of the clock error, a clock drift, a mean of the clock drift, a standard deviation of the clock drift, a clock rate, a mean of the clock rate, and a standard deviation of the clock rate.
[0069] For example, Figure 2 A schematic diagram of a flow chart of determining a clock error of a real-time clock provided in an embodiment of the present application is shown in FIG. Figure 2 As shown, it includes the following steps:
[0070] Step S210: obtaining a first count value of the real-time clock at a corrected first system time point and a second count value at a corrected second system time point;
[0071] Step S220: Obtaining a count difference value according to the first count value and the second count value;
[0072] Step S230: determining the count difference as the true value of the system time at the second system time point;
[0073] Step S240: Determine the clock difference of the real-time clock at the second system time point according to the true value of the system time, the frequency value and the clock period of the real-time clock.
[0074] In this embodiment, the local clock of the satellite navigation receiver and the clock of the RTC timing circuit are two different clocks. In order to reduce costs, the local clock generally uses TCXO, while the clock of the RTC timing circuit generally uses an ordinary crystal oscillator (XO). The local clock is used to record the local time. When the local time is corrected, it can be considered as an accurate system time, and the system time can be used to measure the clock deviation parameter of the RTC timing circuit.
[0075] In this embodiment, the RTC timekeeping circuit integrated in the chip uses intra-second count, second count, and week count to represent the time (period) of the timekeeping circuit. The absolute time when the receiver is turned off is represented by the local time. When it is turned on again, the local time is read from the receiver's cache, and the time of the RTC timekeeping circuit is added to obtain the absolute system time when the current power-on is obtained.
[0076] Among them, let the count in seconds be cRTC, the count in seconds be sRTC, and the count in weeks be wRTC. The count in seconds is counted by the number of clocks of the external crystal oscillator of the RTC timekeeping circuit. If the nominal frequency of the RTC timekeeping circuit is fRTC, then the count in seconds in a 1-second period is fRTC. Then the clock period of the external crystal oscillator of the RTC timekeeping circuit is
[0077] In this embodiment, after the receiver has effectively positioned the satellite, it is assumed that there is a local time sequence tu,k with a time interval of 1 second, where k = 0, ..., N-1. The time of the RTC timing circuit is measured at each sequence point. Each sequence point can be understood as a system time point, and the RTC has a corresponding count value at each system time point.
[0078] It should be noted that when the receiver is powered on for the first time, the count values of all registers of the RTC timekeeping circuit are 0. Thereafter, as long as there is power, the RTC timekeeping circuit will always be working. What the receiver needs to read is the time value of the timekeeping circuit (this is a relative value). The receiver's clock self-calibration algorithm calibrates this relative value, rather than calibrating the timekeeping circuit itself.
[0079] In this embodiment, the count value of RTC is divided into a count value within a second cRTC, a count value within a second sRTC and a count value within a week wRTC.
[0080] Among them, at the sequence point tu, k, the count value of the RTC timing circuit is latched to obtain cRTC, k, sRTC, k, and wRTC, k. At the sequence point tu, k+1, the count value of the RTC timing circuit is latched to obtain cRTC, k+1, sRTC, k+1, and wRTC, k+1. From the sequence point tu, k to the sequence point tu, k+1, the local time is 1 second. Since it is already the corrected local time, that is, the system time is 1 second, as shown in formula (2).
[0081]
[0082] In the above formula (2), w RTC,k+1 represents the week count of the RTC timing circuit at the k+1th sequence point, s RTC,k+1 represents the second count of the RTC timing circuit at the k+1th sequence point, c RTC,k+1Indicates the count value in seconds of the RTC timing circuit at the k+1th sequence point.
[0083] In the above formula (2), the measurement of 1 second can be counted by the number of clocks of the external crystal oscillator of the RTC timing circuit, so let it be Δn RTC,k+1 , as shown in formula (3), the system time true value Δn is obtained RTC,k+1 .
[0084]
[0085] When the RTC timing circuit relies on its own external crystal oscillator for timing, the 1 second it measures is the nominal frequency value f of the external crystal oscillator. RTC , which is an estimated value, and let the estimated value be, as shown in formula (4).
[0086] Therefore, the clock error of the RTC timing circuit is measured using the corrected local time as shown in equation (5).
[0087]
[0088] In the above formula (4), Indicates the nominal frequency value.
[0089] In the above formula (5), Δt RTC,diff,k+1 Represents the clock error of the real-time clock at the k+1th sequence point. RTC Indicates the clock period of the real-time clock.
[0090] Furthermore, in some embodiments, the clock drift of the real-time clock at the second system time point can be determined based on the clock error of the real-time clock at the first system time point, the clock error of the real-time clock at the second system time point, and the time difference between the first system time point and the second system time point.
[0091] Specifically, because in a discrete time system, the difference in clock error per unit time is the clock drift, the clock drift of the RTC timing circuit is measured using the corrected local time as shown in formula (6).
[0092]
[0093] In the above formula (6), Indicates the clock drift of the real-time clock at the k+1th sequence point.
[0094] In this embodiment, the first system time point may refer to the kth sequence point, the second system time point may refer to the k+1th sequence point, and the first system time point and the second system time point may be adjacent time points. In this case, the time difference between the first system time point and the second system time point is the unit time, for example, 1 second.
[0095] Furthermore, in some embodiments, the clock speed of the real-time clock at the second system time point may be determined based on the clock drift of the real-time clock at the first system time point, the clock drift of the real-time clock at the second system time point, and the time difference.
[0096] Specifically, because in a discrete time system, the difference in clock drift per unit time is the clock speed, the clock speed of the RTC timing circuit is measured using the corrected local time as shown in formula (7).
[0097]
[0098] In the above formula (7), Indicates the clock speed of the real-time clock at the k+1th sequence point.
[0099] In this embodiment, the first system time point may refer to the kth sequence point, the second system time point may refer to the k+1th sequence point, and the first system time point and the second system time point may be adjacent time points. In this case, the time difference between the first system time point and the second system time point is the unit time, for example, 1 second.
[0100] In an embodiment of the present application, by counting the clock error, clock drift and clock speed of the RTC timing circuit clock, the RTC can be calibrated to obtain accurate local time to improve the success rate of hot start when the receiver is turned on again, and significantly shorten the first positioning time of hot start.
[0101] For example, Figure 3 A schematic diagram of a mean and standard deviation determination process provided in an embodiment of the present application is shown in FIG. Figure 3 As shown, it includes the following steps:
[0102] Step S310: Obtain at least one of the clock difference, clock drift and clock speed at each system time point within a preset time period.
[0103] Step S320: Determine the mean and standard deviation of the clock difference according to the clock difference at each system time point.
[0104] Step S330: Determine the mean and standard deviation of the clock drift according to the clock drift of each system time point.
[0105] Step S340: Determine the mean and standard deviation of the clock speed according to the clock speed at each system time point.
[0106] In this embodiment, since the above formulas (5), (6) and (7) are instantaneous values of each sequence point for measuring the timing performance of the RTC timing circuit using the corrected local time after the receiver has effectively positioned the satellite, when the receiver is turned off, the instantaneous value measured at the time of shutdown is used to self-calibrate the timing of the RTC timing circuit, which will be affected by the current environmental changes and measurement errors, making it difficult to obtain an accurate calibration result and it is impossible to determine the range of its time uncertainty.
[0107] Therefore, in this embodiment, the above-mentioned measurement values can be statistically analyzed for a period of time according to the actual application of the receiver. For example, a preset time period (for example, 2 to 5 minutes) can be used. Assuming that there are a total of N sequence points (i.e., system time points) within the statistical preset time period, the mean and standard deviation of the clock error, clock drift, and clock speed of the RTC timing circuit can be obtained.
[0108] Exemplarily, the mean value of the clock error of the RTC timing circuit is as shown in formula (8).
[0109]
[0110] In the above formula (8), represents the mean of the clock errors.
[0111] Exemplarily, the standard deviation of the clock error of the RTC timing circuit is shown in formula (9).
[0112]
[0113] In the above formula (9), σ(Δt RTC,diff ) represents the standard deviation of the clock error.
[0114] Exemplarily, the mean value of the clock drift of the RTC timing circuit is shown in formula (10).
[0115]
[0116] In the above formula (10), Represents the mean of the clock drift.
[0117] Exemplarily, the standard deviation of the clock drift of the RTC timing circuit is shown in formula (11).
[0118]
[0119] In the above formula (11), Represents the standard deviation of clock drift.
[0120] Exemplarily, the average value of the clock speed of the RTC timing circuit is shown in formula (12).
[0121]
[0122] In the above formula (12), Represents the mean clock speed.
[0123] Exemplarily, the standard deviation of the clock speed of the RTC timing circuit is shown in formula (13).
[0124]
[0125] In the above formula (13), Represents the standard deviation of the clock rate.
[0126] In this embodiment, when the satellite navigation receiver is turned off, the mean and standard deviation of the clock error, clock drift, and clock speed of the RTC timing circuit clock counted within a preset time period can be saved. When the receiver is turned on again, the mean of the clock error, clock drift, and clock speed of the RTC timing circuit clock saved when it was last turned off can be substituted into the calibration clock model to obtain the accurate time after calibration.
[0127] In the embodiment of the present application, by statistically analyzing the clock error, clock drift, and clock speed mean and standard deviation of the RTC timing circuit clock, and calibrating the RTC using the mean, it is possible to effectively avoid the problem of inaccurate clock deviation parameters at a certain moment caused by changes in the environmental characteristics surrounding the receiver when saving the clock deviation parameters at that moment. This ensures that the calibration parameters used when calibrating the RTC are accurate and reliable, and improves the accuracy of the RTC clock calibration value.
[0128] Further, based on the above embodiments, in some embodiments, the calibration amount of the real-time clock can be determined according to the mean value of the clock difference, the mean value of the clock drift, the mean value of the clock speed and the timing data.
[0129] In this embodiment, the function of the RTC timing circuit in the satellite navigation receiver is that when the receiver is operating normally, after the PVT solution module effectively locates the satellite, according to a certain frequency, while latching the local system time, it also latches the count value of the RTC timing circuit. When the receiver is turned off, the system time and the count value of the RTC timing circuit at that time are saved in the cache. After shutting down, the RTC timing circuit continues to work and continues to count according to the clock of its own external crystal oscillator to maintain the local accurate time of the receiver. When the receiver is turned on again, the system time and the count value of the RTC timing circuit at the time of shutdown will be read from the receiver's cache first, and the current count value of the RTC timing circuit will also be read. The current count value of the RTC timing circuit is subtracted from the count value saved when shutting down, and then added to the system time saved when shutting down, which is the system time at the current startup. Therefore, improving the timing accuracy of the RTC timing circuit can improve the sensitivity and time characteristics of the receiver in capturing and tracking satellite signals.
[0130] In this embodiment, let the system time saved in the cache when shutting down be t BDS,flash ; When the machine is turned on again, the time length kept by the RTC timekeeping circuit is Δt RTC , that is, the time length of the real-time clock of the receiver from the last shutdown to the restart; the calibration amount for self-calibration using this scheme is δ(Δt RTC ).
[0131] When the receiver is turned on again, the calculated system time at the current startup is t RTC,local , the specific calculation formula is as follows (14):
[0132] t RTC,local =t BDS,flash +Δt RTC +δ(Δt RTC ) (14)
[0133] According to the analysis in the previous section, the average values of the clock error, clock drift, and clock speed of the RTC timing circuit clock calculated according to equations (8), (10), and (12), the calibration amount of the receiver RTC timing circuit self-calibration is δ(Δt RTC ) As shown in formula (15), formula (15) is the calibration clock model of the RTC timing circuit self-calibration proposed in this scheme.
[0134]
[0135] In the embodiment of the present application, after the receiver completes effective satellite positioning, the average of the clock error, clock drift, and clock speed of the RTC timing circuit clock is continuously counted at a certain frequency and saved in the cache. When the receiver is turned on again, the system time at the time of the receiver power-on can be self-calibrated using formula (15) to obtain a more accurate local time.
[0136] In some embodiments, Figure 4 A schematic diagram of a clock deviation parameter determination process provided in an embodiment of the present application is shown in FIG. Figure 4 As shown, it includes the following steps:
[0137] Step S410: Determine whether the receiver has completed satellite positioning when powered on.
[0138] Step S420: When the receiver completes satellite positioning, a clock deviation parameter of each system time point after the satellite positioning is completed is obtained, and determined as a clock deviation parameter of the real-time clock of the receiver relative to the system time.
[0139] Step S430: When the receiver fails to complete satellite positioning at the first time point and completes satellite positioning after a preset time threshold, obtain clock deviation parameters of each system time point before the first time point, and determine them as the clock deviation parameters of the real-time clock of the receiver relative to the system time.
[0140] Step S440: when the receiver fails to complete satellite positioning at the first time point and the time duration is greater than a preset time threshold, clear the clock deviation parameters of each time point before the first time point.
[0141] In this embodiment, the satellite navigation receiver may encounter complex scenarios such as weak signal, signal loss, and inability to position in actual use, so a corresponding control strategy should be implemented when using the local system time to count the clock error, clock drift, and clock speed of the RTC clock.
[0142] Specifically, when the receiver completes effective satellite positioning, continuous statistics can be performed as the clock deviation parameter of the receiver's real-time clock relative to the system time. When the receiver encounters a short period of signal loss, for example, a time threshold can be preset, and after satellite positioning is restored within the preset time threshold, the previous statistical value can continue to be used as the clock deviation parameter of the receiver's real-time clock relative to the system time. However, when the receiver signal is lost and the time when positioning is unavailable exceeds the preset time threshold, the statistical algorithm should be restarted, that is, the clock deviation parameters of each time point counted before the first time point are cleared to avoid errors.
[0143] In an embodiment of the present application, the clock deviation parameters of each statistical time point are processed through a corresponding control strategy. If they can be used, they are retained and can be used directly in the future to reduce the computing resources consumed by frequent parameter processing. If they cannot be used, they are cleared directly to prevent the accuracy of the calibration amount from being reduced.
[0144] Furthermore, in some embodiments, Figure 5 A schematic diagram of the satellite positioning process provided in the embodiment of the present application is shown in FIG. Figure 5 As shown, it includes the following steps:
[0145] Step S510: Determine the time uncertainty of the calibrated real-time clock according to the standard deviation of the clock difference, the standard deviation of the clock drift, the standard deviation of the clock speed and the timing data.
[0146] Step S520: Determine a target strategy from preset satellite signal acquisition strategies according to the time uncertainty and a preset uncertainty threshold.
[0147] Step S530: Perform satellite positioning according to the target strategy.
[0148] In this embodiment, as described above, a calibration clock model is used to self-calibrate the system time when the receiver is turned on, so that a more accurate local time can be obtained. The accuracy here refers to the comparison with the method of not calibrating or only compensating the RTC clock error when shutting down.
[0149] In this embodiment, there is still an error after self-calibration, so this embodiment uses the mean square error of the clock error, clock drift, and clock speed of the RTC timing circuit clock to construct a calibration clock error model. Substituting equations (9), (11), and (13) into equations (16), σ[δ(Δt RTC )] is the standard deviation of the calibration value, then twice the standard deviation is the uncertainty of the system time when the receiver is turned on again after being punctual.
[0150]
[0151]
[0152] In the above formula (16), σ[δ(Δt RTC )] represents uncertainty.
[0153] In this embodiment, after the receiver is satellite positioned, the mean and standard deviation of the clock error, clock drift, and clock speed of the RTC timing circuit clock are continuously counted at a certain frequency and saved in the cache. When the receiver is turned on again, the mean of the clock error, clock drift, and clock speed of the RTC timing circuit clock is read and substituted into the calibration clock model to obtain the accurate system time after calibration. At the same time, the standard deviation of the clock error, clock drift, and clock speed of the RTC timing circuit clock is read and substituted into the calibration clock error model to obtain the quantitative uncertainty of the local time. The receiver can adopt control strategies and thresholds, and use the single channel or multi-channel of the tracking engine to capture according to the time uncertainty, greatly shortening the first positioning time of hot start.
[0154] In addition, in some embodiments, accurate system time is obtained by calibrating the clock of the RTC timing circuit. When the receiver is turned on again, the accurate system time can be used to assist the receiver startup, thereby improving the capture sensitivity of the receiver.
[0155] For example, Figure 6 Another flow chart for determining the mean and standard deviation provided in the embodiment of the present application is as follows: Figure 6 As shown, it includes the following steps:
[0156] Step S61: The receiver is powered on and initialized.
[0157] Step S62: After the receiver completes effective satellite positioning, it corrects the local time to obtain accurate system time.
[0158] Step S63: Measure the clock error, clock drift and clock speed of the RTC timing circuit.
[0159] Step S64: Setting the statistical duration, and calculating the mean and standard deviation of the clock error, clock drift, and clock speed of the RTC timing circuit.
[0160] For example, for a receiver with an output frequency of 1 Hz, the statistical duration may be 2 to 5 minutes.
[0161] Step S65: According to the setting of the statistical duration, the receiver uses a certain frequency to save the statistical mean and standard deviation of the clock error, clock drift, clock speed of the RTC timing circuit clock, as well as the system time and various parameters of the RTC clock.
[0162] Step S66: Determine whether the positioning is valid.
[0163] Step S67: Determine whether the time threshold is exceeded;
[0164] Step S68: The statistical algorithm module stops executing and restarts counting after satellite positioning is restored.
[0165] Among them, when the receiver is working normally and the signal is lost and positioning cannot be achieved, the local time is compared with the set time threshold. If it is less than the time threshold, satellite positioning is restored and statistics continue; if satellite positioning has not been restored after exceeding the time threshold, the statistical algorithm module stops executing and restarts statistics after satellite positioning is restored.
[0166] For example, Figure 7 The real-time clock calibration process provided in the embodiment of the present application is as follows: Figure 7 As shown, it includes the following steps:
[0167] Step S71: The satellite navigation receiver is turned on again. Before this, the RTC timing circuit of the receiver is always working.
[0168] Step S72: The receiver reads from the cache the system time of the last shutdown, the clock parameters of the RTC timing circuit, and the clock error, clock drift, mean and standard deviation of the clock speed of the RTC timing circuit.
[0169] Step S73: The receiver reads other parameters from the buffer, which may include satellite ephemeris, almanac, approximate position and other information.
[0170] Step S74: using the calibration clock model of the RTC timekeeping circuit to self-calibrate the RTC timekeeping circuit clock, and obtain the system time of the receiver when it is currently powered on.
[0171] Step S75: Determine the uncertainty of the local system time using the calibration clock error model of the RTC timekeeping circuit.
[0172] Step S76: The receiver determines the startup mode based on the current information. At this time, the accurate local system time and its uncertainty can be used to speed up the acquisition and tracking of satellite signals and shorten the first positioning time of the receiver.
[0173] In the embodiment of the present application, after the receiver completes effective satellite positioning, the current clock error of the local clock (TCXO) is calculated, and the local time is corrected. Then, the clock error, clock drift, and clock speed (clock drift change rate) of the clock of the RTC timing circuit are measured using the local time, and the RTC clock is calibrated using these three parameters. The mean and standard deviation of these three parameters are saved when the receiver is turned off. When the receiver is turned on again, the register value of the RTC circuit is read, and the three parameters are used for self-calibration to obtain the accurate system time when the receiver is turned on, thereby improving the success rate of the receiver hot start and shortening the first positioning time. At the same time, after the receiver is satellite positioned, the three parameters of the clock error, clock drift, and clock speed of the clock of the RTC timing circuit are periodically measured using the local time. By counting the standard deviation of these three parameters and using the standard deviation of the parameters to construct a calibration clock error model, the uncertainty of the system time when the receiver is turned on can be calculated. This uncertainty can be used as the range of time uncertainty when the receiver is hot started, providing time information for the receiver to use a tracking loop for hot start. In addition, by calibrating the clock of the RTC timing circuit, the accurate system time when the receiver is turned on is obtained. When the receiver is turned on again, the accurate system time can be used to assist the receiver startup, which can improve the receiver's capture sensitivity. Finally, this solution does not require hardware modification and can be implemented on the receiver using software, without increasing hardware costs. Therefore, the timing accuracy of the RTC timing circuit of the current consumer satellite navigation receiver is improved, the success rate of the receiver hot start is greatly improved, the first positioning time is shortened, and the technical conditions are provided for improving the receiver's capture sensitivity, which promotes the popularization and application of satellite navigation receivers in the consumer field.
[0174] The following is an embodiment of the device of the present application, which can be used to execute the embodiment of the method of the present application. For details not disclosed in the embodiment of the device of the present application, please refer to the embodiment of the method of the present application.
[0175] Figure 8 1 is a schematic diagram of the structure of the clock self-calibration of the receiver provided in the embodiment of the present application. The clock self-calibration of the receiver can be integrated in the receiver, or it can be independent of the receiver and cooperate with the receiver to implement the present solution. Figure 8 As shown, the clock self-calibration 800 of the receiver includes an acquisition module 810 , a determination module 820 and a calibration module 830 .
[0176] The acquisition module 810 is used to obtain the system time saved by the receiver when the receiver was last turned off and the clock deviation parameter of the real-time clock of the receiver relative to the system time in response to the receiver being turned on again. The determination module 820 is used to determine the calibration amount of the real-time clock according to the clock deviation parameter and the timing data of the real-time clock of the receiver from the last shutdown to the restart. The calibration module 830 is used to perform time calibration on the real-time clock according to the calibration amount and the system time and timing data when the receiver was last shut down.
[0177] Optionally, it also includes a time correction module, which is used to correct the local time of the receiver when the receiver is turned on and satellite positioning is completed; determine the system time based on the corrected local time; and determine the clock deviation parameter based on the system time.
[0178] Optionally, the time correction module can be specifically used to obtain the current clock difference of the local time after the receiver completes satellite positioning; and correct the local time according to the current clock difference.
[0179] Optionally, a periodic calibration module is also included, which is used to periodically calibrate the real-time clock according to the corrected local time when the receiver is turned on and satellite positioning is completed.
[0180] Optionally, the clock deviation parameter includes at least one of clock error, mean of clock error, standard deviation of clock error, clock drift, mean of clock drift, standard deviation of clock drift, clock speed, mean of clock speed and standard deviation of clock speed.
[0181] Optionally, the acquisition module can be specifically used to: obtain a first count value of the real-time clock at a corrected first system time point and a second count value at a corrected second system time point; obtain a count difference value based on the first count value and the second count value as the true value of the system time at the second system time point; determine the clock difference of the real-time clock at the second system time point based on the true value of the system time, the frequency value and the clock period of the real-time clock.
[0182] Optionally, the acquisition module can be specifically used to determine the clock drift of the real-time clock at the second system time point based on the clock difference of the real-time clock at the first system time point, the clock difference of the real-time clock at the second system time point, and the time difference between the first system time point and the second system time point.
[0183] Optionally, the acquisition module may be specifically used to determine the clock speed of the real-time clock at the second system time point according to the clock drift of the real-time clock at the first system time point, the clock drift of the real-time clock at the second system time point and the time difference.
[0184] Optionally, the acquisition module can be specifically used to: obtain at least one of the clock difference, clock drift and clock speed at each system time point within a preset time period; determine the mean and standard deviation of the clock difference based on the clock difference at each system time point; determine the mean and standard deviation of the clock drift based on the clock drift at each system time point; determine the mean and standard deviation of the clock speed based on the clock speed at each system time point.
[0185] Optionally, the calibration module may be specifically used to determine a calibration amount of the real-time clock according to a mean value of the clock difference, a mean value of the clock drift, a mean value of the clock speed and timing data.
[0186] Optionally, it also includes a hot start strategy selection module, which is used to determine the time uncertainty of the calibrated real-time clock based on the standard deviation of the clock error, the standard deviation of the clock drift, the standard deviation of the clock speed and the timing data; determine the target strategy from the preset satellite signal acquisition strategy based on the time uncertainty and the preset uncertainty threshold; and perform satellite positioning according to the target strategy.
[0187] Optionally, a hot start module is also included, which is used to obtain the satellite ephemeris, satellite almanac and the receiver's location range saved by the receiver; satellite positioning is performed based on the time-calibrated real-time clock, satellite ephemeris, satellite almanac and the receiver's location range.
[0188] Optionally, the acquisition module can be specifically used to: determine whether the receiver has completed satellite positioning when it is turned on; if the receiver has completed satellite positioning, obtain the clock deviation parameter at each system time point after completing satellite positioning, and determine it as the clock deviation parameter of the receiver's real-time clock relative to the system time; if the receiver has not completed satellite positioning at the first time point and has completed satellite positioning after a preset time threshold, obtain the clock deviation parameter of each system time point before the first time point, and determine it as the clock deviation parameter of the receiver's real-time clock relative to the system time. If the receiver has not completed satellite positioning at the first time point and the time is continuously greater than the preset time threshold, clear the clock deviation parameters of each time point before the first time point.
[0189] The device provided in the embodiment of the present application can be used to execute the method in the above-mentioned embodiment. Its implementation principle and technical effect are similar and will not be repeated here.
[0190] It should be noted that it should be understood that the division of the various modules of the above device is only a division of logical functions. In actual implementation, they can be fully or partially integrated into one physical entity, or they can be physically separated. And these modules can all be implemented in the form of software called by processing elements; they can also be all implemented in the form of hardware; some modules can also be implemented in the form of software called by processing elements, and some modules can be implemented in the form of hardware. For example, the determination module can be a separately established processing element, or it can be integrated in a chip of the above device. In addition, it can also be stored in the memory of the above device in the form of program code, and called and executed by a processing element of the above device. The implementation of other modules is similar. In addition, these modules can be fully or partially integrated together, or they can be implemented independently. The processing element here can be an integrated circuit with signal processing capabilities. In the implementation process, each step of the above method or each module above can be completed by an integrated logic circuit of hardware in the processor element or instructions in the form of software.
[0191] Fig. 9 The hardware structure diagram of the electronic device provided in the embodiment of the present application is shown in FIG. Fig. 9 As shown, the electronic device 900 may include a processor 901 and a memory 902 storing computer program instructions.
[0192] Specifically, the processor 901 may include a central processing unit (CPU), or an application specific integrated circuit (ASIC), or may be configured to implement one or more integrated circuits of the embodiment of the present invention.
[0193] Exemplarily, the electronic device may be the above-mentioned receiver.
[0194] The memory 902 may include a large capacity memory for data or instructions. By way of example and not limitation, the memory 902 may include a hard disk drive (HDD), a floppy disk drive, a flash memory, an optical disk, a magneto-optical disk, a magnetic tape, or a universal serial bus (USB) drive or a combination of two or more of these. In one example, the memory 902 may include a removable or non-removable (or fixed) medium, or the memory 902 is a non-volatile solid-state memory. The memory 902 may be inside or outside the integrated gateway disaster recovery device.
[0195] In one example, the memory 902 may be a read-only memory (ROM). In one example, the ROM may be a mask-programmed ROM, a programmable ROM (PROM), an erasable PROM (EPROM), an electrically erasable PROM (EEPROM), an electrically rewritable ROM (EAROM), or a flash memory, or a combination of two or more of these.
[0196] The memory 902 may include a read-only memory (ROM), a random access memory (RAM), a magnetic disk storage media device, an optical storage media device, a flash memory device, an electrical, optical or other physical / tangible memory storage device. Thus, in general, the memory includes one or more tangible (non-transitory) computer-readable storage media (e.g., a memory device) encoded with software including computer-executable instructions, and when the software is executed (e.g., by one or more processors), it is operable to perform the operations described with reference to the method according to an aspect of the present disclosure.
[0197] The processor 901 implements the method in the above embodiment by reading and executing the computer program instructions stored in the memory 902 .
[0198] In one example, the electronic device may further include a communication interface 903 and a bus 904. Fig. 9 As shown, the processor 901, the memory 902, and the communication interface 903 are connected via a bus 904 and communicate with each other.
[0199] The communication interface 903 is mainly used to implement communication between various modules, devices, units and / or equipment in the embodiment of the present invention.
[0200] Bus 904 includes hardware, software or both, and the components of online data flow billing equipment are coupled to each other. For example, but not limitation, the bus may include Accelerated Graphics Port (AGP) or other graphics bus, Enhanced Industry Standard Architecture (EISA) bus, Front Side Bus (FSB), Hyper Transport (HT) interconnection, Industry Standard Architecture (ISA) bus, InfiniBand interconnection, Low Pin Count (LPC) bus, Memory bus, Micro Channel Architecture (MCA) bus, Peripheral Component Interconnect (PCI) bus, PCI-Express (PCI-X) bus, Serial Advanced Technology Attachment (SATA) bus, Video Electronics Standards Association Local (VLB) bus or other suitable bus or two or more of these combinations. In appropriate cases, bus 904 may include one or more buses. Although the embodiments of the present invention describe and illustrate specific buses, the present invention considers any suitable bus or interconnection.
[0201] In addition, in combination with the method in the above embodiment, the embodiment of the present invention can provide a computer storage medium for implementation. The computer storage medium stores computer program instructions; when the computer program instructions are executed by a processor, any one of the methods in the above embodiment is implemented.
[0202] An embodiment of the present application also provides a computer program product, including a computer program, which implements any one of the methods in the above embodiments when the computer program is processed and executed.
[0203] It should be clear that the present invention is not limited to the specific configuration and processing described above and shown in the figures. For the sake of simplicity, a detailed description of the known method is omitted here. In the above embodiments, several specific steps are described and shown as examples. However, the method process of the present invention is not limited to the specific steps described and shown, and those skilled in the art can make various changes, modifications and additions, or change the order between the steps after understanding the spirit of the present invention.
[0204] The functional blocks shown in the above structural block diagram can be implemented as hardware, software, firmware or a combination thereof. When implemented in hardware, it can be, for example, an electronic circuit, an application specific integrated circuit (Application Specific Integrated Circuit, ASIC), appropriate firmware, plug-in, function card, etc. When implemented in software, the elements of the present invention are programs or code segments used to perform the required tasks. The program or code segment can be stored in a machine-readable medium, or transmitted on a transmission medium or communication link by a data signal carried in a carrier. "Machine-readable medium" can include any medium capable of storing or transmitting information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, read-only memory (Read-Only Memory, ROM), flash memory, erasable read-only memory (Erasable ReadOnly Memory, EROM), floppy disks, compact disc read-only memory (Compact Disc Read-Only Memory, CD-ROM), optical discs, hard disks, optical fiber media, radio frequency (Radio Frequency, RF) links, etc. The code segment can be downloaded via a computer network such as the Internet, an intranet, etc.
[0205] It should also be noted that the exemplary embodiments mentioned in the present invention describe some methods or systems based on a series of steps or devices. However, the present invention is not limited to the order of the above steps, that is, the steps can be performed in the order mentioned in the embodiments, or in a different order from the embodiments, or several steps can be performed simultaneously.
[0206] Aspects of the present disclosure are described above with reference to the flowchart and / or block diagram of the method, device (system) and computer program product according to the embodiment of the present disclosure. It should be understood that each box in the flowchart and / or block diagram and the combination of each box in the flowchart and / or block diagram can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device to produce a machine so that these instructions executed by the processor of the computer or other programmable data processing device enable the implementation of the function / action specified in one or more boxes of the flowchart and / or block diagram. Such a processor can be, but is not limited to, a general-purpose processor, a special-purpose processor, a special application processor, or a field programmable logic circuit. It can also be understood that each box in the block diagram and / or flowchart and the combination of boxes in the block diagram and / or flowchart can also be implemented by dedicated hardware that performs a specified function or action, or can be implemented by a combination of dedicated hardware and computer instructions.
[0207] The above is only a specific implementation of the present invention. Those skilled in the art can clearly understand that for the convenience and simplicity of description, the specific working process of the system, module and unit described above can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here. It should be understood that the protection scope of the present invention is not limited to this. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed by the present invention, and these modifications or replacements should be covered within the protection scope of the present invention.
Claims
1. A clock self-calibration method for a receiver, characterized in that: include: In response to the receiver being powered on again, obtaining the system time saved by the receiver when it was last powered off and a clock deviation parameter of the real-time clock of the receiver relative to the system time; Determine a calibration amount of the real-time clock according to the clock deviation parameter and timing data of the real-time clock of the receiver from the last shutdown to the restart; The real-time clock is time-calibrated according to the calibration amount, the system time when the system was last shut down, and the timing data.
2. The method according to claim 1, characterized in that In response to the receiver being powered on again, the method further includes: When the receiver is turned on and satellite positioning is completed, correcting the local time of the receiver; Determining the system time according to the corrected local time; The clock deviation parameter is determined according to the system time.
3. The method according to claim 2, characterized in that The correcting the local time of the receiver comprises: After the receiver completes satellite positioning, obtaining a current clock difference of the local time; The local time is corrected according to the current clock difference.
4. The method according to claim 1, characterized in that: Also includes: When the receiver is powered on and satellite positioning is completed, the real-time clock is periodically calibrated according to the corrected local time.
5. The method according to claim 1, characterized in that The clock deviation parameter includes at least one of clock error, mean of clock error, standard deviation of clock error, clock drift, mean of clock drift, standard deviation of clock drift, clock speed, mean of clock speed and standard deviation of clock speed.
6. The method according to claim 5, characterized in that Acquiring a clock deviation parameter of the real-time clock of the receiver relative to the system time includes: Obtaining a first count value of the real-time clock at a corrected first system time point and a second count value at a corrected second system time point; According to the first count value and the second count value, a count difference is obtained as a true value of the system time at the second system time point; The clock error of the real-time clock at the second system time point is determined according to the true value of the system time, the frequency value and the clock cycle of the real-time clock.
7. The method according to claim 6, characterized in that Acquiring a clock deviation parameter of the real-time clock of the receiver relative to the system time includes: The clock drift of the real-time clock at the second system time point is determined according to the clock difference of the real-time clock at the first system time point, the clock difference of the real-time clock at the second system time point, and the time difference between the first system time point and the second system time point.
8. The method according to claim 7, characterized in that Acquiring a clock deviation parameter of the real-time clock of the receiver relative to the system time includes: The clock speed of the real-time clock at the second system time point is determined according to the clock drift of the real-time clock at the first system time point, the clock drift of the real-time clock at the second system time point, and the time difference.
9. The method according to any one of claims 6 to 8, characterized in that: Acquiring a clock deviation parameter of the real-time clock of the receiver relative to the system time includes: Obtain at least one of a clock error, a clock drift, and a clock speed at each system time point within a preset time period; Determine the mean and standard deviation of the clock error at each system time point; Determine the mean and standard deviation of the clock drift according to the clock drift of each system time point; According to the clock speed at each system time point, a mean value and a standard deviation of the clock speed are determined.
10. The method according to claim 9, characterized in that Determining the calibration amount of the real-time clock according to the clock deviation parameter and the timing data of the real-time clock of the receiver from the last shutdown to the restart includes: A calibration amount of the real-time clock is determined according to the mean value of the clock difference, the mean value of the clock drift, the mean value of the clock speed and the timing data.
11. The method according to claim 9, characterized in that Also includes: Determining the time uncertainty of the calibrated real-time clock according to the standard deviation of the clock difference, the standard deviation of the clock drift, the standard deviation of the clock speed and the timing data; Determining a target strategy from preset satellite signal acquisition strategies according to the time uncertainty and a preset uncertainty threshold; Satellite positioning is performed according to the target strategy.
12. The method according to claim 1, characterized in that Also includes: Obtaining satellite ephemeris, satellite almanac and the location range of the receiver stored in the receiver; Satellite positioning is performed based on the real-time clock after time calibration, the satellite ephemeris, the satellite almanac and the location range of the receiver.
13. The method according to claim 1, characterized in that Acquiring a clock deviation parameter of the real-time clock of the receiver relative to the system time includes: Determining whether the receiver has completed satellite positioning when powered on; When the receiver completes satellite positioning, obtaining a clock deviation parameter at each system time point after the satellite positioning is completed, and determining the clock deviation parameter of the real-time clock of the receiver relative to the system time; When the receiver fails to complete satellite positioning at the first time point and completes satellite positioning after a preset time threshold, obtaining clock deviation parameters of each system time point before the first time point, and determining them as clock deviation parameters of the real-time clock of the receiver relative to the system time; When the receiver fails to complete satellite positioning at a first time point and the time duration is greater than the preset time threshold, the clock deviation parameters of each time point before the first time point are cleared.
14. A clock self-calibration device for a receiver, characterized in that: include: An acquisition module, configured to acquire, in response to the receiver being powered on again, a system time stored by the receiver when it was last powered off and a clock deviation parameter of a real-time clock of the receiver relative to the system time; A determination module, configured to determine a calibration amount of the real-time clock according to the clock deviation parameter and timing data of the real-time clock of the receiver from the last shutdown to the restart; The calibration module is used to calibrate the real-time clock according to the calibration amount, the system time when the system was last shut down, and the timing data.
15. A receiver, characterized in that: include: a processor, and a memory storing computer program instructions; The processor reads and executes the computer program instructions to implement the method according to any one of claims 1-13.