Time-frequency stabilization system based on satellite time service

Abstract

The invention relates to a time-frequency stabilization system based on satellite time service, and belongs to the technical field of frequency stabilization. The system comprises a satellite receiver, a main control module, a rubidium atomic frequency standard module, a frequency phase locking module and a time code generation module. According to the scheme, the output time-frequency signal has high stability, and after the time-frequency signal can be timed, corrected and tamed for 24H by using a satellite signal, the time deviation is less than or equal to 1 microsecond within 72 hours by using the frequency stability of the rubidium atomic frequency standard and the main control module, the frequency phase locking module and the time code generation module under the condition that the satellite signal cannot be received. And the technology implementation cost of the time-frequency stabilization method is relatively low.

Description

Technical Field

[0001] The invention belongs to the technical field of frequency stabilization, and in particular relates to a time and frequency stabilization system based on satellite timing. Background Art

[0002] Time-frequency stabilization technology is of multifaceted importance, primarily in the following key areas:

[0003] In the field of communications, time and frequency stabilization technology is the cornerstone for ensuring accurate and fast information transmission. It can ensure clock synchronization between different communication nodes, avoid delays, distortions and errors in signal transmission, and thus improve communication quality and efficiency. For high-speed data transmission, 5G and future communication network development, the accuracy of time and frequency stabilization technology directly affects the performance and capacity of the system.

[0004] In navigation and positioning systems, such as GPS, etc., time and frequency stabilization technology is crucial. The signals transmitted by satellites require extremely precise time and frequency references so that the user receiving end can accurately calculate its own position and speed. High-precision time and frequency stabilization technology can greatly improve the accuracy of navigation and positioning, and provide reliable location services for many applications such as transportation, surveying and exploration.

[0005] In scientific research, time-frequency stabilization technology plays a decisive role in high-precision measurements such as astronomical observations and physical experiments. For example, in observing the movement of distant galaxies and studying the characteristics of microscopic particles, precise time and frequency measurements can help scientists obtain more accurate data and promote the development and innovation of scientific theories.

[0006] In short, time-frequency stabilization technology plays an indispensable role in many key areas of modern society. Its continuous development and innovation have far-reaching significance for promoting technological progress, ensuring social operation and promoting economic development. Summary of the invention

[0007] 1. Technical issues to be resolved

[0008] The technical problem to be solved by the present invention is how to provide a time-frequency stabilization system based on satellite timing to solve the problem of high-precision time-frequency stabilization.

[0009] (II) Technical solution

[0010] In order to solve the above technical problems, the present invention proposes a time and frequency stabilization system based on satellite timing, the system comprising: a satellite receiver, a main control module, a rubidium atomic frequency standard module, a frequency phase locking module and a time code generation module;

[0011] Satellite receiver, used to output 1PPS+TOD signal to the main control module;

[0012] Main control module: receives 1PPS+TOD signal from satellite receiver, uses frequency source signal of rubidium atomic frequency standard module to establish, generate and output local time reference, and uses satellite receiving standard time for calibration. Main control module outputs 1PPS signal to rubidium atomic frequency standard module, and outputs 1PPS+TOD signal to time code generation module;

[0013] Rubidium atomic frequency standard module: It is composed of a high-performance rubidium atomic clock, used to receive 1PPS signals and output 10MHz standard frequency signals;

[0014] Frequency phase-locked module: The 10MHz standard frequency signal output by the rubidium atomic clock is locked by PLL phase-locked loop technology. The high-precision frequency signal is used as a reference to calibrate the frequency output by the crystal oscillator in the frequency phase-locked module to achieve the purpose of outputting high-precision frequency. The frequency phase-locked module outputs 10MHz and 100MHz signals, and at the same time outputs 10MHz signals to the time code generation module;

[0015] Time code generation module: The time code generation module includes hardware and software parts, which are used to obtain 1PPS+TOD signals from the main control module and 10MHz signals from the frequency phase-locked module, thereby outputting 1PPS, B code signals, TOD signal generation, level conversion, input / output control and bus transmission control.

[0016] (III) Beneficial effects

[0017] The present invention proposes a time-frequency stabilization system based on satellite timing. The time-frequency signal output by the scheme of the present invention has high stability and can use satellite signal timing to correct its own clock. After taming for 24 hours, it can also use the frequency stability ability of the rubidium atomic frequency standard to keep time with the main control module, frequency phase-locking module, and time code generation module within 72 hours when the satellite signal cannot be received, and the time deviation is ≤1μs. In addition, the technical implementation cost of the time-frequency stabilization method is relatively low. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 It is the principle framework diagram of the present invention;

[0019] Figure 2 This is the schematic diagram of the main control module;

[0020] Figure 3 is a P-codeword state machine;

[0021] Figure 4 is the B code element state machine;

[0022] Figure 5 This is the workflow diagram of the B code sending module;

[0023] Figure 6 This is the structural block diagram of the 10MHz phase-locked module. DETAILED DESCRIPTION

[0024] In order to make the purpose, content and advantages of the present invention more clear, the specific implementation methods of the present invention are further described in detail below in conjunction with the drawings and examples.

[0025] The technical problem that this technology aims to solve is how to make the time and frequency signals output by satellite timing equipment have higher accuracy and stability.

[0026] The invention provides a time-frequency stabilization system based on satellite timing. The system mainly comprises: a satellite receiver, a main control module, a rubidium atomic frequency standard module, a frequency phase-locking module, a time code generating module, and embedded software.

[0027] Satellite receiver: First, the satellite signal is received through an external antenna. The signal is preamplified by LNA, converted to RF / IF, and sampled by A / D to form an intermediate frequency digital signal, which is then fed into the baseband signal processing unit. The baseband signal processing unit generates a local reference pseudo code to achieve pseudo code capture, pseudo code and carrier tracking, and obtain the carrier Doppler frequency and carrier phase. These basic measurement data are sent to the demodulation processing unit, which further processes these basic measurement data to achieve precise positioning, speed measurement, and navigation timing. At the same time, the specific requirements of the external interface control procedure are completed, and the 1PPS+TOD signal is output to the main control module.

[0028] Main control module: Receives 1PPS+TOD signal from satellite receiver, uses frequency source signal of rubidium atomic frequency standard module to establish, generate and output local time reference, and uses satellite received standard time for calibration. Main control module outputs 1PPS signal to rubidium atomic frequency standard module, and outputs 1PPS+TOD signal to time code generation module.

[0029] Rubidium atomic frequency standard module: It is composed of a high-performance rubidium atomic clock, used to receive 1PPS signals and output 10MHz standard frequency signals;

[0030] Frequency phase-locked module: The 10MHz standard frequency signal output by the rubidium atomic clock is locked using the PLL phase-locked loop technology. The high-precision frequency signal is used as a reference to calibrate the frequency output of the crystal oscillator in the frequency phase-locked module to achieve the purpose of outputting high-precision frequency. The frequency phase-locked module outputs 10MHz and 100MHz signals, and simultaneously outputs 10MHz signals to the time code generation module.

[0031] Time code generation module: The time code generation module includes hardware and software parts, and mainly completes the functions of obtaining 1PPS+TOD signals from the main control module and 10MHz signals from the frequency phase-locked module, thereby outputting 1PPS, B code signals, TOD signal generation, level conversion, input / output control and bus transmission control.

[0032] Embodiment 1:

[0033] 1. Main control module

[0034] like Figure 2 As shown, in the satellite receiving mode, the signal processing module and CPU in the main control module process the satellite time base signal, output the PPS_BP signal, output the second pulse signal PPS_OUT through the first digital isolator, output the TOD_BP signal and output the time message information TOD_OUT through the first bus transceiver and the first RS232; the signal processing module receives the second pulse PPS_Timebase and the time message information TOD_Timebase from the satellite receiver (to obtain unified timing information), the second pulse is output 1PPS_IN through the second digital isolator and input to the signal processing module, the time message information is input to the signal processing module through the second RS232 and the second bus transceiver, and is processed by the signal processing module and the CPU, thereby achieving unity with the satellite time.

[0035] based on Figure 2 Schematic diagram, combined with hardware and logic algorithm design, the present invention can be designed to provide 1PPS+TOD time signal output, and ensure that the synchronization accuracy of the 1PPS output signal and the time base 1PPS or B code DC signal input reference edge is better than 100ns.

[0036] 2. Time code generation module

[0037] The time code generation module generates the B code signal output according to the 1PPS signal from the main control module and the TOD information transmitted by the main control module. The B code transmission module has three parts, including: 10ms counter, P code element module and B code element module. The most important part is the B code element module composed of a two-stage state machine. The functions of each part are as follows:

[0038] 10ms counter: The main function of this module is to generate a 10ms counting signal as the basis for generating the 0 code element of 2ms, the 1 code element of 5ms, and the P code element of 8ms.

[0039] P code element module: This module consists of a two-stage state machine, which is used to generate the P code signal of the B code. Figure 3 shown.

[0040] B code element module: This module consists of a two-stage state machine, which synthesizes a complete B code DC signal based on the external input 1PPS signal and the 56-bit B code signal. Figure 4 shown.

[0041] The working process of B code sending module is as follows Figure 5 shown.

[0042] Among them, the B code AC signal is generated by the B code DC signal after carrier modulation. Combining hardware and algorithm design, the system of the present invention can be designed to provide 3-way B code DC signal output and 4-way B code AC signal output, and ensure that the synchronization accuracy of the B code DC signal output signal and the device 1PPS output signal is better than 100ns, and the synchronization accuracy of the B code AC signal output signal and the device 1PPS output signal is better than 1μs.

[0043] 3. Frequency phase-locked module

[0044] In order to better output the 10MHz frequency, the present invention adopts the PLL phase-locked loop phase-locking technology. The high-precision frequency signal is used as a reference to calibrate the frequency output of the crystal oscillator to achieve the purpose of outputting high-precision frequency. The advantage of not using the chip multiplication output frequency but choosing to control the crystal oscillator output is that the analog signal output by the crystal oscillator is more stable and has better performance. The 10MHz crystal oscillator in the frequency phase-locked module adopts a high-precision, high-stability crystal oscillator.

[0045] A phase-locked loop is a feedback circuit that synchronizes the phase of the circuit clock with an external clock. PLL achieves synchronization by comparing the phase of the external signal with the phase of the high-stability crystal oscillator. During the comparison process, the phase-locked loop circuit will continuously adjust the clock phase of the local crystal oscillator according to the phase of the external signal until the phases of the two signals are synchronized. In data acquisition systems, phase-locked loops are a very useful synchronization technology because different data acquisition boards can share the same sampling clock through phase-locked loops. Therefore, the local clocks on all boards are also synchronized, and thus the sampling clocks are also synchronized. Because the sampling clocks of each board are synchronized, data can be collected at strictly the same time.

[0046] The frequency phase-locked module receives 10MHz from the bus, and converts it into an error signal PD by comparing the phase difference between the frequency output of the 10MHz crystal oscillator from the voltage oscillator and the input 10MHz phase through the phase detector. The loop filter uses a low-pass filter to convert the error signal into a DC voltage and input it to the voltage oscillator for it to adjust the crystal oscillator voltage control to achieve the purpose of adjusting the frequency. After phase locking, a stable 10MHz input time code generation module is output for system use. Figure 6 As shown:

[0047] Based on the above schematic diagram, the device design provides an optimized 10MHz frequency standard signal output. Combined with the rubidium atomic frequency standard and algorithm design, it can ensure that the frequency accuracy of the 10MHz frequency standard signal is better than 1×10e after one day of continuous satellite tracking. -12 .

[0048] The time-frequency signal output by the solution of the present invention has high stability and can use satellite signal timing to correct its own clock. After taming for 24 hours, it can also use the frequency stability ability of the rubidium atomic frequency standard to keep time with the main control module, frequency phase locking module, and time code generation module within 72 hours when the satellite signal cannot be received, and the time deviation is ≤1μs. In addition, the technical implementation cost of the time-frequency stabilization method is relatively low.

[0049] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the technical principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A time and frequency stabilization system based on satellite timing, characterized in that: The system comprises: a satellite receiver, a main control module, a rubidium atomic frequency standard module, a frequency phase locking module and a time code generation module; Satellite receiver, used to output 1PPS+TOD signal to the main control module; Main control module: receives 1PPS+TOD signal from satellite receiver, uses frequency source signal of rubidium atomic frequency standard module to establish, generate and output local time reference, and uses satellite receiving standard time for calibration. Main control module outputs 1PPS signal to rubidium atomic frequency standard module, and outputs 1PPS+TOD signal to time code generation module; Rubidium atomic frequency standard module: It is composed of a high-performance rubidium atomic clock, used to receive 1PPS signals and output 10MHz standard frequency signals; Frequency phase-locked module: The 10MHz standard frequency signal output by the rubidium atomic clock is locked by PLL phase-locked loop technology. The high-precision frequency signal is used as a reference to calibrate the frequency output by the crystal oscillator in the frequency phase-locked module to achieve the purpose of outputting high-precision frequency. The frequency phase-locked module outputs 10MHz and 100MHz signals, and at the same time outputs 10MHz signals to the time code generation module; Time code generation module: The time code generation module includes hardware and software parts, which are used to obtain 1PPS+TOD signals from the main control module and 10MHz signals from the frequency phase-locked module, thereby outputting 1PPS, B code signals, TOD signal generation, level conversion, input / output control and bus transmission control.

2. The satellite timing-based time-frequency stabilization system according to claim 1, characterized in that: Satellite receiver: First, the satellite signal is received through an external antenna. The signal is pre-amplified by LNA, converted to RF / IF, and sampled by A / D to form an intermediate frequency digital signal, which is then fed into the baseband signal processing unit. The baseband signal processing unit generates a local reference pseudo code to achieve pseudo code capture, pseudo code and carrier tracking, and obtain the carrier Doppler frequency and carrier phase. These basic measurement data are sent to the demodulation processing unit. Through further processing of these basic measurement data, precise positioning, speed measurement, and navigation timing are achieved. At the same time, the specific requirements of the external interface control procedure are met, and a 1PPS+TOD signal is output.

3. The satellite timing-based time-frequency stabilization system according to claim 1, characterized in that: The satellite receiver is a satellite receiver.

4. The satellite timing-based time-frequency stabilization system according to any one of claims 1 to 3, characterized in that: The signal processing module and CPU in the main control module process the satellite's time base signal, output the PPS_BP signal, output the second pulse signal PPS_OUT via the first digital isolator, output the TOD_BP signal and output the time message information TOD_OUT via the first bus transceiver and the first RS232; the signal processing module receives the second pulse PPS_Timebase and the time message information TOD_Timebase from the satellite receiver, the second pulse is output 1PPS_IN via the second digital isolator and input into the signal processing module, the time message information is input into the signal processing module via the second RS232 and the second bus transceiver, and is processed by the signal processing module and the CPU, thereby achieving unification with the satellite time.

5. The satellite timing-based time-frequency stabilization system according to claim 4, characterized in that: The time code generation module generates a B code signal output according to the 1PPS signal from the main control module and the TOD information transmitted from the main control module; The B code sending module has three parts, including: 10ms counter, P code element module and B code element module.

6. The satellite timing-based time-frequency stabilization system according to claim 5, characterized in that: The 10ms counter is used to generate a 10ms counting signal as the basis for generating the 0 code element of 2ms, the 1 code element of 5ms, and the P code element of 8ms.

7. The satellite timing-based time-frequency stabilization system according to claim 6, characterized in that: The P code element module is composed of a two-stage state machine and is used to generate the P code signal of the B code.

8. The satellite timing-based time-frequency stabilization system according to claim 7, characterized in that: The B code element module is composed of a two-stage state machine, which is used to synthesize a complete B code DC signal based on the external input 1PPS signal and the 56-bit B code signal.

9. The satellite timing-based time-frequency stabilization system according to claim 8, characterized in that: The B-code AC signal is generated by carrier modulation of the B-code DC signal. Combining hardware and algorithm design, the system provides 3-channel B-code DC signal output and 4-channel B-code AC signal output, and ensures that the synchronization accuracy of the B-code DC signal output signal and the device 1PPS output signal is better than 100ns, and the synchronization accuracy of the B-code AC signal output signal and the device 1PPS output signal is better than 1μs.

10. The satellite timing-based time-frequency stabilization system according to claim 8, characterized in that: The frequency phase-locked module receives 10MHz from the bus, and converts it into an error signal PD by comparing the phase difference between the frequency output by the 10MHz crystal oscillator from the voltage oscillator and the input 10MHz phase through the phase detector. The loop filter uses a low-passband filter to convert the error signal into a DC voltage and input it to the voltage oscillator for it to adjust the crystal oscillator voltage control to achieve the purpose of adjusting the frequency. After phase locking, it outputs a stable 10MHz input time code generation module for system use.

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