Error determination method, device and equipment of photoetching simulation model, medium and product
By discretizing the real and simulated lithography profiles of the lithography simulation model and building the quad-tree, the problem of low error determination efficiency in the existing technology is solved, and the effect of rapid positioning of local errors and improving error determination efficiency is achieved.
Patent Information
- Application Number
- CN202510307461.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-13
- Publication Date
- 2025-05-13
- Estimated Expiration
- 2045-03-13
AI Technical Summary
The existing lithography simulation model error determination method has a large amount of calculation and cannot quickly locate local errors, resulting in low error determination efficiency.
By discrete the real lithography profile and the simulated lithography profile, the first quadrant and second quadrant trees are constructed, and the shortest distance in each contour area is quickly positioned, thereby determining the error of the lithography simulation model.
The calculation amount is reduced, and the local error of the lithography simulation model is quickly positioned, improving the error determination efficiency.
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Figure CN119987159A_ABST
Abstract
Description
Technical Field
[0001] The present application belongs to the field of photolithography simulation technology, and in particular, relates to a method, device, equipment, medium and product for determining an error of a photolithography simulation model. Background Art
[0002] In the semiconductor manufacturing process, photolithography is the process of printing the pattern on the mask onto the wafer through light exposure. Due to the existence of physical effects such as diffraction and interference, there is a deviation between the actual exposure area and the expected exposure area, so it is necessary to simulate and predict the photolithography process through a photolithography simulation model. However, due to the complexity of the photolithography process, the accuracy of the photolithography simulation model is difficult to guarantee. Therefore, it is necessary to continuously verify and optimize the model based on the error of the photolithography simulation model.
[0003] Currently, the error of the lithography simulation model is mainly measured by calculating the area difference between the real lithography profile and the simulated lithography profile or the average relative distance of pixels.
[0004] However, this method has a large amount of calculation and can only be used to simply measure the global error of the lithography simulation model. It cannot quickly locate the local error of the lithography simulation model, resulting in low error determination efficiency of the lithography simulation model. Summary of the invention
[0005] Embodiments of the present application provide a method, device, equipment, medium and product for determining an error of a lithography simulation model, which can improve the efficiency of determining an error of a lithography simulation model.
[0006] According to one aspect of an embodiment of the present application, a method for determining an error of a lithography simulation model is provided, comprising:
[0007] Acquire a real lithography profile of a target mask pattern and a simulated lithography profile of the target mask pattern output by a lithography simulation model;
[0008] Discretize the real lithography profile and the simulated lithography profile respectively, and construct a first quadtree, wherein the parent node of the first quadtree is the profile area that matches the real lithography profile and the simulated lithography profile, and the child nodes of the first quadtree are the coordinates of the real discrete points on the real lithography profile and the coordinates of the simulated discrete points on the simulated lithography profile;
[0009] Determine the shortest distance from each real discrete point to the simulated lithography contour, and the shortest distance from each simulated discrete point to the real lithography contour according to the first quadtree;
[0010] The shortest distances are stored in the isomorphic index tree corresponding to the first quadtree, respectively, to construct a second quadtree, wherein the parent node of the second quadtree is the matching contour area, and the child nodes of the second quadtree are the shortest distances from each real discrete point to the simulated lithography contour, and the shortest distances from each simulated discrete point to the real lithography contour;
[0011] According to the second quadtree, an error of the lithography simulation model is determined.
[0012] According to one aspect of an embodiment of the present application, there is provided an error determination device for a lithography simulation model, comprising:
[0013] A profile acquisition module, used to acquire a real lithography profile of a target mask pattern and a simulated lithography profile of a target mask pattern output by a lithography simulation model;
[0014] A quadtree construction module is used to discretize the real lithography profile and the simulated lithography profile respectively to construct a first quadtree, wherein the parent node of the first quadtree is the profile area that matches the real lithography profile and the simulated lithography profile, and the child nodes of the first quadtree are the coordinates of the real discrete points on the real lithography profile and the coordinates of the simulated discrete points on the simulated lithography profile;
[0015] A distance determination module, used to determine the shortest distance from each real discrete point to the simulated lithography contour, and the shortest distance from each simulated discrete point to the real lithography contour according to the first quadtree;
[0016] The quadtree construction module is further used to store the shortest distances in the isomorphic index tree corresponding to the first quadtree, respectively, to construct a second quadtree, the parent node of the second quadtree is the matching contour area, and the child nodes of the second quadtree are the shortest distances from each real discrete point to the simulated lithography contour, and the shortest distances from each simulated discrete point to the real lithography contour;
[0017] The error determination module is used to determine the error of the lithography simulation model according to the second quadtree.
[0018] According to one aspect of an embodiment of the present application, an electronic device is provided, which includes: a memory and a program or instruction stored in the memory and executable on a processor, wherein when the program or instruction is executed by the processor, an error determination method for a lithography simulation model as provided in any aspect of the above-mentioned embodiment of the present application is implemented.
[0019] According to one aspect of an embodiment of the present application, a readable storage medium is provided, on which a program or instruction is stored. When the program or instruction is executed by a processor, a method for determining an error of a lithography simulation model as provided in any aspect of the above-mentioned embodiment of the present application is implemented.
[0020] According to one aspect of an embodiment of the present application, a computer program product is provided. When instructions in the computer program product are executed by a processor of an electronic device, the electronic device executes the error determination method of the lithography simulation model provided in any aspect of the above-mentioned embodiment of the present application.
[0021] In the error determination method of the lithography simulation model provided by the embodiment of the present application, the real lithography profile and the simulated lithography profile are first discretized to obtain discrete points. In this way, it is only necessary to screen out a plurality of representative position points from the lithography profile for calculation, without calculating each position, which can reduce the amount of calculation. Then, a first quadtree is constructed according to the discrete points, wherein the parent node of the first quadtree is used to characterize the contour area, and the child node of the first quadtree is used to store the coordinates of the real discrete points and the coordinates of the simulated discrete points in the contour area. And each shortest distance is stored in the isomorphic index tree corresponding to the first quadtree, and a second quadtree is constructed. In this way, the shortest distances in each contour area can be quickly located by the second quadtree, so as to quickly determine the local errors of the lithography simulation model in each contour area. In summary, the embodiment of the present application can reduce the amount of calculation by discretization processing and constructing a quadtree, and quickly locate the local errors of the lithography simulation model, thereby improving the error determination efficiency of the lithography simulation model. BRIEF DESCRIPTION OF THE DRAWINGS
[0022] In order to more clearly illustrate the technical solution of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.
[0023] Figure 1 It is a flowchart of a method for determining an error of a lithography simulation model provided by an embodiment of the present application;
[0024] Figure 2 is a flow chart of S102 provided by an embodiment of the present application;
[0025] Figure 3 It is a schematic diagram of a quadtree construction principle provided by an embodiment of the present application;
[0026] Figure 4 is a flow chart of S103 provided by an embodiment of the present application;
[0027] Figure 5 is a schematic diagram of the shortest distance from a real discrete point to a simulated lithography profile provided by an embodiment of the present application;
[0028] Figure 6 is a flow chart of S401 provided by an embodiment of the present application;
[0029] Figure 7 This is a first flow chart of S105 provided in one embodiment of the present application;
[0030] Figure 8 This is a second flow diagram of S105 provided in one embodiment of the present application;
[0031] Fig. 9 is a flow chart of S101 provided by an embodiment of the present application;
[0032] Fig.10 It is a structural schematic diagram of an error determination device for a lithography simulation model provided by an embodiment of the present application;
[0033] Fig.11 It is a structural schematic diagram of an error determination device for a lithography simulation model provided by an embodiment of the present application. DETAILED DESCRIPTION
[0034] The features and exemplary embodiments of various aspects of the present application will be described in detail below. In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain the present application, rather than to limit the present application. For those skilled in the art, the present application can be implemented without the need for some of these specific details. The following description of the embodiments is only to provide a better understanding of the present application by illustrating the examples of the present application.
[0035] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the statement "include..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.
[0036] It should be noted that the acquisition, storage, use, and processing of data in the technical solution of this application are in compliance with the relevant provisions of national laws and regulations.
[0037] It should be noted that in the embodiments of the present application, certain software, components, models and other existing solutions in the industry may be mentioned, and they should be regarded as exemplary. Their purpose is only to illustrate the feasibility of implementing the technical solution of the present application, but it does not mean that the applicant has or will necessarily use the solution.
[0038] In the semiconductor manufacturing process, photolithography is a key step in printing the pattern on the mask onto the wafer through light exposure. However, due to physical effects such as diffraction and interference, there is a deviation between the actual exposure area and the expected exposure area. In order to predict and compensate for these deviations, photolithography simulation models are widely used.
[0039] However, existing methods for determining errors in lithography simulation models are inefficient. Specifically, these methods usually measure errors by calculating the area difference between the real lithography profile and the simulated lithography profile or the average relative distance of pixels. This method is not only computationally intensive, but can only simply measure global errors and cannot quickly locate local errors, which results in low error determination efficiency in lithography simulation models.
[0040] The purpose of the present application is to provide an error determination method, device, equipment, medium and product of a lithography simulation model. In the error determination method of the lithography simulation model provided in the embodiment of the present application, the real lithography profile and the simulated lithography profile are first discretized to obtain discrete points. In this way, it is only necessary to screen out a plurality of representative position points from the lithography profile for calculation, without calculating each position, which can reduce the amount of calculation. Then, a first quadtree is constructed according to the discrete points, wherein the parent node of the first quadtree is used to characterize the contour area, and the child node of the first quadtree is used to store the coordinates of the real discrete points and the coordinates of the simulated discrete points in the contour area. And each shortest distance is stored in the isomorphic index tree corresponding to the first quadtree, and a second quadtree is constructed. In this way, the shortest distances in each contour area can be quickly located by the second quadtree, so as to quickly determine the local errors of the lithography simulation model in each contour area. In summary, the embodiment of the present application can reduce the amount of calculation and quickly locate the local errors of the lithography simulation model through discretization processing and construction of quadtrees, thereby improving the error determination efficiency of the lithography simulation model.
[0041] The following describes specific embodiments of the method, device, equipment, medium and product for determining the error of the lithography simulation model provided by the embodiments of the present application. First, the method for determining the error of the lithography simulation model is introduced.
[0042] Figure 1 A flow chart of an error determination method for a lithography simulation model is provided. The error determination method for a lithography simulation model can be applied to a server. The error determination method for a lithography simulation model can include the following steps S101 to S105.
[0043] S101, obtaining a real lithography profile of a target mask pattern and a simulated lithography profile of the target mask pattern output by a lithography simulation model.
[0044] In this embodiment, the real photolithography profile is used to characterize the real wafer pattern profile obtained by printing the mask pattern on the mask plate onto the wafer through light exposure.
[0045] The lithography simulation model refers to a mathematical model used to simulate the lithography process, which can be implemented by an optical approximation model or an electromagnetic field simulation model.
[0046] The simulated lithography profile is used to characterize the simulated wafer pattern profile obtained by simulating the lithography process through a lithography simulation model.
[0047] As an example, the server first obtains a real lithography profile image of the target mask pattern through a scanning electron microscope with a resolution of 1nm / pixel. At the same time, a lithography simulation model based on the Hopkins equation is used to generate a simulated lithography profile image of the target mask pattern with a resolution of 1nm / pixel.
[0048] Then, edge detection and contour extraction are performed on the real lithography contour image and the simulated lithography contour image. The Canny edge detection algorithm is used, and the threshold is set to a low threshold of 50 and a high threshold of 150, so as to extract the real lithography contour and the simulated lithography contour.
[0049] S102, discretize the real lithography contour and the simulated lithography contour respectively, and construct a first quadtree, wherein the parent node of the first quadtree is the contour area that matches the real lithography contour and the simulated lithography contour, and the child nodes of the first quadtree are the coordinates of the real discrete points on the real lithography contour and the coordinates of the simulated discrete points on the simulated lithography contour.
[0050] In this embodiment, the discretization process is used to characterize the process of converting a continuous contour curve into a series of discrete points.
[0051] A quadtree is a spatial index tree used to store two-dimensional Euclidean space point sets. Each parent node of the quadtree represents a contour area that matches the real lithography contour and the simulated lithography contour, and each parent node has up to four child nodes, each of which usually stores the coordinates of the real discrete points on the real lithography contour and the simulated discrete points on the simulated lithography contour in the matching contour area represented by its parent node. The quadtree recursively divides the two-dimensional space into smaller areas to facilitate fast query and management of point sets in the space.
[0052] As an example, the server first takes the entire lithography contour area as the root node, and then recursively divides the real lithography contour and the simulated lithography contour into multiple contour areas in the same way, and takes a contour area that matches the real lithography contour and the simulated lithography contour as a parent node of the first quadtree.
[0053] At the same time, a plane rectangular coordinate system is constructed with any point in the lithography contour area as the origin. Then, in the contour area space after recursive division, the coordinates of the real discrete points on the real lithography contour and the simulated discrete points on the simulated lithography contour in the plane rectangular coordinate system are stored in the child nodes under the corresponding parent nodes.
[0054] S103, determining the shortest distance from each real discrete point to the simulated lithography contour, and the shortest distance from each simulated discrete point to the real lithography contour according to the first quadtree.
[0055] In this embodiment, the shortest distance refers to the shortest distance from a point to a curve, which can be specifically achieved by using a method for calculating the distance from a point to a line segment.
[0056] As an example, for each real discrete point of the real lithography contour, the server quickly searches for the nearest simulated discrete point in the first quadtree, then calculates the distance from the real discrete point to the adjacent line segments of the nearest simulated discrete point, and takes the minimum value as the shortest distance from the real discrete point to the simulated lithography contour.
[0057] At the same time, for each simulated discrete point of the simulated lithography profile, the shortest distance from the simulated discrete point to the real lithography profile is calculated in the same manner as above.
[0058] S104, storing each shortest distance in a homogeneous index tree corresponding to the first quadtree, respectively, to construct a second quadtree, wherein the parent node of the second quadtree is the matching contour area, and the child nodes of the second quadtree are the shortest distances from each real discrete point to the simulated lithography contour, and the shortest distances from each simulated discrete point to the real lithography contour.
[0059] In this embodiment, the isomorphic index tree is used to represent the index tree of the same structure, that is, the second quadtree is isomorphic to the first quadtree. However, the child nodes of the first quadtree are used to store the coordinates of the real discrete points and the simulated discrete points in the contour area, and the child nodes of the second quadtree are used to store the shortest distance from each real discrete point in the contour area to the simulated lithography contour, and the shortest distance from each simulated discrete point to the real lithography contour.
[0060] As an example, the server constructs a homogeneous index tree corresponding to the first quadtree according to the structure of the first quadtree, and then stores the shortest distances calculated above into the corresponding child nodes of the homogeneous index tree, thereby obtaining a second quadtree.
[0061] As shown in Table 1 below, a data structure table of a second quadtree is provided. Each row corresponds to a discrete point. The first column represents the number of the discrete point, and the second column represents the contour identification information to which the discrete point belongs, where 1 represents the real lithography contour and 2 represents the simulated lithography contour. The third column represents the parent node number, the fourth column and the fifth column represent the X-axis coordinate and the Y-axis coordinate of the discrete point, respectively, and the sixth column represents the shortest distance corresponding to the discrete point.
[0062]
[0063] Table 1 Data structure of the second quadtree
[0064] S105 , determining an error of the lithography simulation model according to the second quadtree.
[0065] In this embodiment, the server analyzes the error of the lithography simulation model based on the second quadtree. Specifically, the mean of the shortest distances included in each parent node is calculated as the local error of the contour area corresponding to the parent node. At the same time, the global mean of all the shortest distances is calculated as the overall error of the lithography simulation model.
[0066] Through this embodiment, the real lithography contour and the simulated lithography contour are first discretized to obtain discrete points. In this way, it is only necessary to screen out a plurality of representative position points from the lithography contour for calculation, without calculating each position, which can reduce the amount of calculation. Then, a first quadtree is constructed according to the discrete points, wherein the parent node of the first quadtree is used to characterize the contour area, and the child node of the first quadtree is used to store the coordinates of the real discrete points and the coordinates of the simulated discrete points in the contour area. And each shortest distance is stored in the isomorphic index tree corresponding to the first quadtree, and a second quadtree is constructed. In this way, the second quadtree can quickly locate the shortest distances in each contour area, thereby quickly determining the local errors of the lithography simulation model in each contour area. In summary, the embodiment of the present application can reduce the amount of calculation and quickly locate the local errors of the lithography simulation model through discretization processing and construction of a quadtree, thereby improving the error determination efficiency of the lithography simulation model.
[0067] As an optional embodiment, Figure 2 As shown, S102 may specifically include the following S201 to S205:
[0068] S201, dividing the real lithography profile and the simulated lithography profile into profile regions respectively, to obtain a plurality of first profile regions corresponding to the real lithography profile and a plurality of second profile regions corresponding to the simulated lithography profile;
[0069] S202, constructing a parent node of a spatial index tree based on the matching result of the first contour area and the second contour area;
[0070] S203, discretizing the first contour area and the second contour area respectively according to a preset interval distance to obtain real discrete points of the first contour area and simulated discrete points of the second contour area;
[0071] S204, storing the coordinates of each real discrete point and the coordinates of each simulated discrete point in a child node under the parent node corresponding to the spatial index tree;
[0072] S205: Determine the spatial index tree storing the coordinates of the real discrete points and the simulated discrete points as the first quadtree.
[0073] In this embodiment, the problem of how to efficiently organize and manage profile data is solved by discretizing the real lithography profile and the simulated lithography profile and constructing a quadtree structure.
[0074] Among them, the contour area division of the real lithography contour and the simulated lithography contour can be achieved in many ways, such as equal-pitch division, adaptive division or feature point-based division. Equal-pitch division is to evenly divide the entire lithography contour area into several sub-areas, each of which is the same size; adaptive division dynamically adjusts the granularity of the division according to the complexity of the lithography contour, with finer division in areas with complex contours and coarser division in simple areas; feature point-based division is to determine the division boundary based on key points on the lithography contour (such as corners, points where the curvature change is greater than a preset curvature change threshold, etc.).
[0075] The purpose of constructing the parent node of the spatial index tree is to establish the correspondence between the contour area and the data structure. Each parent node can contain the boundary information of the area, the area identifier, etc. This structural design makes subsequent data storage and retrieval more efficient.
[0076] Discretization according to a preset interval distance is the process of converting a continuous contour into a discrete point set. The selection of the preset interval distance requires a balance between accuracy and computational efficiency. If the interval distance is too small, the amount of calculation will increase, while if it is too large, the detailed information of the contour may be lost. In practical applications, the appropriate interval distance can be determined based on the accuracy requirements of the lithography process. Among them, the real discrete points are obtained by discretizing the real lithography contour, and the simulated discrete points are obtained by discretizing the simulated lithography contour.
[0077] Storing the coordinates of discrete points in the child nodes of the spatial index tree is the core step to achieve data organization. Each child node stores the coordinate information of a discrete point while maintaining the association with the parent node. This hierarchical storage structure enables the relevant area to be quickly located when performing spatial queries, improving the efficiency of data retrieval.
[0078] As an example, Figure 3 As shown, a schematic diagram of the principle of quadtree construction is provided. It is assumed that both the real lithography profile and the simulated lithography profile are approximately circular, and a plane rectangular coordinate system is constructed with the center of the circle as the origin. According to each quadrant of the plane rectangular coordinate system, the real lithography profile is divided into a first contour area 310, a first contour area 320, a first contour area 330 and a first contour area 340, and the simulated lithography profile is divided into a second contour area 350, a second contour area 360, a second contour area 370 and a second contour area 380.
[0079] Among them, the first contour area 310 and the second contour area 350 are matching contour areas, and the first contour area 310 and the second contour area 350 are constructed as a parent node of the spatial index tree. At the same time, the coordinates of the real discrete points 311 and the real discrete points 312 in the first contour area 310 in the plane rectangular coordinate system are stored in the child node under the corresponding parent node; the coordinates of the simulated discrete points 351 and the simulated discrete points 352 in the second contour area 350 in the plane rectangular coordinate system are also stored in the child node under the corresponding parent node.
[0080] Through this embodiment, the real lithography profile and the simulated lithography profile are discretized respectively to construct a first quadtree. In this way, when it is necessary to find a discrete point in a specific area, the corresponding quadtree node can be quickly located without traversing the entire data set, thereby significantly improving the processing efficiency of the lithography profile data.
[0081] As an optional embodiment, Figure 4 As shown, S103 may specifically include:
[0082] For each real discrete point, the following steps S401 to S403 are performed respectively:
[0083] S401, searching through the first quadtree to obtain a target simulation discrete point that is closest to a target real discrete point, where the target real discrete point is any real discrete point;
[0084] S402, obtaining a forward discrete point and a backward discrete point of a target simulation discrete point, wherein the forward discrete point is a simulation discrete point that is arranged one position before the target simulation discrete point according to a preset sequence, and the backward discrete point is a simulation discrete point that is arranged one position after the target simulation discrete point according to a preset sequence;
[0085] S403, the minimum value of the distance from the target real discrete point to the forward line segment and the distance from the target real discrete point to the backward line segment is determined as the shortest distance from the target real discrete point to the simulated lithography contour, the forward line segment is the line connecting the forward discrete point and the target simulated discrete point, and the backward line segment is the line connecting the backward discrete point and the target simulated discrete point.
[0086] In this embodiment, the target simulated discrete point is the simulated discrete point closest to the target real discrete point obtained by the first quadtree search. The search process can use a nearest neighbor search algorithm, such as a kd tree or a ball tree data structure to optimize the search efficiency.
[0087] The forward discrete points and the backward discrete points are adjacent points relative to the target simulation discrete points. Assuming that the preset order is a clockwise order, the forward discrete points are the simulation discrete points that are before the target simulation discrete points in the clockwise order, and the backward discrete points are the simulation discrete points that are after the target simulation discrete points in the clockwise order.
[0088] The forward line segment and the backward line segment are key elements for calculating the actual shortest distance from the target real discrete point to the simulated lithography profile. The forward line segment is the line connecting the forward discrete point and the target simulated discrete point, and the backward line segment is the line connecting the backward discrete point and the target simulated discrete point.
[0089] As an example, Figure 5 As shown, a schematic diagram of the shortest distance from a real discrete point to a simulated lithography profile is provided. For a target real discrete point 503 in a real lithography profile 502, the server first searches for the nearest target simulated discrete point 504 in the simulated lithography profile 501 through the first quadtree, assuming that its coordinates are (100.5nm, 200.3nm). Assume that the coordinates of the nearest target simulated discrete point 504 found are (101.2nm, 199.8nm).
[0090] Further, assuming that the preset order is a clockwise order, the forward discrete point 506 of the target simulation discrete point 504 is obtained, and its coordinates are (100.8nm, 199.5nm); and the backward discrete point 505 of the target simulation discrete point 504 is obtained, and its coordinates are (101.5nm, 200.2nm).
[0091] Then, the distance from the target real discrete point 503 to the forward line segment formed by the target simulated discrete point 504 and the forward discrete point 506 is calculated, and the distance from the target real discrete point 503 to the backward line segment formed by the target simulated discrete point 504 and the backward discrete point 505 is calculated. Assuming that the calculated distances are 0.8 nm and 0.6 nm respectively, the minimum value 0.6 nm is taken as the shortest distance from the target real discrete point 503 to the simulated lithography profile 501.
[0092] In this way, this process is repeated until all real discrete points are processed, and the shortest distance from each real discrete point of the real lithography profile to the simulated lithography profile can be obtained.
[0093] Through this embodiment, the efficient search capability of the quadtree and the accurate distance calculation based on line segments are combined. In this way, compared with the traditional point-by-point comparison method, the amount of calculation is greatly reduced. At the same time, by considering the line segments formed by adjacent discrete points, the accuracy of distance calculation is improved, and the local characteristics of the contour can be better reflected.
[0094] As an optional embodiment, Figure 6 As shown, S401 may specifically include the following S601 to S602:
[0095] S601, in the first quadtree, filter out a target parent node, where the target parent node is the parent node to which the child node storing the coordinates of the target real discrete point belongs;
[0096] S602: Determine the simulated discrete point in the target parent node that is closest to the target real discrete point as the target simulated discrete point.
[0097] In this embodiment, the screening process of the target parent node can be implemented by traversing the quadtree. Starting from the root node, the corresponding contour area is determined according to the coordinates of the target real discrete points, and the corresponding target parent node is determined according to the contour area.
[0098] When determining the target simulation discrete point, the Euclidean distance can be used as the distance metric. Specifically, all simulation discrete points in the target parent node can be traversed, the Euclidean distance between each simulation discrete point and the target real discrete point can be calculated, and the simulation discrete point corresponding to the minimum distance can be recorded as the target simulation discrete point.
[0099] As an example, assume that the coordinates of the target real discrete point are (100.5, 200.7). In this way, the server starts from the root node of the quadtree and searches according to the coordinate value of (100.5, 200.7) until it finds the sub-region containing the point. The node corresponding to the sub-region is the target parent node.
[0100] Then, the simulation discrete points included in the target parent node are checked, and assuming that there are 20 simulation discrete points, these points are determined as candidate simulation discrete points.
[0101] Finally, calculate the Euclidean distance between these 20 candidate simulated discrete points and the target real discrete point (100.5, 200.7) and find the point with the smallest distance. Assume that the coordinates of the nearest point are (100.6, 200.8), and determine it as the target simulated discrete point.
[0102] Through this embodiment, the first quadtree is used as a spatial index structure to store the discrete point coordinates of the real lithography profile and the simulated lithography profile. The screening of the target parent node can quickly locate the area where the target real discrete point is located, narrowing the search range. Finally, by comparing the distance between each simulated discrete point in the target parent node and the target real discrete point, the nearest point is determined as the target simulated discrete point. In this way, by utilizing the hierarchical structure and spatial division characteristics of the quadtree, the purpose of quickly locating and searching for the nearest point is achieved. Compared with the method of traversing all simulated discrete points, the amount of calculation is greatly reduced and the search efficiency is improved.
[0103] As an optional embodiment, the error includes a local error;
[0104] like Figure 7 As shown, S105 may specifically include the following S701 to S702:
[0105] S701, determining the maximum value among the shortest distances included in the parent node of the second quadtree as the target distance of the parent node;
[0106] S702 , determining the target distance of each parent node as a local error of the lithography simulation model in the contour area corresponding to each parent node.
[0107] In this embodiment, by determining the maximum value among the shortest distances included in the parent nodes of the second quadtree as the target distance, the most significant error in each contour area can be captured.
[0108] Specifically, the execution logic of this method is as follows: First, traverse each parent node of the second quadtree, which represents different contour areas. Then, for each parent node, check all the shortest distance values it contains and find the maximum value. This maximum value is defined as the target distance of the parent node, representing the maximum error in the contour area. Finally, the target distance of each parent node is used as the local error of the corresponding contour area. In this way, in each local area, the maximum error value that best reflects the model performance of the area is selected as the local error. By focusing on the maximum error, this method can effectively identify areas that need to be optimized without being masked by average errors or smaller errors.
[0109] As an example, for each sub-region, the shortest distance between the real lithography profile and the simulated lithography profile is calculated and stored in the second quadtree. For example, for one of the sub-regions in the real lithography profile and the simulated lithography profile, assume that the following shortest distance values are stored: [2.1, 1.8, 3.5, 2.7, 1.9, 4.2, 2.3, 3.1]. At this time, the target distance (i.e., local error) of this sub-region will be determined to be 4.2, which is the maximum error value in the sub-region.
[0110] By analyzing the maximum error of each sub-region in this embodiment, local errors can be effectively located and quantified, providing more accurate guidance for model optimization. In this way, areas that need to be optimized can be effectively identified to avoid being masked by average errors or smaller errors.
[0111] As an optional embodiment, the error includes an overall error;
[0112] like Figure 8 As shown, S105 may specifically include the following S801 to S803:
[0113] S801, determining the maximum value among the shortest distances included in the parent node of the second quadtree as the target distance of the parent node;
[0114] S802, performing statistical processing on the target distance of each parent node of the second quadtree to obtain a target statistical value, where the target statistical value is the median or average of the target distance;
[0115] S803, determining the target statistical value as the overall error of the lithography simulation model.
[0116] In this embodiment, a statistical value that can represent the overall error level is obtained by performing statistical processing on the shortest distances in each contour area stored in the second quadtree.
[0117] Specifically, we first obtain the target distances of the parent nodes representing different regions, and then perform statistics on these distance values. We can choose to calculate the median or average. In this way, the errors in all regions are taken into account, which not only avoids the influence of extreme values, but also reflects the overall error level. By defining this statistical value as the overall error, we can achieve a quantitative evaluation of the overall performance of the lithography simulation model.
[0118] In the present application, the target distances of each parent node of the second quadtree can be statistically processed in a variety of ways. For example, you can choose to calculate the median, which can effectively avoid the influence of extreme values and provide a more robust overall error estimate. Specifically, the target distances of all parent nodes can be arranged in order from small to large, and then the value in the middle position can be selected as the median. If the number of parent nodes is an odd number, directly select the middle value; if it is an even number, take the average of the two middle values.
[0119] Another optional statistical method is to calculate the average value. This method takes into account the error in all areas and can provide a comprehensive overall error assessment. In practice, the target distances of all parent nodes can be added up and then divided by the total number of parent nodes to get the average value.
[0120] These two statistical methods have their own advantages and can be used according to specific application scenarios. For example, when the data distribution is relatively uniform, the mean may be more suitable; while when there are some outliers, the median may provide more stable results.
[0121] As a specific embodiment, assume that the second quadtree of a lithography simulation model contains 16 parent nodes, each parent node represents a contour area, and the target distances of these parent nodes are: 2.5, 3.1, 2.8, 3.3, 2.9, 3.0, 3.2, 2.7, 3.4, 2.6, 3.5, 2.9, 3.1, 3.0, 2.8, 3.2.
[0122] First, you can choose to calculate the median as the target statistic. After sorting these values, we get: 2.5, 2.6, 2.7, 2.8, 2.8, 2.9, 2.9, 3.0, 3.0, 3.1, 3.1, 3.2, 3.2, 3.3, 3.4, 3.5. Since there are 16 values (an even number), take the average of the two middle values (3.0 and 3.0) to get the median of 3.0.
[0123] Alternatively, you can choose to calculate the average. Add all the values together to get 48.0, and divide by the number of parent nodes, 16, to get an average of 3.0 nanometers.
[0124] Through this embodiment, the shortest distance of each contour area stored in the second quadtree is statistically processed to obtain a statistical value that can represent the overall error level. This method takes into account the error conditions of all areas, avoids the influence of extreme values, and reflects the overall error level. By defining this statistical value as the overall error, a quantitative evaluation of the overall performance of the lithography simulation model is achieved.
[0125] As an optional embodiment, Fig. 9As shown, S101 may specifically include the following S901 to S903:
[0126] S901, performing photolithography processing on the wafer to be processed based on the target mask pattern to obtain a real photolithography profile;
[0127] S902, inputting the target mask pattern into a lithography simulation model to perform lithography simulation to obtain a simulated lithography profile.
[0128] In this embodiment, the target mask pattern is a mask pattern used for photolithography processing and photolithography simulation. The target mask pattern can be various complex integrated circuit design patterns, such as logic circuits, memory cells, etc. These patterns can be generated by computer-aided design (CAD) software and saved in an appropriate format, such as GDSII or OASIS format.
[0129] The photolithography process is used to characterize the actual photolithography operation of the wafer to be processed according to the target mask pattern, so as to obtain the real photolithography profile. This step can be performed on the actual photolithography equipment, such as using deep ultraviolet (DUV) or extreme ultraviolet (EUV) photolithography machines. The parameters in the photolithography process, such as exposure dose, focal length, numerical aperture, etc., need to be precisely controlled according to the specific process requirements.
[0130] The real lithography profile is the profile obtained through the actual lithography process, which is used as a reference standard. These profiles can be obtained by high-precision measurement equipment such as scanning electron microscope (SEM) or atomic force microscope (AFM).
[0131] The simulated lithography profile is the profile output by the lithography simulation model, which is used to compare with the real profile. These profiles usually exist in digital form, which can be pixelated images or vectorized profile data.
[0132] As an example, the target mask pattern needs to be prepared first. This can be a test pattern containing various typical features, such as lines, angles, holes, etc., to fully evaluate the performance of the lithography simulation model. Then, according to the target mask pattern, the wafer to be processed is subjected to lithography processing by the actual lithography equipment. In this process, the lithography parameters, such as exposure dose, focal length, etc., need to be strictly controlled to ensure that a high-quality real lithography profile is obtained. After the lithography is completed, the pattern on the processed wafer is scanned using high-precision measurement equipment such as a scanning electron microscope to obtain accurate data of the real lithography profile.
[0133] At the same time, the same target mask pattern is input into the lithography simulation model. This lithography simulation model already contains relevant parameters such as the optical system and photoresist characteristics. By running the lithography simulation, the data of the simulated lithography profile is obtained. These data are usually digital and can be directly used for subsequent comparison and analysis.
[0134] Through this embodiment, a completely comparable real lithography profile and simulated lithography profile can be obtained. Thus, compared with the traditional area difference or pixel average distance calculation method, this direct comparison method can more intuitively and accurately reflect the difference between the lithography simulation model and the actual lithography process.
[0135] Error determination method based on lithography simulation model. Accordingly, the present application also provides a specific embodiment of an error determination device based on lithography simulation model.
[0136] like Fig.10 As shown, the error determination device 1000 of the lithography simulation model provided in the embodiment of the present application includes a contour acquisition module 1010 , a quadtree construction module 1020 , a distance determination module 1030 and an error determination module 1040 .
[0137] The profile acquisition module 1010 is used to acquire the real lithography profile of the target mask pattern and the simulated lithography profile of the target mask pattern output by the lithography simulation model.
[0138] The quadtree construction module 1020 is used to discretize the real lithography contour and the simulated lithography contour respectively to construct a first quadtree, wherein the parent node of the first quadtree is the contour area that matches the real lithography contour and the simulated lithography contour, and the child nodes of the first quadtree are the coordinates of the real discrete points on the real lithography contour and the coordinates of the simulated discrete points on the simulated lithography contour.
[0139] The distance determination module 1030 is used to determine the shortest distance from each real discrete point to the simulated lithography contour, and the shortest distance from each simulated discrete point to the real lithography contour according to the first quadtree.
[0140] The quadtree construction module 1020 is also used to store each shortest distance in a homogeneous index tree corresponding to the first quadtree, and construct a second quadtree, wherein the parent node of the second quadtree is the matching contour area, and the child nodes of the second quadtree are the shortest distances from each real discrete point to the simulated lithography contour, and the shortest distances from each simulated discrete point to the real lithography contour.
[0141] The error determination module 1040 is used to determine the error of the lithography simulation model according to the second quadtree.
[0142] In the error determination device of the lithography simulation model provided by the embodiment of the present application, the real lithography profile and the simulated lithography profile are first discretized to obtain discrete points. In this way, it is only necessary to screen out a plurality of representative position points from the lithography profile for calculation, without calculating each position, which can reduce the amount of calculation. Then, a first quadtree is constructed according to the discrete points, wherein the parent node of the first quadtree is used to characterize the contour area, and the child node of the first quadtree is used to store the coordinates of the real discrete points and the coordinates of the simulated discrete points in the contour area. And each shortest distance is stored in the isomorphic index tree corresponding to the first quadtree, and a second quadtree is constructed. In this way, the shortest distances in each contour area can be quickly located by the second quadtree, so as to quickly determine the local errors of the lithography simulation model in each contour area. In summary, the embodiment of the present application can reduce the amount of calculation and quickly locate the local errors of the lithography simulation model by discretization processing and constructing a quadtree, thereby improving the error determination efficiency of the lithography simulation model.
[0143] As an optional embodiment, the quadtree construction module 1020 is specifically used for:
[0144] Performing contour area division on the real lithography contour and the simulated lithography contour respectively, to obtain a plurality of first contour areas corresponding to the real lithography contour and a plurality of second contour areas corresponding to the simulated lithography contour;
[0145] Based on the matching result of the first contour area and the second contour area, construct a parent node of the spatial index tree;
[0146] According to a preset interval, the first contour area and the second contour area are discretized respectively to obtain real discrete points of the first contour area and simulated discrete points of the second contour area;
[0147] The coordinates of each real discrete point and each simulated discrete point are stored in the child node under the parent node corresponding to the spatial index tree;
[0148] The spatial index tree storing the coordinates of the real discrete points and the simulated discrete points is determined as the first quadtree.
[0149] As an optional embodiment, the distance determination module 1030 specifically includes the following units:
[0150] A discrete point search unit, used for searching through the first quadtree to obtain a target simulated discrete point that is closest to a target real discrete point, where the target real discrete point is any real discrete point;
[0151] A discrete point acquisition unit, used to acquire a forward discrete point and a backward discrete point of a target simulation discrete point, wherein the forward discrete point is a simulation discrete point that is arranged one position before the target simulation discrete point according to a preset sequence, and the backward discrete point is a simulation discrete point that is arranged one position after the target simulation discrete point according to a preset sequence;
[0152] The distance determination unit is used to determine the minimum value of the distance from the target real discrete point to the forward line segment and the distance from the target real discrete point to the backward line segment as the shortest distance from the target real discrete point to the simulated lithography contour, the forward line segment is the line connecting the forward discrete point and the target simulated discrete point, and the backward line segment is the line connecting the backward discrete point and the target simulated discrete point.
[0153] As an optional embodiment, the discrete point search unit is specifically used for:
[0154] In the first quadtree, a target parent node is selected, where the target parent node is the parent node to which the child node storing the coordinates of the target real discrete point belongs;
[0155] The simulated discrete point in the target parent node that is closest to the target real discrete point is determined as the target simulated discrete point.
[0156] As an optional embodiment, the error includes a local error;
[0157] The error determination module 1040 is specifically configured to:
[0158] The maximum value among the shortest distances included in the parent node of the second quadtree is determined as the target distance of the parent node;
[0159] The target distance of each parent node is determined as the local error of the lithography simulation model in the contour area corresponding to each parent node.
[0160] As an optional embodiment, the error includes an overall error;
[0161] The error determination module 1040 is further configured to:
[0162] The maximum value among the shortest distances included in the parent node of the second quadtree is determined as the target distance of the parent node;
[0163] Performing statistical processing on the target distances of the parent nodes of the second quadtree to obtain a target statistical value, where the target statistical value is the median or average of the target distances;
[0164] The target statistical value is determined as the overall error of the lithography simulation model.
[0165] As an optional embodiment, the contour acquisition module 1010 is specifically used for:
[0166] Based on the target mask pattern, the wafer to be processed is subjected to photolithography processing to obtain a real photolithography profile;
[0167] The target mask pattern is input into the lithography simulation model to perform lithography simulation and obtain a simulated lithography profile.
[0168] Error determination method based on lithography simulation model. Accordingly, the present application also provides a specific embodiment of an error determination device based on a lithography simulation model.
[0169] Fig.11 A schematic diagram of the hardware structure of an error determination device for a lithography simulation model provided in an embodiment of the present application is shown.
[0170] The error determination apparatus of the lithography simulation model may include a processor 1101 and a memory 1102 storing computer program instructions.
[0171] Specifically, the processor 1101 may include a central processing unit (CPU), or an application specific integrated circuit (ASIC), or may be configured to implement one or more integrated circuits of the embodiments of the present application.
[0172] The memory 1102 may include a large capacity memory for data or instructions. By way of example and not limitation, the memory 1102 may include a hard disk drive (HDD), a floppy disk drive, a flash memory, an optical disk, a magneto-optical disk, a magnetic tape, or a universal serial bus (USB) drive or a combination of two or more of these. In appropriate cases, the memory 1102 may include a removable or non-removable (or fixed) medium. In appropriate cases, the memory 1102 may be inside or outside the integrated gateway disaster recovery device. In a specific embodiment, the memory 1102 is a non-volatile solid-state memory.
[0173] The processor 1101 reads and executes computer program instructions stored in the memory 1102 to implement any one of the methods for determining an error of a lithography simulation model in the above embodiments.
[0174] In one example, the error determination device of the lithography simulation model may further include a communication interface 1103 and a bus 1110. Fig.11 As shown, the processor 1101, the memory 1102, and the communication interface 1103 are connected via a bus 1110 and communicate with each other.
[0175] The communication interface 1103 is mainly used to implement communication between various modules, devices, units and / or equipment in the embodiments of the present application.
[0176] Bus 1110 includes hardware, software or both, and the parts of the error determination equipment of the lithography simulation model are coupled to each other.For example, but not limitation, bus may include accelerated graphics port (AGP) or other graphics bus, enhanced industrial standard architecture (EISA) bus, front side bus (FSB), hypertransport (HT) interconnection, industrial standard architecture (ISA) bus, infinite bandwidth interconnection, low pin count (LPC) bus, memory bus, micro channel architecture (MCA) bus, peripheral component interconnection (PCI) bus, PCI-Express (PCI-X) bus, serial advanced technology attachment (SATA) bus, video electronics standard association local (VLB) bus or other suitable bus or two or more of these combinations. In appropriate cases, bus 1110 may include one or more buses. Although the present application embodiment describes and shows a specific bus, the application considers any suitable bus or interconnection.
[0177] In addition, in combination with the error determination method of the lithography simulation model in the above embodiment, the embodiment of the present application can provide a computer storage medium for implementation. The computer storage medium stores computer program instructions; when the computer program instructions are executed by the processor, any one of the error determination methods of the lithography simulation model in the above embodiment is implemented.
[0178] In addition, in combination with the error determination method of the lithography simulation model in the above-mentioned embodiments, the embodiments of the present application may provide a computer program product for implementation. When the instructions in the computer program product are executed by a processor of an electronic device, the electronic device executes the error determination method of the lithography simulation model provided in any aspect of the above-mentioned embodiments of the present application.
[0179] It should be clear that the present application is not limited to the specific configuration and processing described above and shown in the figures. For the sake of simplicity, a detailed description of the known method is omitted here. In the above embodiments, several specific steps are described and shown as examples. However, the method process of the present application is not limited to the specific steps described and shown, and those skilled in the art can make various changes, modifications and additions, or change the order between the steps after understanding the spirit of the present application.
[0180] The functional blocks shown in the above-described block diagram can be implemented as hardware, software, firmware or a combination thereof. When implemented in hardware, it can be, for example, an electronic circuit, an application specific integrated circuit (ASIC), appropriate firmware, a plug-in, a function card, etc. When implemented in software, the elements of the present application are programs or code segments that are used to perform the required tasks. The program or code segment can be stored in a machine-readable medium, or transmitted on a transmission medium or a communication link by a data signal carried in a carrier wave. "Machine-readable medium" can include any medium capable of storing or transmitting information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, ROM, flash memory, erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, hard disks, optical fiber media, radio frequency (RF) links, etc. The code segment can be downloaded via a computer network such as the Internet, an intranet, etc.
[0181] It should also be noted that the exemplary embodiments mentioned in this application describe some methods or systems based on a series of steps or devices. However, this application is not limited to the order of the above steps, that is, the steps can be performed in the order mentioned in the embodiment, or in a different order from the embodiment, or several steps can be performed simultaneously.
[0182] Aspects of the present disclosure are described above with reference to the flowchart and / or block diagram of the method, device (system) and computer program product according to the embodiment of the present disclosure. It should be understood that each box in the flowchart and / or block diagram and the combination of each box in the flowchart and / or block diagram can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device to produce a machine so that these instructions executed by the processor of the computer or other programmable data processing device enable the implementation of the function / action specified in one or more boxes of the flowchart and / or block diagram. Such a processor can be, but is not limited to, a general-purpose processor, a special-purpose processor, a special application processor, or a field programmable logic circuit. It can also be understood that each box in the block diagram and / or flowchart and the combination of boxes in the block diagram and / or flowchart can also be implemented by dedicated hardware that performs a specified function or action, or can be implemented by a combination of dedicated hardware and computer instructions.
[0183] The above is only a specific implementation of the present application. Those skilled in the art can clearly understand that for the convenience and simplicity of description, the specific working processes of the systems, modules and units described above can refer to the corresponding processes in the aforementioned method embodiments, and will not be repeated here. It should be understood that the protection scope of the present application is not limited to this. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed in this application, and these modifications or replacements should be included in the protection scope of this application.
Claims
1. A method for determining an error of a lithography simulation model, characterized in that: include: Acquire a real lithography profile of a target mask pattern and a simulated lithography profile of the target mask pattern output by a lithography simulation model; Discretize the real lithography profile and the simulated lithography profile respectively to construct a first quadtree, wherein the parent node of the first quadtree is the profile area that matches the real lithography profile and the simulated lithography profile, and the child nodes of the first quadtree are the coordinates of the real discrete points on the real lithography profile and the coordinates of the simulated discrete points on the simulated lithography profile; Determine, according to the first quadtree, the shortest distance from each of the real discrete points to the simulated lithography profile, and the shortest distance from each of the simulated discrete points to the real lithography profile; The shortest distances are stored in a homogeneous index tree corresponding to the first quadtree, respectively, to construct a second quadtree, wherein the parent node of the second quadtree is the matched contour area, and the child nodes of the second quadtree are the shortest distances from the real discrete points to the simulated lithography contour, and the shortest distances from the simulated discrete points to the real lithography contour; An error of the lithography simulation model is determined according to the second quadtree.
2. The method according to claim 1, characterized in that: The step of discretizing the real lithography profile and the simulated lithography profile respectively to construct a first quadtree includes: Performing contour area division on the real lithography contour and the simulated lithography contour respectively, to obtain a plurality of first contour areas corresponding to the real lithography contour and a plurality of second contour areas corresponding to the simulated lithography contour; Based on the matching result between the first contour area and the second contour area, construct a parent node of the spatial index tree; Discretizing the first contour area and the second contour area respectively according to a preset interval distance to obtain real discrete points of the first contour area and simulated discrete points of the second contour area; The coordinates of each of the real discrete points and the coordinates of each of the simulated discrete points are stored in the child nodes under the parent node corresponding to the spatial index tree; The spatial index tree storing the coordinates of the real discrete points and the simulated discrete points is determined as the first quadtree.
3. The method according to claim 1, characterized in that Determining the shortest distance from each of the real discrete points to the simulated lithography profile according to the first quadtree includes: For each of the real discrete points, the following steps are performed respectively: By using the first quadtree, a target simulated discrete point closest to a target real discrete point is searched, and the target real discrete point is any one of the real discrete points; Acquire a forward discrete point and a backward discrete point of the target simulation discrete point, wherein the forward discrete point is a simulation discrete point that is arranged one position before the target simulation discrete point according to a preset sequence, and the backward discrete point is a simulation discrete point that is arranged one position after the target simulation discrete point according to the preset sequence; The minimum value of the distance from the target real discrete point to the forward line segment and the distance from the target real discrete point to the backward line segment is determined as the shortest distance from the target real discrete point to the simulated lithography contour, the forward line segment is the line connecting the forward discrete point and the target simulated discrete point, and the backward line segment is the line connecting the backward discrete point and the target simulated discrete point.
4. The method according to claim 3, characterized in that The step of searching for a target simulated discrete point closest to a target real discrete point through the first quadtree comprises: In the first quadtree, a target parent node is screened out, where the target parent node is a parent node to which a child node storing the coordinates of the target real discrete point belongs; The simulated discrete point in the target parent node that is closest to the target real discrete point is determined as the target simulated discrete point.
5. The method according to any one of claims 1 to 4, characterized in that: The error includes a local error; Determining the error of the lithography simulation model according to the second quadtree includes: Determine the maximum value among the shortest distances included in the parent node of the second quadtree as the target distance of the parent node; The target distance of each parent node is determined as a local error of the lithography simulation model in a contour area corresponding to each parent node.
6. The method according to any one of claims 1 to 4, characterized in that: The error includes the overall error; Determining the error of the lithography simulation model according to the second quadtree includes: Determine the maximum value among the shortest distances included in the parent node of the second quadtree as the target distance of the parent node; Performing statistical processing on the target distances of the parent nodes of the second quadtree to obtain a target statistical value, where the target statistical value is the median or average of the target distances; The target statistical value is determined as the overall error of the lithography simulation model.
7. The method according to any one of claims 1 to 4, characterized in that: The step of acquiring a real lithography profile of a target mask pattern and a simulated lithography profile of the target mask pattern output by a lithography simulation model comprises: Based on the target mask pattern, performing photolithography processing on the wafer to be processed to obtain the real photolithography profile; The target mask pattern is input into the lithography simulation model to perform lithography simulation to obtain the simulated lithography profile.
8. An electronic device, characterized in that: The device comprises: a processor and a memory storing computer program instructions; When the processor executes the computer program instructions, the error determination method of the lithography simulation model according to any one of claims 1 to 7 is implemented.
9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer program instructions, and when the computer program instructions are executed by a processor, the error determination method of the lithography simulation model according to any one of claims 1 to 7 is implemented.
10. A computer program product, characterized in that When the instructions in the computer program product are executed by a processor of an electronic device, the electronic device executes the error determination method of the lithography simulation model as described in any one of claims 1 to 7.
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