Automated type-c interface detection method and apparatus, electronic device, and storage medium

Abstract

The application provides a Type-C interface detection method and device, electronic equipment and a storage medium. The method uses a preset detection connector with two detection pins to be inserted into a Type-C interface to be detected, and the interface pins of the two surfaces of the Type-C interface to be detected are detected respectively, so that the plug does not need to be inserted in the correct direction or in the reverse direction during the detection process, and the detection efficiency is effectively improved. In addition, the sequence data obtained by detecting each Type-C interface to be detected is uploaded and stored to an upper computer, and the upper computer uniformly detects each sequence data in batches, thereby further improving the detection efficiency.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of Type-C interface detection, and in particular to an automatic Type-C interface detection method and device, electronic equipment and a storage medium. BACKGROUND

[0002] USB Type-C is a USB (Universal Serial Bus) interface appearance standard. Since the Type-C interface has two symmetrical pins, the Type-C interface can be inserted in the positive direction and in the reverse direction, greatly improving the convenience of use.

[0003] Although the Type-C interface has no positive and negative sides, it can be inserted in the positive direction and in the reverse direction, but in order to ensure that it can be inserted in the positive direction and in the reverse direction, the pins on both sides of the Type-C interface need to work normally to achieve positive and reverse insertion, otherwise, if there is a fault in the pins on one side, the Type-C interface will only be able to accept insertion in one direction.

[0004] Therefore, it is necessary to detect the Type-C interface on various boards such as motherboards and other electronic equipment before leaving the factory. The traditional method is to use manual labor to first insert each Type-C connector in the positive direction, detect whether the pins on the positive side are working normally, then pull it out and insert it in the reverse direction, and detect whether the pins on the reverse side are working normally. For each Type-C interface, it needs to be inserted twice, resulting in low detection efficiency. SUMMARY

[0005] Therefore, it is necessary to provide an automatic Type-C interface detection method and device, electronic equipment and a storage medium to solve the above technical problems.

[0006] An automatic Type-C interface detection method comprises the following steps:

[0007] A preset detection connector is inserted into a Type-C interface to be detected, wherein the preset detection connector has first face detection pins and second face detection pins, the first face detection pins are connected to the first face interface pins of the Type-C interface to be detected one by one, and the second face detection pins are connected to the second face interface pins of the Type-C interface to be detected one by one.

[0008] The connection between the first face detection pins and a detection circuit is turned on, the connection between the second face detection pins and the detection circuit is turned off, the signals of the pins of the first face interface pins are collected in a first preset polling order, and a plurality of first signals are obtained.

[0009] obtaining a first sequence value, converting the first signal into first detection data in a preset format according to a preset rule, encoding the first detection data by using the first sequence value, and obtaining first sequence data;

[0010] turning on the connection between the second face detection pin and the detection circuit, turning off the connection between the first face detection pin and the detection circuit, collecting signals of each pin of the second face interface pin according to a second preset polling sequence, and obtaining a plurality of second signals;

[0011] obtaining a second sequence value, converting the second signal into second detection data in a preset format according to a preset rule, encoding the second detection data by using the second sequence value, and obtaining second sequence data;

[0012] storing the first sequence data and the second sequence data of each of the to-be-tested Type-C interfaces to an upper computer;

[0013] detecting, by using the upper computer, whether the first sequence data and the second sequence data of each of the to-be-tested Type-C interfaces conform to preset comparison data;

[0014] when the first sequence data or the second sequence data does not conform to the preset comparison data, determining that it is abnormal data, and determining the to-be-tested Type-C interface that is abnormal according to the first sequence value and the second sequence value.

[0015] In one of the embodiments, the step of obtaining the first sequence value comprises:

[0016] scanning an identification code of the to-be-tested Type-C interface to obtain a detection serial number of the to-be-tested Type-C interface;

[0017] generating the first sequence value according to a serial number corresponding to each pin sorted according to the first preset polling sequence and the detection serial number of the to-be-tested Type-C interface;

[0018] The step of obtaining the second sequence value comprises:

[0019] scanning an identification code of the to-be-tested Type-C interface to obtain a detection serial number of the to-be-tested Type-C interface;

[0020] generating the second sequence value according to a serial number corresponding to each pin sorted according to the second preset polling sequence and the detection serial number of the to-be-tested Type-C interface.

[0021] In one of the embodiments, the step of detecting, by using the upper computer, whether the first sequence data and the second sequence data of each of the to-be-tested Type-C interfaces conform to preset comparison data comprises:

[0022] The host computer analyzes each first sequence data and each second sequence data to obtain a detection sequence number, first detection data and second detection data of each Type-C interface to be tested;

[0023] The first detection data and the second detection data are compared with preset comparison data respectively;

[0024] When the first sequence data or the second sequence data does not conform to the preset comparison data, the first sequence value and the second sequence value are determined as abnormal data, and the step of determining the abnormal Type-C interface to be tested includes:

[0025] When at least one of the first detection data and the second detection data does not conform to the preset comparison data, the first detection data and the second detection data are determined as abnormal data, the detection sequence number of the Type-C interface to be tested is determined, and the detection sequence number of the Type-C interface to be tested is output.

[0026] In one embodiment, the first face detection pin includes a first CC pin, and the second face detection pin includes a second CC pin;

[0027] The connection of the first face detection pin and the detection circuit is turned on, the connection of the second face detection pin and the detection circuit is turned off, the signals of each pin of the first face interface pin are collected in a first preset polling order to obtain a plurality of first signals, and the step includes:

[0028] The connection of the ground resistance on the first CC pin and the ground is turned on, the connection of the first face detection pin and the detection circuit is turned on, the connection of the ground resistance on the second CC pin and the ground is turned off, and the connection of the second face detection pin and the detection circuit is turned off. Determine whether each pin of the first face interface pin generates a signal. If yes, collect the signals of each pin of the first face interface pin in a first preset polling order to obtain a plurality of first signals. If not, scan the identification code of the Type-C interface to be tested to obtain the detection sequence number of the Type-C interface to be tested. The first fault sequence data is generated based on the detection sequence number of the Type-C interface to be tested, and the first fault sequence data is stored to the host computer;

[0029] The connection of the second face detection pin and the detection circuit is turned on, the connection of the first face detection pin and the detection circuit is turned off, the signals of each pin of the second face interface pin are collected in a second preset polling order to obtain a plurality of second signals, and the step includes:

[0030] turn on the connection between the ground resistance on the second CC pin and the ground, turn on the connection between the second face detection pin and the detection circuit, turn off the connection between the ground resistance on the first CC pin and the ground, and turn off the connection between the first face detection pin and the detection circuit; determine whether signals are generated from each pin of the second face interface pin; if yes, collect signals from each pin of the second face interface pin in a second preset polling sequence to obtain a plurality of second signals; if no, scan the identification code of the to-be-tested Type-C interface to obtain a detection serial number of the to-be-tested Type-C interface, generate second fault sequence data based on the detection serial number of the to-be-tested Type-C interface, and store the second fault sequence data to the upper computer.

[0031] In one of the embodiments, the step of turning on the connection between the first face detection pin and the detection circuit, turning off the connection between the second face detection pin and the detection circuit, collecting signals from each pin of the first face interface pin in a first preset polling sequence to obtain a plurality of first signals comprises:

[0032] turn on the connection between the ground resistance on the first CC pin and the ground, turn on the connection between the first face detection pin and the detection circuit, turn off the connection between the ground resistance on the second CC pin and the ground, and turn off the connection between the second face detection pin and the detection circuit; collect signals from each pin of the first face interface pin except the first high-speed differential transmission pin in a first preset polling sequence to obtain a plurality of first sub-signals; turn on the connection between the second face detection pin and the detection circuit; collect signals from the first high-speed differential transmission pin of the first face interface pin and the first high-speed differential reception pin of the second face interface pin in a first preset polling sequence to obtain a plurality of second sub-signals; and combine the first sub-signals and the second sub-signals to obtain the first signals;

[0033] The step of turning on the connection between the second face detection pin and the detection circuit, turning off the connection between the first face detection pin and the detection circuit, collecting signals from each pin of the second face interface pin in a second preset polling sequence to obtain a plurality of second signals comprises:

[0034] turn on the connection between the ground resistance on the second CC pin and the ground, turn on the connection between the second face detection pin and the detection circuit, turn off the connection between the ground resistance on the first CC pin and the ground, and turn off the connection between the first face detection pin and the detection circuit; collect signals of each pin of the second face interface pin except the second high-speed differential transmission pin in a second preset polling sequence, to obtain a plurality of third sub-signals; turn on the connection between the first face detection pin and the detection circuit; collect signals of the second high-speed differential transmission pin of the second face interface pin and signals of the second high-speed differential receiving pin of the first face interface pin in the second preset polling sequence, to obtain a plurality of fourth sub-signals; and combine the third sub-signals and the fourth sub-signals to obtain the second signal.

[0035] In one of the embodiments, the step of obtaining a first sequence value, converting the first signal into first detection data in a preset format according to a preset rule, and encoding the first detection data by using the first sequence value to obtain first sequence data comprises:

[0036] obtaining a first sequence value, wherein the first sequence value records detection serial numbers of each of the to-be-tested Type-C interfaces and serial numbers corresponding to each pin sorted in the first preset polling sequence;

[0037] analog-digital converting the first signal according to a preset rule to obtain the first detection data;

[0038] encoding the first detection data by using the first sequence value to obtain first sequence data;

[0039] The step of obtaining a second sequence value, converting the second signal into second detection data in a preset format according to a preset rule, and encoding the second detection data by using the second sequence value to obtain second sequence data comprises:

[0040] obtaining a second sequence value, wherein the second sequence value records detection serial numbers of each of the to-be-tested Type-C interfaces and serial numbers corresponding to each pin sorted in the second preset polling sequence;

[0041] analog-digital converting the second signal according to a preset rule to obtain the second detection data;

[0042] encoding the second detection data by using the second sequence value to obtain second sequence data.

[0043] In one of the embodiments, the step of encoding the first detection data by using the first sequence value to obtain first sequence data comprises:

[0044] The first detection data of each pin of the first side interface pin is assigned to the Nth pin signal value in the first sequence value according to the sequence number N corresponding to the pin recorded in the first sequence value, and each pin signal value with the same detection sequence number of the to-be-tested Type-C interface is merged to obtain the first sequence data, wherein the first sequence value has M pin signal values, M is equal to the number of pins of the first side interface pin, N is a positive integer greater than or equal to 1 and less than or equal to the number of pins of the first side interface pin;

[0045] The step of encoding the second detection data by using the second sequence value to obtain the second sequence data comprises:

[0046] The second detection data of each pin of the second side interface pin is assigned to the Nth pin signal value in the second sequence value according to the sequence number N corresponding to the pin recorded in the second sequence value, and each pin signal value with the same detection sequence number of the to-be-tested Type-C interface is merged to obtain the second sequence data, wherein the second sequence value has M pin signal values, M is equal to the number of pins of the second side interface pin, N is a positive integer greater than or equal to 1 and less than or equal to the number of pins of the second side interface pin.

[0047] An automatic Type-C interface detection device is applied to a preset detection connector inserted into a to-be-tested Type-C interface, wherein the preset detection connector has first side detection pins and second side detection pins, the first side detection pins are connected to first side interface pins of the to-be-tested Type-C interface one by one, and the second side detection pins are connected to second side interface pins of the to-be-tested Type-C interface one by one; the device comprises:

[0048] A first acquisition module is configured to turn on the connection between the first side detection pins and a detection circuit, turn off the connection between the second side detection pins and the detection circuit, acquire signals of each pin of the first side interface pins in a first preset polling order, and obtain a plurality of first signals.

[0049] A first sequence data acquisition module is configured to obtain a first sequence value, convert the first signals into first detection data in a preset format according to a preset rule, encode the first detection data by using the first sequence value, and obtain first sequence data.

[0050] A second acquisition module is configured to turn on the connection between the second side detection pins and the detection circuit, turn off the connection between the first side detection pins and the detection circuit, acquire signals of each pin of the second side interface pins in a second preset polling order, and obtain a plurality of second signals.

[0051] a second sequence data acquisition module, configured to acquire a second sequence value, convert the second signal into second detection data in a preset format according to a preset rule, encode the second detection data using the second sequence value, and obtain second sequence data;

[0052] a storage module, configured to store the first sequence data and the second sequence data of each of the Type-C interfaces to be tested to an upper computer;

[0053] a detection comparison module, configured to detect, using the upper computer, whether the first sequence data and the second sequence data of each of the Type-C interfaces to be tested conform to preset comparison data;

[0054] an abnormality output module, configured to determine the first sequence data or the second sequence data as abnormal data when the first sequence data or the second sequence data does not conform to the preset comparison data, and determine the Type-C interface to be tested that is abnormal according to the first sequence value and the second sequence value.

[0055] An electronic device, comprising a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of the automatic Type-C interface detection method in any of the above embodiments when executing the computer program.

[0056] A computer readable storage medium, which stores a computer program, and the computer program implements the steps of the automatic Type-C interface detection method in any of the above embodiments when executed by a processor.

[0057] The automatic Type-C interface detection method, device, electronic device and storage medium, by using a preset detection connector with a detection pin having two surfaces to be inserted into a Type-C interface to be tested, respectively detecting interface pins of two surfaces of the Type-C interface to be tested, without needing to insert the connector in a forward direction or a reverse direction during the detection process, effectively improving the detection efficiency, and by uploading sequence data obtained by detecting each Type-C interface to be tested to an upper computer, and batch detecting each sequence data by the upper computer, further improving the detection efficiency. BRIEF DESCRIPTION OF DRAWINGS

[0058] Figure 1 A flowchart of an automatic Type-C interface detection method in an embodiment;

[0059] Figure 2 An internal structure diagram of an electronic device in an embodiment;

[0060] Figure 3 A pin diagram of a Type-C interface to be tested in an embodiment;

[0061] Figure 4 Pin diagram of a preset detection connector in one embodiment;

[0062] Figure 5 Schematic diagram of batch connection test lines of a detection board card in one embodiment. DETAILED DESCRIPTION

[0063] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application is further described in detail below in combination with the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and do not limit the present application.

[0064] Embodiment one

[0065] In this embodiment, as shown in Figure 1 , an automatic Type-C interface detection method is provided, which includes:

[0066] Step 110, inserting a preset detection connector into a Type-C interface to be tested, wherein the preset detection connector has first surface detection pins and second surface detection pins, the first surface detection pins are connected to the first surface interface pins of the Type-C interface to be tested one by one, and the second surface detection pins are connected to the second surface interface pins of the Type-C interface to be tested one by one.

[0067] In this embodiment, the preset detection connector is a Type-C male plug, and the Type-C interface to be tested is a Type-C interface on a board card to be tested, which is a female interface. In this embodiment, as shown in Figure 3 , the first surface interface pins of the Type-C interface to be tested are A1 to A12 pins, including GND, TX1+, TX1-, VUBS, CC1, D+, D-, SBU1, VBUS, RX2-, RX2+, GND, and the second surface interface pins are B1 to B12 pins, including GND, TX2+, TX2-, VUBS, CC2, D+, D-, SBU2, VBUS, RX1-, RX1+, GND, as shown in Figure 4As shown, the first side detection pins of the preset detection connector are A1 to A12 pins, including GND, TX1+, TX1-, VUBS, CC1, D+, D-, SBU1, VBUS, RX2-, RX2+, GND, and the second side detection pins are B1 to B12 pins, including GND, TX2+, TX2-, VUBS, CC2, D+, D-, SBU2, VBUS, RX1-, RX1+, GND. When the preset detection connector is inserted into the Type-C interface to be tested, the first side detection pins are connected to the first side interface pins one by one in a one-to-one correspondence, and the second side detection pins are connected to the second side interface pins one by one in a one-to-one correspondence.

[0068] In step 120, the connection between the first side detection pins and the detection circuit is turned on, the connection between the second side detection pins and the detection circuit is turned off, the signals of the pins of the first side interface pins are collected in a first preset polling order, and a plurality of first signals are obtained.

[0069] In this embodiment, the signals of the first side interface pins are collected first. Specifically, the detection circuit is used to establish communication with the board card to be tested, and the connection between the first side detection pins and the first side interface pins enables the detection circuit to establish communication with the board card to be tested. At this time, the connection between the second side detection pins and the detection circuit is disconnected to avoid detection errors caused by the signals of the second side detection pins. The first preset polling order is the order of collecting the signals of the pins of the first side interface pins, for example, A1 to A12 are detected one by one, for example, the voltage of the GND pin is detected to obtain the GND pin voltage signal, the voltage of the VBUS pin is detected to obtain the VBUS pin voltage signal, a data channel is established, data requests are sent from the TX1+ pin and the TX1- pin of the first side detection pin to the TX1+ pin and the TX1- pin of the first side interface pin, data feedback is received from the RX1- pin and the RX1+ pin of the second side interface pin through the RX1- pin and the RX1+ pin of the second side detection pin, and if the TX1+ pin, the TX1- pin, the RX1- pin and the RX1+ pin all exist data communication, the corresponding signal is 1, otherwise it is 0; the D+ pin and the D- pin of the first side detection pin are communicated with the D+ pin and the D- pin of the first side interface pin, and whether the D+ pin and the D- pin of the first side interface pin exist data communication is detected, if they exist, the corresponding signal is 1, otherwise it is 0; whether SBU1 exists data communication is detected, if it exists, the corresponding signal is 1, otherwise it is 0.

[0070] In step 130, a first sequence value is obtained, the first signals are converted into first detection data in a preset format according to a preset rule, the first detection data is encoded by using the first sequence value, and first sequence data is obtained.

[0071] In the step, the signals of the pins of the first interface pins of the first surface collected include voltage signals and digital signals, wherein the voltage signals are analog signals, and thus it is required to convert the first signals of the pins into first detection data in digital format, and to binarize the signals converted from analog to digital according to a preset rule by using the first signals, for example, when the voltage signals are within a preset voltage range, the signal data after binarization is 1, and when the voltage signals are not within the preset voltage range, the data after binarization is 0. It is worth mentioning that the preset voltage ranges of the GND pin signals and the VBUS pin signals are different. Through the data conversion of the signals, the data can be made simple, which is beneficial to transmission, storage and comparison detection, and improves the efficiency.

[0072] In the embodiment, the first sequence value records the order of collecting the signals of the pins, and the first detection data is encoded by using the first sequence value, so that the first detection data corresponding to each pin has a detection identification mark (for example, a detection serial number), which can enable the signals of the pins to be accurately identified. In this way, even if the signal data of the pins is disturbed, or part of the pins cannot be collected and identified, the detection of other pins is still not affected, and the user can accurately determine the pin with a fault.

[0073] In step 140, the connection of the second surface detection pins and the detection circuit is turned on, the connection of the first surface detection pins and the detection circuit is turned off, the signals of the pins of the second surface interface pins are collected in a second preset polling order, and a plurality of second signals are obtained.

[0074] In the embodiment, after the signal collection of the first surface interface pins of the Type-C interface to be tested is completed, the signal collection of the second surface interface pins is performed.

[0075] The connection of the second surface detection pin and the second surface interface pin enables the detection circuit to establish communication with the to-be-detected board card. At this time, the connection between the first surface detection pin and the detection circuit is disconnected to avoid detection errors caused by signals of the first surface detection pin. The second preset polling sequence is an order of collecting signals of each pin of the second surface interface pin. For example, B1 to B12 are detected one by one. For example, the voltage of the GND pin is detected to obtain a GND pin voltage signal. The voltage of the VBUS pin is detected to obtain a VBUS pin voltage signal. A data channel is established. Data requests are sent from the TX2+ pin and the TX2- pin of the second surface detection pin to the TX2+ pin and the TX2- pin of the second surface interface pin. Data feedback from the RX2- pin and the RX2+ pin of the first surface interface pin is received through the RX2- pin and the RX2+ pin of the first surface detection pin. If there is data communication among the TX2+ pin, the TX2- pin, the RX2- pin, and the RX2+ pin, the corresponding signal is 1, otherwise, it is 0. The D+ pin and the D- pin of the second surface detection pin are used to communicate with the D+ pin and the D- pin of the second surface interface pin. Whether there is data communication between the D+ pin and the D- pin of the first surface interface pin is detected. If there is data communication, the corresponding signal is 1, otherwise, it is 0. Whether there is data communication of SBU2 is detected. If there is data communication, the corresponding signal is 1, otherwise, it is 0.

[0076] In step 150, a second sequence value is obtained. The second signal is converted into second detection data in a preset format according to a preset rule. The second sequence value is used to encode the second detection data to obtain second sequence data.

[0077] In this embodiment, the principle of processing the second signal is the same as that of processing the first signal. Specifically, the second signal of each pin is converted into second detection data in a digital format. The second signal is binarized according to a preset rule. For example, when the voltage signal is within a preset voltage range, the binarized signal data is 1. When the voltage signal is not within the preset voltage range, the binarized data is 0. Through data conversion of the signal, the data becomes simple, which is beneficial to transmission, storage, and comparison detection, and improves efficiency.

[0078] Similarly, in this embodiment, the second sequence value records the order of collecting signals of each pin. The second sequence value is used to encode the second detection data, so that the second detection data corresponding to each pin has a detection identification mark (such as a detection serial number), which can enable each pin signal to be accurately identified. In this way, even if the signal data of each pin is disturbed or part of the pins cannot be collected or identified, the detection of other pins is still not affected, and the user can accurately determine the faulty pin.

[0079] Step 160, store the first sequence data and the second sequence data of each Type-C interface to be tested to the host computer.

[0080] In the embodiment, the host computer is used to process the data of each Type-C interface to be tested, and the detection board card is integrated with a detection circuit. Compared with the detection board card, the host computer has stronger processing and storage capabilities. Compared with the host computer, the detection board card has the characteristics of flexible installation and being suitable for different computers, and can be quickly deployed. The detection board card only needs to perform simple processing on the signal, that is, to send it to the host computer for storage. The detection board card does not need to store too much data, nor does it need to perform complex data processing and calculation, which can effectively improve the efficiency.

[0081] In some embodiments, as shown in Figure 5 The detection board card is connected to a plurality of preset detection connectors through a data line. Each preset detection connector is connected to the end of the data line, and each preset detection connector is inserted into a Type-C interface to be tested. In this way, one detection board card can simultaneously collect a plurality of Type-C interfaces to be tested on the detection board card.

[0082] In the embodiment, the host computer is used to process the data of each Type-C interface to be tested, and the detection board card is integrated with a detection circuit. Compared with the detection board card, the host computer has stronger processing and storage capabilities. Compared with the host computer, the detection board card has the characteristics of flexible installation and being suitable for different computers, and can be quickly deployed. The detection board card only needs to perform simple processing on the signal, that is, to send it to the host computer for storage. The detection board card does not need to store too much data, nor does it need to perform complex data processing and calculation, which can effectively improve the efficiency.

[0083] Step 170, use the host computer to detect whether the first sequence data and the second sequence data of each Type-C interface to be tested meet the preset comparison data.

[0084] In the embodiment, the preset comparison data is the data corresponding to each pin of the Type-C interface in the case of being qualified and having no fault, so the preset comparison data can also be called reference data. In the embodiment, the host computer has strong computing and processing capabilities, and can quickly compare the first sequence data and the second sequence data of each Type-C interface to be tested with the preset comparison data.

[0085] Step 180, when the first sequence data or the second sequence data does not meet the preset comparison data, determine that it is abnormal data, and determine the Type-C interface to be tested that is abnormal according to the first sequence value and the second sequence value.

[0086] In the embodiment, when the first sequence data is consistent with the preset comparison data, it indicates that the first surface interface pin of the to-be-tested Type-C interface is normal, when the second sequence data is consistent with the preset comparison data, it indicates that the second surface interface pin of the to-be-tested Type-C interface is normal, and when the first sequence data and the second sequence data are consistent with the preset comparison data at the same time, it indicates that the to-be-tested Type-C interface is normal. When at least one of the first sequence data and the second sequence data of the to-be-tested Type-C interface is inconsistent with the preset comparison data, the inconsistent data is determined as abnormal data, and since the first sequence data and the second sequence data respectively carry the first sequence value and the second sequence value, the detection serial number of the to-be-tested Type-C interface can be determined according to the first sequence data and the second sequence data, so as to determine the to-be-tested Type-C interface with abnormality or fault.

[0087] In the above embodiment, the preset detection plug with two detection pins is inserted into the to-be-tested Type-C interface, and the interface pins of the two surfaces of the to-be-tested Type-C interface are detected respectively, so that the plug does not need to be inserted in the positive direction or in the reverse direction during the detection process, and the detection efficiency is effectively improved. In addition, the sequence data obtained by detecting each to-be-tested Type-C interface is uploaded and stored to the upper computer, and the upper computer uniformly detects each sequence data in batches, so as to further improve the detection efficiency.

[0088] In one embodiment, the step of obtaining the first sequence value comprises:

[0089] scanning the identification code of the to-be-tested Type-C interface to obtain the detection serial number of the to-be-tested Type-C interface;

[0090] generating the first sequence value according to the serial number corresponding to each pin in the first preset polling sequence and the detection serial number of the to-be-tested Type-C interface;

[0091] The step of obtaining the second sequence value comprises:

[0092] scanning the identification code of the to-be-tested Type-C interface to obtain the detection serial number of the to-be-tested Type-C interface;

[0093] generating the second sequence value according to the serial number corresponding to each pin in the second preset polling sequence and the detection serial number of the to-be-tested Type-C interface.

[0094] In some embodiments, each board has a unique identification, which can be an identification code such as a barcode or a two-dimensional code representing a number. If the board has a Type-C interface, the identification code of the Type-C interface to be tested is the barcode or two-dimensional code on the board. In some embodiments, the identification code can also be a serial number on the board where the Type-C interface is located, such as a digital serial number, which can be obtained by scanning the digital serial number through a camera. In some embodiments, the board has multiple Type-C interfaces, and each Type-C interface is provided with a corresponding identification code.

[0095] In this embodiment, the detection serial number of each Type-C interface to be tested is obtained by scanning through a camera, which is used to mark the Type-C interface as the unique identification of the Type-C interface to be tested during the detection process, and can also be used as the identification of the detection sequence. In this embodiment, the detection serial number of the Type-C interface to be tested obtained by scanning is used as the input of the second sequence value, and the first sequence value and the second sequence value are generated in combination with the collection sequence of the signals of the pins. In this way, the sequence data collected can be determined to belong to which Type-C interface to be tested through the first sequence value and the second sequence value. In this way, the detection board is used to simultaneously collect the Type-C interfaces to be tested of multiple boards to be tested, which are uploaded to the upper computer. After comparison and detection by the upper computer, the Type-C interface to be tested with a fault can be determined from the boards to be tested according to the detection serial number of the Type-C interface to be tested recorded in the sequence value.

[0096] In addition, since the first sequence value and the second sequence value also record the serial numbers of the pins sorted in the first preset polling order and the second preset polling order, respectively, the comparison of the data of each pin can also be performed according to the first preset polling order and the second preset polling order during the comparison of the first sequence data and the second sequence data of each Type-C interface to be tested with the preset comparison data in the upper computer, so that the fault of a certain pin can be accurately identified and located.

[0097] In addition, in some embodiments, the USB (Universal Serial Bus) 3.0 and USB 2.0 functions of the Type-C interface to be tested can be detected according to requirements. Specifically, the Type-C interface contains the function pins of USB 3.0 and USB 2.0, such as TX1+, TX1-, RX1+, RX1-, TX2+, TX2-, RX2+, RX2-, and D+, D-. Therefore, the first preset polling sequence can be set according to the detection requirements, and the signals of the corresponding pins are collected based on the first preset polling sequence. The preset comparison data can also be selected according to the test requirements to match the function pins of USB 3.0 and USB 2.0.

[0098] In one embodiment, step 170 includes: using the host computer to detect whether the data corresponding to each pin in the first sequence data and each item of the preset comparison data conform to each other in the first preset polling sequence; and using the host computer to detect whether the data corresponding to each pin in the second sequence data and each item of the preset comparison data conform to each other in the second preset polling sequence. Step 180 includes: when there is at least one pin in the first sequence data whose corresponding data does not conform to an item of the preset comparison data, and / or when there is at least one pin in the second sequence data whose corresponding data does not conform to an item of the preset comparison data, determining that the data is abnormal, and determining the abnormal Type-C interface to be tested according to the detection sequence number of the Type-C interface to be tested. In this embodiment, the first sequence data and the second sequence data are detected according to the first preset polling sequence and the second preset polling sequence, respectively, in the comparison detection process of the host computer, so that the fault of a certain pin can be accurately identified and located.

[0099] In one embodiment, the step of using the host computer to detect whether each first sequence data and each second sequence data of each Type-C interface to be tested conforms to the preset comparison data includes:

[0100] Using the host computer to analyze each first sequence data and each second sequence data to obtain the detection sequence number, the first detection data, and the second detection data of each Type-C interface to be tested;

[0101] Comparing the first detection data and the second detection data with the preset comparison data, respectively;

[0102] The step of determining that the data is abnormal when the first sequence data or the second sequence data does not conform to the preset comparison data, and determining the abnormal Type-C interface to be tested according to the first sequence value and the second sequence value includes:

[0103] When at least one of the first detection data and the second detection data does not conform to the preset comparison data, the data is determined as abnormal data, the detection serial number of the to-be-tested Type-C interface is determined, and the detection serial number of the to-be-tested Type-C interface is output.

[0104] In the embodiment, the step of comparing the first detection data and the second detection data with the preset comparison data respectively comprises: comparing the data corresponding to each pin in the first detection data with each item of data of the preset comparison data in a first preset polling order; and comparing the data corresponding to each pin in the second detection data with each item of data of the preset comparison data in a second preset polling order.

[0105] In the embodiment, when the host computer compares the data collected by each to-be-tested Type-C interface, the host computer first analyzes the first sequence data and the second sequence data with the serial number, and the analysis process is the inverse process of coding, and thus can also be called a decoding process. After the analysis, the detection serial number of the to-be-tested Type-C interface, the first detection data, and the second detection data are obtained. It is worth mentioning that, since the first preset polling order and the second preset polling order are preset and are the same for each to-be-tested Type-C interface, it is not necessary to decode them, so as to reduce the amount of calculation. The first preset polling order and the second preset polling order are only used in the coding process, and the purpose is to arrange the signals of the pins in order. The first preset polling order and the second preset polling order are pre-stored in the host computer, and thus it is not necessary to obtain the first preset polling order and the second preset polling order by analyzing the first sequence data and the second sequence data.

[0106] In addition, in the embodiment, after detecting that the to-be-tested Type-C interface is abnormal, the detection serial number of the to-be-tested Type-C interface is determined, and the detection serial number of the to-be-tested Type-C interface is output, so that the detection personnel can know which to-be-tested Type-C interface of which to-be-tested board card is abnormal, and quickly and accurately locate the abnormal Type-C interface. In this way, a plurality of to-be-tested Type-C interfaces can be batch detected, and the data can be batch collected and compared, without the need for collecting, detecting, and comparing one by one. In the case of batch detection, the abnormal to-be-tested Type-C interface can be accurately determined, so that the detection efficiency is more effectively improved.

[0107] In one embodiment, the first face detection pin comprises a first CC pin, and the second face detection pin comprises a second CC pin.

[0108] The step of turning on the connection between the first surface detection pin and the detection circuit, turning off the connection between the second surface detection pin and the detection circuit, collecting signals of each pin of the first surface interface pin in a first preset polling order, and obtaining a plurality of first signals comprises:

[0109] The ground resistance on the first CC pin is connected to the ground, and the connection between the first surface detection pin and the detection circuit is turned on, the ground resistance on the second CC pin is disconnected from the ground, and the connection between the second surface detection pin and the detection circuit is turned off, and it is judged whether signals are generated from each pin of the first surface interface pin. If yes, signals of each pin of the first surface interface pin are collected in a first preset polling order to obtain a plurality of first signals. If no, the identification code of the Type-C interface to be tested is scanned to obtain a detection serial number of the Type-C interface to be tested. First fault sequence data is generated based on the detection serial number of the Type-C interface to be tested, and the first fault sequence data is stored to the upper computer.

[0110] The step of turning on the connection between the second surface detection pin and the detection circuit, turning off the connection between the first surface detection pin and the detection circuit, collecting signals of each pin of the second surface interface pin in a second preset polling order, and obtaining a plurality of second signals comprises:

[0111] The ground resistance on the second CC pin is connected to the ground, and the connection between the second surface detection pin and the detection circuit is turned on, the ground resistance on the first CC pin is disconnected from the ground, and the connection between the first surface detection pin and the detection circuit is turned off, and it is judged whether signals are generated from each pin of the second surface interface pin. If yes, signals of each pin of the second surface interface pin are collected in a second preset polling order to obtain a plurality of second signals. If no, the identification code of the Type-C interface to be tested is scanned to obtain a detection serial number of the Type-C interface to be tested. Second fault sequence data is generated based on the detection serial number of the Type-C interface to be tested, and the second fault sequence data is stored to the upper computer.

[0112] In the embodiment, the role of the CC (Configuration channel) pin is to identify the insertion direction of the preset detection connector, for example, Figure 4As shown, the first CC pin of the preset detection connector is CC1, and the second CC pin of the preset detection connector is CC2. Specifically, the first CC pin of the preset detection connector is connected to the ground through a grounding resistor, and the second CC pin is connected to the ground through another grounding resistor. An electronic switch is arranged between the grounding resistor and the ground to control the conduction and disconnection between the grounding resistor and the ground. In addition, electronic switches are arranged between the detection circuit and the first face detection pin of the preset detection connector and between the detection circuit and the second face detection pin of the preset detection connector, respectively, to control the conduction and disconnection between the detection circuit and the first face detection pin of the preset detection connector and to control the conduction and disconnection between the detection circuit and the second face detection pin of the preset detection connector. For example, the electronic switch is a triode. In this embodiment, a control module is arranged on the detection board card, and the control module is connected to the control end of each electronic switch to control the conduction and disconnection of each electronic switch.

[0113] In this embodiment, the two faces of the preset detection connector are respectively provided with CC pins, so that whether the Type-C interface is inserted in the normal direction or in the reverse direction, the two faces of the Type-C interface can be connected with the CC pins on the Type-C interface to be tested. In order to separately collect the signals of each face of the Type-C interface to be tested, the multiplexing switch of the Type-C interface to be tested needs to be controlled to be turned on to realize the collection of the signals of each face of the Type-C interface to be tested.

[0114] Specifically, the Type-C interface to be tested has a controller chip, a CC detection control chip and a multiplexing switch circuit. The CC detection control chip is connected to the CC1 and CC2 pins of the Type-C interface to be tested. The multiplexing switch circuit is connected to TX1+, TX1-, RX1-, RX1+, TX2+, TX2-, RX2- and RX2+ of the Type-C interface to be tested, respectively. The multiplexing switch circuit is also connected to the controller chip. When the CC1 pin of the Type-C interface to be tested detects the connection with the CC pin of the male connector, the multiplexing switch circuit is triggered to open the channels of TX1+, TX1-, RX1+ and RX1- and close the channels of TX2+, TX2-, RX2+ and RX2-, so that TX1+, TX1-, RX1+ and RX1- are connected to SSTX+, SSTX-, SSRX+ and SSRX- of the controller chip, respectively. When the CC2 pin of the Type-C interface to be tested detects the connection with the CC pin of the male connector, the multiplexing switch circuit is triggered to open the channels of TX2+, TX2-, RX2+ and RX2- and close the channels of TX1+, TX1-, RX1+ and RX1-, so that TX1+, TX1-, RX1+ and RX1- are connected to SSTX+, SSTX-, SSRX+ and SSRX- of the controller chip, respectively.

[0115] In this embodiment, first, the connection between the ground resistance corresponding to the first CC pin and the ground is turned on, so that the first CC pin is connected to the pull-down resistance, so that the voltage of the CC1 pin connected to the first CC pin changes, and the CC detection control chip of the Type-C interface under test can detect the connection of the first CC pin through the CC1 pin, and because the connection between the ground resistance corresponding to the second CC pin and the ground is disconnected, the second CC pin is not connected to the pull-down resistance, and the voltage of the CC2 pin does not change. The CC detection control chip of the Type-C interface under test triggers the multiplexing switch circuit to open the channels of TX1+, TX1-, RX1+, and RX1-, so that signal collection is performed on each pin of the first interface pin and RX1+, RX1- of the second interface pin except RX2+, RX2-. Subsequently, the connection between the ground resistance corresponding to the second CC pin and the ground is turned on, so that the second CC pin is connected to the pull-down resistance, so that the voltage of the CC2 pin connected to the second CC pin changes, and the CC detection control chip of the Type-C interface under test can detect the connection of the second CC pin through the CC2 pin. Because the connection between the ground resistance corresponding to the first CC pin and the ground is disconnected, the first CC pin is not connected to the pull-down resistance, and the voltage of the CC1 pin does not change. The CC detection control chip of the Type-C interface under test triggers the multiplexing switch circuit to open the channels of TX2+, TX2-, RX2+, and RX2-, so that signal collection is performed on each pin of the second interface pin except RX1+, RX1- and RX2+, RX2- of the first interface pin. Through the above process, signal collection of the pins of the two surfaces of the Type-C interface under test can be realized without the user plugging and unplugging the connector, and without normal insertion and reverse insertion, which can effectively improve the detection efficiency.

[0116] To avoid normal and reverse insertion, in some cases, both surfaces of the pins are turned on for detection, but this will result in the inability to separately detect the functions of the two CC pins of the Type-C interface under test, and the inability to accurately identify the faults or abnormalities of the CC pins. In this embodiment, one surface of the pins is turned on and the other surface of the pins is disconnected to separately detect the two surfaces of the pins of the Type-C interface under test, which can separately detect the functions of the CC pins of the Type-C interface under test to detect whether the CC detection control chip and the multiplexing switch circuit of the Type-C interface under test are working normally, and can normally open the channels and close the channels.

[0117] In addition, in the embodiment, when signals of the pins of the to-be-tested Type-C interface are collected according to the preset polling, if there is data transmission or a voltage signal on each pin, it indicates that the connection of each pin of the to-be-tested Type-C interface is not faulty, and then the signals of the pins can be collected, if there is no signal on at least one pin, it indicates that the to-be-tested Type-C interface has unstable or faulty pin connection, then the detection sequence number of the to-be-tested Type-C interface is scanned, and the first fault sequence data is generated and stored to the upper computer. It is worth mentioning that, in the traditional way, when there is no signal on a pin, the signal collected by the pin is set to 0, and the first (second) detection data and the first (second) sequence data are still generated, on the one hand, the calculation resources are undoubtedly consumed, because the signal and the signal abnormality are different, for example, the collected voltage is out of range, and further judgment needs to be made in the upper computer, and the signal abnormality needs to be determined after the upper computer is parsed (decoded). In the embodiment, when there is no signal on a pin, the fault sequence data is directly generated, and the second fault sequence data is stored to the upper computer, so that the process of generating the first (second) detection data and the first (second) sequence data can be omitted, the upper computer does not need to parse too much, and the to-be-tested Type-C interface can be directly confirmed to be abnormal, and since the fault sequence data carries the detection sequence number of the to-be-tested Type-C interface, the upper computer can quickly locate the to-be-tested Type-C interface with no signal and abnormality.

[0118] In one embodiment, the step of connecting the first face detection pin and the detection circuit, disconnecting the second face detection pin and the detection circuit, collecting signals of each pin of the first face interface pin in a first preset polling order to obtain a plurality of first signals includes:

[0119] connecting the ground resistance on the first CC pin and the ground, and connecting the first face detection pin and the detection circuit, disconnecting the ground resistance on the second CC pin and the ground, and disconnecting the second face detection pin and the detection circuit, collecting signals of each pin of the first face interface pin except the first high-speed differential transmission pin in a first preset polling order to obtain a plurality of first sub-signals, connecting the second face detection pin and the detection circuit, collecting signals of the first high-speed differential transmission pin of the first face interface pin and the first high-speed differential receiving pin of the second face interface pin in a first preset polling order to obtain a plurality of second sub-signals, and combining the first sub-signals and the second sub-signals to obtain the first signals.

[0120] The step of turning on the connection between the second face detection pin and the detection circuit, turning off the connection between the first face detection pin and the detection circuit, collecting signals of each pin of the second face interface pin in a second preset polling sequence, and obtaining a plurality of second signals comprises:

[0121] Turning on the connection between the ground resistance on the second CC pin and the ground, and turning on the connection between the second face detection pin and the detection circuit, turning off the connection between the ground resistance on the first CC pin and the ground, and turning off the connection between the first face detection pin and the detection circuit, collecting signals of each pin of the second face interface pin except the second high-speed differential transmission pin in a second preset polling sequence, obtaining a plurality of third sub-signals, turning on the connection between the first face detection pin and the detection circuit, collecting signals of the second high-speed differential transmission pin of the second face interface pin and the second high-speed differential receiving pin of the first face interface pin in a second preset polling sequence, obtaining a plurality of fourth sub-signals, and merging the third sub-signals and the fourth sub-signals to obtain the second signals.

[0122] In the embodiment, the high-speed differential transmission pin refers to TX1+, TX1-, RX1+, RX1-, TX2+, TX2-, RX2+, and RX2-.

[0123] Firstly, the ground resistance on the first CC pin is grounded, so that the voltage of the CC1 pin connected with the first CC pin changes, the CC detection control chip of the Type-C interface to be tested triggers the multiplexing switch circuit to open the channels of TX1+, TX1-, RX1+, RX1-, but at this time, the connection of the second surface detection pin with the detection circuit is disconnected, and the signals of RX1+, RX1- located at the second surface interface pin cannot be collected. Therefore, according to the first preset polling sequence, the signals of each pin of the first surface interface pin except TX1+, TX1- are collected, and the signals of RX2+, RX2- of the first surface interface pin are set to 0 or replaced or kept empty value subsequently. Subsequently, the connection of the first surface detection pin with the detection circuit is kept on, the disconnection between the ground resistance on the second CC pin and the ground is kept, the connection of the second surface detection pin with the detection circuit is turned on, so that the detection circuit can be connected with RX1+, RX1- of the second surface interface pin through the second surface detection pin. At this time, the detection circuit can simultaneously connect the first surface interface pin and the second surface interface pin of the Type-C interface to be tested, but at this time, the channels of TX2+, TX2-, RX2+, RX2- are still closed, so that the detection circuit can send and receive test data through TX1+, TX1- of the first surface interface pin and RX1+, RX1- of the second surface interface pin of the Type-C interface to be tested, so as to realize the complete operation of the function of the Type-C interface to be tested, and the signals of TX1+, TX1- of the first surface interface pin and RX1+, RX1- of the second surface interface pin are collected as the second sub-signal. It is worth mentioning that the order of the collected pins and the order of the pins not collected can be set in advance in the first preset polling sequence, and the collection order of the pins before and after the connection of the second surface detection pin with the detection circuit is turned on or the signal of the pin is ignored can also be set. Therefore, according to the first preset polling sequence, all signals of the first surface interface pin and the signals of the high-speed differential transmission pins of the second surface interface pin in the same group as the high-speed differential transmission pins of the first surface interface pin can be completely collected.

[0124] The process of collecting the second signal is the same as the above process, which is not described in detail in this embodiment.

[0125] In one embodiment, the ground resistance on the first CC pin is connected to the ground, the first face detection pin is connected to the detection circuit, the ground resistance on the second CC pin is disconnected from the ground, the second face detection pin is disconnected from the detection circuit, the signals of the pins of the first face interface pin except the first high-speed differential transmission pin are collected in a first preset polling sequence to obtain a plurality of first sub-signals, the second face detection pin is connected to the detection circuit, the signals of the first high-speed differential transmission pin of the first face interface pin and the signals of the first high-speed differential receiving pin of the second face interface pin are collected in the first preset polling sequence to obtain a plurality of second sub-signals, and the first sub-signals and the second sub-signals are combined to obtain the first signal, wherein the time interval of polling the signals of the pins in the first preset polling sequence is a first time interval t1, the second face detection pin is connected to the detection circuit for a time t2, and the second face detection pin is disconnected from the detection circuit when the connection time reaches t2, wherein t2 = 2t1. In this embodiment, the signal collection time interval of adjacent two pins is t1, and the connection time of the second face detection pin to the detection circuit reaches 2t1, so that the signals of TX1+, TX1-, RX1+ and RX1- can be collected, and the collection efficiency is effectively improved.

[0126] The ground resistance on the second CC pin is connected to the ground, the second face detection pin is connected to the detection circuit, the ground resistance on the first CC pin is disconnected from the ground, the first face detection pin is disconnected from the detection circuit, the signals of the pins of the second face interface pin except the second high-speed differential transmission pin are collected in a second preset polling sequence to obtain a plurality of third sub-signals, the first face detection pin is connected to the detection circuit, the signals of the second high-speed differential transmission pin of the second face interface pin and the signals of the second high-speed differential receiving pin of the first face interface pin are collected in the second preset polling sequence to obtain a plurality of fourth sub-signals, and the third sub-signals and the fourth sub-signals are combined to obtain the second signal, wherein the time interval of polling the signals of the pins in the second preset polling sequence is a third time interval t3, the first face detection pin is connected to the detection circuit for a time t4, and the first face detection pin is disconnected from the detection circuit when the connection time reaches t4, wherein t4 = 2t3. In this embodiment, the signal collection time interval of adjacent two pins is t3, and the connection time of the first face detection pin to the detection circuit reaches 2t3, so that the signals of TX1+, TX1-, RX1+ and RX1- can be collected, and the collection efficiency is effectively improved.

[0127] In one embodiment, the step of obtaining a first sequence value, converting the first signal into first detection data in a preset format according to a preset rule, and encoding the first detection data by using the first sequence value to obtain first sequence data comprises:

[0128] obtaining a first sequence value, wherein the first sequence value records detection serial numbers of each of the Type-C interfaces to be tested and serial numbers corresponding to each pin sorted according to the first preset polling sequence;

[0129] analog-digital converting the first signal according to a preset rule to obtain the first detection data;

[0130] encoding the first detection data by using the first sequence value to obtain first sequence data;

[0131] The step of obtaining a second sequence value, converting the second signal into second detection data in a preset format according to a preset rule, and encoding the second detection data by using the second sequence value to obtain second sequence data comprises:

[0132] obtaining a second sequence value, wherein the second sequence value records detection serial numbers of each of the Type-C interfaces to be tested and serial numbers corresponding to each pin sorted according to the second preset polling sequence;

[0133] analog-digital converting the second signal according to a preset rule to obtain the second detection data;

[0134] encoding the second detection data by using the second sequence value to obtain second sequence data.

[0135] In this embodiment, since the collected first signal includes analog signals and digital signals, it is necessary to convert the analog signals of the first signal into digital signals, so as to obtain the digital signal data of each pin, i.e., the first detection data and the second detection data. It is worth mentioning that the first detection data and the second detection data are not numbered and do not have an order. In this embodiment, the first sequence value and the second sequence value respectively record the detection serial numbers of the Type-C interfaces to be tested and the detection serial numbers corresponding to each pin. By using the first sequence value and the second sequence value, the data of each pin of the first detection data and the second detection data can be sorted or encoded, so as to obtain the first sequence data and the second sequence data containing the pin order, respectively.

[0136] In one embodiment, the step of encoding the first detection data by using the first sequence value to obtain first sequence data comprises: assigning the first detection data of each pin of the first surface interface pin to the Nth pin signal value in the first sequence value according to the sequence number N corresponding to the pin recorded in the first sequence value, and merging each pin signal value having the same detection sequence number of the to-be-tested Type-C interface to obtain the first sequence data, wherein the first sequence value has M pin signal values, M is equal to the number of pins of the first surface interface pin, N is a positive integer greater than or equal to 1 and less than or equal to the number of pins of the first surface interface pin.

[0137] The step of encoding the second detection data by using the second sequence value to obtain second sequence data comprises: assigning the second detection data of each pin of the second surface interface pin to the Nth pin signal value in the second sequence value according to the sequence number N corresponding to the pin recorded in the second sequence value, and merging each pin signal value having the same detection sequence number of the to-be-tested Type-C interface to obtain the second sequence data, wherein the second sequence value has M pin signal values, M is equal to the number of pins of the second surface interface pin, N is a positive integer greater than or equal to 1 and less than or equal to the number of pins of the second surface interface pin.

[0138] In the embodiment, each first sequence value and second sequence value respectively comprises a sequence header of a first preset number of bits, a positive-negative surface identification number of one bit, M-bit pin signal values and a pin sequence number of a second preset number of bits. For example, the first preset number of bits is six, the six-bit sequence header is the detection sequence number of the to-be-tested Type-C interface, and is used to indicate the to-be-tested Type-C interface. The positive-negative surface identification number is used to distinguish the first surface interface pin and the second surface interface pin of the to-be-tested Type-C interface. For example, 0 is the first surface interface pin and 1 is the second surface interface pin. The second preset number of bits is four, which is used to indicate the sequence number of the pin. M is twelve. In the initial state of each first sequence value, the M-bit pin signal values are empty. Correspondingly, the 12 pin signals of the first surface interface pin are empty before collection. Thus, in the initial state, the first sequence value is AFE0010 0001, wherein AFE001 is the detection sequence number of the to-be-tested Type-C interface, 0 is the pin signal value of the empty first surface interface pin, and 0001 is the pin detection sequence number corresponding in the first preset polling order. In the initial state, the first sequence value is AFE0010 10001. For example, the first sequence value is AFE0010 0010, the pin signal is "0", then assign "0" to the 0010th pin signal, and get AFE0010 0 0010; and so on. For example: when disconnecting the second face detection pin from the detection circuit, collect the signals of each pin of the first face interface pin except the first high-speed differential transmission pin in the first preset polling order, and merge the collected signal data. Since the signal data has been assigned to the pin signal value of the corresponding position, the four-bit pin number can be deleted during the merging process, and AFE0010 1 is obtained 1111111 0, wherein the four-bit TX1+, TX1-, RX2-, RX2+ are null values. Then, by connecting the second face detection pin to the detection circuit, the detection circuit can collect the signals of TX1+, TX1- of the first face interface pin and RX1+, RX1- of the second face interface pin through the connection of the second face detection pin and the second face interface pin, and assign them respectively to obtain AFE0010 1111111111 0 and AFE0011 11 0. In this way, the first signal value can be obtained. Then, during the signal detection process of the second face interface pin, the above-mentioned null signal is supplemented, so that complete first sequence data and second sequence data are obtained.

[0139] Through the above process, the connection and disconnection of the first face detection pin and the detection circuit, and the connection of the second face detection pin and the detection circuit can be effectively matched, and the signals of each pin can be efficiently collected. Since the position of the M-bit pin signal value represents the actual position of the pin, it is not necessary to record the position of each signal through an additional serial number value, so that the first sequence data and the second sequence data can be completely recorded with less data amount. And the detection and comparison efficiency of the subsequent host computer is improved.

[0140] In one embodiment, the step of comparing the first detection data and the second detection data with the preset comparison data respectively comprises:

[0141] The sequence head of the first detection data, the front and back surface identification number, and the sequence head comparison value of the preset comparison data are subjected to bitwise AND operation, and the M-bit pin signal value of the first detection data and the reference signal value of the preset comparison data are subjected to bitwise XOR operation; the sequence head of the second detection data, the front and back surface identification number, and the sequence head comparison value of the preset comparison data are subjected to bitwise AND operation, and the M-bit pin signal value of the second detection data and the reference signal value of the preset comparison data are subjected to bitwise XOR operation; wherein the sequence head comparison value of the preset comparison data is Q bits of 1, and Q is the first preset bit number plus one.

[0142] In the embodiment, since the sequence head comparison values of the preset comparison data are all 1, when subjected to bitwise AND operation, the calculation result can retain the detection serial number and the front and back surface identification number of the to-be-detected Type-C interface, thereby recording the comparison detection result of each to-be-detected Type-C interface, and the result can be positioned to each to-be-detected Type-C interface. The reference signal value is the pin signal value when the normal Type-C interface works, and the M-bit pin signal value and the reference signal value of the preset comparison data are subjected to bitwise XOR operation, so that the comparison result of the pins that meet the condition is 1, and the comparison result of the pins that do not meet the condition is 0, which not only can identify the abnormal to-be-detected Type-C interface, but also can determine the position of the abnormal pin. Therefore, the detection of the pin signal is accurate and efficient.

[0143] It should be understood that, although Figure 1 The steps in the flowchart of the method can be executed in the order shown by the arrows, but these steps are not necessarily executed in the order shown by the arrows. Unless otherwise specified herein, the execution of these steps is not strictly limited in order, and these steps can be executed in other orders. Moreover, Figure 1 At least part of the steps in the method can include multiple sub-steps or multiple stages, which are not necessarily executed at the same time, but can be executed at different times, and the execution order of these sub-steps or stages is not necessarily sequential, but can be executed in rotation or alternation with at least part of other steps or sub-steps or stages of other steps.

[0144] Embodiment two

[0145] In the embodiment, an automatic Type-C interface detection device is provided, which is applied to a preset detection connector inserted into a to-be-detected Type-C interface, wherein the preset detection connector has a first surface detection pin and a second surface detection pin, the first surface detection pin is connected to the first surface interface pin of the to-be-detected Type-C interface one by one, and the second surface detection pin is connected to the second surface interface pin of the to-be-detected Type-C interface one by one; the device comprises:

[0146] The first acquisition module is configured to connect the first face detection pin to the detection circuit, disconnect the second face detection pin from the detection circuit, acquire signals of each pin of the first face interface pin in a first preset polling sequence, and obtain a plurality of first signals.

[0147] The first sequence data acquisition module is configured to obtain a first sequence value, convert the first signal into first detection data in a preset format according to a preset rule, encode the first detection data by using the first sequence value, and obtain first sequence data.

[0148] The second acquisition module is configured to connect the second face detection pin to the detection circuit, disconnect the first face detection pin from the detection circuit, acquire signals of each pin of the second face interface pin in a second preset polling sequence, and obtain a plurality of second signals.

[0149] The second sequence data acquisition module is configured to obtain a second sequence value, convert the second signal into second detection data in a preset format according to a preset rule, encode the second detection data by using the second sequence value, and obtain second sequence data.

[0150] The storage module is configured to store the first sequence data and the second sequence data of each Type-C interface to be tested in an upper computer.

[0151] The detection comparison module is configured to detect, by using the upper computer, whether the first sequence data and the second sequence data of each Type-C interface to be tested conform to preset comparison data.

[0152] The abnormality output module is configured to determine that the first sequence data or the second sequence data is abnormal data when the first sequence data or the second sequence data does not conform to the preset comparison data, and determine the Type-C interface to be tested that is abnormal according to the first sequence value and the second sequence value.

[0153] The specific limitations of the automatic Type-C interface detection device can refer to the limitations of the automatic Type-C interface detection method described above, which will not be repeated here. Each unit in the automatic Type-C interface detection device described above can be realized by software, hardware, and a combination thereof in whole or in part. Each unit described above can be embedded in or independent of the processor in the computer device in hardware form, or can be stored in the memory in the computer device in software form, so as to be called and executed by the processor to perform the operations corresponding to each unit.

[0154] Embodiment Three

[0155] In this embodiment, an electronic device is provided, which can serve as a host computer and also as an electronic computer containing a detection board. Its internal structure diagram can be as shown in Figure 2 The electronic device includes a processor, a memory, a network interface, a display screen and an input device connected through a system bus. The processor of the electronic device is used to provide computing and control capabilities. The memory of the electronic device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program, and the non-volatile storage medium is deployed with a database for detecting data. The internal memory provides an environment for the operating system and the computer program in the non-volatile storage medium to run. The network interface of the electronic device is used to communicate with other electronic devices deployed with application software. The computer program is executed by the processor to implement an automatic Type-C interface detection method. The display screen of the electronic device can be a liquid crystal display screen or an electronic ink display screen. The input device of the electronic device can be a touch layer overlaid on the display screen, or a key, trackball or touchpad provided on the shell of the electronic device, or an external keyboard, touchpad or mouse, etc.

[0156] Those skilled in the art can understand that Figure 2 The structure shown in the above embodiment is only a block diagram of part of the structure related to the scheme of the present application, and does not constitute a limitation on the electronic device to which the scheme of the present application is applied. The specific electronic device can include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0157] In one embodiment, an electronic device is provided, including a memory storing a computer program and a processor executing the computer program to implement the steps of the automatic Type-C interface detection method described in any of the above embodiments.

[0158] Embodiment Four

[0159] In this embodiment, a computer readable storage medium is provided, which stores a computer program, and the computer program is executed by a processor to implement the steps of the automatic Type-C interface detection method described in any of the above embodiments.

[0160] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program. The computer program can be stored in a non-volatile computer readable storage medium, and when the computer program is executed, the processes of the above-mentioned embodiments of the methods can be included. Any reference to memory, storage, databases, or other media in the embodiments provided by the present application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. As an illustration but not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.

[0161] The technical features of the above embodiments can be combined in any way. In order to make the description simple, not all possible combinations of the technical features in the above embodiments are described, but as long as the combinations of the technical features do not exist, they should be considered as the scope of the present application.

[0162] The above embodiments only express several implementation manners of the present application, and the description is more specific and detailed, but it should not be understood as a limitation on the scope of the patent. It should be pointed out that for ordinary skilled in the art, without departing from the concept of the present application, some modifications and improvements can be made, which are all within the scope of the present application. Therefore, the scope of the patent of the present application should be subject to the appended claims.

Claims

1. An automated Type-C interface detection method, characterized in that, include: A preset test connector is inserted into the Type-C interface to be tested. The preset test connector has a first side test pin and a second side test pin. The first side test pin is connected to the first side interface pin of the Type-C interface to be tested one by one, and the second side test pin is connected to the second side interface pin of the Type-C interface to be tested one by one. Connect the first side detection pin to the detection circuit, disconnect the second side detection pin from the detection circuit, and collect the signals of each pin of the first side interface pin according to the first preset polling order to obtain multiple first signals; Obtain a first sequence value, convert the first signal into first detection data in a preset format according to a preset rule, and encode the first detection data using the first sequence value to obtain the first sequence data; Connect the second-side detection pin to the detection circuit, disconnect the first-side detection pin from the detection circuit, and collect the signals of each pin of the second-side interface pin according to the second preset polling order to obtain multiple second signals; Obtain the second sequence value, convert the second signal into second detection data in a preset format according to a preset rule, and encode the second detection data using the second sequence value to obtain the second sequence data; The first sequence data and the second sequence data of each of the Type-C interfaces under test are stored in the host computer; The host computer is used to detect whether the first sequence data and the second sequence data of each of the Type-C interfaces under test conform to preset comparison data; When the first sequence data or the second sequence data does not match the preset comparison data, it is determined to be abnormal data, and the abnormal Type-C interface under test is determined according to the first sequence value and the second sequence value. The first surface detection pin includes a first CC pin, and the second surface detection pin includes a second CC pin; The steps of connecting the first-side detection pin to the detection circuit, disconnecting the second-side detection pin from the detection circuit, and collecting signals from each pin of the first-side interface pin according to a first preset polling order to obtain multiple first signals include: The grounding resistor on the first CC pin is connected to ground, and the connection between the first face detection pin and the detection circuit is also connected. The grounding resistor on the second CC pin is disconnected from ground, and the connection between the second face detection pin and the detection circuit is also disconnected. According to the first preset polling order, the signals of each pin of the first face interface pin except the first high-speed differential transmission pin are collected to obtain multiple first sub-signals. The connection between the second face detection pin and the detection circuit is then connected. According to the first preset polling order, the signal of the first high-speed differential transmission pin of the first face interface pin and the signal of the first high-speed differential reception pin of the second face interface pin are collected to obtain multiple second sub-signals. The first sub-signals and the second sub-signals are combined to obtain the first signal. The steps of connecting the second-side detection pin to the detection circuit, disconnecting the first-side detection pin from the detection circuit, and collecting signals from each pin of the second-side interface pin according to a second preset polling order to obtain multiple second signals include: The grounding resistor on the second CC pin is connected to ground, and the connection between the second face detection pin and the detection circuit is also connected. The grounding resistor on the first CC pin is disconnected from ground, and the connection between the first face detection pin and the detection circuit is also disconnected. According to the second preset polling order, the signals of each pin of the second face interface pin except for the second high-speed differential transmission pin are collected to obtain multiple third sub-signals. The connection between the first face detection pin and the detection circuit is then connected. According to the second preset polling order, the signal of the second high-speed differential transmission pin of the second face interface pin and the signal of the second high-speed differential reception pin of the first face interface pin are collected to obtain multiple fourth sub-signals. The third sub-signals and the fourth sub-signals are combined to obtain the second signal. In the first preset polling sequence, the time interval for polling each pin signal is a first time interval t1, the duration for connecting the second surface detection pin to the detection circuit is t2, and when the connection duration reaches t2, the connection between the second surface detection pin and the detection circuit is disconnected, where t2 = 2t1; In the second preset polling sequence, the time interval for polling each pin signal is a third time interval t3, the duration for connecting the first surface detection pin to the detection circuit is t4, and when the connection duration reaches t4, the connection between the first surface detection pin and the detection circuit is disconnected, where t4 = 2t3.

2. The method according to claim 1, characterized in that, The step of obtaining the first sequence value includes: Scan the identification code of the Type-C interface under test to obtain the detection sequence number of the Type-C interface under test; The first sequence value is generated based on the sequence number corresponding to each pin sorted by the first preset polling order and the detection sequence number of the Type-C interface under test; The step of obtaining the second sequence value includes: Scan the identification code of the Type-C interface under test to obtain the detection sequence number of the Type-C interface under test; The second sequence value is generated based on the sequence number of each pin sorted according to the second preset polling order and the detection sequence number of the Type-C interface under test.

3. The method according to claim 1, characterized in that, The step of using the host computer to detect whether the first sequence data and the second sequence data of each of the Type-C interfaces under test conform to the preset comparison data includes: The host computer is used to parse each of the first sequence data and each of the second sequence data to obtain the detection sequence number, first detection data and second detection data of each of the Type-C interfaces to be tested; The first detection data and the second detection data are compared with preset comparison data respectively; The step of determining abnormal data when the first sequence data or the second sequence data does not match the preset comparison data, and determining the abnormal Type-C interface under test based on the first sequence value and the second sequence value, includes: When at least one of the first detection data and the second detection data does not match the preset comparison data, it is determined to be abnormal data, the detection sequence number of the Type-C interface to be tested is determined, and the detection sequence number of the Type-C interface to be tested is output.

4. The method according to claim 1, characterized in that, The steps of connecting the first-side detection pin to the detection circuit, disconnecting the second-side detection pin from the detection circuit, and collecting signals from each pin of the first-side interface pin according to a first preset polling order to obtain multiple first signals include: The grounding resistor on the first CC pin is connected to ground, and the connection between the first surface detection pin and the detection circuit is also connected. The grounding resistor on the second CC pin is disconnected from ground, and the connection between the second surface detection pin and the detection circuit is also disconnected. It is determined whether each pin of the first surface interface pin generates a signal. If so, the signals of each pin of the first surface interface pin are collected according to the first preset polling order to obtain multiple first signals. If not, the identification code of the Type-C interface under test is scanned to obtain the detection sequence number of the Type-C interface under test. Based on the detection sequence number of the Type-C interface under test, first fault sequence data is generated and stored in the host computer. The steps of connecting the second-side detection pin to the detection circuit, disconnecting the first-side detection pin from the detection circuit, and collecting signals from each pin of the second-side interface pin according to a second preset polling order to obtain multiple second signals include: The grounding resistor on the second CC pin is connected to ground, and the connection between the second side detection pin and the detection circuit is also connected. The grounding resistor on the first CC pin is disconnected from ground, and the connection between the first side detection pin and the detection circuit is also disconnected. It is determined whether each pin of the second side interface pin generates a signal. If so, the signals of each pin of the second side interface pin are collected according to the second preset polling order to obtain multiple second signals. If not, the identification code of the Type-C interface under test is scanned to obtain the detection sequence number of the Type-C interface under test. Based on the detection sequence number of the Type-C interface under test, a second fault sequence data is generated, and the second fault sequence data is stored in the host computer.

5. The method according to any one of claims 1-4, characterized in that, The steps of obtaining a first sequence value, converting the first signal into first detection data in a preset format according to a preset rule, and encoding the first detection data using the first sequence value to obtain the first sequence data include: Obtain a first sequence value, wherein the first sequence value records the detection sequence number of each of the Type-C interfaces under test and the sequence number corresponding to each pin sorted according to the first preset polling order; The first signal is converted from analog to digital according to a preset rule to obtain the first detection data; The first sequence value is used to encode the first detection data to obtain the first sequence data; The steps of obtaining the second sequence value, converting the second signal into second detection data in a preset format according to a preset rule, and encoding the second detection data using the second sequence value to obtain the second sequence data include: Obtain a second sequence value, wherein the second sequence value records the detection sequence number of each of the Type-C interfaces under test and the sequence number corresponding to each pin sorted according to the second preset polling order; The second signal is converted from analog to digital according to a preset rule to obtain the second detection data; The second sequence value is used to encode the second detection data to obtain the second sequence data.

6. The method according to claim 5, characterized in that, The step of encoding the first detection data using the first sequence value to obtain the first sequence data includes: The first detection data of each pin of the first interface pin is assigned one by one to the Nth pin signal value in the first sequence value according to the pin number N recorded in the first sequence value. The pin signal values ​​with the same detection sequence number of the Type-C interface to be tested are merged to obtain the first sequence data. The first sequence value has M pin signal values, M is equal to the number of pins of the first interface pin, and N is a positive integer greater than or equal to 1 and less than or equal to the number of pins of the first interface pin. The step of encoding the second detection data using the second sequence value to obtain the second sequence data includes: The second detection data of each pin of the second interface pin is assigned one by one to the Nth pin signal value in the second sequence value according to the pin number N recorded in the second sequence value. The pin signal values ​​with the same detection sequence number of the Type-C interface to be tested are merged to obtain the second sequence data. The second sequence value has M pin signal values, M is equal to the number of pins of the second interface pin, and N is a positive integer greater than or equal to 1 and less than or equal to the number of pins of the second interface pin.

7. An automated Type-C interface testing device, characterized in that, An apparatus for use with a preset testing connector inserted into a Type-C interface under test, wherein the preset testing connector has a first side testing pin and a second side testing pin, the first side testing pin being connected one-to-one with the first side interface pin of the Type-C interface under test, and the second side testing pin being connected one-to-one with the second side interface pin of the Type-C interface under test; the apparatus includes: The first acquisition module is used to connect the first side detection pin to the detection circuit, disconnect the second side detection pin from the detection circuit, and acquire the signals of each pin of the first side interface pin according to a first preset polling order to obtain multiple first signals. The first sequence data acquisition module is used to acquire a first sequence value, convert the first signal into first detection data in a preset format according to a preset rule, and encode the first detection data using the first sequence value to obtain the first sequence data. The second acquisition module is used to connect the second-side detection pin to the detection circuit, disconnect the first-side detection pin from the detection circuit, and acquire the signals of each pin of the second-side interface pin according to the second preset polling order to obtain multiple second signals. The second sequence data acquisition module is used to acquire the second sequence value, convert the second signal into second detection data in a preset format according to a preset rule, and encode the second detection data using the second sequence value to obtain the second sequence data. The storage module is used to store the first sequence data and the second sequence data of each of the Type-C interfaces under test to the host computer; The detection and comparison module is used to use the host computer to detect whether the first sequence data and the second sequence data of each of the Type-C interfaces under test conform to preset comparison data; An abnormal output module is used to determine abnormal data when the first sequence data or the second sequence data does not match the preset comparison data, and to determine the abnormal Type-C interface under test based on the first sequence value and the second sequence value. The first surface detection pin includes a first CC pin, and the second surface detection pin includes a second CC pin; The first acquisition module is also used to connect the grounding resistor on the first CC pin to ground and connect the first face detection pin to the detection circuit, disconnect the grounding resistor on the second CC pin from ground and disconnect the second face detection pin from the detection circuit, acquire the signals of each pin of the first face interface pin except the first high-speed differential transmission pin according to the first preset polling order to obtain multiple first sub-signals, connect the second face detection pin to the detection circuit, acquire the signal of the first high-speed differential transmission pin of the first face interface pin and the signal of the first high-speed differential reception pin of the second face interface pin according to the first preset polling order to obtain multiple second sub-signals, and merge the first sub-signals and the second sub-signals to obtain the first signal; The second acquisition module is also used to connect the grounding resistor on the second CC pin to ground and connect the second face detection pin to the detection circuit, disconnect the grounding resistor on the first CC pin from ground and disconnect the first face detection pin from the detection circuit, acquire the signals of each pin of the second face interface pin except the second high-speed differential transmission pin according to the second preset polling order to obtain multiple third sub-signals, connect the first face detection pin to the detection circuit, acquire the signal of the second high-speed differential transmission pin of the second face interface pin and the signal of the second high-speed differential reception pin of the first face interface pin according to the second preset polling order to obtain multiple fourth sub-signals, and merge the third sub-signals and the fourth sub-signals to obtain the second signal; In the first preset polling sequence, the time interval for polling each pin signal is a first time interval t1, the duration for connecting the second surface detection pin to the detection circuit is t2, and when the connection duration reaches t2, the connection between the second surface detection pin and the detection circuit is disconnected, where t2 = 2t1; In the second preset polling sequence, the time interval for polling each pin signal is a third time interval t3, the duration for connecting the first surface detection pin to the detection circuit is t4, and when the connection duration reaches t4, the connection between the first surface detection pin and the detection circuit is disconnected, where t4 = 2t3.

8. An electronic device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 6.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 6.

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