Fuzzy matching method and device based on attribute clustering and readable storage medium

Abstract

The invention discloses a fuzzy matching method and device based on attribute clustering and a readable storage medium. The method comprises the steps of collecting device attribute values; the attribute values of all the dimensions of the layout and the schematic diagram are sorted and subjected to duplicate removal, and IDs are distributed to the layout attribute values of all the dimensions; based on the tolerance range, by taking each schematic diagram attribute value node as a center, calculating a range upper bound value and a range lower bound value, searching an attribute range of the layout meeting the range upper bound value and the range lower bound value, and storing a clustering range of a corresponding layout list by each schematic diagram attribute; and collecting a clustering range of schematic diagram instances, removing overlapped regions, performing fine-grained segmentation, allocating IDs to schematic diagram attribute nodes which are not allocated with clustering identifiers, and reallocating IDs to unmatched layout attributes. By adopting the method and the device, fuzzy matching can be carried out by utilizing the attribute value mapping result to realize global optimal attribute value matching, and the time complexity of fuzzy matching is reduced.

Description

Technical Field

[0001] The present invention relates to a layout versus schematic (LVS) technology for integrated circuit (IC) electronic design automation (EDA), and in particular to a fuzzy matching method, device and readable storage medium based on attribute clustering. Background Art

[0002] In the back-end design process of semiconductor integrated circuits (ICs), layout engineers perform synthesis, layout, and routing operations manually or through automated tools based on the circuit schematics or behavioral description language codes (such as Verilog) provided by the front-end process, and finally generate a layout for manufacturing masks. During this design process, there may be many errors in the layout, one of the most common errors is structural errors, that is, there are inconsistencies between the layout and the schematic, such as mismatched device numbers, incorrect device attributes, inconsistent number of nets, or connection errors, open circuits, short circuits, and other problems.

[0003] Similar to the design process of flat panel displays (FPDs), the IC design process also faces similar structural error problems. Any minor error may cause IC devices to fail during the production process, resulting in reduced yield, so LVS inspection / comparison must be performed to ensure the structural correctness of the layout.

[0004] The LVS check can be roughly divided into two main steps: the first step: netlist extraction, that is, extracting a network list (Netlist) describing the connection relationship of each component from the layout. This network list reflects the actual connection situation in the layout; the second step: isomorphism comparison, that is, comparing the network list extracted from the layout with the network list of the original schematic (Schematic) to confirm the structural consistency between the two.

[0005] Through the above two steps, LVS inspection can effectively identify and correct structural errors in the layout, thereby ensuring the quality and reliability of the final product. LVS inspection is crucial to ensure the success of IC or FPD design. Existing layout verification tools, such as Argus, can effectively check LVS errors and have been widely used in the IC and FPD fields.

[0006] In modern VLSI designs, the number of transistors integrated on a single chip has reached hundreds of billions. In order to manage and design complex design systems of this scale, these devices are usually organized into reusable cells according to their functions or process characteristics. In the top-level design, these cells can be directly or indirectly referenced multiple times, thus forming a multi-level structure. However, when it comes to verifying the correctness of these complex designs, the traditional flat LVS method becomes inapplicable because it requires all reused cells to be expanded to the top level for comparison. This method encounters huge computing resource requirements when dealing with large-scale integrated circuits. Therefore, hierarchical LVS (HLVS) is often used in practical applications to solve this problem. The goal of hierarchical LVS is to directly compare cells at different levels, rather than simply expanding all levels. This means that in the layout and schematic, cells with the same functional characteristics need to be identified, and a one-to-one relationship needs to be established between them. Such a cell is called a hierarchical cell (HCell), and a pair of corresponding HCells in Layout and Schematic constitutes an HCell pair.

[0007] HCell Pairs can be manually specified by the designer or automatically paired by automated tools based on the name or other characteristics of the unit. Since many HCells are repeatedly referenced in the top-level design, hierarchical LVS allows each pair of HCells to be compared only once, which can significantly reduce the required memory and CPU resources and improve the efficiency and manageability of the LVS process. This method enables LVS to be effectively executed in VLSI design, thus ensuring the accuracy and consistency of the design.

[0008] In the EDA software environment for IC design, attribute values, such as the width and length of transistors and the resistance value of resistors, are usually used to define the behavior and performance of circuits. The LVS verification / comparison method is used to compare the attribute values ​​of the layout and schematic to ensure that the attribute values ​​of each component in the layout design match the schematic design, thereby ensuring that the IC design goals can be accurately achieved. Attribute values ​​can not only be used to check the tolerance of matched devices, but can also be used in the matching stage to assist in device matching. However, due to the highly symmetrical circuits in the layout and netlist designs, when the device matching is carried out to the symmetrical structure, it is no longer possible to use the structure and type information to find a one-to-one matching device. At this time, there are multiple layout devices that can match multiple devices in the schematic. From the local structure of the circuit, the devices can be interchanged without affecting the overall exchangeability and connectivity. If these devices are matched arbitrarily, chained false errors may be caused.

[0009] like Figure 1a , Figure 1b The Layout and Schematic circuit diagrams with symmetrical structures shown are respectively composed of four resistors R1, R2, R3, and R4 connected in series. At this time, from a structural point of view, R1 in Layout can match any one of R1, R2, R3, and R4 in Schematic; when the first set of matches is determined, the matching of the remaining resistors can be matched according to the connection relationship. Assuming that the design rule needs to check whether the relative error of the resistor value is within 1%, from the perspective of attribute value, R1 in Layout can also match any resistor in Schematic. If R1 in Layout matches R1 in Schematic, according to the connection relationship between the resistors, R2 in Layout matches R2 in Schematic. When all matches are traversed, two sets of attribute errors will appear, namely (R2, R2) and (R4, R4). Due to the above two sets of attributes, the relative errors between the resistance values ​​of 102 ohms and 99 ohms are both more than 1%. This is a chain attribute false error caused by arbitrary matching. When the circuit structure is more complex and highly symmetrical, more attribute false errors will be brought about.

[0010] In order to solve these mismatches caused by the structure, usually, the method of device subtype and attribute value is introduced for fuzzy matching. Since the devices can be matched arbitrarily in pairs from the structure, it is only necessary to check whether the attribute value is within the tolerance range by pairing them. Therefore, this arbitrary matching method can also be called fuzzy matching based on attribute value. The time complexity of the whole fuzzy matching process is O(m*n). The time complexity of the algorithm depends on the number of devices with similar circuit structures in Layout and Schematic. At this time, the fuzzy matching of attribute values ​​may only be a local optimum, which will lead to chain mismatches and device attribute pseudo-errors, thereby hiding the real attribute value errors. The mismatch of attribute values ​​may cause the IC design task to fail, and then multiple redesigns and verifications are required, which will multiply the additional design cost and time. It can be seen that reasonable and standardized attribute value matching helps to reduce the number of IC design iterations and improve design efficiency.

[0011] In existing IC designs, the matching of device attribute values ​​usually uses an exhaustive method to traverse all the attribute values ​​of the Layout and Schematic. If they meet the specified tolerance range, they are matched. However, this algorithm has low matching efficiency. Since the process is terminated when a device with attribute matching is found, it is only a local optimal match with low matching accuracy. Figure 2a As shown in the figure, when the relative error is 1%, attribute 100 can match 99 or 101, and 102 can match 101 and 103. Affected by the order of the netlist, if 100 is matched with 101 first, then 102 can only match 103, which will cause 104 to be unable to match, which is not the optimal match. At this time, the report will show that there is a pair of devices with attribute matching errors. This matching does not take into account the distribution of attribute values ​​of devices in Layout and Schematic. In addition, when there are many devices containing attribute values, the use of existing fuzzy matching technology will also cause performance problems because the distribution between Layout and Schematic attributes is not considered. Summary of the invention

[0012] In view of this, the main purpose of the present invention is to provide a fuzzy matching method, device and readable storage medium based on attribute clustering, by clustering multi-dimensional attribute values ​​of devices in HCell of layout and schematic based on tolerance range, mapping multi-attribute values ​​through clustering results, and using the attribute value mapping results to perform fuzzy matching to achieve global optimal attribute value matching, thereby helping to reduce attribute matching errors occurring in fuzzy matching and reducing the time complexity of fuzzy matching.

[0013] To achieve the above object, the technical solution of the present invention is as follows:

[0014] The fuzzy matching method based on attribute clustering includes the following steps:

[0015] A. a step of collecting device attribute values, starting the attribute check command declared in the LVS rule for the device to be checked, performing attribute check on the device of the type according to the set rule, and collecting the attribute value and attribute tag of the device to be checked;

[0016] B. Sort and remove duplicate attribute values ​​of each dimension of the layout and schematic respectively, and assign an ID to the Layout attribute value of each dimension;

[0017] C. Based on the tolerance range, take each Schematic attribute value node as the center, calculate the upper and lower bounds of the range, and find the attribute range of the Layout that meets the upper and lower bounds of the range. Each Schematic attribute saves the clustering range of the corresponding Layout list;

[0018] D. Collect the clustering ranges of the Schematic instances, remove the overlapping areas, perform fine-grained segmentation, assign IDs to the Schematic attribute nodes that have not yet been assigned a cluster identifier, and reallocate IDs to the unmatched Layout attributes.

[0019] The step D further comprises:

[0020] E. Repeat steps A to D until the cluster ID calculation is completed for all attributes of the device to be inspected.

[0021] Among them: the device attribute ID to be checked participates in the hash calculation of the device characteristics to provide a better match within the attribute tolerance range.

[0022] Furthermore, the attribute check according to the set rules in step A includes:

[0023] The check is performed in combination with the netlist extracted from the layout and the schematic respectively, and the attribute clustering rule Rule, wherein the attribute clustering rule defines the type and attribute of the matched device to be checked, and sets the relative error.

[0024] In step B, an ID is assigned to the Layout attribute value of each dimension, and the ID is used to assign a cluster mapping identifier for the Layout and Schematic as a whole.

[0025] Step C also includes: if the current Schematic and Layout attribute values ​​are equal, assigning an identifier corresponding to Layout to the Schematic, and marking the Layout attribute as matched.

[0026] Step D also includes: creating a range terminal node for each cluster range of the Schematic attribute value, adding it to a range terminal list, and sorting the range terminal list, where two adjacent range terminal nodes constitute a fine-grained range.

[0027] A fuzzy matching device based on attribute clustering, the device comprising:

[0028] The IC device attribute checking and collection module is configured to execute the attribute checking Check_Property command declared in the LVS rule Rule for the device to be checked, perform attribute checking on the device of the type according to the set rule, and collect attribute values ​​and attribute tags of the device to be checked;

[0029] The attribute value sorting and deduplication module is configured to sort and deduplication the attribute values ​​of each dimension of the layout and the schematic respectively, and assign an ID to the Layout attribute value of each dimension;

[0030] The attribute value calculation and matching module is configured to calculate the upper and lower bounds of the range based on the tolerance range, with each Schematic attribute value node as the center, and find the attribute range of the Layout that meets the upper and lower bounds of the range. Each Schematic attribute saves the clustering range of the corresponding Layout list;

[0031] The cluster range collection and attribute node assignment module is configured to collect the cluster ranges of the Schematic instances, remove the overlapping areas, perform fine-grained segmentation, assign IDs to the Schematic attribute nodes that have not yet been assigned a cluster identifier, and reallocate IDs to the unmatched Layout attributes.

[0032] It also includes: an attribute clustering calculation and inspection module, which is configured to execute a fuzzy matching command based on attribute clustering, and repeatedly starts the IC device attribute inspection and collection module, the attribute value sorting and deduplication module, the attribute value calculation and matching module, and the schematic diagram clustering range collection and attribute node allocation module in sequence until the mapping ID calculation is completed for each attribute of the device attribute to be inspected.

[0033] A readable storage medium stores a computer program, wherein the computer program is configured to be used to implement the fuzzy matching method based on attribute clustering described in any one of claims 1 to 7 when executed by at least one processor.

[0034] The fuzzy matching method, device, equipment and readable storage medium of attribute clustering of the present invention have the following beneficial effects:

[0035] 1) The fuzzy matching method of attribute clustering of the present invention can realize the mapping and matching of multi-dimensional attribute values ​​in Layout and Schematic, give the best match of device attributes, reduce the possibility of attribute matching misalignment, and perform mapping matching within the clustering range under as many one-to-one best matching conditions as possible. There are many processes in the matching process that require the use of device attribute values ​​to assist in device matching.

[0036] 2) In addition to reducing the problem of false attribute matching, using clustering algorithms for device mapping can also reduce the overall time complexity of the algorithm. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] FIG. 1 is a schematic diagram of the layout and schematic diagram of a local IC circuit of an existing symmetrical structure, wherein Figure 1a For the Layout circuit, Figure 1b It is a schematic circuit;

[0038] Figure 2 shows the error matching in the existing attribute fuzzy matching process ( Figure 2a ) and the correct match ( Figure 2b ) Schematic diagram;

[0039] Figure 3 This is a flow chart of the fuzzy matching method for attribute clustering according to an embodiment of the present invention;

[0040] Figure 4 For the present invention Figure 3 The schematic diagram of attribute value clustering and fine-grained partitioning centered on Schematic in the fuzzy matching process of attribute clustering is shown;

[0041] Figure 5 It is a functional schematic diagram of a fuzzy matching device for attribute clustering according to an embodiment of the present invention. DETAILED DESCRIPTION

[0042] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments of the present invention.

[0043] Figure 3 This is a flow chart of the fuzzy matching method of attribute clustering according to an embodiment of the present invention. When dealing with highly symmetrical device matching problems, when the netlist structure and subtypes can no longer provide matching information, we need to use attribute values ​​to achieve matching.

[0044] like Figure 3 As shown, the fuzzy matching method of attribute clustering includes the following steps:

[0045] Step 31: The step of collecting device attribute values.

[0046] Specifically, the property check (Check_Property) command declared in the LVS rule (Rule) for the device to be checked is started, the property check of the device of this type is performed according to the set rules, and the property value and property tag of the device to be checked are collected.

[0047] In this embodiment, the above implementation process is: combined with the netlist in Table 1 and the attribute clustering rule in Table 2. The attribute clustering rule defines checking the width W and length L attributes of the matched MN (n18) and MN type devices, with a relative error of 1%; checking the width W and length L attributes of the matched MN (n1) type devices, with a relative error of 0%. The Check_Property rule related to the MN (n18) type is required by the current IC circuit structure. Table 1 and Table 2 are as follows:

[0048] Table 1: Two highly symmetrical netlists extracted from the layout and schematic.

[0049]

[0050] Table 2: Attribute clustering rules.

[0051] check_property(MN(n18)WW 1)

[0052] check_property(MN(n18)LL 1)

[0053] check_property(MN WW 1)

[0054] check_property(MN LL 1)

[0055] check_property(MN(n1)WW 0)

[0056] check_property(MN(n1)LL 0)

[0057] Collect the W and L attributes of MN(n18) from the Layout netlist and the W and L attributes of MN(n18) in the schematic, record the status of each attribute and whether it is a string, and process abnormal values ​​to record whether they are missing or invalid values.

[0058] Step 32: Sort and remove duplicates of the attribute values ​​of each dimension of the layout and schematic respectively, and assign an ID to the Layout attribute value of each dimension. The ID is used to assign a cluster mapping identifier for the entire Layout and Schematic.

[0059] In this embodiment, the specific process is: sort the layout attribute array and the schematic attribute array respectively, sort the numerical type from small to large, and sort the string type in lexicographic order, and after the sorting is completed, remove the duplicate attribute nodes with the same attribute value, and the subscript is the attribute ID of the attribute node. Figure 4 The following table shows the sorted Layout and Schematic attribute nodes, whose attribute IDs are consistent with the array subscripts.

[0060] Step 33: Based on the tolerance range, take each Schematic attribute value node as the center, calculate the upper and lower bounds of the range, and find the attribute range of the Layout that meets the upper and lower bounds of the range. Each Schematic attribute saves the clustering range of the corresponding Layout list. If the current Schematic and Layout attribute values ​​are equal, assign the Schematic an identifier corresponding to the Layout, and mark the Layout attribute as matched.

[0061] In this embodiment, the specific process is as follows: taking the Schematic attribute value node as the center, the cluster range of the Layout attribute value node is divided. There are two cases for finding the cluster range. If the attribute nodes are all strings, it is only necessary to find which attribute nodes in the Layout attribute node are equal to the Schematic attribute node, and record the lower and upper bounds of the range. If the current attribute value node is a numeric type, it is necessary to calculate the upper and lower tolerance limits of the Schematic in combination with the tolerance range, and find the range that matches the lower and upper limits of the Schematic attribute value in the Layout attribute array.

[0062] If the Layout attributes and Schematic attributes completely match, mark these matching attribute values ​​as matched. Figure 4 As shown, the vertical axis is the schematic attribute array, and the black horizontal line on the right side of each attribute node corresponds to the Layout attribute range matched by the current attribute upper and lower limits.

[0063] Step 34: Collect the clustering ranges of the Schematic instances, remove the overlapping areas, perform fine-grained segmentation, assign IDs to the Schematic attribute nodes that have not yet been assigned cluster identifiers, and reallocate IDs to the unmatched Layout attributes.

[0064] In this embodiment, the specific process is as follows: the cluster range is fine-grained, and the attribute value mapping IDs of Layout and Schematic are assigned. For the Schematic attribute nodes that are not assigned attribute IDs, an unmatched Layout attribute value is searched for in the cluster range for ID mapping. A range terminal node is created for each cluster range of the Schematic attribute value, added to the range terminal list, and the range terminal list is sorted. Two adjacent range terminal nodes are a fine-grained range.

[0065] like Figure 4 The dashed lines shown cut the cluster range into 6 fine-grained matching intervals. The ID values ​​of the Layout attribute nodes are reallocated according to the range terminal list. For each range, the Layout attribute value list is traversed, and the layout attribute values ​​within the range are marked as matched and assigned corresponding IDs.

[0066] The IDs of the final Layout and Schematic attribute nodes are shown in Table 3. Attribute nodes with the same ID satisfy any matching of attribute values.

[0067] Table 3:

[0070] Step 35: Repeat steps 31 to 34 until all device attributes have completed the calculation of cluster IDs. Here, the device attribute ID to be checked participates in the hash calculation of the device feature to provide a better match within the attribute tolerance.

[0071] In this embodiment, the specific implementation process is: if the type in this embodiment includes multiple attributes such as AS, AD or user-defined attributes, repeat steps 31 to 35 until each attribute of the device attribute to be checked completes the calculation of the mapping ID, thereby realizing cluster mapping of multiple attributes.

[0072] Here, the multi-attribute cluster mapping has the same meaning as the attribute value mapping between devices. The multi-attribute means that if the device of this type has several attributes such as W, L, AS, AD, etc., it is necessary to calculate the mapping ID for each attribute.

[0073] Through the process of steps 31 to 35, random matching caused by only passing tolerance check can be avoided. The attribute mapping identifier can maximize the matching between attribute nodes and reduce attribute matching errors caused by random matching within the attribute tolerance in the LVS report.

[0074] Based on the same inventive concept, the present application also provides a device for executing the above steps 31 to 34 or steps 31 to 35 to implement the fuzzy matching method of attribute clustering.

[0075] Figure 5 It is a functional schematic diagram of a fuzzy matching device for attribute clustering according to an embodiment of the present invention.

[0076] like Figure 5 As shown, the device mainly includes: an IC device attribute inspection and collection module, an attribute value sorting and deduplication module, an attribute value calculation and matching module, and a schematic diagram cluster range collection and attribute node allocation module. Preferably, it also includes a device attribute cluster calculation and inspection module. Among them:

[0077] The IC device property checking and collection module is configured to execute the property checking (Check_Property) command declared in the LVS rule (Rule) for the device to be checked, perform property checking on the device of this type according to the set rules, and collect the property value and property tag of the device to be checked.

[0078] The attribute value sorting and deduplication module is configured to sort and deduplication the attribute values ​​of each dimension of the layout and the schematic respectively, and assign an ID to the Layout attribute value of each dimension. The ID is used to assign a cluster mapping identifier for the entire Layout and Schematic.

[0079] The attribute value calculation and matching module is configured to calculate the upper and lower bounds of the range based on the tolerance range and take each Schematic attribute value node as the center, and find the attribute range of the Layout that meets the upper and lower bounds of the range. Each Schematic attribute saves the clustering range of the corresponding Layout list. If the current Schematic and Layout attribute values ​​are equal, the Schematic is assigned an identifier corresponding to the Layout, and the Layout attribute is marked as matched.

[0080] The cluster range collection and attribute node allocation module is configured to collect the cluster range of the Schematic instance, remove the overlapping area, perform fine-grained segmentation, allocate IDs to the Schematic attribute nodes that have not been allocated cluster identifiers, and reallocate IDs to the unmatched Layout attributes.

[0081] The attribute clustering calculation and inspection module is configured to execute corresponding commands, and repeatedly start the IC device attribute inspection and collection module, the attribute value sorting and deduplication module, the attribute value calculation and matching module, and the schematic diagram clustering range collection and attribute node allocation module in sequence until the mapping ID calculation is completed for each attribute of the device attribute to be inspected, thereby realizing cluster mapping of multiple attributes.

[0082] According to an embodiment of the present invention, at least one of the IC device attribute inspection and collection module, attribute value sorting and deduplication module, attribute value calculation and matching module, schematic diagram cluster range collection and attribute node allocation module, and attribute cluster calculation and inspection module can be partially or completely implemented as a hardware circuit, such as a field programmable gate array (FPGA), a programmable logic array (PLA), a system on a chip, a system on a substrate, a system on a package, an application-specific integrated circuit (ASIC), or can be implemented in hardware or firmware such as other reasonable implementation methods for integrating or packaging circuits, or in an appropriate combination of two or more implementation methods of software, hardware and firmware. Alternatively, at least one of the IC device attribute inspection and collection module, attribute value sorting and deduplication module, attribute value calculation and matching module, schematic diagram cluster range collection and attribute node allocation module, and attribute cluster calculation and inspection module can be at least partially implemented as a computer program, and when the program module is run by a computer, the function of the corresponding module can be executed.

[0083] The present invention also provides a device including the fuzzy matching device for attribute clustering, wherein the fuzzy matching device for attribute clustering includes a memory and at least one processor, wherein the memory stores computer-readable instructions, and when the computer-readable instructions are executed by the processor, the processor executes the steps of the fuzzy matching method for attribute clustering described in the above-mentioned embodiments.

[0084] The present invention also provides a readable storage medium, which stores a computer program. The computer program is configured to be able to implement the above-mentioned fuzzy matching method based on attribute clustering when executed by at least one processor. The readable storage medium is a computer-readable storage medium, which can be a non-volatile computer-readable storage medium or a volatile computer-readable storage medium. Specifically: the readable storage medium can be a tangible device that can hold and store instructions used by an instruction execution device, such as an electrical storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any combination of the above. The readable storage medium more specifically includes: a computer hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM), a flash memory chip, a static random access memory (SRAM), a CD-ROM, a DVD, etc.

[0085] The fuzzy matching method, device and equipment of the attribute clustering of the present invention can realize the mapping and matching of multi-dimensional attribute values ​​in Layout and Schematic, give the best match of device attributes, reduce the possibility of attribute matching misalignment, and perform mapping matching within the clustering range under as many one-to-one best matching conditions as possible. There are many processes in the matching process that require the attribute values ​​of the device to assist in the matching of the device. For example, in fuzzy matching and hierarchical fuzzy matching, the attribute clustering relationship between Layout and Schematic can be used as a hash to provide attribute information and reduce matching errors caused by arbitrary matching of devices within the attribute tolerance.

[0086] In addition to reducing the problem of false errors in attribute matching, the above-mentioned method, device and equipment of the present invention can also reduce the overall time complexity of the algorithm by using a clustering algorithm for device mapping. Assuming that there are 10,000 devices with attributes of 100 and 102 in Layout, and 10,000 devices with attributes of 99 and 101 in Schematic, the existing exhaustive method needs to check the attribute tolerance of 20,000 Layout devices and 20,000 Schematic devices respectively, and the time complexity of the exhaustive method is O(m*n). By adopting the above-mentioned fuzzy matching algorithm based on attribute clustering of the present invention, the time complexity can be reduced to O(m*logm+n*logn). Among them, m and n are the number of devices participating in fuzzy matching in Layout and Schematic, respectively.

[0087] The above description is only a preferred embodiment of the present invention and is not intended to limit the protection scope of the present invention.

Claims

1. A fuzzy matching method based on attribute clustering, characterized in that: The steps include: A. a step of collecting device attribute values, starting the attribute check command declared in the LVS rule for the device to be checked, performing attribute check on the device of the type according to the set rule, and collecting the attribute value and attribute tag of the device to be checked; B. Sort and remove duplicate attribute values ​​of each dimension of the layout and schematic respectively, and assign an ID to the Layout attribute value of each dimension; C. Based on the tolerance range, take each Schematic attribute value node as the center, calculate the upper and lower bounds of the range, and find the attribute range of the Layout that meets the upper and lower bounds of the range. Each Schematic attribute saves the clustering range of the corresponding Layout list; D. Collect the clustering ranges of the Schematic instances, remove the overlapping areas, perform fine-grained segmentation, assign IDs to the Schematic attribute nodes that have not yet been assigned a cluster identifier, and reallocate IDs to the unmatched Layout attributes.

2. The fuzzy matching method based on attribute clustering according to claim 1 is characterized in that: Furthermore, after step D, the following steps are further included: E. Repeat steps A to D until the cluster ID calculation is completed for all attributes of the device to be inspected.

3. The fuzzy matching method based on attribute clustering according to claim 1 or 2, characterized in that: The device attribute ID to be checked participates in the hash calculation of the device signature to provide a better match within the attribute tolerance range.

4. The fuzzy matching method based on attribute clustering according to claim 1 is characterized in that: Furthermore, the attribute check according to the set rules in step A includes: The check is performed in combination with the netlist extracted from the layout and the schematic respectively, and the attribute clustering rule Rule, wherein the attribute clustering rule defines the type and attribute of the matched device to be checked, and sets the relative error.

5. The fuzzy matching method based on attribute clustering according to claim 1 is characterized in that: In step B, an ID is assigned to the Layout attribute value of each dimension, and the ID is used to assign a cluster mapping identifier for the Layout and Schematic as a whole.

6. The fuzzy matching method based on attribute clustering according to claim 1 is characterized in that: Step C also includes: If the current Schematic and Layout attribute values ​​are equal, an identifier corresponding to Layout is assigned to the Schematic, and the Layout attribute is marked as matched.

7. The fuzzy matching method based on attribute clustering according to claim 1 is characterized in that: Step D also includes: Create a range terminal node for each cluster range of the Schematic attribute value, add it to the range terminal list, sort the range terminal list, and two adjacent range terminal nodes form a fine-grained range.

8. A fuzzy matching device based on attribute clustering, characterized in that: The device includes: The IC device attribute checking and collection module is configured to execute the attribute checking Check_Property command declared in the LVS rule Rule for the device to be checked, perform attribute checking on the device of the type according to the set rule, and collect attribute values ​​and attribute tags of the device to be checked; The attribute value sorting and deduplication module is configured to sort and deduplication the attribute values ​​of each dimension of the layout and the schematic respectively, and assign an ID to the Layout attribute value of each dimension; The attribute value calculation and matching module is configured to calculate the upper and lower bounds of the range based on the tolerance range, with each Schematic attribute value node as the center, and find the attribute range of the Layout that meets the upper and lower bounds of the range. Each Schematic attribute saves the clustering range of the corresponding Layout list; The cluster range collection and attribute node assignment module is configured to collect the cluster ranges of the Schematic instances, remove the overlapping areas, perform fine-grained segmentation, assign IDs to the Schematic attribute nodes that have not yet been assigned a cluster identifier, and reallocate IDs to the unmatched Layout attributes.

9. The fuzzy matching device based on attribute clustering according to claim 8, characterized in that: Also includes: The attribute clustering calculation and inspection module is configured to execute fuzzy matching commands based on attribute clustering, and repeatedly start the IC device attribute inspection and collection module, the attribute value sorting and deduplication module, the attribute value calculation and matching module, and the schematic diagram clustering range collection and attribute node allocation module in sequence until the mapping ID calculation is completed for each attribute of the device attribute to be checked.

10. A readable storage medium storing a computer program, characterized in that: The computer program is configured to implement the fuzzy matching method based on attribute clustering according to any one of claims 1 to 7 when executed by at least one processor.

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