PCB defect detection method based on improved YOLOv9

Abstract

The invention discloses a PCB defect detection method based on improved YOLOv9, and the method comprises the steps: collecting a plurality of defective PCB images, making a defect label for each image, and forming a PCB defect data set; an improved YOLOv9 defect detection model is constructed; training the improved YOLOv9 defect detection model by using the PCB defect data set; and performing defect detection on the to-be-detected PCB image by using the trained improved YOLOv9 defect detection model. According to the improved YOLOv9 defect detection model provided by the invention, a novel RepNCSPELAN4AKConv module is designed, the feature extraction capability of the whole network is enhanced, the detection precision is improved, and meanwhile, the size of the model is reduced; a novel SPDADown module is designed, and the PCB defect detection precision is improved under the condition that the parameter quantity is kept stable; the detection efficiency is high, and the detection result is stable and high in precision.

Description

Technical Field

[0001] The present invention relates to the technical field of PCB defect detection, and in particular to a PCB defect detection method based on improved YOLOv9. Background Art

[0002] The deep integration of manufacturing and artificial intelligence is the most important and core area to accelerate the formation of new quality productivity. Compared with the world's advanced level, my country's manufacturing industry has obvious gaps in independent innovation capabilities, resource utilization efficiency, informationization, quality and efficiency. With the advent of the Industrial 4.0 era, intelligent manufacturing is an important way for my country's manufacturing industry to achieve transformation and upgrading and leapfrog development. Among them, the quality inspection of industrial products is the key to ensuring product quality and corporate competitiveness.

[0003] Among the quality inspection tasks of industrial products, the printed circuit board (PCB) defect inspection task often adopts the traditional quality inspection method, that is, the manual visual quality inspection method to detect PCB defects. This method has problems such as high labor intensity, easy to cause visual fatigue, low efficiency, unstable detection results, etc. At the same time, it also has problems such as low defect detection accuracy due to the small size of the defect target, and it is difficult to meet the high efficiency and high precision requirements of modern production.

[0004] In summary, a new detection method needs to be proposed for PCB defect detection tasks to overcome the problems of manual visual quality inspection methods, such as high labor intensity, easy visual fatigue, low efficiency, unstable detection results, and low defect detection accuracy. Summary of the invention

[0005] The technical problem to be solved by the present invention is to provide a PCB defect detection method based on an improved YOLOv9 in view of the deficiencies of the above-mentioned prior art. The PCB defect detection method based on the improved YOLOv9 proposes an improved YOLOv9 PCB defect detection model, designs a new RepNCSPELAN4AKConv network structure module, enhances the feature extraction capability of the overall network, improves the detection accuracy and reduces the model size; designs a new SPD_ADown downsampling structure module, improves the accuracy of PCB defect detection while keeping the parameter quantity stable; compared with the artificial visual quality inspection method, the overall method has high detection efficiency, stable detection results and high accuracy.

[0006] In order to achieve the above technical objectives, the technical solution adopted by the present invention is:

[0007] A PCB defect detection method based on improved YOLOv9, comprising:

[0008] Step 1: Collect multiple defective PCB images and label each image with defects to form a PCB defect dataset;

[0009] Step 2, construct an improved YOLOv9 defect detection model, the improved YOLOv9 defect detection model includes a backbone network, a neck network and a head network, the backbone network includes a CBS module, a RepNCSPELAN4AKConv module, an AConv module and an SPPELAN module, and the neck network includes an Upsample layer, a Concat layer, a RepNCSPELAN4AKConv module, an SPD_ADown module, a RepNCSPLLAN4 module and an SPPELAN module;

[0010] Step 3: Use the PCB defect dataset in step 1 to train the improved YOLOv9 defect detection model;

[0011] Step 4: Use the trained improved YOLOv9 defect detection model to perform defect detection on the PCB board image to be tested.

[0012] As a further improved technical solution of the present invention, in the backbone network, there are multiple CBS modules, which are respectively recorded as the first CBS module and the second CBS module; there are multiple RepNCSPELAN4AKConv modules, which are respectively recorded as the first RepNCSPELAN4AKConv module, the second RepNCSPELAN4AKConv module, the third RepNCSPELAN4AKConv module and the fourth RepNCSPELAN4AKConv module; there are multiple AConv modules, which are respectively recorded as the first AConv module, the second AConv module and the third AConv module; there is one SPPELAN module, which is recorded as the first SPPELAN module;

[0013] The backbone network is composed of a first CBS module, a second CBS module, a first RepNCSPELAN4AKConv module, a first AConv module, a second RepNCSPELAN4AKConv module, a second AConv module, a third RepNCSPELAN4AKConv module, a third AConv module, a fourth RepNCSPELAN4AKConv module and a first SPPELAN module in sequence.

[0014] As a further improved technical solution of the present invention, in the neck network, there are multiple Upsample layers, which are respectively recorded as the first Upsample layer, the second Upsample layer, the third Upsample layer and the fourth Upsample layer; there are multiple Concat layers, which are respectively recorded as the first Concat layer, the second Concat layer, the third Concat layer, the fourth Concat layer, the fifth Concat layer and the sixth Concat layer; there are multiple RepNCSPELAN4AKConv modules, which are respectively recorded as the fifth RepNCSPELAN4AKConv module and the sixth RepNCSPELAN4AKConv module, there are multiple SPD_ADown modules, which are respectively recorded as the first SPD_ADown module and the second SPD_ADown module; there are multiple RepNCSPLLAN4 modules, which are respectively recorded as the first RepNCSPLLAN4 module, the second RepNCSPLLAN4 module, the third RepNCSPLLAN4 module and the fourth RepNCSPLLAN4 module; there is one SPPELAN module, which is recorded as the second SPPELAN module;

[0015] The neck network is sequentially composed of a first Upsample layer, a first Concat layer, a fifth RepNCSPELAN4AKConv module, a second Upsample layer, a second Concat layer, a sixth RepNCSPELAN4AKConv module, a first SPD_ADown module, a third Concat layer, a first RepNCSPLLAN4 module, a second SPD_ADown module, a fourth Concat layer, a second RepNCSPLLAN4 module, a second SPPELAN module, a third Upsample layer, a fifth Concat layer, a third RepNCSPLLAN4 module, a fourth Upsample layer, a sixth Concat layer and a fourth RepNCSPLLAN4 module;

[0016] Among them, the first Concat layer is used to fuse the feature map output by the third RepNCSPELAN4AKConv module with the feature map output by the first Upsample layer, the second Concat layer is used to fuse the feature map output by the second RepNCSPELAN4AKConv module with the feature map output by the second Upsample layer, the third Concat layer is used to fuse the feature map output by the fifth RepNCSPELAN4AKConv module with the feature map output by the first SPD_ADown module, the fourth Concat layer is used to fuse the feature map output by the fourth RepNCSPELAN4AKConv module with the feature map output by the second SPD_ADown module, and the second SPPELAN module is used to fuse the feature map output by the fourth RepNCSPELAN4AKConv module with the feature map output by the second RepNCSPLLAN4 module.

[0017] As a further improved technical solution of the present invention, the RepNCSPELAN4AKConv module includes a third CBS module, a first channel halved convolution layer, a second channel halved convolution layer, a first RepNCSP_AKConv convolution layer, a second RepNCSP_AKConv convolution layer, a seventh Concat layer and a fourth CBS module; the feature map output by the third CBS module is respectively input to the first channel halved convolution layer and the second channel halved convolution layer, the feature map output by the second channel halved convolution layer is input to the first RepNCSP_AKConv convolution layer, the feature map output by the first RepNCSP_AKConv convolution layer is input to the second RepNCSP_AKConv convolution layer, the feature map output by the first channel halved convolution layer, the feature map output by the first RepNCSP_AKConv convolution layer and the feature map output by the second RepNCSP_AKConv convolution layer are jointly input to the seventh Concat layer to realize feature fusion, and the feature map output by the seventh Concat layer is input to the fourth CBS module.

[0018] As a further improved technical solution of the present invention, the SPD_ADown module includes a first maximum pooling layer, an SPDConv layer, a second maximum pooling layer, a fifth CBS module and an eighth Concat layer; the feature map output by the first maximum pooling layer is respectively input to the SPDConv layer and the second maximum pooling layer, the feature map output by the second maximum pooling layer is input to the fifth CBS module, and the feature map output by the SPDConv layer and the feature map output by the fifth CBS module are jointly input to the eighth Concat layer to realize feature fusion.

[0019] The beneficial effects of the present invention are:

[0020] (1) This paper proposes an improved YOLOv9 PCB defect detection model, introduces Alterable Kernel Convolution (AKConv) and designs a new RepNCSPELAN4AKConv network structure module, which provides convolution kernels of arbitrary sampling shapes and sizes for various targets, balances network overhead and ensures efficient feature extraction of the network model. The feature extraction capability of the overall network is enhanced, the detection accuracy is improved and the model size is reduced.

[0021] (2) The present invention also introduces space-to-depth convolution (SPD-Conv) and designs a new SPD_ADown downsampling structure module, eliminating the step size and pooling operations, while maintaining the same parameter size, improving the accuracy of small target detection. The accuracy of PCB defect detection is improved while keeping the parameter quantity stable.

[0022] (3) Compared with the artificial visual quality inspection method, the present invention has high detection efficiency, stable detection results and high precision, and is suitable for defect detection with small defect target size. It overcomes the problems of artificial visual quality inspection method such as high labor intensity, easy visual fatigue, low efficiency, unstable detection results, low defect detection precision, etc., and meets the high efficiency and high precision requirements of modern production. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 This is a schematic diagram of the structure of the improved YOLOv9 defect detection model of the present invention.

[0024] Figure 2 This is a schematic diagram of the structure of the RepNCSPELAN4AKConv network structure module of the present invention.

[0025] Figure 3 It is a schematic diagram of the structure of the SPD_ADown downsampling structure module of the present invention.

[0026] Figure 4 It is a schematic diagram of the CBS module structure of the present invention.

[0027] Figure 5 It is a schematic diagram of the structure of the SPPELAN module of the present invention.

[0028] Figure 6 The flowchart of the improved YOLOv9 defect detection model trained by the present invention. DETAILED DESCRIPTION

[0029] The specific embodiments of the present invention are further described below according to the accompanying drawings:

[0030] In order to further enhance the feature extraction capability of the YOLOv9 overall network and solve the problem of false detection and missed detection caused by low-resolution blur of small targets for PCB defect detection, this embodiment proposes an improved YOLOv9 PCB defect detection model, enhances the feature capability from the backbone network, and then uses a multi-scale approach to improve the neck network, enhance the model's multi-scale feature fusion capability, and thus improve the accuracy of industrial PCB defect detection.

[0031] Specifically, this embodiment provides a PCB defect detection method based on improved YOLOv9, including:

[0032] Step 1: Collect multiple defective PCB board images and label each image with defects to form a PCB defect dataset.

[0033] The quality of the training data set greatly affects the training effect of the deep learning model. In order to improve the generalization ability of the model, reduce the risk of overfitting, improve the robustness of the model, provide more feature information for the model, and enrich the feature space of the model, this data uses the PCB defect data set published by the Peking University Intelligent Robot Open Laboratory. At the same time, some real PCB defect scan images are used to select five common PCB defects: rat bite, open circuit, short circuit, stray, and miscellaneous copper, containing a total of 626 images.

[0034] Step 2: Build an improved YOLOv9 defect detection model. The improved YOLOv9 defect detection model includes a backbone network, a neck network, and a head network.

[0035] like Figure 1 As shown, the backbone network includes multiple CBS modules, multiple RepNCSPELAN4AKConv modules, multiple AConv modules and SPPELAN modules. For the convenience of distinction and description, multiple CBS modules are respectively recorded as the first CBS module and the second CBS module; multiple RepNCSPELAN4AKConv modules are respectively recorded as the first RepNCSPELAN4AKConv module, the second RepNCSPELAN4AKConv module, the third RepNCSPELAN4AKConv module and the fourth RepNCSPELAN4AKConv module; multiple AConv modules are respectively recorded as the first AConv module, the second AConv module and the third AConv module; there is one SPPELAN module, which is recorded as the first SPPELAN module.

[0036] Specifically, the backbone network consists of Figure 1The modules in the layers numbered 0-9 are composed of the first CBS module, the second CBS module, the first RepNCSPELAN4AKConv module, the first AConv module, the second RepNCSPELAN4AKConv module, the second AConv module, the third RepNCSPELAN4AKConv module, the third AConv module, the fourth RepNCSPELAN4AKConv module and the first SPPELAN module.

[0037] like Figure 1 As shown, the neck network includes multiple Upsample layers, multiple Concat layers, multiple RepNCSPELAN4AKConv modules, multiple SPD_ADown modules, multiple RepNCSPLLAN4 modules and SPPELAN modules; wherein, for the convenience of distinction and description, multiple Upsample layers are respectively recorded as the first Upsample layer, the second Upsample layer, the third Upsample layer and the fourth Upsample layer; multiple Concat layers are respectively recorded as the first Concat layer, the second Concat layer, the third Concat layer, the fourth Concat layer , the fifth Concat layer and the sixth Concat layer; multiple RepNCSPELAN4AKConv modules, respectively recorded as the fifth RepNCSPELAN4AKConv module and the sixth RepNCSPELAN4AKConv module, multiple SPD_ADown modules, respectively recorded as the first SPD_ADown module and the second SPD_ADown module; multiple RepNCSPLLAN4 modules, respectively recorded as the first RepNCSPLLAN4 module, the second RepNCSPLLAN4 module, the third RepNCSPLLAN4 module and the fourth RepNCSPLLAN4 module;

[0038] There is one SPPELAN module, recorded as the second SPPELAN module.

[0039] Specifically, the neck network consists of Figure 1The modules in the layers numbered 10-28 are composed of the first Upsample layer, the first Concat layer, the fifth RepNCSPELAN4AKConv module, the second Upsample layer, the second Concat layer, the sixth RepNCSPELAN4AKConv module, the first SPD_ADown module, the third Concat layer, the first RepNCSPLLAN4 module, the second SPD_ADown module, the fourth Concat layer, the second RepNCSPLLAN4 module, the second SPPELAN module, the third Upsample layer, the fifth Concat layer, the third RepNCSPLLAN4 module, the fourth Upsample layer, the sixth Concat layer and the fourth RepNCSPLLAN4 module.

[0040] Among them, the first Concat layer is used to fuse the feature map output by the third RepNCSPELAN4AKConv module with the feature map output by the first Upsample layer, the second Concat layer is used to fuse the feature map output by the second RepNCSPELAN4AKConv module with the feature map output by the second Upsample layer, the third Concat layer is used to fuse the feature map output by the fifth RepNCSPELAN4AKConv module with the feature map output by the first SPD_ADown module, the fourth Concat layer is used to fuse the feature map output by the fourth RepNCSPELAN4AKConv module with the feature map output by the second SPD_ADown module, and the second SPPELAN module is used to fuse the feature map output by the fourth RepNCSPELAN4AKConv module with the feature map output by the second RepNCSPLLAN4 module.

[0041] like Figure 2 As shown, the RepNCSPELAN4AKConv module includes two CBS modules, two convolutional layers for channel halving, two RepNCSP_AKConv convolutional layers, and a Concat layer. For the convenience of distinction and description, the RepNCSPELAN4AKConv module specifically includes the third CBS module, the first channel halving convolutional layer, the second channel halving convolutional layer, the first RepNCSP_AKConv convolutional layer, the second RepNCSP_AKConv convolutional layer, the seventh Concat layer, and the fourth CBS module; Figure 2The chanel channel of the feature map output by the third CBS module in the middle left box is C. The feature maps output by the third CBS module are respectively input into the first channel halved convolution layer and the second channel halved convolution layer. The chanel channel of the feature map output by the first channel halved convolution layer is C / 2, and the chanel channel of the feature map output by the second channel halved convolution layer is C / 2. The feature map output by the second channel halved convolution layer is input into the first RepNCSP_AKConv convolution layer, and the feature map output by the first RepNCSP_AKConv convolution layer is input into the second RepNCSP_AKConv convolution layer. The feature map output by the first channel halved convolution layer, the feature map output by the first RepNCSP_AKConv convolution layer, and the feature map output by the second RepNCSP_AKConv convolution layer are jointly input into the seventh Concat layer to realize feature fusion, and the feature map output by the seventh Concat layer is input into the fourth CBS module.

[0042] The RepNCSPELAN4AKConv module is constructed by RepNCSPELAN4+AKConv, introducing AKconv into RepNCSP of the RepNCSPELAN4 module, and then replacing the RepNCSPELAN4 modules in the original YOLOv9 model to enhance the feature extraction capability of the overall network, balancing the amount of computation while ensuring efficient feature extraction of the network model.

[0043] The processing process of the RepNCSPELAN4AKConv module is as follows: first, the original number of channels is maintained and the CBS operation is performed through the third CBS module. Then, the number of channels is halved through the first channel halving convolution layer and the second channel halving convolution layer, respectively, and divided into two feature maps to be passed to the next layer, where the feature map X2 will enter the first RepNCSP_AKConv convolution layer, and then the input is passed to the second RepNCSP_AKConv convolution layer and the seventh Concat layer respectively. Finally, the feature map X1 output by the first channel halving convolution layer, the feature map X2 entering the first RepNCSP_AKConv convolution layer, and the feature map X3 entering the twice RepNCSP_AKConv convolution layer are feature fused in the Concat layer, and finally enter the CBS for normalization and enhanced data nonlinearity.

[0044] like Figure 3As shown, the SPD_ADown module has two maximum pooling layers Maxpool2d (K5 indicates that kernel_size is 5), a CBS module, a SPDConv layer and a Concat layer. For the convenience of distinction and description, the SPD_ADown module specifically includes a first maximum pooling layer Maxpool2d, an SPDConv layer, a second maximum pooling layer Maxpool2d, a fifth CBS module and an eighth Concat layer; the feature map output by the first maximum pooling layer Maxpool2d is respectively input to the SPDConv layer and the second maximum pooling layer Maxpool2d, the feature map output by the second maximum pooling layer Maxpool2d is input to the fifth CBS module, and the feature map output by the SPDConv layer and the feature map output by the fifth CBS module are jointly input to the eighth Concat layer to realize feature fusion.

[0045] The processing process of the SPD_Adown module is as follows: after the feature map is passed into the first maximum pooling layer with kernel_size of 5, the features are passed into the SPDConv layer and the second maximum pooling layer with kernel_size of 5 respectively. After passing through the second maximum pooling layer, the features enter the fifth CBS module. Finally, the feature map output by the fifth CBS module and the feature map output by the SPDConv layer are fused in the eighth Concat layer.

[0046] like Figure 4 As shown, the above CBS modules (such as the first CBS module to the fifth CBS module) all include a 2d convolution layer Conv2d, a BatchNorm layer and a SiLu activation function. The processing process is: after performing a 2d convolution operation on the input feature map, it is passed to the next BatchNorm layer for normalization and then the SiLu activation function is used to enhance nonlinearity.

[0047] like Figure 5 As shown, the above-mentioned SPPELAN modules (such as the first SPPELAN module to the second SPPELAN module) all include a transition module, two CBS modules, three maximum pooling layers Maxpool2d, and a Concat layer. The processing process is: the input passes through the transition module for data conversion and processing, and is respectively passed into a CBS module with a kernel of 1, a stride of 1, and no padding and three maximum pooling layers Maxpool2d with a kernel of 5, and then the output multiple feature maps are input into Concat for integration and then passed into a CBS module with a kernel of 1, a stride of 1, and no padding for normalization and enhancement of data nonlinearity.

[0048] Step 3: Use the PCB defect dataset in step 1 to train the improved YOLOv9 defect detection model.

[0049] First, (1) the defective PCB board image is input into the CBS of the backbone network to preliminarily extract the local information of the input feature map. (2) The second CBS processing further extracts features, enhances the nonlinear expression ability of the network, and makes the feature expression richer. (3) The model will pass the features extracted in (2) into multiple RepNCSPELAN4AKConv and AConv modules, perform convolution processing on the feature map, update the weights, and pass the features extracted from the RepNCSPELAN4AKConv module into the Concat module in the neck network for feature fusion. (4) In the SPPELAN module, the spatial dimension is compressed, aggregated into higher-level feature information, and enters the neck network. (5) The Upsample module receives the feature map passed in by the SPPELAN module, upsamples the feature map, restores the spatial resolution, and passes it to the Concat layer. (6) The Concat layer fuses the feature information obtained in (3) and (5), and then passes the fused information into the RepNCSPELAN4AKConv module for multi-scale feature extraction and fusion. (7) Repeat the upsampling and feature fusion operations. When the feature map of the fifteenth layer RepNCSPELAN4AKConv module has the resolution and semantic information suitable for small target detection, the layers are transferred to the head network and SPD_Adown respectively. In the SPD_Adown module, the feature map is converted and downsampled. The new feature map is then passed to the Concat layer to be fused with the features obtained by the twelfth layer RepNCSPELAN4AKConv module. (8) Repeat the feature enhancement, downsampling and feature fusion operations multiple times, and when the feature map has the resolution and semantic information suitable for small target detection, the feature enhancement is performed and then passed to the head network. (9) Output the bounding box and classification result of the target.

[0050] Step 4: Use the trained improved YOLOv9 defect detection model to perform defect detection on the PCB board image to be tested. The detection process is as follows: Figure 6 shown.

[0051] The RepNCSPELAN4AKConv network structure module also has the following advantages during the training process. First, the RepNCSPELAN4AKConv module adopts a multi-path structure, which enables the model to learn features at different levels and scales, which helps the model to learn more comprehensive features and improves the convergence speed and accuracy during training. Second, due to the parallel structure of the branch structure AKConv and the standard convolution and the combination of the Concat operation, the model can receive more gradient information during back propagation, which helps the gradient propagate more smoothly, avoids the problem of gradient disappearance or gradient explosion, and improves training stability.

[0052] The RepNCSPELAN4AKConv network structure module has the following advantages during the reasoning process. First, its branch structure AKconv can extract more discernible features during the forward propagation process, which helps to improve the detection effect of the network, especially the detection of small targets and complex features. Second, the combination of its branch structure RepNCSP_AKconv and Concat operation can achieve the aggregation and enhancement of multi-scale features without increasing the computational complexity, and capture richer spatial and semantic information while maintaining efficient calculation. Third, because AKConv allows the convolution kernel to flexibly adjust the sampling grid according to the features, it can better capture the edge detail information of small targets. During the reasoning process, such a flexible feature extraction mechanism makes up for the shortcomings of traditional convolution kernels on small targets.

[0053] The SPD_Adown module is constructed by SPD+Adown. The SPD component generalizes the original image change technique to the downsampled feature maps inside and across CNNs. Considering any intermediate feature map X of size S×S×C1, the sequence of sub-feature maps cut out is:

[0054]

[0055] In general, for any (original) feature map X, the sub-map f x,y It consists of all X(i,j) where i+x and j+y are divisible by scale. Therefore, each subgraph downsamples X by scale. When scale=2, we finally get four subgraphs f 0,0 ,f 1,0 ,f 0,1 ,f 1,1 , each subgraph has the shape And downsample X by a factor of 2. Next, these sub-feature maps are concatenated along the channel dimension to obtain a feature map X', whose spatial dimension is reduced by scale times and whose channel dimension is increased by scale 2In this way, SPD converts the feature map X(S,S,C1) into an intermediate feature map

[0056] A new SPD_ADown downsampling structure module, referred to as SPD_ADow module, is designed in YOLOv9 (which is constructed by SPD+ADown). SPD is introduced into the ADown module, and then the newly proposed SPD_ADown modules replace the ADown modules in the original YOLOv9 model respectively to enhance the model's attention to target features during the downsampling convolution process and solve the problems of false detection and missed detection caused by low-resolution blur of small targets.

[0057] The SPD_Adown module has the following functions during the training process. First, the difference between its branch structure SPDConv and traditional convolution is that it does not sample feature points in a jumpy manner and does not cause information loss. This allows SPD_ADown to avoid the loss of important information while completing downsampling during the training process of the model, making it more suitable for small target detection tasks. Second, the advantage of SPD_ADown without information loss enables the important information of the feature map to be smoothly transmitted to the subsequent network layers, which is conducive to smooth gradient flow during training, avoiding the problem of gradient disappearance, and accelerating training convergence and improving the training stability of the network. Third, SPD_ADown can reduce the spatial dimension and network calculation degree while ensuring feature quality, thereby optimizing training efficiency and shortening training time.

[0058] The SPD_Adown module has the following functions in the reasoning process. First, its branch module SPDConv realizes downsampling without information loss by converting the spatial dimension of the feature map into the channel dimension, which allows the model to retain more effective feature information and is more suitable for the detection of small targets. At the same time, it also avoids the information loss and asymmetric sampling problems caused by traditional downsampling methods. Second, in the reasoning stage, SPD_ADown is a fixed forward operation that does not include the update of learning parameters. Compared with traditional downsampling, SPD_ADown ensures low computational overhead and high efficiency.

[0059] In the method of this embodiment, the overall model architecture after the improvement of YOLOv9 is as follows: Figure 1 As shown in the figure. The improved YOLOv9-PCB defect detection model introduces the newly proposed RepNCSPELAN4AKConv module to enhance the feature capability from the backbone network, balancing the amount of calculation while ensuring efficient feature extraction of the network model. Then, the multi-scale idea is used to improve the neck network and the newly proposed SPD_ADown module to enhance the model's multi-scale feature fusion capability, so as to improve the accuracy of industrial PCB defect detection.

[0060] This paper uses precision (Precision, P), recall (Recall, R), mean average precision (meanAverage Precision, mAP), parameter count (Params) and model size (Size) as indicators to evaluate the performance of the model.

[0061] Precision refers to the prediction result, which refers to the probability of actually being a positive sample among all samples predicted to be positive (predicted as the target). Its calculation formula is:

[0062]

[0063] Among them, TP represents positive samples that are predicted as positive by the model, and FP represents negative samples that are misclassified as positive.

[0064] The recall rate refers to the original sample, which refers to the probability of a sample being predicted as positive among the samples that are actually positive. The calculation formula is:

[0065]

[0066] Where FN represents the positive samples that are mistakenly classified as negative.

[0067] Average Precision (AP) is the area enclosed by the curve drawn with precision P as the ordinate and recall R as the abscissa and the coordinate axis. It can comprehensively evaluate the precision and recall of the prediction results. mAP represents the average value of AP of all categories and is used to measure the accuracy of the model in each category. Its calculation formula is:

[0068]

[0069]

[0070] Where AP i represents the average precision of the i-th category, and N represents the number of all categories.

[0071] Intersection over Union (IoU) represents the ratio of the intersection area to the union area between the predicted area and the true area. The larger the value of IoU, the higher the overlap between the two bounding boxes. mAP50 represents the average precision when the IoU threshold is 0.5. When the IoU between the predicted area and the true area is greater than or equal to 0.5, the predicted bounding box is considered to have correctly detected the target object.

[0072] The parameter size indicates the number of parameters that need to be learned in the model. The larger the model parameters, the more complex and expressive the model is, but it also means higher computing and storage requirements.

[0073] Model size usually refers to the space occupied by the model file on the storage device. Model size is affected by factors such as the model architecture, data type, and optimization method.

[0074] In order to verify the effectiveness of the method proposed in this embodiment and the improvement over the original YOLOv9, an ablation experiment was designed. YOLOv9 is the original YOLOv9s model; YOLOv9-1 is the method model that introduces the RepNCSPELAN4AKConv module in the backbone network; YOLOv9-2 is the method model that introduces the SPD_Adown module in the neck network; YOLOv9-1-2 is the method model proposed in this article that introduces both the RepNCSPELAN4AKConv module and the SPD_Adown module. The experimental results are shown in Table 1. It can be seen that the introduction of the RepNCSPELAN4AKConv model significantly improves the recall rate and mAP50. This is because the RepNCSPELAN4AKConv module can complete the irregular convolution feature extraction and improve the accuracy of the network. At the same time, since the RepNCSPELAN4AKConv module can provide convolution kernels of arbitrary sampling shapes and sizes for various targets, allowing the convolution to have any number of convolution parameters, the number of parameters and model size of this method can still be reduced while the average accuracy increases. The SPD_Adown module replaces the strided convolution and pooling layers, downsampling the feature map without losing learnable information, and this improvement is more obvious when the target is small, which improves the precision, recall and mAP50 of YOLOv9 in the task of PCB defect detection. Finally, when the RepNCSPELAN4AKConv module and the SPD_Adown module are introduced at the same time, the combination of the two modules shows their complementary advantages. The final improved overall model improves the mAP50 value of the original YOLOv9 model by 3.5%, and the model size only increases by 0.2MB. While significantly improving the model's precision, recall and mAP50 indicators, the number of model parameters and model size only increase slightly. This shows that the proposed improved model has high operating efficiency while ensuring high accuracy.

[0075] Table 1. Ablation experiment results:

[0076]

[0077] In order to objectively evaluate the performance of the proposed model and verify its effectiveness for the PCB defect detection task, the method model YOLOv9-1-2 proposed in this embodiment is compared and analyzed with YOLOv10s, YOLOv9, YOLOv8s, YOLOv7 and RT-DETR. The results of the comparative experiment are shown in Table 2. YOLOv10s uses a more efficient depth-separable convolution to decompose the standard convolution into depth convolution and point-by-point convolution, which reduces its calculation amount and number of parameters; network pruning technology helps remove unnecessary neurons and connections, and the application of model quantization technology reduces the computational complexity and storage requirements, which reduces the size of its model. Although YOLOv10s adopts dual label allocation, uses large kernel convolution to enhance feature extraction capabilities, and incorporates a self-attention module to improve global representation learning, its performance in the task of PCB defect detection is not very outstanding. The backbone and neck architecture adopted by YOLOv8s improves the performance of feature extraction and target detection; the anchor-free detection method is adopted to improve the accuracy of detection, but the number of parameters and model size are relatively large. YOLOv7 introduced model reparameterization technology and dynamic label allocation method, which improved the training efficiency and accuracy of the model, making it perform well in PCB defect detection tasks, but its model file has a relatively large volume. RT-DETR introduced information enhancement and adaptive feature fusion algorithms, which can effectively process feature maps of different scales, which helps to better capture the details of small targets. However, it performs generally in PCB defect detection tasks. In contrast, the improved YOLOv9, due to the introduction of the SPD_ADown module, enhances the model's attention to target features during the downsampling convolution process, improves the model's small target detection ability, and performs well in PCB defect detection tasks. Compared with the well-performing and widely used YOLOv8 in commercial applications, mAP50 is 3.2% higher, but the number and size of model parameters can still be kept within a good range due to the introduction of the RepNCSPELAN4AKConv module.

[0078] Table 2, comparative test results:

[0079]

[0080]

[0081] PCB defect detection tasks are particularly important in product quality inspection, especially under the high efficiency and high precision requirements of modern production. PCB defect detection faces the problems of small target size and low detection accuracy. This paper proposes a PCB defect detection model based on YOLOv9, designs a new RepNCSPELAN4AKConv network structure module, completes efficient feature extraction, and improves the detection accuracy; designs a new SPD_ADown downsampling structure module, eliminates the step size and pooling operations, enhances the model's attention to target features during the downsampling convolution process, and solves the problem of false detection and missed detection caused by low-resolution blur of small targets. Based on YOLOv9, this paper proposes an improved model, which improves the detection accuracy in the task of PCB detection, but maintains the stability of the model size and parameter quantity. In the future, the detection accuracy will be further improved while reducing the size of the model, optimizing the inference speed of the model and attempting to deploy applications on edge devices.

[0082] The protection scope of the present invention includes but is not limited to the above embodiments. The protection scope of the present invention shall be based on the claims. Any replacement, deformation, and improvement of the technology that can be easily thought of by technicians in this field shall fall within the protection scope of the present invention.

Claims

1. A PCB defect detection method based on improved YOLOv9, characterized in that: include: Step 1: Collect multiple defective PCB images and label each image with defects to form a PCB defect dataset; Step 2, construct an improved YOLOv9 defect detection model, the improved YOLOv9 defect detection model includes a backbone network, a neck network and a head network, the backbone network includes a CBS module, a RepNCSPELAN4AKConv module, an AConv module and an SPPELAN module, and the neck network includes an Upsample layer, a Concat layer, a RepNCSPELAN4AKConv module, an SPD_ADown module, a RepNCSPLLAN4 module and an SPPELAN module; Step 3: Use the PCB defect dataset in step 1 to train the improved YOLOv9 defect detection model; Step 4: Use the trained improved YOLOv9 defect detection model to perform defect detection on the PCB board image to be tested.

2. The PCB defect detection method based on improved YOLOv9 according to claim 1, characterized in that: In the backbone network, there are multiple CBS modules, which are respectively recorded as the first CBS module and the second CBS module; there are multiple RepNCSPELAN4AKConv modules, which are respectively recorded as the first RepNCSPELAN4AKConv module, the second RepNCSPELAN4AKConv module, the third RepNCSPELAN4AKConv module and the fourth RepNCSPELAN4AKConv module; there are multiple AConv modules, which are respectively recorded as the first AConv module, the second AConv module and the third AConv module; there is one SPPELAN module, which is recorded as the first SPPELAN module; The backbone network is composed of a first CBS module, a second CBS module, a first RepNCSPELAN4AKConv module, a first AConv module, a second RepNCSPELAN4AKConv module, a second AConv module, a third RepNCSPELAN4AKConv module, a third AConv module, a fourth RepNCSPELAN4AKConv module and a first SPPELAN module in sequence.

3. The PCB defect detection method based on improved YOLOv9 according to claim 2, characterized in that: In the neck network, there are multiple Upsample layers, which are respectively recorded as the first Upsample layer, the second Upsample layer, the third Upsample layer and the fourth Upsample layer; there are multiple Concat layers, which are respectively recorded as the first Concat layer, the second Concat layer, the third Concat layer, the fourth Concat layer, the fifth Concat layer and the sixth Concat layer; there are multiple RepNCSPELAN4AKConv modules, which are respectively recorded as the fifth RepNCSPELAN4AKConv module and the sixth RepNCSPELAN4AKConv module, there are multiple SPD_ADown modules, which are respectively recorded as the first SPD_ADown module and the second SPD_ADown module; there are multiple RepNCSPLLAN4 modules, which are respectively recorded as the first RepNCSPLLAN4 module, the second RepNCSPLLAN4 module, the third RepNCSPLLAN4 module and the fourth RepNCSPLLAN4 module; there is one SPPELAN module, which is recorded as the second SPPELAN module; The neck network is sequentially composed of a first Upsample layer, a first Concat layer, a fifth RepNCSPELAN4AKConv module, a second Upsample layer, a second Concat layer, a sixth RepNCSPELAN4AKConv module, a first SPD_ADown module, a third Concat layer, a first RepNCSPLLAN4 module, a second SPD_ADown module, a fourth Concat layer, a second RepNCSPLLAN4 module, a second SPPELAN module, a third Upsample layer, a fifth Concat layer, a third RepNCSPLLAN4 module, a fourth Upsample layer, a sixth Concat layer and a fourth RepNCSPLLAN4 module; Among them, the first Concat layer is used to fuse the feature map output by the third RepNCSPELAN4AKConv module with the feature map output by the first Upsample layer, the second Concat layer is used to fuse the feature map output by the second RepNCSPELAN4AKConv module with the feature map output by the second Upsample layer, the third Concat layer is used to fuse the feature map output by the fifth RepNCSPELAN4AKConv module with the feature map output by the first SPD_ADown module, the fourth Concat layer is used to fuse the feature map output by the fourth RepNCSPELAN4AKConv module with the feature map output by the second SPD_ADown module, and the second SPPELAN module is used to fuse the feature map output by the fourth RepNCSPELAN4AKConv module with the feature map output by the second RepNCSPLLAN4 module.

4. The PCB defect detection method based on improved YOLOv9 according to claim 1, characterized in that: The RepNCSPELAN4AKConv module includes a third CBS module, a first channel halved convolution layer, a second channel halved convolution layer, a first RepNCSP_AKConv convolution layer, a second RepNCSP_AKConv convolution layer, a seventh Concat layer and a fourth CBS module; the feature map output by the third CBS module is respectively input to the first channel halved convolution layer and the second channel halved convolution layer, the feature map output by the second channel halved convolution layer is input to the first RepNCSP_AKConv convolution layer, the feature map output by the first RepNCSP_AKConv convolution layer is input to the second RepNCSP_AKConv convolution layer, the feature map output by the first channel halved convolution layer, the feature map output by the first RepNCSP_AKConv convolution layer and the feature map output by the second RepNCSP_AKConv convolution layer are jointly input to the seventh Concat layer to realize feature fusion, and the feature map output by the seventh Concat layer is input to the fourth CBS module.

5. The PCB defect detection method based on improved YOLOv9 according to claim 1, characterized in that: The SPD_ADown module includes a first maximum pooling layer, an SPDConv layer, a second maximum pooling layer, a fifth CBS module and an eighth Concat layer; the feature map output by the first maximum pooling layer is respectively input to the SPDConv layer and the second maximum pooling layer, the feature map output by the second maximum pooling layer is input to the fifth CBS module, and the feature map output by the SPDConv layer and the feature map output by the fifth CBS module are jointly input to the eighth Concat layer to realize feature fusion.

Images