Estimating initial state of resistive element

Abstract

The present disclosure relates to a method for estimating a state of resistance to which a cell of a memory is programmed, the method comprising: a) making a first measurement, by a measurement circuit coupled to the cell, of a first value representative of a resistance of the cell; b) making at least one second measurement of at least one second value representative of the resistance of the cell; c) comparing the first value representative of the resistance with the at least one second value by means of a comparison circuit; and d) based on the comparison, estimating the resistance state of the cell, the estimation being a high resistance state if the at least one second representative value increases relative to the first representative value, or the estimation being a low resistance state if the at least one second value decreases relative to the first representative value.

Description

Technical Field

[0001] The present description relates generally to resistive non-volatile memory and, more particularly, to estimating the resistance state to which each resistive element of the memory is initially programmed. Background Art

[0002] The volatile resistive memory includes a plurality of resistive elements, each of which is initially programmed to a high resistance state (HRS) or a low resistance state (LRS).

[0003] However, once programmed, a resistive element undergoes relaxation effects that result in fluctuations in the resistance it was originally programmed to be in. Thus, an element programmed to a high resistance state may see its resistance decrease to a low resistance state, and vice versa for an element programmed to a low resistance state.

[0004] Although the relaxation effect stabilizes after a period of time, fluctuations in resistance still occur.

[0005] There is a need to estimate the state to which a resistive element of a resistive non-volatile memory is initially programmed. Summary of the invention

[0006] One embodiment provides a method for estimating a resistance state to which a cell of a non-volatile resistive memory is programmed, the method comprising:

[0007] a) performing a first measurement of a first value representative of the resistance of the cell by a measurement circuit coupled to the memory cell and comparing the first representative value to a reference interval;

[0008] b) if the first measurement is less than a lower limit of a reference interval, the estimate of the resistance state of the cell is a low resistance state, if the first measurement is greater than an upper limit of the reference interval, the estimate of the resistance state of the cell is a high resistance state, and if at least one of the first measurements is within the reference interval, performing at least one second measurement by the measurement circuit of at least one second value representing the resistance of the same memory cell when the memory cell is in the resistance state, the resistance state to which the cell is programmed is not modified between the at least one first measurement and the at least one second measurement;

[0009] c) comparing the first value representing the resistance with at least one second value by a comparison circuit; and

[0010] d) based on the comparison, estimating the resistance state of the cell, the estimation being an estimation of a high resistance state if at least one second representative value of the resistance increases relative to the first representative value of the resistance, or the estimation being an estimation of a low resistance state if at least one second representative value decreases relative to the first representative value.

[0011] According to one embodiment, the comparison circuit is configured to compare a first representative value of the resistance with a reference value based on at least one second representative value of the resistance, which reference value is not constant and fixed for all memory cells of the resistance memory.

[0012] According to one embodiment, the comparison circuit is configured to determine only the relative relationship between the first representative value of the resistance and at least one second representative value of the resistance without performing a subtraction operation between the first representative value of the resistance and at least one second representative value of the resistance.

[0013] According to one embodiment, the method further includes:

[0014] - before performing step a), applying a current of a predefined intensity or a predetermined voltage to the resistive memory cell for a first time, the first measurement being performed based on the first application; and

[0015] - After performing step a) and before performing step b), at least one second application of a current or a predefined voltage is performed to the resistive element at at least one second time later than the first time, and at least one second measurement is performed based on the at least one second application.

[0016] According to one embodiment, the method further comprises, after the state estimation:

[0017] - Reprogramming the cell to the estimated state.

[0018] According to one embodiment, the method further comprises, after the state estimation:

[0019] - storing in association with the unit in a memory a value indicative of the estimated state.

[0020] According to one embodiment, the method further comprises, after measuring the first representative value, if the first representative value is outside the reference interval, repeating the method starting from newly implementing step a).

[0021] According to one embodiment, the method further comprises, before the comparison:

[0022] - converting the first representative value and the at least one second representative value into a first digital value and at least one second digital value by a converter;

[0023] A first digital value and at least one second digital value are stored in the memory in association with the cell.

[0024] According to one embodiment, the memory is a shift register.

[0025] According to one embodiment, the comparison is performed based on voltage values ​​stored by the first capacitor and the at least one second capacitor, the first capacitor and the at least one second capacitor being configured to store a first representative value and at least one second representative value, respectively.

[0026] According to one embodiment, if after comparison it is determined that the first representative value is lower than one of at least one second representative values, the estimated state is a high resistance state, and wherein, if after comparison it is determined that the first representative value is greater than one of at least one second representative values, the estimated state is a low resistance state.

[0027] According to one embodiment, if during the comparison it is determined that the first representative value is lower than the average value of the at least one second representative value, the estimated state is a high resistance state.

[0028] According to one embodiment, at least one second representative value includes a first second value and a second second value, the second second value being measured at a time later than the second time, and wherein, if after comparison, it is determined that the difference between the first second representative value and the second second representative value and the average value of the difference between the first second representative value and the first representative value are positive, then the estimated state is a high resistance state, and wherein if after comparison, it is determined that the difference between the first second representative value and the second second representative value and the average value of the difference between the first second representative value and the first representative value are negative, then the estimated state is a low resistance state.

[0029] According to one embodiment, the second time is at least 3 seconds away from the first time, such as at least one minute.

[0030] According to one embodiment, the first representative resistance value and the at least one second representative resistance value are voltage or current values ​​representing the resistance of the cell.

[0031] One embodiment provides a circuit including a nonvolatile resistive memory including a cell programmed to a resistance state of a plurality of states, the circuit further comprising:

[0032] - a measurement circuit configured to measure a first value representing the resistance of the cell when the cell is in a resistive state;

[0033] a comparison circuit configured to determine whether the first representative value is within a reference interval, and to estimate the resistance state of the cell to be a low resistance state if the first measurement is less than a lower limit of the reference interval, and to estimate the resistance state of the cell to be a high resistance state if the first measurement is greater than an upper limit of the reference interval, and

[0034] The measurement circuit is further configured to, if the first representative value is within the reference interval, measure at least one second value representing the resistance of the same memory cell when the cell is in a resistive state, the resistance state to which the cell is programmed not being modified between the first measurement and the at least one second measurement, and the comparison circuit is further configured to compare the first representative value with the at least one second representative value to estimate the state of the cell, the estimate being an estimate of a high resistance state if the at least one second representative value has increased relative to the first value representing the resistance, or the estimate being an estimate of a low resistance state if the second representative value has decreased relative to the first representative value.

[0035] According to one embodiment, the comparison circuit is an analog circuit configured to store the first representative value and the at least one second representative value in analog form.

[0036] According to one embodiment, the comparison circuit is a digital circuit configured to store the first representative value and the at least one second representative value in digital form, for example as binary values.

[0037] According to one embodiment, the above-mentioned circuit also includes a current source configured to apply a current with a predefined intensity to the unit at a first time and then at at least one second time later than the first time, or a voltage source to apply a predefined voltage to the unit, the measurement of the first representative value is performed based on the application at the first time, and the measurement of at least one second representative value is performed based on the application at at least one second time.

[0038] According to one embodiment, the non-volatile memory is a filament-type memory, such as a resistive random access memory (RRAM).

[0039] According to one embodiment, the non-volatile memory is a phase change memory, or an oxide-based resistive memory, or a programmable metallization cell. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] The above features and advantages and other features and advantages will be described in detail in the following description of specific embodiments given by way of illustration and not limitation, with reference to the accompanying drawings, in which:

[0041] Figure 1 is a graph showing fluctuations in resistance of a resistive element programmed to a high resistance or low resistance state;

[0042] Figure 2A is a graph showing fluctuations in resistance of a resistance element around a reference interval;

[0043] Figure 2B The resistance variation around the reference interval is shown;

[0044] Figure 3 is a graph showing the evolution of the resistance of a resistor element over time;

[0045] Figure 4A is a graph showing deviation in fluctuation of a resistance element programmed to a high resistance state;

[0046] Figure 4B is a graph showing deviation in fluctuation of a resistance element programmed to a low resistance state;

[0047] Figure 5 is a graph showing average fluctuations of a resistive element programmed to a high resistance or low resistance state;

[0048] Fig. 6A is a diagram showing two measurements;

[0049] Figure 6B is a graph showing several measurements; and

[0050] Figure 7 is a block diagram showing a circuit according to one embodiment of the present description. DETAILED DESCRIPTION

[0051] In the various drawings, similar features have been designated by similar reference numerals. In particular, common structural and / or functional features in various embodiments may have the same reference numerals, and may be provided with the same structure, dimensions, and material properties.

[0052] For clarity, only operations and elements useful for understanding the embodiments described herein are shown and described in detail. In particular, resistive memory technology and reprogramming of resistive elements are known to those skilled in the art. In particular, reprogramming filament memory cells to high resistance and / or low resistance states is known to those skilled in the art.

[0053] Unless otherwise stated, when referring to two elements being connected together, this means a direct connection without any intervening elements other than conductors, and when referring to two elements being coupled together, this means the two elements can be connected, or they can be coupled via one or more other elements.

[0054] In the following disclosure, unless otherwise indicated, when referring to absolute position qualifiers (such as terms "front", "rear", "up", "down", "left", "right", etc.), or to relative position qualifiers (such as terms "above", "below", "higher than", "lower than", etc.), or to orientation qualifiers (such as "horizontal", "vertical", etc.), reference is made to the orientation shown in the figure.

[0055] Unless otherwise specified, the expressions "approximately," "substantially," and "about" mean within 10%, and preferably within 5%.

[0056] Figure 1 1 is a graph 100 showing the fluctuation of the resistance of a resistive element programmed to a high resistance state and a low resistance state. In particular, curve 102 and curve 104 are obtained from experiments. For example, the experiments performed measure the resistance value of the resistive element, for example after measurement of the output voltage of the element. The resistive element is, for example, a cell in a non-volatile resistive ReRAM (resistive random access memory). For example, the non-volatile memory is a filament memory. In other examples, the non-volatile memory is a phase change memory (PCM), an oxide random access memory (OxRAM), a programmable metallization cell, and the like.

[0057] Curve 102 shows the distribution of resistance measurements (R[Ω]) of a resistor element that was initially programmed to a high resistance state (HRS). In particular, the measurements were taken some time after the resistor element had been programmed. For example, the measurements were performed 6 seconds after the initial programming.

[0058] Curve 104 shows the distribution of resistance measurements of a resistor element that was initially programmed to a low resistance state (HRS). More specifically, the measurements were performed after the resistor element had been programmed for a period of time. For example, the measurements were performed 6 seconds after the initial programming.

[0059] The y-axis of the graph 100 represents the quantile (Q) of the measurements performed. In particular, the quantiles shown are related to the normal theoretical distribution of the measurements performed. For example, the resistance value corresponding to the quantile equal to 0 is the median resistance value. Likewise, the set of resistance values ​​between the quantile values ​​-1 and 1 accounts for 68.27% of the total number of values. In other words, the unit Q is the standard deviation of the normal distribution of resistance values.

[0060] Generally speaking, the resistance values ​​of cells programmed to the high resistance state and the low resistance state follow a log-normal law. In addition, the resistance assumed by the elements programmed to the high resistance state is more dispersed than the resistance assumed by the elements programmed to the low resistance state. In fact, Figure 1 The resistance values ​​of the LRS elements shown range from 1000 ohms to about 20,000 ohms, while the resistance values ​​of the HRS elements range from 10,000 ohms to 10 7 ohm.

[0061] Interval 106 represents a range of resistance values ​​that a resistance element initially programmed to a high resistance state and a low resistance state can assume. In other words, reference interval 106 corresponds to an overlap of the distribution of resistance values ​​that a memory cell can assume in either a high resistance state or a low resistance state. Conversely, resistance values ​​below interval 106 correspond only to resistance elements initially programmed to a low resistance state, and resistance values ​​above interval 106 correspond only to resistance elements initially programmed to a high resistance state. Interval 106 extends from Rth1 The resistance value in ohms extends to R th2 The resistance value in ohms. For example, R th1 =11000 and R th2 = 25000. More generally, R th1 is a value ranging from 8000 ohms to 20000 ohms, and R th2 is a value in the range from 20000 ohms to 50000 ohms. th1 and R th2 This is given as an example only and may differ for different types of memory, for example.

[0062] Furthermore, after their initial programming, the resistance values ​​of the LRS and HRS elements undergo relaxation effects and fluctuate. Even if the distribution of the resistances of the HRS and LRS elements has stabilized, the resistance of each cell continues to fluctuate individually.

[0063] In the case of filament memory, the relaxation effect comes from the dynamic stabilization of the filaments, which changes the cell resistance. In fact, atoms (such as oxygen atoms) can move and reorganize over a period of time until stability is reached.

[0064] The fluctuation before and after stabilization does not change the distribution of the resistance values ​​of each HRS and LRS state. However, when the values ​​fluctuate around and within the interval 106, it is difficult to distinguish between the HRS and LRS elements.

[0065] Figure 2A 106 is a graph showing fluctuations in resistance of the resistor element in the vicinity of the interval 106 .

[0066] Figure 2B The resistance variation around interval 106 is shown.

[0067] Figure 2A The y-axis of the graph shown represents the quantile relative to the theoretical normal distribution of the measurements performed, as relative to Figure 1 The two sloped segments represent the theoretical normal distribution of the LRS and HRS states, respectively. For example, Figure 2A The x-axis of the shown graphs is on a logarithmic scale.

[0068] For example, resistance value 200 represents the resistance value of an element that was initially programmed to an LRS state, and the resistance value has fluctuations until it is within reference interval 106. Then, the resistance of the element generally decreases or falls, thereby leaving interval 106. Similarly, resistance value 202 represents the resistance value of an element that was initially programmed to an HRS state, and the resistance value has fluctuations until it is within reference interval 106. Then, the resistance of the element generally expands or increases, thereby leaving interval 106. Generally speaking, when an HRS or LRS element enters interval 106, its resistance will tend to return to a value specific to its initial state.

[0069] Outside of interval 106, an LRS element, such as one with resistor 204, generally has an increased resistance. An HRS element, such as one with resistor 206, generally has a decreased resistance. Increases and decreases in resistance outside of interval 106 are a trend. In fact, the resistance of an HRS element may sometimes fluctuate and increase, such as resistor 208.

[0070] Thus, when a HRS or LRS resistive element whose resistance is in interval 106 causes its resistance to leave interval 106 , another resistive element programmed to the same state will cause its resistance to fluctuate and enter interval 106 .

[0071] Figure 3 is a graph 300 showing the evolution of the resistance of a HRS resistor element over time.

[0072] In particular, graph 300 shows the evolution of the logarithm of the resistance value (log(R)) over time (T[s]). Graph 300 includes curves 302, 304, and 306 that divide the evolution of the resistance into three equal parts. In other words, each curve 302, 304, and 306 shows the evolution of the resistance of the same number of resistance elements. Curve 302 shows the evolution of the resistance of the upper third, i.e., the resistance elements with the highest resistance value of one third. Curve 304 shows the evolution of the resistance of the middle third. Curve 306 shows the evolution of the resistance of the lower third (i.e., the resistance elements with the lowest resistance value of one third).

[0073] Over time, the resistance of the upper trisection tends to decrease, while the resistance of the middle and lower trisections tends to increase. The trisection means of the HRS and LRS states tend to approach each other. This approach occurs as the deviation increases. In fact, each element whose resistance increases in the distribution is replaced by another element whose resistance decreases.

[0074] Figure 4A is a graph 400 showing deviations in fluctuations of a resistance element programmed to a high resistance state.

[0075] Figure 4Bis a graph 402 showing deviations in fluctuations of a resistance element programmed to a low resistance state.

[0076] In particular, Figure 400 and Figure 402 include point clouds 400' and 402'. The x-axis coordinate of each point of clouds 400' and 402' is the logarithm of the resistance of the resistor element at a certain time t1log(R)(t1). For example, time t1 occurs a few seconds after the resistor element has been programmed, such as 6 seconds. The y-axis coordinate of each point in clouds 400 and 402 is the difference between the logarithm of the resistance of the resistor element between time t2 and time t1 (log(R)(t2)-log(R)(t1)). For example, time t2 is later than time t1 and occurs tens of minutes after the element has been programmed, such as one hour after programming. In particular, cloud 400' shows that the resistance of the resistor element programmed to the HRS state changes over time. Cloud 402' shows that the resistance of the resistor element programmed to the LRS state changes over time.

[0077] Box 404 shows a negative drift in the resistance variation over time of a resistive element programmed to the HRS state, illustrating a trend of an increase in the resistance of the HRS element. Similarly, box 406 shows a positive drift in the resistance variation over time of a resistive element programmed to the LRS state, illustrating a trend of a decrease in the resistance of the LRS element. These trends are only significant for elements whose resistance has a value within box 404 and / or box 406.

[0078] Figure 5 5 is a graph 500 showing average fluctuations of resistance elements programmed to a high resistance or low resistance state. More specifically, graph 500 includes curve 502 and curve 504. Curves 502 and 504 are obtained by continuously measuring the resistance of multiple resistance elements HRS and LRS when in reference interval 106, respectively. Curves 502 and 504 respectively show the ratio (RATIO) of resistance elements whose resistance values ​​have increased and decreased, respectively. For example, the increase or decrease for each time t is obtained by comparing the resistance value measured at time t with the average value of the resistance values ​​measured multiple times within 2 minutes of time t.

[0079] Constant curves 506 and 508 show the average ratio of HRS elements with increasing resistance and the average ratio of LRS elements with decreasing resistance, respectively.

[0080] Fig. 6A is a graph showing two measurements. For example, Fig. 6A An example measurement is shown which allows checking whether the resistance within the reference interval 106 tends to increase or decrease.

[0081] Fig. 6AThe example shown shows a measurement Re1T1 performed at time t1. For example, at time t1, the resistance of the resistive element under test is equal to R1 ohms. In particular, due to the fluctuation of the resistance, the measured resistance is a dynamic value that evolves over time. For example, the value R1 is within the reference interval 106. Another measurement Re1T2 of the resistance of the resistive element under test is performed, for example, at time t2 after time t1. For example, time t2 is one or more seconds, such as at least 3 seconds, or one or several minutes, such as at least 1 minute, or at least one hour from time t1. In particular, the resistive element is not reprogrammed between the two measurements. Therefore, the programming state of the resistive element is not modified between the two measurements. For example, the resistance value at time t2 is R2 ohms. As Fig. 6A As shown, if R2 is greater than R1, the resistance value is considered to have increased. In the opposite case, that is, if R1>R2, the resistance value is considered to have decreased. In one example, the value R2 is not within the reference interval 106.

[0082] Figure 6B is a graph showing several measurements Re1T1, Re1T2, Re1T3, Re1T4, Re1T n For example, Figure 6B Another example measurement that allows checking whether the resistance within the reference interval 106 tends to increase or decrease is shown.

[0083] exist Figure 6B In the example shown, n-1, n are integers, for example less than 1000, and the other measurements are performed after time t1. For example, the continuous measurements are performed in a relatively short time period, for example during a time period between 1 ms and 1 s. The total number of measurements that can be performed then depends on the measurement time period and the time for processing the performed measurements. For example, the integer is between 10 and 1000. For example, the other measurements are performed regularly, for example every 6 seconds, every minute, every hour, etc. For example, at times t2, t4 and t n At the point where the measured resistance is equal to R2, R4 and R n ohms, both greater than value R1. However, at time t3, the measured resistance is equal to R3 ohms, which is less than R1. Similarly, value R n For example, below the value R4. Therefore, the sequence of measured resistances is not an increasing sequence. However, the values ​​R2, R3, R4 and R n The average value of R2, R3, R4 and R n If the average value of is less than R1, the resistance value of the measured component decreases.

[0084] According to one embodiment, the resistive element under test is considered to be an HRS element as long as the resistance value is within the reference interval 106 at time t1 and when it is measured to increase after one or more other measurements. On the other hand, if the resistance decreases after one or more other measurements, the element is considered to be an LRS.

[0085] Of course, other methods of estimating whether the resistance is increasing or decreasing are also possible. For example, the average of the difference in resistance values ​​between two consecutive measurements is calculated, and if the average is negative, the element is considered to be LRS, and if the average is positive, the element is considered to be HRS. In another example, the average of the first number of resistance values ​​measured for the first time in a row is compared with the average of the second number of resistance values ​​measured for the second time in a row after the first time.

[0086] Figure 7 is a block diagram illustrating a circuit 700 according to one embodiment of the present description.

[0087] The circuit 700 includes a resistive element 701 of a resistive non-volatile memory. A current I of a predefined intensity is supplied to the resistive element 701 via a transistor 702. n In some cases, transistor 702 is used as a current source to control the level of the programming current flowing through resistor element 701. In other cases, transistor 702 is an access transistor for activating or deactivating the programming current, and when activated, the strength of the programming current is determined by, for example, a current source ( Figure 7 The current source is located somewhere else in series with the resistor element 701, such as at the end of a line in the resistive non-volatile memory matrix. For example, the element 701 is initially programmed to the LRS state or the HRS state. Figures 1 to 5 As described, the resistance of element 701 fluctuates over time. n is a current of a predefined intensity. For example, the current I n is applied to the resistor element 701 at time t1.

[0088] Alternatively, instead of applying a current of a predefined intensity to the resistance element, a predefined voltage is applied to the resistance element.

[0089] The circuit 700 further includes a circuit 704 (voltage reader) configured to measure a voltage representing the resistance of the element 701. For example, the circuit 704 is further configured to calculate the value of the resistance of the element 701 based on the measured voltage, for example via a voltage divider. For example, the circuit 704 includes an analog-to-digital converter (ADC) configured to convert the measured voltage value into a digital value, and a memory storing the digital value, which represents the resistance value of the resistance element 701. For example, the circuit 704 includes a comparator (not shown in the figure), and is further configured to compare the digital value with the value R defining the interval 106. th1 and R th2 For example, when the calculated resistance value is not within the reference interval 106, and the circuit 700 is configured to reapply the current I to the resistor element 701, for example n or voltage.

[0090] In one example, the circuit 700 also includes, for example, a memory 706 (MEM), such as a shift register, which is configured to receive digital voltage measurements obtained by the circuit 704. For example, the memory 706 is configured to store a first measurement value in a location 708 (MEM1). For example, the first measurement value is a voltage value corresponding to a resistance within the reference interval 106. The memory is also configured to store one or more other measurements performed by the circuit 704 in a location 710 (MEM2). For example, the measurements stored in the location 702 do not all fall within the reference interval 106.

[0091] In another example, the circuit 704 further includes an amplifier, such as an operational transconductance amplifier (OTA), which is configured to supply a current based on the voltage measured at the output of the element 701. Then, the memory 706 of the previous example is replaced by at least two capacitors, each coupled to a switch and powered by the current generated by the OTA. Then, the charge of the capacitor represents the measured resistance of the element 701.

[0092] Circuit 700 also includes a comparison circuit (comparison circuit) 712. Circuit 712 is configured to determine whether the resistance of element 701 increases or decreases, for example, by applying Fig. 6A and / or Figure 6B In one example, the comparison circuit 712 is an analog circuit configured to store a resistance representative value (such as a current or voltage value) in an analog form. In another example, the comparison circuit 712 is a digital circuit configured to store a resistance representative value (such as a current or voltage value) in a digital form. For example, the digital format used is a discrete format, such as a binary format.

[0093] For example, circuit 712 is configured to determine whether the resistance of element 701 increases or decreases by comparing the measured value with several pre-registered threshold values. The threshold value is, for example, several values ​​distributed on interval 106. Comparison circuit 712 is configured to, for example, compare the first resistance measurement value with the threshold value, so as to determine the closest threshold value between the first measurement value. Then, comparison circuit 712 is configured to locate the second measurement value in the same manner. Then, comparison circuit 712 is configured to determine whether the resistance of element 701 increases or decreases based on the comparison between the nearest threshold value of the first measurement value and the second measurement value. Therefore, in this example, comparison circuit 712 does not perform direct comparison between resistance measurement values. In particular, comparison circuit 712 is not configured to subtract two representative resistance values ​​and compare the difference with a threshold value (such as 0). In addition, the nearest threshold value can vary due to different memory cells. In this example, comparison circuit 712 is configured to compare the resistance value with several threshold values.

[0094] In another example, the estimation of the state to which element 701 has been programmed is performed by a fully connected neural network. For example, the neural network includes 4 layers. The input layer includes, for example, the number n of neurons, where n corresponds to the number of measurements performed. For example, n is a value between 2 and 10. For example, the next two layers include 8n and 2n neurons, respectively. The output layer includes 1 neuron, and the output indicates whether the estimated state is HRS or LRS. For example, the output value is equal to 1 when the estimated state is HRS (in other words, the resistance tends to increase), and is equal to value 0 when the estimated state is LRS (in other words, the resistance tends to decrease).

[0095] According to one embodiment, the circuit 712 is coupled to a programming circuit 714 (reprogramming circuit). For example, the circuit 712 is configured to supply a signal to the circuit 714 that encodes whether the resistance tends to increase or decrease. In another example, the comparison circuit 712 is configured to program the state of a bit in the circuit 714. For example, if the resistance tends to increase, the bit is programmed to state 1, and if the resistance tends to decrease, the bit is programmed to 0, and vice versa.

[0096] Then, circuit 714 is configured to reprogram the state of element 701 based on the information provided by circuit 712. Then, circuit 714 programs element 701 to the HRS state if it has been estimated that the resistance tends to increase, and programs element 701 to the LRS state if it has been estimated that the resistance tends to decrease.

[0097] According to another embodiment, circuit 712 supplies information (e.g., in the form of a signal or by programming bits) to memory 716. For example, memory 716 is configured to store (in association with an indication of the address of element 701 in non-volatile memory) elements estimated to be HRS or LRS.

[0098] In one example, although Figure 7 Although not shown, circuit 700 includes selection circuitry that allows each memory cell of the non-volatile memory to be selectively coupled to circuit elements 704 to 712 and to element 714 .

[0099] The following table lists the results obtained when estimating a fully connected neural network of 4 layers consisting of 10, 80, 20 and 1 neurons, respectively. After the measurement in the interval of [10800; 25000] ohms, 9 further measurements were performed in intervals of 1 minute in succession. Thus, a total of 10 measurements were performed, the first measurement being in the interval [10800; 25000] ohms and supplied to the neural network. The neural network is configured to predict whether the state of the measured element is HRS or LRS based on the 10 measurements. By way of example, for this experiment, 14784 memory elements were programmed to the HRS state and 15061 elements were programmed to the LRS state. From these elements, the training and validation of the neural network are performed on the majority of the elements, for example on 75% of the elements selected at random. The remaining elements (corresponding to 25% of the elements) are used, for example, to test the method, in other words, to validate the model on data not seen during training. The following table lists the results obtained during the validation of the model on 7461 elements that were not used during network learning and training. The "Benchmark" column shows the number of elements tested, i.e. the number of elements that fall into the interval [10800; 25000] ohms. The "F1 score" column shows the F1 score of the experiment. The "Call" column includes the call value of the experiment. The "Accuracy" column includes the ratio of correctly predicted elements for each class.

[0100] [Table 1]

[0101] accuracy Call F1 score Base HRS 0.96％ 0.86 0.91 3,698 LRS 0.88％ 0.96 0.92 3,763

[0102] Various embodiments and variations have been described. It will be appreciated by those skilled in the art that certain features of these embodiments can be combined and that other variations will readily occur to those skilled in the art. In particular, with respect to the case of an increase or decrease in the estimated resistance value. Likewise, the number of measurements and the time interval between two measurements may vary. The two ends of the defined reference interval are selected based on the volatile memory and the measurement circuit 704 and are left to those skilled in the art.

[0103] Finally, based on the functional description provided above, the actual implementation of the embodiments and variants described herein is within the capabilities of those skilled in the art. In particular, this is the case for implementing elements 704, 706, and 716, which may be analog or digital.

Claims

1. A method for estimating a programmed resistance state of a cell of a non-volatile resistive memory, the method comprising: a) performing a first measurement by a measurement circuit coupled to the memory cell of a first value representing the resistance (Re1T1) of the cell when the cell is in a resistive state and comparing the first representative value to a reference interval (106); b) if the first measurement is less than a lower limit of the reference interval, the estimate of the resistance state of the cell is a low resistance state, if the first measurement is greater than an upper limit of the reference interval, the estimate of the resistance state of the cell is a high resistance state, and if at least one first measurement is within the reference interval, the measurement circuit generates a measurement representing the resistance of the cell when the same memory cell is in the resistance state (Re1T1, Re1T2, Re1T3, Re1T4, Re1T5) n ), the resistance state to which the cell is programmed is not modified between the at least one first measurement and the at least one second measurement; c) comparing the first value representing the resistance and the at least one second value by a comparison circuit (712); as well as d) based on the comparison, estimating the resistance state of the cell, the estimation being an estimation of a high resistance state if at least one second representative value increases relative to the first representative value of the resistance, or the estimation being an estimation of a low resistance state if at least one second representative value decreases relative to the first representative value.

2. The method according to claim 1, wherein: The comparison circuit (712) is configured to compare the first representative value of the resistance with a reference value based on at least one second representative value of the resistance, the reference value being not constant and fixed for all memory cells of the resistance memory.

3. The method according to claim 1 or 2, wherein: The comparison circuit is configured to determine only a relative relationship between the first representative value of the resistance and at least one second representative value of the resistance without performing a subtraction operation between the first representative value of the resistance and at least one second representative value of the resistance.

4. The method according to any one of claims 1 to 3, further comprising: - before executing step a), at a first time (t1), a current (I n ) or a first application of a predefined voltage, said first measurement being performed based on the first application; as well as - after performing step a) and before performing step b), at at least one second time (t2, t3, t4, t5) later than the first time n ) to the resistor element. n ) or at least one second application of a predetermined voltage, the at least one second measurement being performed based on the at least one second application.

5. The method according to any one of claims 1 to 4, further comprising, after the state estimation: - Reprogramming the cell to the estimated state.

6. The method according to any one of claims 1 to 4, further comprising, after the state estimation: - storing in association with said unit in a memory (716) a value indicative of the estimated state.

7. The method according to any one of claims 1 to 6, further comprising, after measuring the first representative value, if the first representative value is outside the reference interval, repeating the method starting from newly executing step a).

8. The method according to any one of claims 1 to 7, further comprising, before the comparison: - converting the first representative value and the at least one second representative value into a first digital value and at least one second digital value by a converter; - Storing said first digital value and said at least one second digital value in a memory (706, 708, 710) in association with said cell.

9. The method according to any one of claims 1 to 7, wherein: The comparison is performed based on voltage values ​​stored by a first capacitor and at least one second capacitor, the first capacitor and the at least one second capacitor being configured to store the first representative value and the at least one second representative value, respectively.

10. The method according to any one of claims 1 to 9, wherein: If, after comparison, it is determined that the first representative value is lower than one of the at least one second representative values, the estimated state is a high resistance state (HRS), and wherein, if, after comparison, it is determined that the first representative value is greater than one of the at least one second representative values, the estimated state is a low resistance state (LRS).

11. The method according to any one of claims 1 to 9, wherein: If it is determined after the comparison that the first representative value is lower than the average of the at least one second representative value, the estimated state is a high resistance state (HRS).

12. The method according to claim 9, wherein: The at least one second representative value includes a first second value and a second second value, wherein the second second value is measured at a time later than the second time, and wherein, if after comparison, it is determined that the difference between the first second representative value and the second second representative value and the average value of the difference between the first second representative value and the first representative value are positive, then the estimated state is a high resistance state (HRS), and wherein if after comparison, it is determined that the difference between the first second representative value and the second second representative value and the average value of the difference between the first second representative value and the first representative value are negative, then the estimated state is a low resistance state (LRS).

13. The method according to any one of claims 1 to 12, wherein: The second time (t2) is at least 3 seconds away from the first time (t1), for example, at least one minute.

14. The method according to any one of claims 1 to 13, wherein: The first representative resistance value and the at least one second representative resistance value are voltage or current values ​​representing the unit resistance.

15. A circuit comprising a non-volatile resistive memory, the non-volatile resistive memory comprising a cell (701) programmed to one of a plurality of resistance states, the circuit further comprising: - a measurement circuit (704) configured to measure a first value representative of the resistance (Re1T1) of the cell when the cell is in a resistive state; - a comparison circuit (712) configured to determine whether the first representative value is within a reference interval (106), and to estimate the resistance state of the cell to be a low resistance state if the first measurement is less than a lower limit of the reference interval, and to estimate the resistance state of the cell to be a high resistance state if the first measurement is greater than an upper limit of the reference interval, and The measurement circuit is further configured to, if the first representative value is within the reference interval, measure a value representing the resistance of the cell when the same memory cell is in the resistance state (Re1T1, Re1T2, Re1T3, Re1T4, Re1T5, Re1T6, Re1T7, Re1T8, Re1T9, Re1T10, Re1T111, Re1T12, Re1T13, Re1T14, Re1T15, Re1T16, Re1T17, Re1T18, Re1T19, Re1T20, Re1T31, Re1T4, Re1T5 n ), the resistance state to which the cell is programmed is not modified between the first measurement and the at least one second measurement, and the comparison circuit is further configured to compare the first representative value with the at least one second representative value to estimate the state of the cell, the estimate being an estimate of a high resistance state if the at least one second representative value has increased relative to the first representative value of the resistance, or an estimate of a low resistance state if the at least one second representative value has decreased relative to the first representative value.

16. The circuit of claim 15, wherein: The comparison circuit (712) is an analog circuit configured to store the first representative value and the at least one second representative value in analog form.

17. The circuit of claim 15, wherein: The comparison circuit (712) is a digital circuit configured to store the first representative value and the at least one second representative value in digital form, for example as binary values.

18. The circuit according to any one of claims 15 to 17, further comprising a circuit configured to apply a current (I ) of a predefined intensity to the cell at a first time (t1) and then at at least a second time (t2) later than the first time. n ) or a voltage source applying a predefined voltage to the unit, the measurement of the first representative value is performed based on the application of the first time, and the measurement of the at least one second representative value is performed based on the application of at least a second time.

19. A circuit according to any one of claims 15 to 18, wherein: The non-volatile memory is a phase change memory, or an oxide-based resistive memory, or a programmable metallization cell.

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