Semiconductor device and packaging method thereof
By creating a limit structure on the packaging substrate, the problem of position deviation caused by moving components during sintering is solved, and components without positioning fixing are achieved, shortening production cycles and reducing costs.
Patent Information
- Application Number
- CN202311503651.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-11-13
- Publication Date
- 2025-05-13
AI Technical Summary
During the packaging process of semiconductor devices, components are prone to move during high-temperature sintering, resulting in position deviation and affecting device performance. The prior art usually uses positioning fixtures, but the design and processing are complex, costly, and do not meet the needs of different locations and device sizes.
The limit structure is made on the package substrate so that it is fixed to the same side as the component. In the direction parallel to the package substrate, the side surface of the component is arranged adjacent to the limit structure. In the vertical direction, the top end of the limit structure is located on the bottom surface of the component away from the package substrate.
The movement of components is blocked through the limit structure, and no positioning fixtures are required, which shortens the production cycle, reduces production costs, and ensures that the device performance meets standards.
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Figure CN119993918A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of semiconductor device packaging, and in particular to a semiconductor device and a packaging method thereof. Background Art
[0002] During the packaging stage of the entire production process of semiconductor devices, the components need to be fixed on the packaging substrate, followed by bonding between pads and airtight sealing to complete the packaging.
[0003] In the field of semiconductor technology, the eutectic welding process has the characteristics of high production efficiency and is conducive to achieving micro-spacing between components. Therefore, it is widely used in production and manufacturing. For example, high-power semiconductor devices often use the eutectic welding process to fix components on the packaging substrate. In addition, in order to ensure that the performance of the device meets the standards, the components need to be fixed at a specific position on the packaging substrate. However, the eutectic welding process requires high-temperature sintering to connect and fix the components to the packaging substrate through solder. In the process of transferring the packaging substrate carrying solder and components to the sintering equipment, as well as during the sintering process, the position of the components may move, deviate from the specific position, and affect the performance of the device.
[0004] To solve this problem, the existing technology usually uses jigs to position components, that is, placing machined jigs around the components to block the movement of the components during the transfer and sintering processes, and confine them to specific positions. However, different positions and different device sizes require different positioning jigs, which prolongs the production cycle. In addition, high-precision positioning jigs are difficult to process, and the cost of jigs remains high, which is not conducive to reducing production costs. Summary of the invention
[0005] The invention provides a semiconductor device and a packaging method thereof, so as to shorten the production cycle and reduce the production cost.
[0006] In a first aspect, the present invention provides a semiconductor device, comprising:
[0007] Package substrate;
[0008] At least one component is fixed on the packaging substrate;
[0009] The limiting structure is fixed on the same side of the packaging substrate as the component; along the direction parallel to the plane where the packaging substrate is located, at least one side of at least one component is arranged adjacent to the limiting structure; along the direction perpendicular to the plane where the packaging substrate is located, the top of the limiting structure is located on the side of the bottom surface of the component away from the packaging substrate.
[0010] Optionally, the limiting structure includes a metal wire; and a side surface of the component is arranged adjacent to at least one metal wire.
[0011] Optionally, the projection shape of the metal wire on the plane where the side surface of the component is located is an arc, and two ends of the metal wire are respectively fixed on the packaging substrate.
[0012] Optionally, one side of the component is disposed adjacent to a plurality of metal wires;
[0013] The plurality of metal wires are arranged at intervals, or the ends of the plurality of metal wires are connected in sequence.
[0014] Optionally, the components are connected to the package substrate by solder;
[0015] Along a direction perpendicular to the plane where the package substrate is located, the height of the limiting structure is greater than the first thickness of the solder;
[0016] The first thickness is the initial thickness of the solder before sintering.
[0017] Optionally, the orthographic projection of the top of the limiting structure on the side surface of the component is located in the first area of the side surface of the component;
[0018] Along the direction perpendicular to the plane where the package substrate is located, the first region includes a first edge and a second edge, and the first edge is located on the side of the second edge close to the package substrate; the distance between the first edge and the bottom surface of the component is U, the distance between the second edge and the bottom surface of the component is V, and the thickness of the component is H, wherein:
[0019] Optionally, the semiconductor device includes a plurality of components;
[0020] The limiting structure is located at the outermost edges of the plurality of components, and no limiting structure is arranged between two adjacent components.
[0021] In a second aspect, the present invention provides a method for packaging a semiconductor device, comprising:
[0022] Providing a packaging substrate;
[0023] A limiting structure is formed on the packaging substrate; the limiting structure is fixed on the packaging substrate;
[0024] placing at least one component on the package substrate;
[0025] Fix the components on the package substrate;
[0026] Among them, the limiting structure and the components are fixed on the same side of the packaging substrate; along the direction parallel to the plane where the packaging substrate is located, at least one side of at least one component is arranged adjacent to the limiting structure; along the direction perpendicular to the plane where the packaging substrate is located, the top of the limiting structure is located on the side of the bottom surface of the component away from the packaging substrate.
[0027] Optionally, forming a limiting structure on the packaging substrate includes:
[0028] At least one metal wire is formed on the packaging substrate using a wire bonding device.
[0029] Optionally, before placing at least one component on the packaging substrate, the packaging method further includes:
[0030] Placing solder on the package substrate; the components are located on the side of the solder away from the package substrate;
[0031] Fix the components on the package substrate, including:
[0032] The package substrate carrying the solder and components is transferred to a sintering device for sintering to fix the components on the package substrate.
[0033] The technical solution of the embodiment of the present invention is to manufacture a limiting structure on the packaging substrate so that the limiting structure is fixed on the packaging substrate, and at least one side surface of at least one component is arranged adjacent to the limiting structure along a direction parallel to the plane where the packaging substrate is located, and the top of the limiting structure is located on the side of the bottom surface of the component away from the packaging substrate along a direction perpendicular to the plane where the packaging substrate is located. The limiting structure can be used to block the movement of the component, and there is no need to design a positioning fixture, which allows flexible positioning, thereby shortening the production cycle and reducing production costs.
[0034] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS
[0035] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0036] Figure 1 is a schematic diagram of a top view of a semiconductor device provided by an embodiment of the present invention;
[0037] Figure 2 is along Figure 1 A schematic cross-sectional structure diagram of a semiconductor device taken along line AA';
[0038] Figure 3 is a schematic diagram of a top view of another semiconductor device provided by an embodiment of the present invention;
[0039] Figure 4is a schematic diagram of a top view of another semiconductor device provided by an embodiment of the present invention;
[0040] Figure 5 is a schematic diagram of a top view of another semiconductor device provided by an embodiment of the present invention;
[0041] Figure 6 is a schematic diagram of a top view of another semiconductor device provided by an embodiment of the present invention;
[0042] Figure 7 is a schematic diagram of a top view of another semiconductor device provided by an embodiment of the present invention;
[0043] Figure 8 yes Figure 2 The semiconductor device shown is Figure 2 A side view in the direction of the middle arrow;
[0044] Fig. 9 yes Figure 2 The semiconductor device shown is Figure 2 Another side view in the direction of the middle arrow;
[0045] Fig.10 yes Figure 2 The semiconductor device shown is Figure 2 Another side view in the direction of the middle arrow;
[0046] Fig.11 is a comparison diagram of the semiconductor device provided by an embodiment of the present invention before and after sintering;
[0047] Fig.12 yes Figure 2 The semiconductor device shown is Figure 2 Another side view in the direction of the middle arrow;
[0048] Fig.13 It is a schematic flow chart of a semiconductor device packaging method provided by an embodiment of the present invention;
[0049] Fig.14 It is a flow chart of another semiconductor device packaging method provided by an embodiment of the present invention. DETAILED DESCRIPTION
[0050] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.
[0051] It is obvious to those skilled in the art that various modifications and changes can be made in the present application without departing from the spirit or scope of the present application. Therefore, the present application is intended to cover modifications and changes of the present application that fall within the scope of the corresponding claims (technical solutions for protection) and their equivalents. It should be noted that the implementation methods provided in the embodiments of the present application can be combined with each other without contradiction.
[0052] First of all, it should be noted that, unless otherwise defined, the technical terms or scientific terms used in the present invention should be understood by people with ordinary skills in the field to which the present invention belongs. "Include" or "comprising" and other similar words mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Up", "down", "left", "right", "top", "bottom" and other similar terms are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly. In addition, the shapes and sizes of the components in the drawings do not reflect the actual proportions, and the purpose is only to illustrate the contents of the present invention.
[0053] Figure 1 is a schematic diagram of a top view of a semiconductor device provided by an embodiment of the present invention, Figure 2 is along Figure 1 A schematic diagram of the cross-sectional structure of the semiconductor device taken at AA', as shown in FIG. Figure 1 and Figure 2 As shown, the semiconductor device 100 provided by an embodiment of the present invention includes a packaging substrate 1, at least one component 2 and a limiting structure 3; the component 2 is fixed on the packaging substrate 1; the limiting structure 3 and the component 2 are fixed on the same side of the packaging substrate 1; along a direction parallel to the plane where the packaging substrate 1 is located, at least one side surface of at least one component 2 is arranged adjacent to the limiting structure 3; along a direction perpendicular to the plane where the packaging substrate 1 is located, the top P of the limiting structure 3 is located on the side of the bottom surface F1 of the component 2 away from the packaging substrate 1.
[0054] The packaging substrate 1 is used to carry the components 2. After the components 2 are fixed on the packaging substrate 1 and the wire bonding between the pads is completed, an airtight cover can be performed to complete the packaging and obtain a semiconductor device. The embodiment of the present invention does not specifically limit the material, shape, etc. of the packaging substrate. Figure 1 The packaging substrate 1 is only taken as an example to be rectangular.
[0055] The component 2 may refer to a chip, or a capacitor, resistor, or other device. One or more components may be fixed on the package substrate. Figure 1The packaging substrate 1 carrying one component 2 is taken as an example for illustration only, and the embodiment of the present invention does not specifically limit the type and quantity of the components in the semiconductor device.
[0056] Alternatively, if Figure 2 As shown, the component 2 and the package substrate 1 can be connected by solder 4. The specific connection method is: first place the solder 4 on the package substrate 1, then place the component 2 on the solder 4, transfer the package substrate carrying the solder 4 and the component 2 to the sintering equipment (transfer process), heat it to the sintering temperature of the solder for sintering (sintering process), realize the connection between the component 2 and the package substrate 1, and fix the component 2 on the package substrate 1. The embodiment of the present invention does not limit the form of the solder 4. For example, the solder 4 can be a solder wire, a solder paste, or a solder sheet (such as a preformed solder sheet).
[0057] The limiting structure 3 is used to limit the position of the component 2 and prevent the movement of the component 2. As mentioned above, the component moves during the transfer process or the sintering process. Figure 2 In this embodiment, a limiting structure 3 is manufactured on the packaging substrate 1, so that the limiting structure 3 is arranged adjacent to the side of the component 2, and the top P of the limiting structure 3 is located on the side of the bottom surface F1 of the component 2 away from the packaging substrate 1. The limiting structure 3 can be used to block the movement of the component 2, and there is no need to design a positioning fixture, thereby shortening the production cycle and reducing production costs.
[0058] It should be noted that the manufacturing process of the limiting structure 3 is completed at least before the above-mentioned transfer process and sintering process, so as to realize the position limiting effect of the limiting structure 3 on the component 2. Exemplarily, as a feasible implementation method, the limiting structure 3 can be first manufactured on the packaging substrate 1, and the placement area of the components can be limited by the limiting structure 3, and then the solder and components can be placed. In this way, not only can the limiting structure 3 be used to block the movement of the component 2 during the transfer process or the sintering process, but compared with placing the solder and components first, the manufacturing of the limiting structure 3 can also be made without being disturbed by the component 2, thereby improving the manufacturing efficiency, and avoiding the position movement of the component when manufacturing the limiting structure 3, thereby ensuring the performance of the semiconductor device.
[0059] It should also be noted that the embodiment of the present invention does not impose any specific restrictions on the material, shape and manufacturing method of the limiting structure 3. It is only necessary to ensure that the limiting structure 3 is arranged adjacent to the side of the component 2, and that, along a direction perpendicular to the plane where the packaging substrate 1 is located, the top of the limiting structure 3 is located on the side of the bottom surface of the component 2 away from the packaging substrate 1, so as to block the movement of the component.
[0060] It should also be noted that at least one side of the at least one component 2 mentioned above is arranged adjacent to the limiting structure 3. Specifically, it can be understood that for all components in the semiconductor device, the limiting structure can be arranged adjacent to at least one side of at least one of the components; wherein the adjacent setting can be a small spacing between the limiting structure and the side of the component (the specific value can be set by oneself), or the limiting structure can be in contact with the side of the component, that is, the two are adjacent.
[0061] For example, Figure 3 is a schematic top view of another semiconductor device provided by an embodiment of the present invention, Figure 1 and Figure 3 The example of the component 2 having four sides is used to illustrate the case where the semiconductor device 100 includes only one component 2. When the semiconductor device 100 includes only one component 2, a limiting structure may be provided at one side adjacent to the component, or at two sides adjacent to the component (e.g., Figure 1 ), a limiting structure may be provided at three sides adjacent to the component, or a limiting structure may be provided at four sides adjacent to the component (such as Figure 3 ), so as to use the limiting structure to limit the movement of the components in at least one direction according to actual needs, thereby reducing the impact of the movement of the components on the performance of the semiconductor device. Preferably, all sides of the components are provided with limiting structures (such as Figure 3 ), so that the movement of components in all directions can be limited by the limiting structure, ensuring the limiting effect and reducing the impact on the performance of semiconductor devices.
[0062] Optionally, when the semiconductor device includes a component and the limiting structure fully surrounds the component, the size of the area enclosed by the limiting structure may be greater than or equal to the size of the component. In other words, there may be a certain distance between the limiting structure and the side surface of the corresponding component, or they may be in contact with (adjacent to) each other. Figure 3 Take the example of a small gap between the limiting structure 3 and the side of the component 2. At this time, the size of the area enclosed by the limiting structure 3 is larger than the size of the component 2. This arrangement makes it easy to place the solder and components in the area limited by the limiting structure. Figure 4 is a schematic top view of another semiconductor device provided by an embodiment of the present invention, Figure 4 Taking the setting of the limiting structure 3 adjacent to the side of the component 2 as an example, at this time, the size of the area surrounded by the limiting structure 3 is equal to the size of the component 2, so that the movement of the component can be better limited. Those skilled in the art can choose the setting method according to actual needs, and the embodiment of the present invention is not limited to this.
[0063] also, Figure 5 is a schematic top view of another semiconductor device provided by an embodiment of the present invention, Figure 6 is a schematic top view of another semiconductor device provided by an embodiment of the present invention, Figure 7 is a schematic top view of another semiconductor device provided by an embodiment of the present invention, Figure 5-Figure 7 The following diagram shows several ways to set the limiting structure when the semiconductor device includes multiple components. Figure 5 As shown in FIG. 1 , as a feasible implementation, when the semiconductor device 100 includes a plurality of components 2, each component 2 may be independently provided with a corresponding limiting structure 3. Specifically, for any component, a limiting structure adjacent to the component may be provided on at least one side of the component. Figure 5 The example in which each side surface of each component 2 is provided with a limiting structure 3 adjacent thereto is used for illustration. Figure 6 As shown in FIG. 1 , as another feasible implementation, when the semiconductor device 100 includes a plurality of components 2, the adjacent components 2 may share the limiting structure 3. This arrangement can reduce the area occupied by the limiting structure 3, which is conducive to reducing the spacing between the components 2. Figure 7 As shown, as another feasible implementation, when the semiconductor device 100 includes multiple components 2, the optional limiting structure 3 is located at the outermost edge of the multiple components 2, and no limiting structure is provided between two adjacent components 2. In this way, the position of the outermost edge of the component can be limited by the limiting structure, and adjacent components can also limit each other, which is conducive to ensuring the micro spacing between components while reducing the impact of the movement of the component on the performance of the semiconductor device.
[0064] It should be noted that Figure 5-Figure 7 Only several preferred implementations of the limiting structure when the semiconductor device includes multiple components are shown. According to the above explanation, when the semiconductor device includes multiple components, a limiting structure adjacent to at least one side of at least one of the components can be set, and the remaining implementations are not described one by one here. For example, when the semiconductor device includes multiple components, the multiple components can be grouped according to the positions where the components need to be set, and different groups of components are limited by different limiting structures.
[0065] It should also be noted that Figure 5-Figure 7 The sizes and position layouts of the multiple components are for illustration only and are not intended to be limiting. Those skilled in the art may design them based on actual products.
[0066] In summary, the semiconductor device provided by the embodiment of the present invention manufactures a limiting structure on the packaging substrate so that the limiting structure is fixed on the packaging substrate, and at least one side surface of at least one component is arranged adjacent to the limiting structure along a direction parallel to the plane where the packaging substrate is located, and the top of the limiting structure is located on the side of the bottom surface of the component away from the packaging substrate along a direction perpendicular to the plane where the packaging substrate is located. The limiting structure can be used to block the movement of the component without designing a positioning fixture, thereby shortening the production cycle and reducing production costs.
[0067] Based on the above embodiments, Figure 8 yes Figure 2 The semiconductor device shown is Figure 2 A side view in the direction of the arrow, such as Figure 8 As shown, optionally, the limiting structure 3 includes a metal wire 31 , and one side surface of the component 2 is disposed adjacent to at least one metal wire 31 .
[0068] Specifically, the limiting structure 3 can be composed of a metal wire 31. By making a metal wire with a certain height on the packaging substrate 1, the metal wire 31 is arranged adjacent to the side of the component 2, and the metal wire 31 can be used to block the movement of the component 2 to ensure the performance of the semiconductor device. In addition, for different semiconductor devices, the layout of the components on the packaging substrate is diverse, so that the shape of the area that needs to be position-limited may not be a regular shape. The embodiment of the present invention uses a metal wire as a limiting structure, which is convenient for adaptively adjusting the manufacturing parameters of the metal wire according to actual conditions (such as the interval between adjacent metal wires, the arc span of the arc-shaped metal wire described below, etc.), and using the metal wire to more flexibly limit the position of areas of different shapes; moreover, using a metal wire as a limiting structure is conducive to the limiting structure being closer to the edge of the area to be position-limited, so that the limiting structure and the components are better fitted, and the limiting accuracy is improved.
[0069] Exemplarily, the metal wire can be made by wire bonding equipment, and the wire bonding equipment can be, for example, a ball bonding equipment or a wedge bonding equipment. In addition, the metal wire includes but is not limited to gold wire, copper wire, silver wire, aluminum wire and alloy wire, and the embodiment of the present invention does not specifically limit the material of the metal wire. In addition, to ensure the blocking effect of the metal wire 31, the diameter of the optional metal wire is greater than 15 μm.
[0070] It should be noted that Figure 8 Only one side of the component 2 is adjacent to three metal wires 31 as an example. In other embodiments, the side of the component 2 may be adjacent to a smaller number or a larger number of metal wires 31. The number of metal wires on the side of the component in the embodiment of the present invention is not specifically limited. It is understandable that by appropriately increasing the number of metal wires on the side of the component, the barrier strength of the metal wires to the component can be improved.
[0071] It should also be noted that in the embodiment of the present invention, there is no electrical connection between the metal wires serving as the limiting structures and the circuits / components of the semiconductor device, and they only serve to limit the position.
[0072] Continue to see Figure 8 Optionally, the projection shape of the metal wire 31 on the plane where the side of the component 2 is located is an arc, and the two ends of the metal wire 31 are respectively fixed on the packaging substrate 1. In this embodiment, by fixing the two ends of the metal wire 31 on the packaging substrate 1, the metal wire 31 can be more firmly fixed on the packaging substrate 1, and the projection area of the area surrounded by the metal wire 31 on the side of the component 2 can be increased, which can provide better blocking strength when the component moves.
[0073] Furthermore, if Figure 8 As shown, in one embodiment, when one side of the component 2 is disposed adjacent to a plurality of metal wires 31, the plurality of metal wires 31 may be disposed at intervals. Fig. 9 yes Figure 2 The semiconductor device shown is Figure 2 Another side view in the direction of the arrow, such as Fig. 9 As shown, in other embodiments, when one side of the component 2 is disposed adjacent to a plurality of metal wires 31, the ends of the plurality of metal wires 31 may be sequentially connected. By sequentially connecting the ends of the plurality of metal wires 31, the blocking strength of the component 2 can be further improved when the component 2 moves.
[0074] It should be noted that Figure 8 and Fig. 9 The arc-shaped metal wire 31 is used as an example for illustration only, and this configuration is not exclusive. Fig.10 yes Figure 2 The semiconductor device shown is Figure 2 Another side view in the direction of the arrow, such as Fig.10 As shown, in other embodiments, one end of the optional metal wire 31 is fixed on the package substrate 1, and the other end is away from the package substrate 1, approximately in a straight line, which can also provide a certain blocking strength to prevent the movement of components. Exemplarily, the blocking strength of components can be improved by increasing the number and diameter of the metal wires 31.
[0075] Fig.11 is a comparison diagram of the semiconductor device provided by the embodiment of the present invention before and after sintering, such as Fig.11 As shown, optionally, along a direction perpendicular to the plane where the package substrate 1 is located, a height Y of the limiting structure 3 is greater than a first thickness D1 of the solder 4 ; wherein the first thickness D1 is an initial thickness of the solder 4 before sintering.
[0076] Specifically, Fig.11 In the figure, the figure on the left side of the arrow shows the state of the semiconductor device before sintering, and the figure on the right side of the arrow (with Figure 8 The same) shows the state of the semiconductor device after sintering. Fig.11 It can be seen that after sintering, the thickness of the solder 4 in the direction perpendicular to the plane where the package substrate 1 is located decreases slightly, specifically from the first thickness D1 to the second thickness D2, while the size of the solder 4 in the direction parallel to the plane where the package substrate 1 is located increases slightly. According to the above description, components may move during the transfer process and sintering process of the packaging stage. The embodiment of the present invention sets the height Y of the limiting structure 3 to be greater than the initial thickness of the solder 4 before sintering (i.e., the first thickness D1), so as to ensure that before the transfer process and the sintering process, the limiting structure 3 and the component 2 overlap in the direction parallel to the plane where the package substrate is located, so that the limiting structure can be used to prevent the movement of the component during the transfer process and the sintering process, thereby ensuring the performance of the semiconductor device.
[0077] Fig.12 yes Figure 2 The semiconductor device shown is Figure 2 Another side view in the direction of the arrow, such as Fig.12 As shown, optionally, the orthographic projection of the top P of the limiting structure 3 on the side of the component 2 is located in the first area Q on the side of the component 2; along the direction perpendicular to the plane where the package substrate 1 is located, the first area Q includes a first edge b and a second edge c, and the first edge b is located on the side of the second edge c close to the package substrate 1; the distance between the first edge b and the bottom surface F1 of the component is U, the distance between the second edge c and the bottom surface F1 of the component is V, and the thickness of the component 2 is H, wherein: With such a configuration, the height of the limiting structure 3 can be adaptively adjusted according to the thickness of the component 2. When the thickness of the component is large, the height of the limiting structure can be appropriately increased. When the thickness of the component is small, the thickness of the limiting structure can be appropriately reduced. At the same time, the accuracy and reliability of the metal wire as a limiting structure can be improved.
[0078] Specifically, in this embodiment, by setting the orthographic projection of the top of the limiting structure 3 on the side of the component 2 to be located in the first area Q on the side of the component 2, the top of the limiting structure 3 can be made to contact the middle area of the thickness of the component 2 when the component moves, thereby ensuring the blocking strength of the limiting structure 3 on the component 2 and preventing the limiting structure 3 from being too high or too low to affect the blocking effect of the limiting structure 3 on the component 2.
[0079] Reference Fig.11It should be noted that although the thickness of the solder 4 after sintering is less than the thickness before sintering, so that the height of the component 2 relative to the upper surface of the packaging substrate 1 after sintering is lower than that before sintering, the thickness of the solder 4 is much smaller than the thickness of the component 2. Therefore, in this embodiment, by setting the top P of the limiting structure 3 on the side of the component 2, the positive projection is located in the middle area (i.e., the first area Q) of the side of the component, which can ensure that before the sintering process, the limiting structure 3 and the component 2 also overlap in the direction parallel to the plane of the packaging substrate. When the component 2 moves, it can be blocked by the limiting structure 3 to prevent the component from deviating from a specific position and ensure the performance of the semiconductor device.
[0080] Of course, in specific implementation, the height of the limiting structure can also be determined based on the thickness of the component before sintering and the thickness of the solder, so that the orthographic projection of its top on the side of the component is located in the first area of the component before sintering, which can reduce the design difficulty.
[0081] Based on the same inventive concept, an embodiment of the present invention further provides a packaging method for a semiconductor device. Fig.13 is a schematic diagram of a process of packaging a semiconductor device provided by an embodiment of the present invention, such as Fig.13 As shown, the packaging method may include the following steps:
[0082] S110, providing a packaging substrate.
[0083] Among them, the packaging substrate can be a lead frame, a carrier or a tube shell. A suitable packaging substrate can be selected according to the specific product to carry components. The embodiment of the present invention does not limit the material, type, etc. of the packaging substrate.
[0084] S120, forming a limiting structure on the packaging substrate; the limiting structure is fixed on the packaging substrate.
[0085] As described above, the limiting structure is used to limit the position of components and block the movement of components. Therefore, the setting position of the limiting structure can be determined according to the position of the components to be limited by the limiting structure and the movement direction to be limited. Technical personnel in this field can refer to the description of the above-mentioned semiconductor device related embodiments and design them by themselves in combination with actual products.
[0086] S130, placing at least one component on the packaging substrate.
[0087] Specifically, each component can be placed at a corresponding position on the package substrate according to the pre-designed position of the components, and the embodiment of the present invention does not specifically limit the type, quantity, and location of the components in the semiconductor device. For example, when a design is adopted in which a limiting structure completely surrounds at least one component, the component can be placed in the area surrounded by the corresponding limiting structure.
[0088] S140, fixing the components on the packaging substrate; wherein the limiting structure and the components are fixed on the same side of the packaging substrate; along a direction parallel to the plane where the packaging substrate is located, at least one side surface of at least one component is arranged adjacent to the limiting structure; along a direction perpendicular to the plane where the packaging substrate is located, the top end of the limiting structure is located on the side of the bottom surface of the component away from the packaging substrate.
[0089] Optionally, the components may be fixed to the package substrate by solder.
[0090] According to the above explanation, the embodiment of the present invention manufactures a limiting structure on the packaging substrate so that the limiting structure is fixed on the packaging substrate, and at least one side of at least one component is arranged adjacent to the limiting structure along a direction parallel to the plane where the packaging substrate is located, and the top of the limiting structure is located on the side of the bottom surface of the component away from the packaging substrate along a direction perpendicular to the plane where the packaging substrate is located. The limiting structure can be used to block the movement of the component without designing a positioning fixture, thereby shortening the production cycle and reducing production costs. In addition, this embodiment manufactures a limiting structure on the packaging substrate first, and then places the components on the packaging substrate. The placement area of the component can be limited by the limiting structure, and the manufacture of the limiting structure can be free from interference from the components, thereby improving the manufacturing efficiency. At the same time, it can also avoid the position movement of the component when manufacturing the limiting structure, thereby ensuring the performance of the semiconductor device.
[0091] Fig.14 FIG. 1 is a flow chart of another semiconductor device packaging method provided by an embodiment of the present invention. The semiconductor device packaging method is further refined on the basis of the above embodiment. Fig.14 As shown, in this embodiment, the packaging method may include the following steps:
[0092] S210, providing a packaging substrate.
[0093] S220, forming at least one metal wire on the packaging substrate using a wire bonding device.
[0094] Specifically, in this embodiment, the limiting structure is composed of metal wires. The metal wires have the same characteristics as the limiting structure, and the metal wires can be used to block the movement of components.
[0095] Exemplarily, a wire bonding device can be used to form metal wires on a packaging substrate; the metal wires include but are not limited to gold wires, copper wires, silver wires, aluminum wires, and alloy wires, and the embodiment of the present invention does not specifically limit the material of the metal wires; in addition, the diameter of the metal wires can be greater than 15 μm to ensure a blocking effect on components.
[0096] As explained above, optionally, one side of the component is arranged adjacent to at least one metal line.
[0097] Optionally, the projection shape of the metal wire on the plane where the side surface of the component is located is an arc, and two ends of the metal wire are respectively fixed on the packaging substrate.
[0098] Optionally, one side surface of the component is arranged adjacent to a plurality of metal wires; the plurality of metal wires are arranged at intervals, or the ends of the plurality of metal wires are connected in sequence.
[0099] Optionally, along a direction perpendicular to the plane where the packaging substrate is located, the height of the limiting structure / metal wire is greater than a first thickness of the solder; wherein the first thickness is an initial thickness of the solder before sintering.
[0100] Optionally, the orthographic projection of the top of the limiting structure / metal wire on the side surface of the component is located in a first region on the side surface of the component; along a direction perpendicular to the plane where the package substrate is located, the first region includes a first edge and a second edge, and the first edge is located on a side of the second edge close to the package substrate; the distance between the first edge and the bottom surface of the component is U, the distance between the second edge and the bottom surface of the component is V, and the thickness of the component is H, wherein:
[0101] Optionally, the semiconductor device includes a plurality of components; the limiting structure / metal wire is located at the outermost edges of the plurality of components, and no limiting structure / metal wire is arranged between two adjacent components.
[0102] S230, placing solder on the package substrate.
[0103] Illustratively, the solder may be a solder wire, a solder paste, or a solder sheet (eg, a preformed solder sheet). The embodiment of the present invention does not limit the form of the solder.
[0104] S240, placing at least one component on the packaging substrate; the component is located on a side of the solder away from the packaging substrate.
[0105] S250, transferring the package substrate carrying the solder and components to a sintering device for sintering to fix the components on the package substrate.
[0106] After the components are fixed on the packaging substrate, the processes of wire bonding between pads and airtight sealing can be continued to complete the packaging and obtain the semiconductor device.
[0107] It should also be noted that after the sintering process is completed and the components are fixed on the packaging substrate, the metal wire (limiting structure) may be removed or not, and the embodiment of the present invention does not limit this. In view of the fact that there is no electrical connection between the metal wire and the circuit / component, the embodiment of the present invention only takes the implementation method of retaining the metal wire as an example to illustrate, so as to avoid adding too many packaging steps, improve packaging efficiency, and avoid the risk of damaging components in the process of removing the metal wire, thereby ensuring product quality.
[0108] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims
1. A semiconductor device, characterized in that: include: Package substrate; At least one component is fixed on the packaging substrate; A limiting structure is fixed on the same side of the packaging substrate as the component; along a direction parallel to the plane where the packaging substrate is located, at least one side surface of at least one of the components is arranged adjacent to the limiting structure; along a direction perpendicular to the plane where the packaging substrate is located, the top end of the limiting structure is located on the side of the bottom surface of the component away from the packaging substrate.
2. The semiconductor device according to claim 1, wherein: The limiting structure includes metal wires; a side surface of the component is arranged adjacent to at least one of the metal wires.
3. The semiconductor device according to claim 2, characterized in that The projection shape of the metal wire on the plane where the side surface of the component is located is an arc shape, and two ends of the metal wire are respectively fixed on the packaging substrate.
4. The semiconductor device according to claim 3, characterized in that One side surface of the component is disposed adjacent to the plurality of metal wires; The plurality of metal wires are arranged at intervals, or the ends of the plurality of metal wires are connected in sequence.
5. The semiconductor device according to claim 1 or 2, characterized in that: The components are connected to the packaging substrate via solder; Along a direction perpendicular to the plane where the packaging substrate is located, the height of the limiting structure is greater than the first thickness of the solder; The first thickness is the initial thickness of the solder before sintering.
6. The semiconductor device according to claim 1 or 2, characterized in that: The orthographic projection of the top end of the limiting structure on the side surface of the component is located in the first area of the side surface of the component; Along a direction perpendicular to the plane where the package substrate is located, the first region includes a first edge and a second edge, the first edge is located on a side of the second edge close to the package substrate; the distance between the first edge and the bottom surface of the component is U, the distance between the second edge and the bottom surface of the component is V, and the thickness of the component is H, wherein:
7. The semiconductor device according to claim 1 or 2, characterized in that: The semiconductor device comprises a plurality of the components; The limiting structure is located at the outermost edge of the plurality of components, and the limiting structure is not arranged between two adjacent components.
8. A method for packaging a semiconductor device, characterized in that: include: Providing a packaging substrate; A limiting structure is formed on the packaging substrate; the limiting structure is fixed on the packaging substrate; Placing at least one component on the packaging substrate; Fixing the components on the packaging substrate; In which, the limiting structure and the component are fixed on the same side of the packaging substrate; along the direction parallel to the plane where the packaging substrate is located, at least one side surface of at least one of the components is arranged adjacent to the limiting structure; along the direction perpendicular to the plane where the packaging substrate is located, the top end of the limiting structure is located on the side of the bottom surface of the component away from the packaging substrate.
9. The packaging method according to claim 8, characterized in that: Forming a limiting structure on the packaging substrate includes: At least one metal wire is formed on the packaging substrate using a wire bonding device.
10. The packaging method according to claim 8, characterized in that: Before placing at least one component on the packaging substrate, the packaging method further includes: Solder is placed on the packaging substrate; the components are located on a side of the solder away from the packaging substrate; Fixing the components on the packaging substrate includes: The packaging substrate carrying the solder and the components is transferred to a sintering device for sintering to fix the components on the packaging substrate.