Power module

Abstract

The invention relates to a power module, which comprises a substrate assembly and a chip set, the substrate assembly comprises a first substrate and a second substrate, the first substrate and the second substrate are arranged at an interval along the height direction, the first substrate and the second substrate are connected with each other through a first electrical connecting piece, the chip set is arranged between the first substrate and the second substrate, and the first electrical connecting piece is arranged between the first substrate and the second substrate. The chipset comprises at least two chip monomers and at least two second electrical connecting pieces, a first solder layer is arranged between each chip monomer and the first substrate, and a first solder layer is arranged between each second electrical connecting piece and the second substrate; according to the power module, the chip monomer can be connected with the first substrate and the second substrate for double-sided heat dissipation, the heat dissipation capability is improved, the first direct current terminal and the second direct current terminal which are connected with the first substrate and the second substrate respectively can be laminated along the height direction, the circulating current area is effectively reduced, and the heat dissipation efficiency is improved. And meanwhile, parasitic parameters are effectively controlled by utilizing a mutual inductance cancellation principle, so that the reliability of the module is improved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a power module. Background Art

[0002] Power modules can be used in household inverter systems, electric vehicles, and industrial control systems to convert electrical energy or control circuits. Driven by the development of renewable energy technology and efficient power conversion applications, the demand for high-efficiency, high-power-density power modules is growing.

[0003] Traditional power modules have large parasitic parameters, which make it difficult to match the high-speed switching characteristics of devices. Traditional power modules are also difficult to meet the requirements of high density and high heat dissipation capabilities at the same time. The performance and reliability will drop sharply in high-temperature operating environments, thereby greatly reducing the life of the system. Summary of the invention

[0004] Based on this, it is necessary to provide a power module to address the above-mentioned problem of not being able to simultaneously ensure the heat dissipation effect and the control effect on parasitic parameters.

[0005] A power module, comprising:

[0006] A substrate assembly, comprising a first substrate and a second substrate, wherein the first substrate and the second substrate are spaced apart in a height direction and connected to each other via a first electrical connector;

[0007] A chipset is arranged between the first substrate and the second substrate, and the chipset includes at least two chip monomers and at least two second electrical connectors, each of the chip monomers has a first solder layer between the first substrate, each of the second electrical connectors has a first solder layer between the second substrate, and each of the chip monomers has a third solder layer between the second electrical connectors.

[0008] In one embodiment, the chipset is provided in plurality, and the plurality of chipsets are spaced apart along a first direction between the first substrate and the second substrate, and at least two chip monomers are spaced apart along a second direction between the first substrate and the second substrate, and the first direction is perpendicular to the second direction.

[0009] In one embodiment, the orthographic projection area of ​​the chip unit on the first substrate is greater than or equal to the orthographic projection area of ​​the second electrical connector on the first substrate.

[0010] In one embodiment, the orthographic projection area of ​​the first solder layer on the first substrate is less than or equal to the orthographic projection area of ​​the chip unit on the first substrate; and / or, the orthographic projection area of ​​the second solder layer on the first substrate is less than or equal to the orthographic projection area of ​​the second electrical connector on the first substrate; and / or, the orthographic projection area of ​​the third solder layer on the first substrate is less than or equal to the orthographic projection area of ​​the second electrical connector on the first substrate.

[0011] In one embodiment, the material of the first electrical connector is consistent with the material of the second electrical connector.

[0012] In one embodiment, a cross-sectional area of ​​the first electrical connector perpendicular to the height direction is consistent with a cross-sectional area of ​​the second electrical connector perpendicular to the height direction.

[0013] In one embodiment, the power module further includes a first DC terminal and a second DC terminal, the first DC terminal and the second DC terminal are spaced apart along the height direction, the first DC terminal is electrically connected to the first substrate, and the second DC terminal is electrically connected to the second substrate.

[0014] In one embodiment, the power module further includes an AC terminal, and the AC terminal is disposed on the first substrate or the second substrate.

[0015] In one embodiment, the first substrate is a copper-clad ceramic substrate; and / or the second substrate is a copper-clad ceramic substrate.

[0016] In one embodiment, the power module further includes a first heat sink and a second heat sink, wherein the first heat sink is disposed on a side of the first substrate facing away from the chip, and the second heat sink is disposed on a side of the second substrate facing away from the chip.

[0017] The above-mentioned power module can connect the two ends of the chip monomer along the height direction to the first substrate and the second substrate respectively, so that the chip monomer can perform double-sided heat dissipation and improve the heat dissipation capacity. In addition, the structure can connect the first DC terminal and the second DC terminal to the first substrate and the second substrate respectively, and the connected first DC terminal and the second DC terminal are stacked in the height direction. The stacked first DC terminal and the second DC terminal can effectively reduce the circulation area. At the same time, by utilizing the principle of mutual inductance cancellation, the parasitic parameters can be effectively controlled to improve the module reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 This is a schematic diagram of the structure of a power module according to some embodiments of the present application.

[0019] Figure 2 This is a schematic structural diagram of the power module of some embodiments of the present application from another perspective.

[0020] Figure 3 This is a schematic structural diagram of the power module of some embodiments of the present application from another perspective.

[0021] Reference numerals:

[0022] 1. substrate assembly; 11. first substrate; 12. second substrate; 13. first electrical connector;

[0023] 2. Chip set; 21. Chip monomer; 22. Second electrical connector; 23. First solder layer; 24. Second solder layer; 25. Third solder layer;

[0024] 3. The first DC terminal;

[0025] 4. Second DC terminal;

[0026] 5. AC terminal. DETAILED DESCRIPTION

[0027] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are described in detail below in conjunction with the accompanying drawings. In the following description, many specific details are set forth to facilitate a full understanding of the present application. However, the present application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of the present application, so the present application is not limited by the specific embodiments disclosed below.

[0028] In the description of the present application, it should be understood that if the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. appear, the orientation or position relationship indicated by these terms is based on the orientation or position relationship shown in the accompanying drawings, which is only for the convenience of describing the present application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application.

[0029] In addition, if the terms "first" or "second" appear, these terms are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of this application, if the term "plurality" appears, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0030] In this application, unless otherwise clearly specified and limited, if the terms "installed", "connected", "connected", "fixed" and the like appear, these terms should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integrated connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to the specific circumstances.

[0031] In the present application, unless otherwise clearly specified and limited, if there is a description that a first feature is "above" or "below" a second feature, etc., or similar descriptions appear, it may mean that the first and second features are in direct contact, or that the first and second features are in indirect contact through an intermediate medium. Moreover, the first feature being "above", "above" and "above" the second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. The first feature being "below", "below" and "below" the second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0032] It should be noted that if an element is referred to as being "fixed to" or "disposed on" another element, it may be directly on the other element or there may be a central element. If an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. If any, the terms "vertical", "horizontal", "upper", "lower", "left", "right" and similar expressions used in this application are for illustrative purposes only and do not represent the only implementation method.

[0033] Driven by the development of electric vehicles, renewable energy technologies and efficient power conversion applications, the demand for high-efficiency, high-power density power modules is growing. Silicon carbide devices have excellent electrothermal performance, which can significantly improve efficiency and reduce energy consumption, making power conversion devices smaller, lighter and more efficient. Therefore, silicon carbide devices are widely used in inverters and frequency converters in new generation power conversion devices such as electric vehicles, renewable energy generation, power grid transmission systems and aerospace.

[0034] With the rapid development of new energy power generation, electric vehicles and other electrified transportation fields, the requirements for the use of power modules are gradually increasing. However, traditional silicon carbide power modules have large parasitic parameters, such as parasitic inductance. Since the module parasitic parameters are difficult to match the high-speed switching characteristics of silicon carbide devices, they may cause voltage overshoot, current imbalance and increased losses, limiting their performance in high-frequency and high-power density applications. In addition, the switching speed of traditional silicon carbide device packaging structures is limited by large parasitic inductance. For traditional packaging structures, the internal parasitic inductance is mainly caused by module terminals, direct copper plating and bonding wires, and the power modules currently on the market do not have low stray inductance while taking into account heat dissipation.

[0035] Therefore, there is an urgent need for a silicon carbide power module that can effectively control parasitic parameters, improve heat dissipation capability and module reliability, and match the excellent performance, low inductance, low thermal resistance and high reliability of silicon carbide devices.

[0036] See also Figure 1 and Figure 2 , an embodiment of the present application provides a power module, including a substrate assembly 1 and a chipset 2. Among them, the chipset 2 is used to control and convert electric energy, and is the core component for performing electric energy conversion tasks. Its performance directly affects the efficiency and reliability of the entire power module. The substrate assembly 1 is used to provide necessary mechanical support for the power module to ensure the structural stability of the module; at the same time, it provides a stable electrical connection platform for the chipset 2, so that the chipset 2 can be fixed on the substrate by welding or other means, and the chipset 2 can conduct the generated heat to the external environment after auxiliary fixation. In addition, the substrate can integrate heat dissipation design, such as heat sinks, microchannels or liquid cooling systems, to improve heat dissipation efficiency. Certain parts of the substrate (such as the ceramic layer) provide electrical insulation function to ensure the internal electrical safety of the module.

[0037] In the specific configuration, the substrate assembly 1 includes a first substrate 11 and a second substrate 12, the first substrate 11 and the second substrate 12 are spaced apart in the height direction, and the first substrate 11 and the second substrate 12 are connected to each other through a first electrical connector 13. Specifically, the first electrical connector 13 has a first side surface and a second side surface that are disposed in opposition to each other in the height direction, the first side surface of the first electrical connector 13 is welded to the first substrate 11, and the second side surface of the first electrical connector 13 is welded to the second substrate 12. More specifically, there is a solder layer between the first side surface and the first substrate 11, and there is a solder layer between the second side surface and the second substrate 12, and the orthographic projection area of ​​the solder layer on the first substrate 11 is consistent with the orthographic projection area of ​​the first electrical connector 13 on the first substrate 11, so as to ensure the connection effect between the first electrical connector 13 and the first substrate 11 and the second substrate 12.

[0038] The chipset 2 is disposed between the first substrate 11 and the second substrate 12, and includes at least two chip monomers 21 and at least two second electrical connectors 22. A first solder layer 23 is provided between each chip monomer 21 and the first substrate 11, so that the chip monomer 21 can be connected to the first substrate 11 by welding. A first solder layer 23 is provided between each second electrical connector 22 and the second substrate 12, so that the second electrical connector 22 can be connected to the second substrate 12 by welding. A third solder layer 25 is provided between each chip monomer 21 and the second electrical connector 22, so that the chip monomer 21 and the second electrical connector 22 can be connected by welding.

[0039] The above structure enables each two chip monomers 21 to form a corresponding commutation path between the first substrate 11 and the second substrate 12 through the corresponding two second electrical connectors 22 and one first electrical connector 13, so that the chip monomers 21 can perform commutation in the vertical direction between the first substrate 11 and the second substrate 12, effectively shortening the commutation path and reducing the self-inductance of the power circuit in the horizontal direction.

[0040] Specifically, in the embodiment of the present application, the chipset 2 includes two chip monomers 21 and two second electrical connectors 22. The chip monomer 21 has a first surface and a second surface that are arranged in a direction opposite to each other in height. The first surfaces of the two chip monomers 21 are both welded to the first substrate 11, and the first surfaces of the two chip monomers 21 are respectively welded to the two second electrical connectors 22, and the surfaces of the two second electrical connectors 22 that are away from the first substrate 11 are both welded to the second substrate 12. The first electrical connector 13 is located between the two chip monomers 21, so that the two chip monomers 21 form a commutation path between the first substrate 11 and the second substrate 12 through the corresponding two second electrical connectors 22 and the first electrical connector 13.

[0041] In summary, the power module of the present application can connect the two ends of the chip monomer 21 along the height direction to the first substrate 11 and the second substrate 12 respectively, so that the chip monomer 21 can perform double-sided heat dissipation and improve the heat dissipation capacity, and the structure can connect the first DC terminal 3 and the second DC terminal 4 to the first substrate 11 and the second substrate 12 respectively, and the connected first DC terminal 3 and the second DC terminal 4 are stacked along the height direction. The stacked first DC terminal 3 and the second DC terminal 4 can effectively reduce the circulation area, and at the same time, by utilizing the principle of mutual inductance cancellation, the parasitic parameters can be effectively controlled to improve the module reliability.

[0042] That is, the power module applied for can effectively solve the current packaging technology method, which has a long heat dissipation path, unsatisfactory thermal resistance, complex assembly and process, low reliability, and difficulty in exerting the performance of silicon carbide devices. The power module applied for can adopt the method of stacked terminals to obtain low parasitic inductance, and reduce the parasitic inductance of the double-sided water-cooled module by using the mutual inductance principle of the stacked terminals. The double-sided heat dissipation method can achieve better heat dissipation effect, so that the power module has both low inductance and good heat dissipation performance, so that it has higher reliability in practical applications.

[0043] See also Figure 1-Figure 3 In one embodiment, the chipset 2 is provided with a plurality of chipsets 2, the plurality of chipsets 2 are arranged between the first substrate 11 and the second substrate 12 along a first direction, and at least two chip monomers 21 are arranged between the first substrate 11 and the second substrate 12 along a second direction, and the first direction is perpendicular to the second direction. Thus, the present application can be a half-bridge power conversion module composed of an upper bridge arm and a lower bridge arm, each bridge arm having a plurality of parallel chip monomers 21.

[0044] Specifically, two chip monomers 21 in the chipset 2 form a half-bridge, and the two chip monomers 21 in the same half-bridge have opposite directions in the commutation paths between the first substrate 11 and the second substrate 12, thereby achieving mutual inductance cancellation in the vertical direction, reducing the overall parasitic inductance of the silicon carbide half-bridge power module, and being able to effectively control parasitic parameters. Each half-bridge of the chipset 2 forms a parallel branch, and the two adjacent half-bridges are symmetrical about the horizontal axis or the vertical axis of the power module in terms of spatial layout, so that the commutation paths of the multi-chip parallel connection are far apart from each other, ensuring that the commutation paths of each half-bridge are relatively independent, thereby reducing the mutual inductance between the commutation paths of each parallel branch.

[0045] More specifically, in the embodiment of the present application, three chipsets 2 are provided, and the three chipsets 2 are arranged between the first substrate 11 and the second substrate 12 along the first direction. Each chipset 2 has two chip monomers 21, and the two chip monomers 21 are arranged between the first substrate 11 and the second substrate 12 along the second direction, and the first direction is perpendicular to the second direction. The power module of the present application is a half-bridge module composed of an upper bridge arm and a lower bridge arm, and each bridge arm has three parallel chip monomers 21.

[0046] See also Figure 1 and Figure 2 In one embodiment, the orthographic projection area of ​​the chip monomer 21 on the first substrate 11 is greater than or equal to the orthographic projection area of ​​the second electrical connector 22 on the first substrate 11, so as to ensure the connection effect of the second electrical connector 22 to the chip monomer 21. Specifically, the orthographic projection area of ​​the chip monomer 21 on the first substrate 11 is equal to the orthographic projection area of ​​the second electrical connector 22 on the first substrate 11.

[0047] In one embodiment, the orthographic projection area of ​​the first solder layer 23 on the first substrate 11 is less than or equal to the orthographic projection area of ​​the chip monomer 21 on the first substrate 11; and / or, the orthographic projection area of ​​the second solder layer 24 on the first substrate 11 is less than or equal to the orthographic projection area of ​​the second electrical connector 22 on the first substrate 11; and / or, the orthographic projection area of ​​the third solder layer 25 on the first substrate 11 is less than or equal to the orthographic projection area of ​​the second electrical connector 22 on the first substrate 11.

[0048] Specifically, to ensure the connection effect, the cross-sectional outer contour of the first solder layer 23 perpendicular to the height direction is consistent with the cross-sectional outer contour of the chip monomer 21 perpendicular to the height direction, and the orthographic projection area of ​​the first solder layer 23 on the first substrate 11 is equal to the orthographic projection area of ​​the chip monomer 21 on the first substrate 11. The cross-sectional outer contour of the second solder layer 24 perpendicular to the height direction is consistent with the cross-sectional outer contour of the second electrical connector 22 perpendicular to the height direction, and the orthographic projection area of ​​the second solder layer 24 on the first substrate 11 is equal to the orthographic projection area of ​​the second electrical connector 22 on the first substrate 11. The cross-sectional outer contour of the third solder layer 25 perpendicular to the height direction is consistent with the cross-sectional outer contour of the second electrical connector 22 perpendicular to the height direction, and the orthographic projection area of ​​the third solder layer 25 on the first substrate 11 is equal to the orthographic projection area of ​​the second electrical connector 22 on the first substrate 11.

[0049] In one embodiment, the material of the first electrical connector 13 is consistent with the material of the second electrical connector 22 to save production costs. Specifically, the first electrical connector 13 and the second electrical connector 22 are both made of copper gaskets to achieve electrical connection effects.

[0050] See also Figure 1 and Figure 3 In one embodiment, the cross-sectional area of ​​the first electrical connector 13 perpendicular to the height direction is consistent with the cross-sectional area of ​​the second electrical connector 22 perpendicular to the height direction, so that the first electrical connector 13 and the second electrical connector 22 can be produced in a centralized manner to save production costs. Specifically, the cross-sectional outer contour of the first electrical connector 13 perpendicular to the height direction is consistent with the cross-sectional outer contour of the second electrical connector 22 perpendicular to the height direction, and in order to ensure the connection effect of the first electrical connector 13 on the first substrate 11 and the second substrate 12, the length of the first electrical connector 13 along the height direction is greater than the length of the second electrical connector 22 along the height direction.

[0051] In one embodiment, the power module further includes a first DC terminal 3 and a second DC terminal 4, the first DC terminal 3 and the second DC terminal 4 are arranged at intervals in the height direction, and the first DC terminal 3 is electrically connected to the first substrate 11, and the second DC terminal 4 is electrically connected to the second substrate 12. Specifically, the first DC terminal 3 is a positive DC terminal, which can be connected to a power line. The second DC terminal 4 is a negative DC terminal, which can be connected to a load or an output line. The first DC terminal 3 and the second DC terminal 4 are arranged in parallel and at intervals in the height direction, and the first DC terminal 3 is electrically connected to the first substrate 11 to connect the first substrate 11 to the power line. The second DC terminal 4 is electrically connected to the second substrate 12 to connect the second substrate 12 to the load or the output line. By stacking the first DC terminal 3 and the second DC terminal 4, the mutual inductance principle of the stacked terminals can be used to reduce the parasitic inductance of the double-sided water cooling module, thereby enabling the power module of the application to obtain low parasitic inductance.

[0052] In one embodiment, the power module further includes an AC terminal 5, and the AC terminal 5 is disposed on the first substrate 11 or the second substrate 12. Specifically, in one embodiment, the AC terminal 5 is disposed on the first substrate 11. In another embodiment, the AC terminal 5 is disposed on the second substrate 12.

[0053] In one embodiment, the first substrate 11 is a copper-clad ceramic substrate; and / or the second substrate 12 is a copper-clad ceramic substrate. Specifically, the first substrate 11 and the second substrate 12 are both copper-clad ceramic substrates, and the copper-clad ceramic substrates include a first copper layer, a ceramic layer, and a second copper layer arranged in sequence along the height direction.

[0054] In one embodiment, the power module further includes a first heat sink and a second heat sink, wherein the first heat sink is disposed on the side of the first substrate 11 away from the chip, and the second heat sink is disposed on the side of the second substrate 12 away from the chip. The first heat sink and the second heat sink assist the first substrate 11 and the second substrate 12 in cooling the chip, thereby improving the heat dissipation effect.

[0055] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0056] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.

Claims

1. A power module, characterized in that: include: A substrate assembly, comprising a first substrate and a second substrate, wherein the first substrate and the second substrate are spaced apart in a height direction and connected to each other via a first electrical connector; A chipset is arranged between the first substrate and the second substrate, and the chipset includes at least two chip monomers and at least two second electrical connectors, each of the chip monomers has a first solder layer between the first substrate, each of the second electrical connectors has a first solder layer between the second substrate, and each of the chip monomers has a third solder layer between the second electrical connectors.

2. The power module according to claim 1, characterized in that: There are multiple chipsets, and the multiple chipsets are arranged between the first substrate and the second substrate at intervals along a first direction. At least two chip monomers are arranged between the first substrate and the second substrate at intervals along a second direction. The first direction is perpendicular to the second direction.

3. The power module according to claim 1, characterized in that: The orthographic projection area of ​​the chip unit on the first substrate is greater than or equal to the orthographic projection area of ​​the second electrical connector on the first substrate.

4. The power module according to claim 3, characterized in that: The orthographic projection area of ​​the first solder layer on the first substrate is smaller than or equal to the orthographic projection area of ​​the chip unit on the first substrate; and / or, an orthographic projection area of ​​the second solder layer on the first substrate is less than or equal to an orthographic projection area of ​​the second electrical connector on the first substrate; And / or, an orthographic projection area of ​​the third solder layer on the first substrate is smaller than or equal to an orthographic projection area of ​​the second electrical connector on the first substrate.

5. The power module according to claim 1, characterized in that: The material of the first electrical connector is consistent with the material of the second electrical connector.

6. The power module according to claim 1, characterized in that: A cross-sectional area of ​​the first electrical connector perpendicular to the height direction is consistent with a cross-sectional area of ​​the second electrical connector perpendicular to the height direction.

7. The power module according to claim 1, characterized in that: The power module further includes a first DC terminal and a second DC terminal, wherein the first DC terminal and the second DC terminal are spaced apart along the height direction, and the first DC terminal is electrically connected to the first substrate, and the second DC terminal is electrically connected to the second substrate.

8. The power module according to claim 1, characterized in that: The power module further includes an AC terminal, and the AC terminal is disposed on the first substrate or the second substrate.

9. The power module according to claim 1, characterized in that: The first substrate is a copper-clad ceramic substrate; and / or the second substrate is a copper-clad ceramic substrate.

10. The power module according to claim 1, characterized in that: The power module further includes a first heat dissipation plate and a second heat dissipation plate. The first heat dissipation plate is disposed on a side of the first substrate facing away from the chip, and the second heat dissipation plate is disposed on a side of the second substrate facing away from the chip.

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