Power supply inlet end protection circuit and method

Abstract

The invention provides a power supply inlet end protection circuit and method. The circuit comprises an anti-reverse connection circuit electrically connected with a power supply; one end of the current-limiting and voltage-limiting circuit is electrically connected with the reverse connection prevention circuit, and the other end of the current-limiting and voltage-limiting circuit is electrically connected with the power utilization unit; when the anti-reverse-connection circuit receives a forward voltage signal of a power supply, the anti-reverse-connection circuit is in a conducting state, and the reverse-connection circuit generates a conducting signal; when the anti-reverse-connection circuit receives a reverse voltage signal of the power supply, the anti-reverse-connection circuit is in a disconnected state; the current-limiting and voltage-limiting circuit receives a conduction signal, and when the voltage of the conduction signal is smaller than a preset safety value, the current-limiting and voltage-limiting circuit is in a conduction state; and when the voltage of the conduction signal is greater than a preset safety value, the current-limiting and voltage-limiting circuit is in an off state. According to the scheme of the invention, the reverse connection of the power supply can be prevented from influencing the subsequent circuit through the reverse connection prevention circuit; and over-current and over-voltage protection can be performed on a follow-up circuit through the current-limiting and voltage-limiting circuit, so that the safety of the circuit is ensured.

Description

Technical Field

[0001] The present invention relates to the technical field of power supply protection, and in particular to a power supply inlet protection circuit and method. Background Art

[0002] The stability of power input is of paramount importance in any circuit system. The first condition for any electronic system to operate normally is a good power input.

[0003] However, the current power input circuit uses a diode to prevent reverse connection. This reverse connection protection method has a voltage drop, resulting in power waste. The current power input circuit uses a resettable fuse for current limiting protection. When the current exceeds the limit of the resettable fuse, a physical disconnection occurs and cannot be restored. Normal power supply can only be restored by replacing the resettable fuse, which is inconvenient to use. At the same time, the current power input circuit does not have voltage limiting protection. When the input voltage exceeds the safety value of the power unit, it is easy to cause abnormalities in the power unit or even damage the power unit beyond repair. Summary of the invention

[0004] The present invention provides a power supply inlet protection circuit and method, which can prevent the reverse connection of the power supply from affecting the subsequent circuit through an anti-reverse connection circuit; and can provide overcurrent and overvoltage protection for the subsequent circuit through a current limiting and voltage limiting circuit to ensure circuit safety.

[0005] In order to solve the above technical problems, the technical solution of the present invention is as follows:

[0006] A power supply inlet protection circuit, comprising:

[0007] An anti-reverse connection circuit electrically connected to the power supply;

[0008] A current limiting and voltage limiting circuit with a shunting function, one end of the current limiting and voltage limiting circuit is electrically connected to the anti-reverse connection circuit, and the other end of the current limiting and voltage limiting circuit is electrically connected to the power consumption unit;

[0009] When the anti-reverse connection circuit receives a forward voltage signal from the power supply, the anti-reverse connection circuit is in a conducting state and generates a conducting signal; when the anti-reverse connection circuit receives a reverse voltage signal from the power supply, the anti-reverse connection circuit is in a disconnecting state;

[0010] The current limiting and voltage limiting circuit receives the conduction signal. When the voltage of the conduction signal is less than a preset safety value, the current limiting and voltage limiting circuit is in a conduction state; when the voltage of the conduction signal is greater than the preset safety value, the current limiting and voltage limiting circuit is in a disconnection state.

[0011] Optionally, the anti-reverse connection circuit includes:

[0012] a third MOS tube, wherein the gate of the third MOS tube is electrically connected to the positive electrode of the power supply through the first resistor, the source of the third MOS tube is grounded, and the drain of the third MOS tube is electrically connected to the negative electrode of the power supply;

[0013] A second voltage regulator tube, wherein the positive electrode of the second voltage regulator tube is electrically connected to the source electrode of the third MOS tube, and the negative electrode of the second voltage regulator tube is electrically connected to the gate electrode of the third MOS tube.

[0014] Optionally, the current limiting and voltage limiting circuit includes:

[0015] A first MOS transistor, wherein a gate of the first MOS transistor is grounded through a sixth resistor, a source of the first MOS transistor is electrically connected to a positive electrode of the power supply, and a drain of the first MOS transistor is electrically connected to a power supply access terminal of the power-consuming unit;

[0016] a triode, wherein the emitter of the triode is electrically connected to the positive electrode of the power supply, the base of the triode is electrically connected to the positive electrode of the power supply through a fifth resistor and a fourth resistor, the collector of the triode is electrically connected to the gate of the first MOS tube, and a fifth capacitor is electrically connected between the collector and the base of the triode;

[0017] a first voltage regulator tube, wherein a positive electrode of the first voltage regulator tube is electrically connected to a negative electrode of the power supply, and a negative electrode of the first voltage regulator tube is electrically connected to a connection point between the fifth resistor and the fourth resistor;

[0018] a second resistor, the second resistor being electrically connected in parallel with the fourth resistor;

[0019] A third resistor is electrically connected in parallel with the fourth resistor.

[0020] Optionally, the power inlet protection circuit further includes:

[0021] A first filter circuit is electrically connected to the power supply.

[0022] Optionally, the first filtering circuit includes:

[0023] a first capacitor, wherein a positive electrode of the first capacitor is electrically connected to a positive electrode of the power supply, and a negative electrode of the first capacitor is electrically connected to a negative electrode of the power supply;

[0024] A second capacitor, wherein the second capacitor is electrically connected between the positive electrode and the negative electrode of the power supply.

[0025] Optionally, the power inlet protection circuit further includes:

[0026] A second filter circuit is electrically connected to the power consumption unit.

[0027] Optionally, the second filtering circuit includes:

[0028] a third capacitor, wherein a positive electrode of the third capacitor is electrically connected to a power supply access terminal of the power-consuming unit, and a negative electrode of the third capacitor is grounded;

[0029] A fourth capacitor is electrically connected between a power supply input terminal of the power-consuming unit and ground.

[0030] The present invention also provides a power inlet protection method, which is applied to the power inlet protection circuit described above, and the method comprises:

[0031] The reverse connection prevention circuit receives a voltage signal of the power supply;

[0032] The anti-reverse connection circuit generates a first power-on state signal according to the positive and negative directions of the voltage signal;

[0033] The current limiting and voltage limiting circuit receives the first power-on state signal;

[0034] The current and voltage limiting circuit generates a second power-on state signal according to a voltage state of the first power-on state signal.

[0035] Optionally, the anti-reverse connection circuit generates a first power-on state signal according to the positive and negative directions of the voltage signal, including:

[0036] When the voltage signal is a forward voltage, the reverse connection prevention circuit is turned on to generate a first conduction signal;

[0037] When the voltage signal is a reverse voltage, the anti-reverse connection circuit is disconnected and a first disconnection signal is generated.

[0038] Optionally, the current and voltage limiting circuit generates a second power-on state signal according to a voltage state of the first power-on state signal, including:

[0039] The first power-on state signal is a first conduction signal;

[0040] When the voltage of the first conduction signal is less than a preset safety value, the current limiting and voltage limiting circuit is turned on to generate a second conduction signal;

[0041] When the voltage of the first conduction signal is greater than a preset safety value, the current and voltage limiting circuit is disconnected to generate a second disconnection signal.

[0042] The above solution of the present invention includes at least the following beneficial effects:

[0043] The above scheme of the present invention can prevent the reverse connection of the power supply from affecting the subsequent circuit through the anti-reverse connection circuit; and can provide over-current and over-voltage protection for the subsequent circuit through the current limiting and voltage limiting circuit to ensure the safety of the circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] Figure 1 is a module diagram of a power supply inlet protection circuit provided by an embodiment of the present invention;

[0045] Figure 2 is a circuit diagram of a power supply inlet protection circuit provided by an embodiment of the present invention;

[0046] Figure 3 is a circuit diagram of a power supply inlet protection circuit provided by an embodiment of the present invention when it is forwardly connected to a power supply;

[0047] Figure 4 This is a circuit diagram of a power supply inlet protection circuit provided by an embodiment of the present invention when it is reversely connected to the power supply. DETAILED DESCRIPTION

[0048] The exemplary embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. Although the exemplary embodiments of the present invention are shown in the accompanying drawings, it should be understood that the present invention can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided in order to enable a more thorough understanding of the present invention and to enable the scope of the present invention to be fully communicated to those skilled in the art.

[0049] like Figure 1 and Figure 2 As shown, an embodiment of the present invention provides a power inlet protection circuit, comprising:

[0050] An anti-reverse connection circuit 20 electrically connected to the power supply 10, the anti-reverse connection circuit 20 does not cause a voltage drop;

[0051] A current limiting and voltage limiting circuit 30 with a shunting function, one end of the current limiting and voltage limiting circuit 30 is electrically connected to the anti-reverse connection circuit 20, and the other end of the current limiting and voltage limiting circuit 30 is electrically connected to the power consumption unit 40;

[0052] When the anti-reverse connection circuit 20 receives a forward voltage signal from the power supply 10, the anti-reverse connection circuit 20 is in a conducting state, and the anti-reverse connection circuit 20 generates a conducting signal; when the anti-reverse connection circuit 20 receives a reverse voltage signal from the power supply 10, the anti-reverse connection circuit 20 is in a disconnected state;

[0053] The current limiting and voltage limiting circuit 30 receives a conduction signal. When the voltage of the conduction signal is less than the preset safety value, the current limiting and voltage limiting circuit 30 is in the conduction state; when the voltage of the conduction signal is greater than the preset safety value, the current limiting and voltage limiting circuit 30 is in the disconnection state.

[0054] In this embodiment, when the power supply 10 is forwardly connected, the power supply 10 provides a forward voltage, the anti-reverse connection circuit 20 receives the forward voltage signal of the power supply 10, the anti-reverse connection circuit 20 is in a conducting state, and the anti-reverse connection circuit 20 generates a conducting signal; when the power supply 10 is reversely connected, the power supply 10 provides a reverse voltage, the anti-reverse connection circuit 20 receives the reverse voltage signal of the power supply 10, and the anti-reverse connection circuit 20 is in a disconnected state; the anti-reverse connection circuit is turned on and off according to the voltage direction provided by the power supply 10, so as to provide anti-reverse connection protection, thereby preventing the reverse connection of the power supply 10 from affecting subsequent circuits;

[0055] When the power supply 10 is positively connected, the anti-reverse connection circuit 20 is in the on state, and the anti-reverse connection circuit 20 generates a conduction signal. When the power supply voltage of the power supply 10 is less than the preset safety value, the voltage of the conduction signal is less than the preset safety value, and the current limiting and voltage limiting circuit 30 is in the on state; when the power supply voltage of the power supply 10 is greater than the preset safety value, the voltage of the conduction signal is greater than the preset safety value, and the current limiting and voltage limiting circuit 30 is in the off state; the current limiting and voltage limiting circuit 30 is turned on and off according to whether the power supply voltage of the power supply 10 is greater than the preset safety value, thereby playing a role in overvoltage and overcurrent protection, avoiding damage to the power consumption unit 40, and ensuring circuit safety.

[0056] like Figure 2 As shown, in an optional embodiment of the present invention, the anti-reverse connection circuit 20 includes:

[0057] A third MOS transistor Q3, wherein the gate of the third MOS transistor Q3 is electrically connected to the positive electrode of the power supply 10 through the first resistor R1, the source of the third MOS transistor Q3 is grounded, and the drain of the third MOS transistor Q3 is electrically connected to the negative electrode of the power supply 10;

[0058] The second voltage regulator tube D2, the positive electrode of the second voltage regulator tube D2 is electrically connected to the source electrode of the third MOS tube Q3, and the negative electrode of the second voltage regulator tube D2 is electrically connected to the gate electrode of the third MOS tube Q3.

[0059] In this embodiment, when the power supply 10 is positively connected, the power supply 10 provides a forward voltage, and the voltage is stabilized at a certain value, for example, about 5V, through the second voltage regulator D2; the voltage difference between the gate and the source of the third MOS tube Q3 is about 5V, and the voltage difference is greater than the turn-on voltage of the third MOS tube Q3, then the third MOS tube Q3 is in a conducting state, the anti-reverse connection circuit 20 is in a conducting state, and the anti-reverse connection circuit 20 does not cause a voltage drop, thereby avoiding power waste;

[0060] When the power supply 10 is reversely connected, the power supply 10 provides a reverse voltage. Due to the unidirectional conductivity of the third MOS transistor Q3, there is a voltage drop between the gate and the source of the third MOS transistor Q3, and the third MOS transistor Q3 cannot be turned on. The anti-reverse connection circuit 20 is in a disconnected state, thereby preventing the reverse connection of the power supply 10 from causing damage to subsequent circuits.

[0061] like Figure 2 As shown, in an optional embodiment of the present invention, the current limiting and voltage limiting circuit 30 includes:

[0062] A first MOS transistor Q1, wherein the gate of the first MOS transistor Q1 is grounded through a sixth resistor R6, the source of the first MOS transistor Q1 is electrically connected to the positive electrode of the power supply 10, and the drain of the first MOS transistor Q1 is electrically connected to the power access terminal of the power consumption unit 40;

[0063] A transistor Q2, wherein the emitter of the transistor Q2 is electrically connected to the positive electrode of the power supply 10, the base of the transistor Q2 is electrically connected to the positive electrode of the power supply 10 through a fifth resistor R5 and a fourth resistor R4, the collector of the transistor Q2 is electrically connected to the gate of the first MOS transistor Q1, and a fifth capacitor C5 is electrically connected between the collector and the base of the transistor Q2;

[0064] A first voltage regulator tube D1, wherein the positive electrode of the first voltage regulator tube D1 is electrically connected to the negative electrode of the power supply 10, and the negative electrode of the first voltage regulator tube D1 is electrically connected to the connection point of the fifth resistor R5 and the fourth resistor R4;

[0065] A second resistor R2, the second resistor R2 is electrically connected in parallel with a fourth resistor R4;

[0066] The third resistor R3 is electrically connected in parallel with the fourth resistor R4.

[0067] In this embodiment, when the anti-reverse connection circuit 20 is in the on state, the anti-reverse connection circuit 20 generates a conduction signal. Under normal circumstances, the supply voltage of the power supply 10 is less than the preset safety value, the voltage of the conduction signal is less than the preset safety value, the voltage difference between the base and the emitter of the transistor Q2 is 0, the transistor Q2 is not conducting, the gate and the source of the first MOS tube Q1 are in a disconnected state, because the sixth resistor R6 is grounded, the gate voltage of the first MOS tube Q1 is 0, the source of the first MOS tube Q1 is electrically connected to the positive electrode of the power supply 10, the voltage difference between the source and the gate of the first MOS tube Q1 is greater than the turn-on voltage of the first MOS tube Q1, the first MOS tube Q1 is turned on, and the positive electrode of the power supply 10 is connected to the power access end of the power unit 40, and the power unit 40 is powered by the power supply 10;

[0068] When the power supply 10 is abnormal, the power supply voltage of the power supply 10 increases. Under the voltage regulation of the first voltage regulator D1, the base voltage of the transistor Q2 is 5V, and the emitter voltage of the transistor Q2 increases with the increase of the power supply voltage of the power supply 10. When the voltage difference between the emitter and the base of the transistor Q2 reaches the turn-on voltage of the transistor Q2, the transistor Q2 is turned on, and the voltage between the gate and the source of the first MOS tube Q1 is almost the same. The first MOS tube Q1 is in a cut-off state. Due to the unidirectional conduction characteristic of the first MOS tube Q1, the positive pole of the power supply 10 is The pole is in a disconnected state from the power access terminal of the power-consuming unit 40, thereby protecting the power-consuming unit 40 from overvoltage and preventing the power-consuming unit 40 from being affected by the high voltage; at the same time, the parallel connection of the second resistor R2, the third resistor R3 and the fourth resistor R4 can play a shunting role, thereby playing an overcurrent protection role, thereby protecting the subsequent circuit from overcurrent; in this embodiment, the parallel connection of the second resistor R2, the third resistor R3 and the fourth resistor R4 is used for shunting, and in specific applications, the number of resistors connected in parallel can be increased, so that the current limiting and voltage limiting circuit 30 can withstand a larger current.

[0069] like Figure 1 As shown, in an optional embodiment of the present invention, the power inlet protection circuit further includes:

[0070] The first filter circuit 50 is electrically connected to the power supply 10 .

[0071] In this embodiment, the power supply signal of the power supply 10 is filtered by the first filtering circuit 50 , so as to filter and protect the subsequent anti-reverse connection circuit 20 and the current and voltage limiting circuit 30 .

[0072] like Figure 2 As shown, in an optional embodiment of the present invention, the first filtering circuit 50 includes:

[0073] a first capacitor C1, wherein a positive electrode of the first capacitor C1 is electrically connected to a positive electrode of the power supply 10, and a negative electrode of the first capacitor C1 is electrically connected to a negative electrode of the power supply 10;

[0074] The second capacitor C2 is electrically connected between the positive electrode and the negative electrode of the power supply 10 .

[0075] In this embodiment, the high-frequency noise signal is attenuated by the first capacitor C1 and the second capacitor C2, while the low-frequency useful signal is allowed to pass smoothly, thereby achieving the purpose of filtering and filtering protection for the subsequent anti-reverse connection circuit 20 and the current and voltage limiting circuit 30.

[0076] like Figure 1 As shown, in an optional embodiment of the present invention, the power inlet protection circuit further includes:

[0077] The second filter circuit 60 is electrically connected to the power consumption unit 40 .

[0078] In this embodiment, the output signal of the current and voltage limiting circuit 30 is filtered by the second filtering circuit 60 , thereby filtering and protecting the power consumption unit 40 .

[0079] like Figure 2 As shown, in an optional embodiment of the present invention, the second filtering circuit 60 includes:

[0080] A third capacitor C3, wherein the positive electrode of the third capacitor C3 is electrically connected to the power supply access terminal of the power-consuming unit 40, and the negative electrode of the third capacitor C3 is grounded;

[0081] The fourth capacitor C4 is electrically connected between the power supply input terminal of the power-consuming unit 40 and the ground.

[0082] In this embodiment, the third capacitor C3 and the fourth capacitor C4 are used to attenuate high-frequency noise signals, while allowing low-frequency useful signals to pass smoothly, thereby achieving the purpose of filtering and performing filtering protection on the power-consuming unit 40 .

[0083] Specific protection process of the protection circuit at the power inlet:

[0084] like Figure 3 As shown, the power supply 10 is connected to the anti-reverse connection circuit 20 in a forward direction, that is, Figure 3 Point A is electrically connected to point C, and point B is electrically connected to point D; at this time, point A is a forward voltage, and the voltage is stabilized at a certain value, such as about 5V, through the second voltage regulator D2; the voltage difference between the gate and the source of the third MOS tube Q3 is about 5V, and the voltage difference is greater than the turn-on voltage of the third MOS tube Q3, then the third MOS tube Q3 is in a conducting state, and the anti-reverse connection circuit 20 is in a conducting state;

[0085] like Figure 4 As shown, the power supply 10 is reversely connected to the anti-reverse connection circuit 20, that is, Figure 4 Point A is electrically connected to point D, and point B is electrically connected to point C; at this time, point A is a reverse voltage. Due to the unidirectional conductivity of the third MOS tube Q3, there is a voltage drop between the gate and the source of the third MOS tube Q3, and the third MOS tube Q3 cannot be turned on. The anti-reverse connection circuit 20 is in a disconnected state, thereby preventing the reverse connection of the power supply 10 from damaging the subsequent circuit;

[0086] like Figure 3As shown, the power supply 10 is forwardly connected to the anti-reverse connection circuit 20, and the anti-reverse connection circuit 20 is in a conducting state. Under normal circumstances, the power supply voltage at point A is less than a preset safety value, the voltage difference between the base and the emitter of the transistor Q2 is 0, the transistor Q2 is not conducting, the gate and the source of the first MOS tube Q1 are in a disconnected state, because the sixth resistor R6 is grounded, the gate voltage of the first MOS tube Q1 is 0, the source of the first MOS tube Q1 is electrically connected to the positive electrode of the power supply 10, the voltage difference between the source and the gate of the first MOS tube Q1 is greater than the turn-on voltage of the first MOS tube Q1, the first MOS tube Q1 is turned on, and then the point A is connected to the power access end of the power consumption unit 40, and the power consumption unit 40 is powered by the power supply 10; when the power supply 10 is abnormal, the power supply voltage at point A becomes larger, and in the first stable state, the power consumption unit 40 is powered by the power supply 10; Under the voltage stabilizing effect of the voltage tube D1, the base voltage of the transistor Q2 is 5V, and the emitter voltage of the transistor Q2 increases with the increase of the power supply voltage of the power supply 10. When the voltage difference between the emitter and the base of the transistor Q2 reaches the turn-on voltage of the transistor Q2, the transistor Q2 is turned on, and the voltage between the gate and the source of the first MOS tube Q1 is almost the same. The first MOS tube Q1 is in a cut-off state. Due to the unidirectional conduction characteristic of the first MOS tube Q1, point A and the power access end of the power unit 40 are in a disconnected state, thereby performing overvoltage protection on the power unit 40, so that the power unit 40 is not affected by the high voltage; at the same time, the parallel connection of the second resistor R2, the third resistor R3 and the fourth resistor R4 can play a shunting role, thereby playing an overcurrent protection role, thereby performing overcurrent protection on the subsequent circuit.

[0087] An embodiment of the present invention further provides a power inlet protection method, which is applied to the power inlet protection circuit of any of the above embodiments, and the method includes:

[0088] The reverse connection prevention circuit 20 receives a voltage signal from the power supply 10;

[0089] The anti-reverse connection circuit 20 generates a first power-on state signal according to the positive and negative directions of the voltage signal;

[0090] The current limiting and voltage limiting circuit 30 receives a first power-on state signal;

[0091] The current and voltage limiting circuit 30 generates a second power-on state signal according to the voltage state of the first power-on state signal.

[0092] Furthermore, the anti-reverse connection circuit 20 generates a first power-on state signal according to the positive and negative directions of the voltage signal, including:

[0093] When the voltage signal is a positive voltage, the reverse connection protection circuit 20 is turned on to generate a first conduction signal;

[0094] When the voltage signal is a reverse voltage, the anti-reverse connection circuit 20 is disconnected and generates a first disconnection signal;

[0095] The current limiting and voltage limiting circuit 30 generates a second power-on state signal according to the voltage state of the first power-on state signal, including:

[0096] The first power-on state signal is a first conduction signal;

[0097] When the voltage of the first conduction signal is less than the preset safety value, the current limiting and voltage limiting circuit 30 is turned on to generate a second conduction signal;

[0098] When the voltage of the first conduction signal is greater than the preset safety value, the current and voltage limiting circuit 30 is disconnected, and a second disconnection signal is generated.

[0099] In this embodiment, the voltage signal of the power supply 10 is received by the anti-reverse connection circuit 20. When the voltage signal is a positive voltage, the anti-reverse connection circuit 20 is turned on and a first turn-on signal is generated; when the voltage signal is a reverse voltage, the anti-reverse connection circuit 20 is turned off and a first turn-off signal is generated to perform anti-reverse connection protection on the subsequent current.

[0100] When the voltage signal is a positive voltage, the anti-reverse connection circuit 20 is turned on, and the first power-on state signal is a first conduction signal. When the voltage of the first conduction signal is less than the preset safety value, the current limiting and voltage limiting circuit 30 is turned on and generates a second conduction signal, so that the power supply 10 supplies power to the power unit 40; when the voltage of the first conduction signal is greater than the preset safety value, the current limiting and voltage limiting circuit 30 is disconnected and generates a second disconnection signal, and the power supply 10 is disconnected from the power unit 40, and the power unit 40 is protected from overvoltage and overcurrent.

[0101] Wherein, the anti-reverse connection circuit 20 comprises:

[0102] A third MOS transistor Q3, wherein the gate of the third MOS transistor Q3 is electrically connected to the positive electrode of the power supply 10 through the first resistor R1, the source of the third MOS transistor Q3 is grounded, and the drain of the third MOS transistor Q3 is electrically connected to the negative electrode of the power supply 10;

[0103] A second voltage regulator tube D2, wherein the positive electrode of the second voltage regulator tube D2 is electrically connected to the source electrode of the third MOS tube Q3, and the negative electrode of the second voltage regulator tube D2 is electrically connected to the gate electrode of the third MOS tube Q3;

[0104] The current limiting and voltage limiting circuit 30 comprises:

[0105] A first MOS transistor Q1, wherein the gate of the first MOS transistor Q1 is grounded through a sixth resistor R6, the source of the first MOS transistor Q1 is electrically connected to the positive electrode of the power supply 10, and the drain of the first MOS transistor Q1 is electrically connected to the power access terminal of the power consumption unit 40;

[0106] A transistor Q2, wherein the emitter of the transistor Q2 is electrically connected to the positive electrode of the power supply 10, the base of the transistor Q2 is electrically connected to the positive electrode of the power supply 10 through a fifth resistor R5 and a fourth resistor R4, the collector of the transistor Q2 is electrically connected to the gate of the first MOS transistor Q1, and a fifth capacitor C5 is electrically connected between the collector and the base of the transistor Q2;

[0107] A first voltage regulator tube D1, wherein the positive electrode of the first voltage regulator tube D1 is electrically connected to the negative electrode of the power supply 10, and the negative electrode of the first voltage regulator tube D1 is electrically connected to the connection point of the fifth resistor R5 and the fourth resistor R4;

[0108] A second resistor R2, the second resistor R2 is electrically connected in parallel with a fourth resistor R4;

[0109] The third resistor R3 is electrically connected in parallel with the fourth resistor R4.

[0110] Optionally, the method further includes: filtering the voltage signal of the power supply 10 by using a first filtering circuit 50 .

[0111] In this embodiment, the voltage signal of the power supply 10 is filtered by the first filtering circuit 50 , so that the subsequent anti-reverse connection circuit 20 and the current and voltage limiting circuit 30 can be filtered and protected.

[0112] Wherein, the first filtering circuit 50 comprises:

[0113] a first capacitor C1, wherein a positive electrode of the first capacitor C1 is electrically connected to a positive electrode of the power supply 10, and a negative electrode of the first capacitor C1 is electrically connected to a negative electrode of the power supply 10;

[0114] The second capacitor C2 is electrically connected between the positive electrode and the negative electrode of the power supply 10 .

[0115] Optionally, the method further includes: filtering the second conduction signal by a second filtering circuit 60 .

[0116] In this embodiment, the second conduction signal is filtered by the second filtering circuit 60 , so that the power consumption unit 40 can be filtered and protected.

[0117] Wherein, the second filtering circuit 60 comprises:

[0118] A third capacitor C3, wherein the positive electrode of the third capacitor C3 is electrically connected to the power supply access terminal of the power-consuming unit 40, and the negative electrode of the third capacitor C3 is grounded;

[0119] The fourth capacitor C4 is electrically connected between the power supply input terminal of the power-consuming unit 40 and the ground.

[0120] In the above embodiment of the present invention, the high-frequency noise signal is attenuated by the first capacitor C1 and the second capacitor C2, while the low-frequency useful signal is allowed to pass smoothly, thereby achieving the purpose of filtering, and filtering protection is performed on the subsequent anti-reverse connection circuit 20 and the current limiting and voltage limiting circuit 30; the high-frequency noise signal is attenuated by the third capacitor C3 and the fourth capacitor C4, while the low-frequency useful signal is allowed to pass smoothly, thereby achieving the purpose of filtering, and filtering protection is performed on the power unit 40;

[0121] The reverse connection protection is performed by the anti-reverse connection circuit 20. When the power supply 10 is connected forward, the power supply 10 provides a forward voltage, and the voltage is stabilized at a certain value, such as about 5V, through the second voltage regulator D2. The voltage difference between the gate and the source of the third MOS tube Q3 is about 5V, and the voltage difference is greater than the turn-on voltage of the third MOS tube Q3. Then the third MOS tube Q3 is in a conducting state, the anti-reverse connection circuit 20 is in a conducting state, and the anti-reverse connection circuit 20 does not cause a voltage drop, thereby avoiding power waste. When the power supply 10 is reversely connected, the power supply 10 provides a reverse voltage. Due to the unidirectional conductivity of the third MOS tube Q3, there is a voltage drop between the gate and the source of the third MOS tube Q3, and the third MOS tube Q3 cannot be turned on. The anti-reverse connection circuit 20 is in a disconnected state, thereby avoiding damage to subsequent circuits caused by the reverse connection of the power supply 10.

[0122] The overcurrent and overvoltage protection is performed by the current limiting and voltage limiting circuit 30. When the anti-reverse connection circuit 20 is in the on state, the anti-reverse connection circuit 20 generates a conduction signal. Under normal circumstances, the supply voltage of the power supply 10 is less than the preset safety value, the voltage of the conduction signal is less than the preset safety value, the voltage difference between the base and the emitter of the transistor Q2 is 0, the transistor Q2 is not conducting, the gate and the source of the first MOS tube Q1 are in a disconnected state, because the sixth resistor R6 is grounded, the gate voltage of the first MOS tube Q1 is 0, the source of the first MOS tube Q1 is electrically connected to the positive electrode of the power supply 10, the voltage difference between the source and the gate of the first MOS tube Q1 is greater than the turn-on voltage of the first MOS tube Q1, the first MOS tube Q1 is turned on, and the positive electrode of the power supply 10 is connected to the power access end of the power unit 40, and the power unit 40 is powered by the power supply 10; when the power supply 10 is abnormal , the power supply voltage of the power supply 10 increases. Under the voltage regulation of the first voltage regulator D1, the base voltage of the transistor Q2 is 5V, and the emitter voltage of the transistor Q2 increases with the increase of the power supply voltage of the power supply 10. When the voltage difference between the emitter and the base of the transistor Q2 reaches the turn-on voltage of the transistor Q2, the transistor Q2 is turned on, and the voltage between the gate and the source of the first MOS tube Q1 is almost the same. The first MOS tube Q1 is in a cut-off state. Due to the unidirectional conduction characteristic of the first MOS tube Q1, the positive electrode of the power supply 10 and the power access end of the power unit 40 are in a disconnected state, thereby performing overvoltage protection on the power unit 40, so that the power unit 40 is not affected by the high voltage; at the same time, the parallel connection of the second resistor R2, the third resistor R3 and the fourth resistor R4 can play a shunting role, thereby playing an overcurrent protection role, thereby performing overcurrent protection on the subsequent circuit.

[0123] The above is a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A power supply inlet protection circuit, characterized in that: include: An anti-reverse connection circuit (20) electrically connected to the power supply (10); A current limiting and voltage limiting circuit (30) having a shunting function, wherein one end of the current limiting and voltage limiting circuit (30) is electrically connected to the anti-reverse connection circuit (20), and the other end of the current limiting and voltage limiting circuit (30) is electrically connected to the power consumption unit (40); When the anti-reverse connection circuit (20) receives a forward voltage signal from the power supply (10), the anti-reverse connection circuit (20) is in an on state, and the anti-reverse connection circuit (20) generates an on signal; when the anti-reverse connection circuit (20) receives a reverse voltage signal from the power supply (10), the anti-reverse connection circuit (20) is in an off state; The current limiting and voltage limiting circuit (30) receives the conduction signal, and when the voltage of the conduction signal is less than a preset safety value, the current limiting and voltage limiting circuit (30) is in a conduction state; when the voltage of the conduction signal is greater than the preset safety value, the current limiting and voltage limiting circuit (30) is in a disconnection state.

2. The power inlet protection circuit according to claim 1, characterized in that: The anti-reverse connection circuit (20) comprises: a third MOS tube (Q3), wherein the gate of the third MOS tube (Q3) is electrically connected to the positive electrode of the power supply (10) via the first resistor (R1), the source of the third MOS tube (Q3) is grounded, and the drain of the third MOS tube (Q3) is electrically connected to the negative electrode of the power supply (10); A second voltage regulator tube (D2), wherein the positive electrode of the second voltage regulator tube (D2) is electrically connected to the source electrode of the third MOS tube (Q3), and the negative electrode of the second voltage regulator tube (D2) is electrically connected to the gate electrode of the third MOS tube (Q3).

3. The power inlet protection circuit according to claim 2, characterized in that: The current limiting and voltage limiting circuit (30) comprises: a first MOS transistor (Q1), wherein the gate of the first MOS transistor (Q1) is grounded via a sixth resistor (R6), the source of the first MOS transistor (Q1) is electrically connected to the positive electrode of the power supply (10), and the drain of the first MOS transistor (Q1) is electrically connected to the power supply access terminal of the power consumption unit (40); a triode (Q2), wherein the emitter of the triode (Q2) is electrically connected to the positive electrode of the power supply (10), the base of the triode (Q2) is electrically connected to the positive electrode of the power supply (10) via a fifth resistor (R5) and a fourth resistor (R4), the collector of the triode (Q2) is electrically connected to the gate of the first MOS tube (Q1), and a fifth capacitor (C5) is electrically connected between the collector and the base of the triode (Q2); a first voltage regulator tube (D1), wherein a positive electrode of the first voltage regulator tube (D1) is electrically connected to a negative electrode of the power supply (10), and a negative electrode of the first voltage regulator tube (D1) is electrically connected to a connection point between the fifth resistor (R5) and the fourth resistor (R4); a second resistor (R2), the second resistor (R2) being electrically connected in parallel with the fourth resistor (R4); A third resistor (R3), the third resistor (R3) and the fourth resistor (R4) are electrically connected in parallel.

4. The power inlet protection circuit according to claim 1, characterized in that: Also includes: A first filter circuit (50), wherein the first filter circuit (50) is electrically connected to the power supply (10).

5. The power inlet protection circuit according to claim 4, characterized in that: The first filtering circuit (50) comprises: a first capacitor (C1), wherein a positive electrode of the first capacitor (C1) is electrically connected to a positive electrode of the power supply (10), and a negative electrode of the first capacitor (C1) is electrically connected to a negative electrode of the power supply (10); A second capacitor (C2), the second capacitor (C2) is electrically connected between the positive electrode and the negative electrode of the power supply (10).

6. The power inlet protection circuit according to claim 1, characterized in that: Also includes: A second filter circuit (60), the second filter circuit (60) is electrically connected to the power consumption unit (40).

7. The power inlet protection circuit according to claim 6, characterized in that: The second filtering circuit (60) comprises: a third capacitor (C3), wherein a positive electrode of the third capacitor (C3) is electrically connected to a power supply access terminal of the power-consuming unit (40), and a negative electrode of the third capacitor (C3) is grounded; A fourth capacitor (C4), the fourth capacitor (C4) is electrically connected between a power supply input terminal of the power-consuming unit (40) and ground.

8. A power inlet protection method, characterized in that: Applied to the power inlet protection circuit according to any one of claims 1 to 7, the method comprising: The anti-reverse connection circuit (20) receives a voltage signal from the power supply (10); The anti-reverse connection circuit (20) generates a first power-on state signal according to the positive and negative directions of the voltage signal; The current limiting and voltage limiting circuit (30) receives the first power-on state signal; The current and voltage limiting circuit (30) generates a second power-on state signal according to the voltage state of the first power-on state signal.

9. The power inlet protection circuit according to claim 8, characterized in that: The anti-reverse connection circuit (20) generates a first power-on state signal according to the positive and negative directions of the voltage signal, comprising: When the voltage signal is a forward voltage, the reverse connection prevention circuit (20) is turned on to generate a first conduction signal; When the voltage signal is a reverse voltage, the anti-reverse connection circuit (20) is disconnected to generate a first disconnection signal.

10. The power inlet protection circuit according to claim 8, characterized in that: The current limiting and voltage limiting circuit (30) generates a second power-on state signal according to the voltage state of the first power-on state signal, comprising: The first power-on state signal is a first conduction signal; When the voltage of the first conduction signal is less than a preset safety value, the current limiting and voltage limiting circuit (30) is turned on to generate a second conduction signal; When the voltage of the first conduction signal is greater than a preset safety value, the current and voltage limiting circuit (30) is disconnected to generate a second disconnection signal.

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