Power converter circuit and method of controlling startup of power converter circuit

Abstract

A power converter circuit and a method of controlling startup of a power converter circuit are provided. The power converter circuit includes: an unregulated sub-converter; a regulated sub-converter connected to the unregulated sub-converter, where the power converter circuit is configured as an input-series output-parallel (ISOP) non-isolated power converter circuit; and a control circuit operable during startup of the power converter circuit to: control the unregulated sub-converter at a transition from an initial unregulated duty cycle to a nominal unregulated duty cycle higher than the initial unregulated duty cycle; and controlling the regulated sub-converter at a transition from an initial regulated duty cycle to a nominal regulated duty cycle to maintain an output voltage of the power converter circuit below a nominal output voltage.

Description

Technical Field

[0001] The invention relates to a power converter circuit and a method for controlling the startup of the power converter circuit. Background Art

[0002] Data centers consume approximately 2% to 3% of the world’s electricity. As a result, data center operators have been working to improve the efficiency of converting AC power to the point of load while increasing the computing power of processing units such as CPUs, GPUs, ASICs, etc. This goal is particularly evident in machine learning and artificial intelligence, where the need for powerful GPUs and custom-designed ASICs to meet high computing power requirements is critical, especially during the training phase.

[0003] The transition to system operation at an input voltage of 48V or 40V to 60V, replacing the current 12V standard, offers advantages such as lower distribution losses. However, the transition to a 48V system requires the incorporation of a new power converter to reduce the input voltage to the necessary core voltage level. The sigma converter, a family of converter topologies, is based on multiple subconverters in an input series output parallel (ISOP) configuration. The startup of an ISOP converter, especially in the case of an ISOP converter with an unregulated subconverter, is typically accomplished using an electronic fuse (eFuse), which ramps up the input voltage when the subconverter switches. However, this requires additional space for an eFuse controller and an eFuse power device. Summary of the invention

[0004] According to one aspect of the present invention, a power converter circuit is provided, comprising: an unregulated subconverter; a regulated subconverter connected to the unregulated subconverter, wherein the power converter circuit is configured as an input series output parallel ISOP non-isolated power converter circuit; and a control circuit operable during startup of the power converter circuit to: control the unregulated subconverter with a transition from an initial unregulated duty cycle to a nominal unregulated duty cycle that is higher than the initial unregulated duty cycle; and control the regulated subconverter with a transition from the initial regulated duty cycle to the nominal regulated duty cycle to maintain an output voltage of the power converter circuit below the nominal output voltage.

[0005] According to another aspect of the present invention, there is provided a method for controlling startup of a power converter circuit having a regulated subconverter connected to an unregulated subconverter, the method comprising: controlling the unregulated subconverter by a control circuit with a transition from an initial unregulated duty cycle to a nominal unregulated duty cycle that is higher than the initial unregulated duty cycle; and controlling the regulated subconverter by the control circuit with a transition from the initial regulated duty cycle to the nominal regulated duty cycle to maintain an output voltage of the power converter circuit below the nominal output voltage, wherein the power converter circuit is configured as an input series-output parallel ISOP non-isolated power converter circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Figure 1 A schematic diagram of a power converter according to aspects of the present disclosure is shown.

[0007] Figure 2 Waveform diagrams illustrating startup of a power converter according to aspects of the present disclosure are shown.

[0008] Figure 3A A circuit diagram of an example power converter according to aspects of the present disclosure is shown.

[0009] Figure 3B and Figure 3C An equivalent circuit of an unregulated subconverter 110 at startup is shown in accordance with aspects of the present disclosure.

[0010] Figure 3D Signal diagrams showing a simulation of a power converter during startup in accordance with aspects of the present disclosure. DETAILED DESCRIPTION

[0011] Figure 1 A schematic diagram of a power converter 100 according to aspects of the present disclosure is shown.

[0012] The power converter 100 is a hybrid sigma converter configured as an ISOP (series-input, parallel-output) non-isolated power converter.

[0013] The power converter 100 includes an unregulated subconverter 110, a regulated subconverter 120, and a control circuit 130. The present disclosure is not limited to two subconverters. The power converter 100 is a hybrid power converter having at least one unregulated subconverter and at least one regulated subconverter.

[0014] The regulated subconverter 120 is connected to the unregulated subconverter 110 and is a buck converter. The unregulated subconverter 110 is less efficient than the regulated subconverter 120.2 The more efficient the path is, the 1 path. Therefore, the unregulated subconverter 110 receives a larger percentage than the regulated subconverter 120. The input currents are forced to be equal, and thus the power is divided in a manner that favors the more efficient unregulated subconverter 110.

[0015] In existing power converters, if there is no electronic fuse, at startup a destructive inrush current will flow into the unregulated subconverter 110. The present disclosure relates to startup of the power converter 100 that does not rely on an electronic fuse at its input. The subconverters 110 and 120 are driven at different switching frequencies and duty cycles to avoid destructive inrush currents and to enable the control circuit 130 to detect the end of the unregulated startup phase.

[0016] Specifically, during startup of the power converter 100, the control circuit 130 may be operated to adjust the duty cycle D unreg to a duty cycle higher than the initial unregulated D unreg The nominal unregulated duty cycle In addition, the control circuit 130 can be operated to control the unregulated subconverter 110 by changing the duty cycle D from the initial regulated duty cycle D reg to the nominal regulated duty cycle The regulated subconverter 120 is controlled by the transition of to maintain the output voltage of the power converter circuit below the nominal output voltage. reg can be higher or in some cases lower than the initial adjusted duty cycle D reg .

[0017] Figure 2 A waveform diagram 200 is shown of startup of the power converter 100 in accordance with aspects of the present disclosure.

[0018] Control circuit 130 controls the startup control of power converter 100 in three stages. These particular three stages are described only as an example and are not meant to be limiting.

[0019] During an initial phase of startup of the power converter 100 (in this example, phase 1), the control circuit 130 is operable to control the unregulated subconverter 110 to operate from an initial unregulated duty cycle D unreg gradually increasing the transition to the nominal unregulated duty cycle and from the initial unregulated frequency f unreg Gradually increase the transition to a frequency higher than the initial unregulated frequency f unreg The nominal unregulated frequency The control circuit 130 is also operable to control the regulated subconverter 120 to an initial regulated duty cycle D reg The output voltage V of the power converter 100 is out The output voltage V increases from 0V to the middle platform plateau And then maintain the output voltage V in the middle of the platform plateau , the intermediate platform output voltage V plateau At zero and nominal output voltage V out,ref Between (0V <V plateau <V out,ref ).

[0020] Many factors affect the plateau voltage V including duty cycle, switching frequency, transformation ratio, voltage converter topology, and the characteristics of the actual capacitor. plateau For example, in the case where the external capacitor significantly exceeds the internal capacitor of the capacitive divider, the plateau voltage V plateau On the contrary, when the opposite condition is met, the platform voltage V plateau will be higher. In addition, the ratio of the output voltage to the input voltage (V out / V in ) depends on the fixed transformation ratio of the unregulated subconverter 110 and the regulated duty cycle D of the regulated subconverter 120 reg .

[0021] During an intermediate phase of startup of the power converter 100 (phase 2 in this example), the unregulated frequency f unreg and the unregulated duty cycle D unreg has reached its nominal value ( and ) and stops increasing. The adjusted frequency f reg and the adjusted duty cycle D reg remains fixed at its initial value. The output voltage V out Maintain the output voltage V plateau .

[0022] During this intermediate phase, the voltages of the internal capacitor and the output capacitor do not change. The control circuit 130 is operable to control the output voltage V based on the output voltage V indicating that no current is flowing from the input to the output. out Equal to the intermediate platform voltage (V out =V plateau ) condition to detect this phase. The unregulated subconverter 110 operates under its nominal conditions and is able to deliver the required output power. In particular, the regulated subconverter 120 is controlled by the regulated duty cycle D reg The output voltage V out Keep below its nominal value V out,ref, thereby reducing the inrush current through the unregulated sub-converter 110 .

[0023] During the final phase of startup of the power converter 100 (Phase 3 in this example), the control circuit 130 is operable to control the unregulated subconverter 110 at a nominal unregulated frequency and the nominal unregulated duty cycle The control circuit 130 is also operable to control the regulated subconverter 120 to adjust the duty cycle D reg transition to the nominal regulated duty cycle The output voltage V of the power converter 100 out Output voltage V from the platform plateau Increase to the nominal output voltage V out,ref During or at the end of Phase 3, the adjusted duty cycle D reg is transmitted to the voltage regulator to regulate the output voltage V during normal operation out .

[0024] Figure 3A A circuit diagram 300A of an example of a power converter 100 according to aspects of the present disclosure is shown. The details of the circuit elements are understood by one of ordinary skill in the art. For the sake of brevity, a detailed description of the operation of the circuit diagram 300A is not provided herein. Figure 3B and Figure 3C Equivalent circuits 300B and 300C are shown for an unregulated subconverter 110 at startup in accordance with aspects of the present disclosure.

[0025] The adjusted frequency f of the adjusted subconverter 120 reg Preferably, the adjusted frequency f reg Equal to the unregulated nominal frequency and synchronized to the unregulated nominal frequency However, in general, the frequency may be different.

[0026] At the beginning of the startup sequence, the voltage value of each capacitor is zero. The value of the internal resonant capacitor Cres1 and the internal capacitor Cc1 is much smaller than the output capacitor Cout. The value of the internal capacitor Cc1 is much larger than the value of the resonant capacitor Cres1 (Cc1>>C res1 ). The output voltage Vout is negligible relative to the surge current, and the effect of the winding is negligible. Figure 3B and Figure 3C The inductors Leq1 / Leq2 are modeled as single loop inductors in the PWM circuit because they do not generate any output voltage at this time. During startup, the control circuit 130 reduces the inrush current on the unregulated subconverter 110 during the following two switching intervals:A (Pulse Width Modulation Signal) is turned on and PWM B The first switching interval during shutdown, as well as the PWM A Shutdown and PWM B Second switching interval when switched on.

[0027] Figure 3B shows the PWM A Turn on and PWM B Equivalent circuit 300B of the unregulated subconverter 110 at startup during the first switching interval at shutdown. Inrush current is reduced by increasing the voltage on capacitor Cres1. A power converter that quickly increases the voltage on this capacitor can greatly reduce the current stress on transistor Q1.

[0028] Figure 3C shows the PWM A Shutdown and PWM B Equivalent circuit 300C of the unregulated subconverter 110 at startup during the second switching interval at turn-on. Capacitor Cres1 is connected in series with capacitor Cc1. The regulated subconverter 120 applies voltage Vcc1, which reduces the excitation of loop inductance Leq2. Therefore, in the presence of the regulated subconverter 120, the inrush current on transistor Q2 is reduced. In addition, capacitor Cres1 is connected in series with capacitor Cc1 during the PWM A Turn on again and PWM B The next stage in the case of shutting down again has a higher voltage because the capacitor Cc1 is located in the path to the ground GND and suppresses the capacitor Cres1 from discharging, thereby further reducing the inrush current.

[0029] like FIG. 3B to FIG. 3D As shown in , when transistor Q1 is pulsed on at the beginning of startup when all circuit elements are discharged (Vcres1≈0; Vcc1≈0), there is a sharp increase in peak current Ipeak310B, 310C, 310D (e.g., 60 amperes). If the power converter 100 / 300A is started directly in a stable state with a large duty cycle, the transistor will be immediately damaged due to the extreme surge current. During the subsequent pulse, as shown by the second peak 320B, 320C, 320D, the capacitor has a certain charge to an intermediate value (Vcres1>0; Vcc1>0). The peak current Ipeak starts to decrease and keeps decreasing until the capacitor is charged to an intermediate value (e.g., 20 amperes). The operation of the power converter 100 / 300A is then transmitted to the regulated sub-converter 120 through 330D.

[0030] According to the disclosed aspects, the regulated subconverter 120 can be designed with lower voltage class devices. In the case of previous power converters, the regulated subconverter 120 withstands the full input voltage to provide startup capability without electronic fuses. The transistors in the regulated subconverter 120 are oversized to support startup, which is no longer necessary considering the various aspects of the present disclosure. Therefore, the power converter according to the disclosed aspects has higher density and / or higher efficiency.

[0031] The techniques of this disclosure may also be described in the following examples.

[0032] Example 1. A power converter circuit comprising: an unregulated subconverter; a regulated subconverter connected to the unregulated subconverter, wherein the power converter circuit is configured as an input series output parallel (ISOP) non-isolated power converter circuit; and a control circuit operable during startup of the power converter circuit to: control the unregulated subconverter to transition from an initial unregulated duty cycle to a nominal unregulated duty cycle that is higher than the initial unregulated duty cycle; and control the regulated subconverter to transition from the initial regulated duty cycle to the nominal regulated duty cycle to maintain an output voltage of the power converter circuit below the nominal output voltage.

[0033] Example 2. The power converter circuit of Example 1, wherein the control circuit is operable to detect when the output voltage of the power converter circuit increases to a plateau output voltage and then remains at the plateau output voltage, the plateau output voltage being between zero and the nominal output voltage.

[0034] Example 3. A power converter circuit according to any one or more of Examples 1 to 2, wherein the control circuit is operable to control the unregulated subconverter at a nominal unregulated duty cycle and a nominal unregulated frequency while the output voltage of the power converter circuit is maintained at a platform output voltage.

[0035] Example 4. A power converter circuit according to any one or more of Examples 1 to 3, wherein the control circuit is operable to control the regulated subconverter at an initial regulated duty cycle while the output voltage of the power converter circuit is maintained at a plateau output voltage.

[0036] Example 5. A power converter circuit according to any one or more of Examples 1 to 4, wherein, during startup of the power converter circuit, the control circuit is operable to control the unregulated subconverter to transition from an initial unregulated frequency to a nominal unregulated frequency that is higher than the initial unregulated frequency.

[0037] Example 6. A power converter circuit according to any one or more of Examples 1 to 5, wherein, during an intermediate stage of startup of the power converter circuit, the control circuit is operable to: control an unregulated subconverter at a nominal unregulated frequency and a nominal unregulated duty cycle; and control a regulated subconverter at an initial regulated duty cycle, wherein an output voltage of the power converter circuit is maintained at a platform output voltage that is between zero and the nominal output voltage.

[0038] Example 7. A power converter circuit according to any one or more of Examples 1 to 6, wherein, during an initial stage of startup of the power converter circuit, the control circuit is operable to: control an unregulated subconverter to transition from an initial unregulated duty cycle to a nominal unregulated duty cycle and from an initial unregulated frequency to a nominal unregulated frequency higher than the initial unregulated frequency; and control the regulated subconverter at the initial regulated duty cycle, wherein the output voltage of the power converter circuit increases to a platform output voltage that is between zero and the nominal output voltage.

[0039] Example 8. A power converter circuit according to any one or more of Examples 1 to 7, wherein, during a final stage of startup of the power converter circuit, the control circuit is operable to: control an unregulated subconverter at a nominal unregulated frequency and a nominal unregulated duty cycle; and control a regulated subconverter to transition from an initial regulated duty cycle to a nominal regulated duty cycle, wherein an output voltage of the power converter circuit increases from a platform output voltage to a nominal output voltage, the nominal output voltage being between zero and the nominal output voltage.

[0040] Example 9. The power converter circuit of any one or more of Examples 1 to 8, wherein the control circuit is operable to control the unregulated subconverter and the regulated subconverter to operate in a synchronized manner and at the same frequency.

[0041] Example 10. The power converter circuit of any one or more of Examples 1 to 9, wherein the regulated subconverter is a buck converter.

[0042] Example 11. A method for controlling startup of a power converter circuit having a regulated subconverter connected to an unregulated subconverter, the method comprising: controlling, by a control circuit, the unregulated subconverter to transition from an initial unregulated duty cycle to a nominal unregulated duty cycle that is higher than the initial unregulated duty cycle; and controlling, by the control circuit, the regulated subconverter to transition from the initial regulated duty cycle to the nominal regulated duty cycle to maintain an output voltage of the power converter circuit below the nominal output voltage, wherein the power converter circuit is configured as an input series output parallel (ISOP) non-isolated power converter circuit.

[0043] Example 12. The method of Example 11, further comprising: detecting, by the control circuit, when the output voltage of the power converter circuit increases to a plateau output voltage and then remains at the plateau output voltage, the plateau output voltage being between zero and the nominal output voltage.

[0044] Example 13. The method of any one or more of Examples 11 to 12, further comprising: controlling the unregulated subconverter at a nominal unregulated duty cycle and a nominal unregulated frequency when the output voltage of the power converter circuit is maintained at the plateau output voltage.

[0045] Example 14. The method of any one or more of Examples 11 to 13, further comprising: controlling the regulated subconverter at the initial regulated duty cycle when the output voltage of the power converter circuit is maintained at the plateau output voltage.

[0046] Example 15. The method of any one or more of Examples 11 to 14, further comprising: during startup of the power converter circuit, controlling the unregulated subconverter to transition from an initial unregulated frequency to a nominal unregulated frequency higher than the initial unregulated frequency.

[0047] Example 16. A method according to any one or more of Examples 11 to 15, wherein, during an intermediate stage of startup of the power converter circuit, the method further comprises: controlling an unregulated subconverter at a nominal unregulated frequency and a nominal unregulated duty cycle; and controlling a regulated subconverter at an initial regulated duty cycle, wherein an output voltage of the power converter circuit is maintained at a platform output voltage that is between zero and the nominal output voltage.

[0048] Example 17. A method according to any one or more of Examples 11 to 16, wherein, during an initial stage of startup of the power converter circuit, the method further includes: controlling an unregulated subconverter to transition from an initial unregulated duty cycle to a nominal unregulated duty cycle and from an initial unregulated frequency to a nominal unregulated frequency higher than the initial unregulated frequency; and controlling the regulated subconverter at the initial regulated duty cycle, wherein the output voltage of the power converter circuit increases to a platform output voltage that is between zero and the nominal output voltage.

[0049] Example 18. A method according to any one or more of Examples 11 to 17, wherein, during the final stage of startup of the power converter circuit, the method further includes: controlling an unregulated subconverter at a nominal unregulated frequency and a nominal unregulated duty cycle; and controlling the regulated subconverter to transition from an initial regulated duty cycle to a nominal regulated duty cycle, wherein the output voltage of the power converter circuit increases from a platform output voltage to a nominal output voltage, the platform output voltage being between zero and the nominal output voltage.

[0050] Example 19. The method of any one or more of Examples 11 to 18, further comprising: controlling the unregulated subconverter and the regulated subconverter to operate in a synchronized manner and at the same frequency.

[0051] Example 20. The method of any one or more of Examples 11 to 19, further comprising: at the end of startup of the power converter circuit, initiating control of the power converter circuit for normal operation.

[0052] Although the foregoing has been described in conjunction with exemplary embodiments, it should be understood that the term "exemplary" is merely meant as an example, rather than the best or optimal. Therefore, the present disclosure is intended to cover alternatives, modifications, and equivalents that may be included within the scope of the present disclosure.

[0053] Although specific embodiments have been shown and described herein, it will be appreciated by those skilled in the art that various alternative implementations and / or equivalent implementations may be substituted for the specific embodiments shown and described without departing from the scope of the present disclosure. The present disclosure is intended to cover any modifications or variations of the specific embodiments discussed herein.

Claims

1. A power converter circuit, comprising: Unregulated subconverter; a regulated subconverter connected to the unregulated subconverter, wherein the power converter circuit is configured as an input series output parallel ISOP non-isolated power converter circuit; and A control circuit operable during startup of the power converter circuit to: controlling the unregulated subconverter to transition from an initial unregulated duty cycle to a nominal unregulated duty cycle that is higher than the initial unregulated duty cycle; and The regulated subconverter is controlled to transition from an initial regulated duty cycle to a nominal regulated duty cycle to maintain an output voltage of the power converter circuit below a nominal output voltage.

2. The power converter circuit according to claim 1, wherein: The control circuit is operable to detect when the output voltage of the power converter circuit increases to a plateau output voltage and then remains at the plateau output voltage, the plateau output voltage being between zero and the nominal output voltage.

3. The power converter circuit according to claim 2, wherein: The control circuit is operable to control the unregulated subconverter at the nominal unregulated duty cycle and the nominal unregulated frequency with the output voltage of the power converter circuit maintained at the plateau output voltage.

4. The power converter circuit according to claim 3, wherein: The control circuit is operable to control the regulated subconverter at the initial regulated duty cycle while the output voltage of the power converter circuit is maintained at the plateau output voltage.

5. The power converter circuit according to claim 1, wherein: During startup of the power converter circuit, the control circuit is operable to control the unregulated subconverter to transition from an initial unregulated frequency to a nominal unregulated frequency that is higher than the initial unregulated frequency.

6. The power converter circuit according to claim 1, wherein: During an intermediate stage of start-up of the power converter circuit, the control circuit is operable to: controlling the unregulated subconverter at a nominal unregulated frequency and the nominal unregulated duty cycle; as well as controlling the regulated subconverter at the initial regulated duty cycle, The output voltage of the power converter circuit is maintained at a platform output voltage, wherein the platform output voltage is between zero and the nominal output voltage.

7. The power converter circuit according to claim 1, wherein: During an initial stage of start-up of the power converter circuit, the control circuit is operable to: controlling the unregulated subconverter to transition from the initial unregulated duty cycle to the nominal unregulated duty cycle and from an initial unregulated frequency to a nominal unregulated frequency higher than the initial unregulated frequency; as well as controlling the regulated subconverter at the initial regulated duty cycle, The output voltage of the power converter circuit increases to a platform output voltage, and the platform output voltage is between zero and the nominal output voltage.

8. The power converter circuit according to claim 1, wherein: During a final stage of start-up of the power converter circuit, the control circuit is operable to: controlling the unregulated subconverter at a nominal unregulated frequency and the nominal unregulated duty cycle; as well as controlling the regulated subconverter to transition from the initial regulated duty cycle to the nominal regulated duty cycle, The output voltage of the power converter circuit increases from a platform output voltage to the nominal output voltage, and the platform output voltage is between zero and the nominal output voltage.

9. The power converter circuit according to claim 1, wherein: The control circuit is operable to control the unregulated subconverter and the regulated subconverter to operate in a synchronized manner and at the same frequency.

10. The power converter circuit according to claim 1, wherein: The regulated subconverter is a buck converter.

11. A method for controlling startup of a power converter circuit having a regulated subconverter connected to an unregulated subconverter, the method comprising: Controlling, by a control circuit, the unregulated subconverter to transition from an initial unregulated duty cycle to a nominal unregulated duty cycle higher than the initial unregulated duty cycle; as well as controlling the regulated subconverter to transition from an initial regulated duty cycle to a nominal regulated duty cycle by the control circuit to maintain an output voltage of the power converter circuit below a nominal output voltage, The power converter circuit is configured as an input series output parallel ISOP non-isolated power converter circuit.

12. The method according to claim 11, further comprising: The control circuit detects when the output voltage of the power converter circuit increases to and then remains at a plateau output voltage, the plateau output voltage being between zero and the nominal output voltage.

13. The method according to claim 12, further comprising: The unregulated subconverter is controlled at the nominal unregulated duty cycle and the nominal unregulated frequency while the output voltage of the power converter circuit is maintained at the plateau output voltage.

14. The method according to claim 13, further comprising: The regulated subconverter is controlled at the initial regulated duty cycle while the output voltage of the power converter circuit is maintained at the plateau output voltage.

15. The method according to claim 11, further comprising: During startup of the power converter circuit, the unregulated subconverter is controlled to transition from an initial unregulated frequency to a nominal unregulated frequency that is higher than the initial unregulated frequency.

16. The method according to claim 11, wherein: During an intermediate stage of startup of the power converter circuit, the method further comprises: controlling the unregulated subconverter at a nominal unregulated frequency and the nominal unregulated duty cycle; and controlling the regulated subconverter at the initial regulated duty cycle, The output voltage of the power converter circuit is maintained at a platform output voltage, wherein the platform output voltage is between zero and the nominal output voltage.

17. The method according to claim 11, wherein: During an initial stage of startup of the power converter circuit, the method further comprises: controlling the unregulated subconverter to transition from the initial unregulated duty cycle to the nominal unregulated duty cycle and from an initial unregulated frequency to a nominal unregulated frequency higher than the initial unregulated frequency; and controlling the regulated subconverter at the initial regulated duty cycle, The output voltage of the power converter circuit increases to a platform output voltage, and the platform output voltage is between zero and the nominal output voltage.

18. The method according to claim 11, wherein: During a final stage of startup of the power converter circuit, the method further comprises: controlling the unregulated subconverter at a nominal unregulated frequency and the nominal unregulated duty cycle; and controlling the regulated subconverter to transition from the initial regulated duty cycle to the nominal regulated duty cycle, The output voltage of the power converter circuit increases from a platform output voltage to the nominal output voltage, and the platform output voltage is between zero and the nominal output voltage.

19. The method according to claim 11, further comprising: The unregulated subconverter and the regulated subconverter are controlled to operate in a synchronized manner and at the same frequency.

20. The method according to claim 11, further comprising: At the end of startup of the power converter circuit, control of the power converter circuit for normal operation is initiated.

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