Power supply voltage identification control circuit and method in analog-to-digital conversion

Abstract

The invention discloses a power supply voltage identification control circuit and method in analog-to-digital conversion, and belongs to the technical field of integrated circuits. The method is applied to a power supply voltage change scene, and comprises the following steps: firstly, setting a resistor string between a to-be-monitored power supply voltage and the ground for reduction processing to obtain a reduced power supply voltage; then, reference voltage generated by band-gap reference in the chip is reduced to obtain first reference voltage and second reference voltage, the first reference voltage and the second reference voltage are input into two comparators together with reduced power supply voltage to be compared, and a comparison result is output to a state recognition machine; and finally, the state recognition machine performs voltage judgment according to the state change of the comparison result to obtain a voltage recognition result. The power supply voltage can be monitored in real time and automatically identified without extra power supply, fluctuation of the power supply voltage within a certain range can be tolerated, and a stable identification result is obtained.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and in particular to a power supply voltage identification control circuit and method in analog-to-digital conversion. Background Art

[0002] In modern integrated circuit design, especially in some variable power supply application scenarios, such as data converter interfaces, clock driver interfaces, etc., the power supply voltage will change. The power supply voltage will be affected by different product requirements and show a clear "grading" distribution. For example, it will dynamically change between 1.8V, 2.5V, 3.3V or 5V to adapt to different application requirements. This voltage change poses a challenge to chip interface design.

[0003] In the existing chip interface design, under the same process, the withstand voltage of different high and low voltage devices will be significantly different. Traditional design usually adopts the principle of "high rather than low", that is, high voltage devices are used to design related circuits to achieve downward compatibility of power supply voltage. For example, in a circuit that supports a power supply range of 1.8V to 5V, designers may uniformly use 5V withstand voltage devices to ensure that the circuit can still work normally at the highest voltage. However, this solution has obvious performance compromises. High voltage devices often have a lower operating speed under low voltage conditions (such as 1.8V or 2.5V) due to high threshold voltage and limited driving ability, and cannot fully exert the best performance under low voltage conditions. On the other hand, if low voltage devices (such as 1.8V or 2.5V withstand voltage devices) are used, although higher speed and lower power consumption can be achieved under low voltage conditions, due to their limited withstand voltage, they cannot withstand higher supply voltages (such as 3.3V or 5V), which easily leads to device breakdown or reliability problems, thereby limiting the scope of application and failing to achieve normal operation under high voltage.

[0004] Therefore, there is an urgent need for a control circuit and method that can monitor the power supply voltage in real time and automatically switch the high and low voltage modules in the circuit according to the actual voltage conditions, taking into account the voltage change requirements and the high-speed performance requirements of the circuit to optimize the performance of the circuit under different voltage conditions. Summary of the invention

[0005] The problem to be solved by the present invention is to provide a power supply voltage identification control circuit and method in analog-to-digital conversion, to monitor and identify the power supply voltage in real time, and then to realize automatic switching control of high and low voltage modules in an actual circuit.

[0006] The present invention adopts the following technical solution: a power supply voltage identification and control method in analog-to-digital conversion, comprising the following steps: Step 1, setting a resistor string between the power supply voltage Vdd to be monitored and the ground, reducing the power supply voltage Vdd to be monitored to obtain a reduced power supply voltage Vdd1, wherein the power supply voltage Vdd to be monitored is distributed in grades; Step 2: Select the reference voltage Vref generated by the internal bandgap reference of the chip as a reference, perform reduction processing, and obtain the first reference voltage Vref1 and the second reference voltage Vref2 based on the voltage fluctuation range that needs to be tolerated; Step 3, input the reduced power supply voltage Vdd1 and the first reference voltage Vref1 into the first comparator comph, input the reduced power supply voltage Vdd1 and the second reference voltage Vref2 into the second comparator cpmpl, and after comparison, output comparison results Vo1 and Vo2 to the state recognition machine respectively; Step 4: The state recognition machine performs voltage determination according to the state changes of the comparison results Vo1 and Vo2 to obtain a voltage recognition result.

[0007] Preferably, in step 1, the power supply voltage Vdd to be monitored is distributed in two or three levels, the high level voltage is Vdd_hi, and the low level voltage is Vdd_lo; The voltage reduction factor of the resistor string is α, and the reduced power supply voltage Vdd1 is output between the last two resistors at the end of the resistor string close to the ground, and the value of Vdd1 is Vdd*α; The reduced high-end voltage is Vdd_hi*α, and the reduced low-end voltage is Vdd_lo*α.

[0008] Preferably, in step 2, considering the actual power supply noise and error tolerance, the voltage fluctuation range that needs to be tolerated is ±10%, the high-end voltage fluctuation interval is [0.9*Vdd_hi, 1.1*Vdd_hi] interval, the low-end voltage fluctuation interval is [0.9*Vdd_lo, 1.1*Vdd_lo] interval, and 0.9*Vdd_hi-1.1*Vdd_lo is greater than 500mV.

[0009] Preferably, in step 2, the first reference voltage Vref1 is set to 1.1α*Vdd_lo, and the second reference voltage Vref2 is set to 0.9α*Vdd_lo; The reference voltage Vref is divided by setting a resistor string to obtain a first reference voltage Vref1 and a second reference voltage Vref2.

[0010] Preferably, in step 3, the first comparator comph and the second comparator cpmpl are identical double-ended comparators; The first comparator comph has its input terminal vip1 receiving the first reference voltage Vref1, its input terminal vin1 receiving the reduced power supply voltage Vdd1, and its output terminal outputting the comparison result Vo1; The second comparator compl has its input terminal vip2 receiving the second reference voltage Vref2, its input terminal vin2 receiving the reduced power supply voltage Vdd1, and its output terminal outputting the comparison result Vo2.

[0011] Preferably, for the first comparator comph, the determination rule is: Vo1 = 1 when Vref1 > Vdd1, and Vo1 = 0 when Vref1 < Vdd1; For the second comparator compl, the determination rule is: Vo2 = 1 when Vref2 > Vdd1, and Vo2 = 0 when Vref2 < Vdd1; When Vref1 is close to Vdd1 and Vref2 is close to Vdd1, the first comparator comph and the second comparator cpmpl cannot accurately identify the magnitude of the input voltage, and the judgment results Vo1 and Vo2 fluctuate between 0 and 1, presenting a metastable state.

[0012] Preferably, the state recognition machine makes a voltage determination according to the state changes of the comparison results Vo1 and Vo2, and the method is as follows: When the power supply voltage Vdd to be monitored decreases from the high - grade voltage Vdd_hi to the low - grade voltage Vdd_lo: When Vo1 = 0 and Vo2 = 0, the recognition result is 00, and the determined voltage is Vdd_hi; When Vo1 changes from 0 to 1 and Vo2 = 0, the recognition result is 00, and the determined voltage is Vdd_hi; When Vo1 = 1 and Vo2 = 0, the recognition result is 00, and the determined voltage is Vdd_hi; When Vo1 = 1 and Vo2 changes from 0 to 1, the recognition result is 11, and the determined voltage is Vdd_lo; When Vo1 = 1 and Vo2 = 1, the recognition result is 11, and the determined voltage is Vdd_lo; When the power supply voltage Vdd to be monitored increases from the low - grade voltage Vdd_lo to the high - grade voltage Vdd_hi: When Vo1 = 1 and Vo2 = 1, the recognition result is 11, and the determined voltage is Vdd_lo; When Vo1 = 1 and Vo2 changes from 1 to 0, the recognition result is 11, and the determined voltage is Vdd_lo; When Vo1 = 1 and Vo2 = 0, the recognition result is 11, and the determined voltage is Vdd_lo; When Vo1 changes from 1 to 0 and Vo2 = 0, the recognition result is 00, and the determined voltage is Vdd_hi; When Vo1=0, Vo2=0, the recognition result is 00, and the determination voltage is Vdd_hi.

[0013] The technical solution of the present invention also provides: a power supply voltage identification control circuit in analog-to-digital conversion, used to implement any of the above control methods, comprising: A resistor string is connected between the power supply voltage to be monitored and the ground, and is used to control the power supply voltage to be reduced to obtain a reduced power supply voltage Vdd1; A first comparator comph, used for comparing the first reference voltage Vref1 with the reduced power supply voltage Vdd1; A second comparator compl, used for comparing the second reference voltage Vref2 with the reduced power supply voltage Vdd1; The state recognition machine is used to perform voltage judgment on the state change of the output results of the first comparator comph and the second comparator compl to obtain a voltage recognition result.

[0014] Compared with the prior art, the present invention adopts the above technical solution and has the following technical effects: 1. The power supply voltage identification and control method of the present invention can monitor and identify the power supply voltage in real time, and then realize automatic switching control of high and low voltage modules in the actual circuit, so as to take into account the voltage change requirements and the circuit high-speed performance requirements.

[0015] 2. The power supply voltage identification and control method of the present invention can achieve stable output of identification results when the power supply voltage fluctuates within a certain range. The power supply voltage fluctuation range can cover the fluctuations caused by the power supply itself being affected by noise under conventional application conditions.

[0016] 3. The power supply voltage identification control circuit of the present invention can work under the control of the monitored variable voltage without the need for additional power supply, and is not affected by its voltage change. It uses two identical comparators and jointly determines the specific range of the voltage to be identified based on the results of the two comparators. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 This is a structural block diagram of a power supply voltage identification control circuit according to an embodiment of the present invention; Figure 2 FIG. 4 is a state diagram of a single comparator solution according to an embodiment of the present invention. DETAILED DESCRIPTION

[0018] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the application is further elaborated in detail below in conjunction with the accompanying drawings. The described embodiments are only a part of the embodiments involved in the present invention. All non-innovative embodiments of other researchers in the field on this embodiment belong to the protection scope of the present invention. At the same time, for the step numbering in the embodiment of the present invention, it is only set for the convenience of explanation, and the order between the steps is not limited in any way. The execution order of each step in the embodiment can be adaptively adjusted according to the understanding of those skilled in the art.

[0019] Embodiment 1 A power supply voltage identification control circuit in analog-to-digital conversion comprises: a resistor string, a first comparator compl, a second comparator compl and a state identification machine.

[0020] A resistor string is connected between the power supply voltage to be monitored and the ground, and is used to control the power supply voltage to be reduced, and the voltage reduction coefficient is α, so as to obtain the reduced power supply voltage Vdd1; A first comparator comph, used for comparing the first reference voltage Vref1 with the reduced power supply voltage Vdd1; A second comparator compl, used for comparing the second reference voltage Vref2 with the reduced power supply voltage Vdd1; The state recognition machine is used to perform voltage judgment on the state change of the output results of the first comparator comph and the second comparator compl to obtain a voltage recognition result.

[0021] In actual analog circuit applications, the power supply voltage may vary, sometimes spanning different voltage standards. In this embodiment, two high and low voltages to be identified are used for distinction, where the high voltage is Vdd_hi and the low voltage is Vdd_lo.

[0022] It should be noted that, considering the actual power supply noise and error tolerance, the analog voltage generally has an error tolerance range of about ±10%, that is, the high-end voltage error tolerance range is in the range of [0.9*Vdd_hi, 1.1*Vdd_hi], and the low-end voltage error tolerance range is in the range of [0.9*Vdd_lo, 1.1*Vdd_lo]. Because there will be obvious differences between the high and low voltage values, there will inevitably be a relationship of 0.9*Vdd_hi>1.1*Vdd_lo, and the value of 0.9*Vdd_hi-1.1*Vdd_lo will generally exceed 500mV to ensure a significant distinction between the two voltages.

[0023] On the other hand, if general analog circuits need to work at both high and low voltages, components with higher voltage resistance will be selected to ensure circuit safety. Therefore, the voltage identification module only needs to identify the ±10% boundary of the above-mentioned low-range voltage Vdd_lo.

[0024] In this embodiment, in order to accurately identify the ±10% boundary voltage of Vdd_lo, an on-chip reference source Vref is selected as a reference, and the voltage of the on-chip reference source Vref is not affected by the power supply voltage.

[0025] In order to balance the recognition accuracy and the design difficulty, the present embodiment selects a voltage reduction coefficient α (α<1) for preprocessing the power supply voltage Vdd and the reference voltage Vref to be monitored.

[0026] The power supply voltage Vdd to be monitored is divided by a resistor string to obtain a reduced power supply voltage Vdd1, Vdd1=Vdd*α. At the same time, the same method is used to divide Vref using a resistor string to obtain reference voltages of 1.1α*Vdd_lo and 0.9α*Vdd_lo, which are equal, respectively Vref1 and Vref2.

[0027] The reduced power supply voltage Vdd1 is compared with Vref1 and Vref2 simultaneously by two comparators comph and compl.

[0028] The first comparator comph has an input terminal vip1 inputting a first reference voltage Vref1, an input terminal vin1 inputting a reduced power supply voltage Vdd1, and an output terminal outputting a comparison result Vo1; The second comparator compl has an input terminal vip2 inputting a second reference voltage Vref2, an input terminal vin2 inputting a reduced power supply voltage Vdd1, and an output terminal outputting a comparison result Vo2.

[0029] The two comparators will give an output result of 1 or 0 according to the different levels of the signals at the two input ends, and input it into the state machine recognition machine. The state machine recognition machine is used to monitor the output results of the two comparators in real time, and then the actual working voltage can be stably determined.

[0030] Embodiment 2 In conventional interface power supply application scenarios, the power supply voltage shows a clear "tiered" distribution due to different product requirements. Based on the actual chip implementation process, if the interface power supply changes, most scenarios cover 2 levels, and very few scenarios are 3 levels, and there are obvious differences between each voltage level.

[0031] In this embodiment, taking the more common switching between 1.8V and 3.3V as an example, the implementation steps of the power supply voltage identification control method in analog-to-digital conversion of the present invention are described in detail.

[0032] The first step is to "reduce" the power supply voltage Vdd by connecting a resistor string between the power supply voltage Vdd to be monitored and ground, such as Figure 1 As shown, in this embodiment, the reduction coefficient α is 1 / 4, so that the reduced voltages corresponding to 1.8V and 3.3V are 0.45V and 0.825V respectively.

[0033] It should be noted that in normal application scenarios, the power supply voltage will be provided by chips or power modules such as LDO and DCDC. Usually, filter capacitors will be placed at the power supply end or decoupling capacitors will be placed at the power receiving end to reduce fluctuations caused by non-ideal factors such as power supply noise and improve the stability of the power supply voltage.

[0034] However, due to the limitations of actual application conditions, power supply fluctuations will not be filtered out to an "absolutely clean" state, and there will always be certain fluctuation interference. For example, for a 3.3V powered LDO, the output may fluctuate by more than ten mV or even close to 100 mV, depending on the size of the filter capacitor.

[0035] In this embodiment, if Figure 1 As shown, the power supply voltage Vdd is compressed to 1 / 4 of the original value after being reduced by the resistor string. At this time, the corresponding maximum fluctuation amplitude is only about 20mV, which can be completely covered by the spans of different threshold reference voltages corresponding to the two comparators.

[0036] The second step is to take the reference voltage generated by the bandgap reference inside the chip and "reduce" it by a certain ratio. The reduction range is related to the result after the power supply voltage to be detected is reduced in the first step and the fluctuation range that needs to be tolerated.

[0037] In this embodiment, for 1.8V power supply, the safety range is generally within ±10%, which is about 1.6-2V. Considering the 1 / 4 reduction in the first step, the reduction is 0.4V-0.5V. The protection principle for 1.8V withstand voltage devices is that as long as the withstand voltage upper limit is not exceeded, 0.5V is selected as Vref1 in this embodiment, and 0.4V after the reduction of the 1.8V typical working voltage is selected as Vref2.

[0038] Within the 1.8V device operating voltage range, the voltage generated by the bandgap reference is generally 1.2V, and 0.5V and 0.4V can be achieved through a resistor string.

[0039] The third step is to connect Vdd / 4 and Vref1, Vref2 to two two-terminal comparators respectively, perform voltage judgment, obtain comparison results Vo1, Vo2, and input them into the state recognition machine.

[0040] The decision rules for the two comparators are: When Vip>Vin, Vo=1; when Vip>Vin, Vo=0.

[0041] Because of the non-ideal factors such as noise and metastable state of the comparator itself, as well as the non-ideal factors such as noise or fluctuations in the input signal itself, when Vip and Vin are very close (for example, when the difference is a few mV), the comparator will not be able to accurately identify the input size, and the judgment result will jump between 0 and 1, presenting an unstable state.

[0042] If the two comparator solutions of the present invention are not adopted, but only a single comparator is adopted, then when the voltage to be monitored is close to the reference voltage, the power supply voltage fluctuation caused by non-ideal factors such as noise will cause the determination result to constantly jump between the two situations, such as Figure 2 As shown, the corresponding interface circuit cannot work under stable working conditions.

[0043] After adopting the two comparator scheme of the present invention, because the corresponding judgment references of the two comparators are obviously different, it can be ensured that one of the two comparators will have a stable output result, and then according to the result of the other comparator, a stable and correct recognition result is given by combining the two, thereby ensuring that the corresponding interface circuit can work stably.

[0044] Step 4: In the state recognition machine, the two comparators comph and compl, and the corresponding comparison results Vo1 and Vo2 will present different situations as the voltage of the power supply to be monitored decreases and increases. Even considering the non-ideal factors such as noise described in the third step, the combination of the two comparator results is included in the situation in Table 1 below. Therefore, the state change is identified by the state recognition machine, the judgment voltage is obtained, and the automatic switching control of the high and low voltage modules is realized.

[0045] Table 1 Summary of the identification results of the two comparators

[0046] From Table 1, it can be seen that the rules for voltage recognition by the state recognition machine are as follows: (1) When the power supply voltage Vdd to be monitored decreases from the high-end voltage Vdd_hi to the low-end voltage Vdd_lo: When Vo1=0, Vo2=0, the recognition result is 00, and the determination voltage is Vdd_hi; When Vo1 changes from 0 to 1 and Vo2 = 0, the recognition result is 00, and the judgment voltage is Vdd_hi; When Vo1=1 and Vo2=0, the recognition result is 00, and the determination voltage is Vdd_hi; When Vo1=1 and Vo2 changes from 0 to 1, the recognition result is 11, and the voltage is determined to be Vdd_lo; When Vo1=1, Vo2=1, the recognition result is 11, and the voltage is determined to be Vdd_lo; (2) When the power supply voltage Vdd to be monitored increases from the low-range voltage Vdd_lo to the high-range voltage Vdd_hi, When Vo1=1, Vo2=1, the recognition result is 11, and the voltage is determined to be Vdd_lo; When Vo1=1 and Vo2 changes from 1 to 0, the recognition result is 11, and the voltage is determined to be Vdd_lo; When Vo1=1 and Vo2=0, the recognition result is 11, and the voltage is determined to be Vdd_lo; When Vo1 changes from 1 to 0 and Vo2 = 0, the recognition result is 00, and the judgment voltage is Vdd_hi; When Vo1=0, Vo2=0, the recognition result is 00, and the determination voltage is Vdd_hi.

[0047] In particular, although the corresponding Vdd of states 3 and 7 in Table 1 are both between 1.8V and 2V, they are identified as different judgment voltages due to different power supply change directions, which will not have an adverse effect on the circuit.

[0048] Because even in state 3, the actual voltage is between 1.8V-2V, but the voltage determined at this time is 3.3V, so the corresponding circuit module still remains in the 3.3V device state, and the actual 1.8V-2V voltage is relatively low and will not cause damage to the 3.3V device.

[0049] At the same time, it can be seen from Table 1 that although the two comparators still have fluctuations between 0 and 1 when their respective input terminals are close to each other, by using the state machine to identify and monitor the respective results of the two comparators, the influence of one of the fluctuation results can be effectively eliminated, thereby achieving a stable output result.

[0050] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principle of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A power supply voltage identification and control method in analog-to-digital conversion, characterized in that: The steps include: Step 1, setting a resistor string between the power supply voltage Vdd to be monitored and the ground, reducing the power supply voltage Vdd to be monitored to obtain a reduced power supply voltage Vdd1, wherein the power supply voltage Vdd to be monitored is distributed in grades; Step 2: Select the reference voltage Vref generated by the internal bandgap reference of the chip as a reference, perform reduction processing, and obtain the first reference voltage Vref1 and the second reference voltage Vref2 based on the voltage fluctuation range that needs to be tolerated; Step 3, input the reduced power supply voltage Vdd1 and the first reference voltage Vref1 into the first comparator comph, input the reduced power supply voltage Vdd1 and the second reference voltage Vref2 into the second comparator cpmpl, compare them at the same time, and output the comparison results Vo1 and Vo2 to the state recognition machine respectively; Step 4: The state recognition machine performs voltage determination according to the state changes of the comparison results Vo1 and Vo2 to obtain a voltage recognition result.

2. The power supply voltage identification and control method in analog-to-digital conversion according to claim 1, characterized in that: The power supply voltage Vdd to be monitored is distributed in two or three levels, the high level voltage is Vdd_hi, and the low level voltage is Vdd_lo.

3. The power supply voltage identification and control method in analog-to-digital conversion according to claim 2, characterized in that: In step 1, the voltage reduction coefficient of the resistor string is α, and the reduced power supply voltage Vdd1 is output between the last two resistors at one end of the resistor string close to the ground, and the value of Vdd1 is Vdd*α.

4. The power supply voltage identification and control method in analog-to-digital conversion according to claim 3 is characterized in that: In step 2, considering the actual power supply noise and error tolerance, the voltage fluctuation range that needs to be tolerated is ±10%, the high-end voltage fluctuation range is [0.9*Vdd_hi, 1.1*Vdd_hi], the low-end voltage fluctuation range is [0.9*Vdd_lo, 1.1*Vdd_lo], and 0.9*Vdd_hi-1.1*Vdd_lo is greater than 500mV.

5. The power supply voltage identification and control method in analog-to-digital conversion according to claim 4, characterized in that: In step 2, the fluctuation range of the low-range voltage Vdd_lo is identified, the first reference voltage Vref1 is set to 1.1α*Vdd_lo, and the second reference voltage Vref2 is set to 0.9α*Vdd_lo.

6. The power supply voltage identification and control method in analog-to-digital conversion according to claim 5, characterized in that: The reference voltage Vref is not affected by the power supply voltage Vdd to be monitored. The reference voltage Vref is divided by setting a resistor string to obtain a first reference voltage Vref1 and a second reference voltage Vref2.

7. The power supply voltage identification and control method in analog-to-digital conversion according to claim 5, characterized in that: In step 3, the first comparator comph and the second comparator cpmpl are identical double-ended comparators; The first comparator comph has an input terminal vip1 inputting a first reference voltage Vref1, an input terminal vin1 inputting a reduced power supply voltage Vdd1, and an output terminal outputting a comparison result Vo1; The second comparator compl has an input terminal vip2 that inputs a second reference voltage Vref2, an input terminal vin2 that inputs a reduced power supply voltage Vdd1, and an output terminal that outputs a comparison result Vo2.

8. The power supply voltage identification and control method in analog-to-digital conversion according to claim 7, characterized in that: The first comparator comph has a determination rule as follows: when Vref1> Vdd1, Vo1=1; when Vref1< Vdd1, Vo1=0; The second comparator compl has a determination rule as follows: when Vref2>Vdd1, Vo2=1; and when Vref2<Vdd1, Vo2=0.

9. The power supply voltage identification and control method in analog-to-digital conversion according to claim 7, characterized in that: In step 4, the state recognition machine performs voltage determination according to the state changes of the comparison results Vo1 and Vo2, and the method is as follows: When the power supply voltage Vdd to be monitored decreases from the high-end voltage Vdd_hi to the low-end voltage Vdd_lo: When Vo1=0, Vo2=0, the recognition result is 00, and the determination voltage is Vdd_hi; When Vo1 changes from 0 to 1 and Vo2 = 0, the recognition result is 00, and the judgment voltage is Vdd_hi; When Vo1=1 and Vo2=0, the recognition result is 00, and the determination voltage is Vdd_hi; When Vo1=1 and Vo2 changes from 0 to 1, the recognition result is 11, and the voltage is determined to be Vdd_lo; When Vo1=1, Vo2=1, the recognition result is 11, and the voltage is determined to be Vdd_lo; When the power supply voltage Vdd to be monitored increases from the low-range voltage Vdd_lo to the high-range voltage Vdd_hi: When Vo1=1, Vo2=1, the recognition result is 11, and the voltage is determined to be Vdd_lo; When Vo1=1 and Vo2 changes from 1 to 0, the recognition result is 11, and the voltage is determined to be Vdd_lo; When Vo1=1 and Vo2=0, the recognition result is 11, and the voltage is determined to be Vdd_lo; When Vo1 changes from 1 to 0 and Vo2 = 0, the recognition result is 00, and the judgment voltage is Vdd_hi; When Vo1=0, Vo2=0, the recognition result is 00, and the determination voltage is Vdd_hi.

10. A power supply voltage identification control circuit in analog-to-digital conversion, used to implement the control method according to any one of claims 1 to 9, characterized in that: include: A resistor string is connected between the power supply voltage to be monitored and the ground, and is used to control the power supply voltage to be reduced to obtain a reduced power supply voltage Vdd1; A first comparator comph, used for comparing the first reference voltage Vref1 with the reduced power supply voltage Vdd1; A second comparator compl, used for comparing the second reference voltage Vref2 with the reduced power supply voltage Vdd1; The state recognition machine is used to perform voltage judgment on the state change of the output results of the first comparator comph and the second comparator compl to obtain a voltage recognition result.

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