Cache management method and device based on multicast counting
By dividing the cache space into multiple sets of cache blocks in cache management and using bits to characterize the usage state, the complexity and resource consumption problems caused by adding control modules in the prior art are solved, efficient cache management and allocation are achieved, and system performance and efficiency are improved.
Patent Information
- Application Number
- CN202510047813.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-10
- Publication Date
- 2025-05-13
AI Technical Summary
The existing cache management method requires additional control modules to manage packets, resulting in increased system complexity and increased resource consumption, affecting system performance and efficiency.
By dividing the cache space into N groups, each group contains M cache blocks, and each cache block corresponds to K bits to characterize its usage status. The cache management data is dynamically updated and reflected the usage of cache blocks, and efficient management and allocation of cache blocks is achieved.
There is no need to add additional control modules, which simplifies the system structure, reduces resource consumption, improves the flexibility and real-timeness of cache management, and improves the performance and efficiency of the entire network system.
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Figure CN119996360A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of data communication technology, and in particular to a cache management method and device based on multicast counting. Background Art
[0002] At present, cache management is mainly done by adding an engine to the cache management device to detect cache usage in real time and dynamically adjust the allocation of cache resources. When congestion occurs, the engine first releases low-priority messages to make room for high-priority messages.
[0003] However, this method requires an additional control module to manage messages, which not only increases the complexity of the system, but also leads to an increase in resource consumption, affecting the overall performance and efficiency of the system. Summary of the invention
[0004] The present application provides a cache management method and device based on multicast counting, so as to realize efficient management and flexible allocation of cache blocks.
[0005] This application provides the following solutions:
[0006] According to a first aspect, a cache management method based on multicast counting is provided, wherein the cache space is divided into N groups, each group includes M cache blocks, and the cache blocks are used to cache messages, and M and N are positive integers, and the method includes:
[0007] In response to a message processing event, cache management data for managing the cache space is updated, the cache management data including bits corresponding to N×M cache blocks, each cache block corresponding to K bits, the bit values of the K bits are used to represent the usage status of the corresponding cache block, and K is a positive integer greater than 1;
[0008] The cache management data is stored in a storage unit corresponding to the cache management device.
[0009] Optionally, if the cache block caches a multicast message, the bit values of the K bits corresponding to the cache block are used to represent the number of times the multicast message is to be forwarded.
[0010] Optionally, in response to the message processing event, updating the cache management data used to manage the cache space includes:
[0011] In response to receiving a message cache request, determining the number of cache blocks required to be occupied by the message;
[0012] According to the cache management data, searching, from the N×M cache blocks, a target cache block that satisfies the number of cache blocks required to be occupied by the message;
[0013] The target cache block is allocated to the message, and the bit value of the bit corresponding to the target cache block is updated.
[0014] Optionally, in response to the message processing event, updating the cache management data used to manage the cache space includes:
[0015] In response to an event that a message in the cache block is forwarded, a bit value of a bit corresponding to the cache block where the forwarded message is located is updated.
[0016] Optionally, the message is a multicast message;
[0017] The step of searching, according to the cache management data, from the M×N cache blocks, a target cache block that satisfies the number of cache blocks required to be occupied by the message comprises:
[0018] Traversing the cache management data, performing a first specified operation on the bit values of K bits corresponding to each cache block, until the number of determined target cache blocks meets the number of cache blocks required to be occupied by the multicast message;
[0019] The first designation operation includes: judging the usage status of the current cache block according to the bit values of K bits corresponding to the current cache block; and determining the current cache block as the target cache block when the usage status of the current cache block is idle.
[0020] Optionally, updating the bit value of the bit corresponding to the target cache block includes:
[0021] Determining the multicast number of the multicast message;
[0022] The K bits corresponding to each of the target cache blocks are assigned values using the multicast number.
[0023] Optionally, judging the usage status of the current cache block according to the bit values of K bits corresponding to the current cache block includes:
[0024] Perform an OR operation on the bit values of the K bits corresponding to the current cache block to obtain a result value;
[0025] When the result value satisfies a first result threshold, determining that the usage state of the current cache block is idle;
[0026] When the result value meets the second result threshold, it is determined that the usage state of the current cache block is occupied.
[0027] Optionally, the message is a unicast message;
[0028] The step of searching, according to the cache management data, from the N×M cache blocks, a target cache block that satisfies the number of cache blocks required to be occupied by the message comprises:
[0029] Traversing the cache management data, performing a second specified operation on a bit value of a specified bit among the K bits corresponding to each cache block, until the number of target cache blocks determined satisfies the number of cache blocks required to be occupied by the unicast message;
[0030] The second designated operation includes: judging the usage status of the current cache block according to the bit value of the designated bit among the K bits corresponding to the current cache block; and determining the current cache block as the target cache block when the usage status of the current cache block is idle.
[0031] Optionally, updating the bit value of the bit corresponding to the target cache block includes:
[0032] Assign a value to a designated bit among the K bits corresponding to each of the target cache blocks.
[0033] Optionally, judging the usage status of the current cache block according to the bit value of a designated bit among the K bits corresponding to the current cache block includes:
[0034] When the bit value of the designated bit position meets the first result threshold, determining that the usage state of the current cache block is idle;
[0035] When the bit value of the designated bit position meets the second result threshold, it is determined that the usage status of the current cache block is occupied.
[0036] Optionally, in response to the event that the message in the cache block is forwarded, updating the bit value of the bit corresponding to the cache block where the forwarded message is located includes:
[0037] When the message is a multicast message, in response to the multicast message being forwarded once, the value represented by the K bits corresponding to the cache block where the forwarded message is located is decremented until the bit value of the K bits indicates that the usage state of the corresponding cache block is idle, and the cache block where the forwarded message is located is released;
[0038] When the message is a unicast message, in response to the unicast message being forwarded, the bit value of a designated bit among the K bits corresponding to the cache block where the forwarded message is located is restored to represent the usage state as idle, and the cache block where the forwarded message is located is released.
[0039] According to a second aspect, a cache management device based on multicast counting is provided, which is applied to a cache space divided into N groups, each group including M cache blocks, and the cache blocks are used to cache messages, and the device includes:
[0040] A storage unit configured to store cache management data for managing cache space;
[0041] An update unit is configured to update the cache management data in response to a message processing event; the cache space is divided into N groups, each group includes M cache blocks, the cache blocks are used to cache messages, and M and N are positive integers; the cache management data includes bits corresponding to N×M cache blocks, each cache block corresponds to K bits, and the bit values of the K bits are used to characterize the usage status of the corresponding cache block, and K is a positive integer greater than 1.
[0042] According to a third aspect, a computer-readable storage medium is provided, on which a computer program is stored, and when the program is executed by a processor, the steps of any one of the methods described in the first aspect are implemented.
[0043] According to a fourth aspect, there is provided an electronic device, comprising:
[0044] one or more processors; and
[0045] A memory associated with the one or more processors, the memory being used to store program instructions, wherein the program instructions, when read and executed by the one or more processors, execute the steps of the method described in any one of the first aspects above.
[0046] According to a fifth aspect, a computer program product is provided, comprising a computer program, which, when executed by a processor, implements the steps of any one of the methods described in the first aspect.
[0047] According to the specific embodiments provided in this application, this application discloses the following technical effects:
[0048] 1) This application divides the cache space into N groups by means of cache management data, each group contains M cache blocks, and each cache block corresponds to K bits, which are used to characterize its usage status. This method does not require an additional control module to manage messages, but directly uses cache management data to dynamically update and reflect the usage of cache blocks. When a message processing event occurs, the cache management data can be quickly responded and updated, thereby achieving efficient management and allocation of cache blocks. This design not only simplifies the system structure and reduces resource consumption, but also improves the flexibility and real-time performance of cache management, effectively improving the performance and efficiency of the entire network system.
[0049] 2) In the present application, when a cache block caches a multicast message, the K bits corresponding to the cache block can not only represent the usage status of the cache block, but also realize the counting function of the multicast messages stored in the cache block. This method integrates the cache management and multicast counting functions, and there is no need to add additional counters to manage the counting of multicast messages. In this way, not only the system structure is simplified and resource consumption is reduced, but also the flexibility and real-time performance of cache management are improved.
[0050] Of course, any product implementing the present application does not necessarily need to achieve all of the advantages described above at the same time. BRIEF DESCRIPTION OF THE DRAWINGS
[0051] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0052] Figure 1 4 is a flowchart of a cache management method based on multicast counting provided in an embodiment of the present application;
[0053] Figure 2 A schematic diagram of cache management data provided by an embodiment of the present application;
[0054] Figure 3 A schematic diagram of a detection result of a first image provided in an embodiment of the present application;
[0055] Figure 4 A schematic block diagram of a cache management device based on multicast counting provided in an embodiment of the present application;
[0056] Figure 5 A schematic block diagram of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0057] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field belong to the scope of protection of this application.
[0058] The terms used in the embodiments of the present invention are only for the purpose of describing specific embodiments, and are not intended to limit the present invention. The singular forms "a", "said" and "the" used in the embodiments of the present invention and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings.
[0059] It should be understood that the term "and / or" used in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.
[0060] The word "if" as used herein may be interpreted as "at the time of" or "when" or "in response to determining" or "in response to detecting", depending on the context. Similarly, the phrases "if it is determined" or "if (stated condition or event) is detected" may be interpreted as "when it is determined" or "in response to determining" or "when detecting (stated condition or event)" or "in response to detecting (stated condition or event)", depending on the context.
[0061] The existing cache management method requires an additional control module to manage messages, which not only increases the complexity of the system, but also leads to an increase in resource consumption, affecting the overall performance and efficiency of the system.
[0062] In view of this, the present application provides a new idea and a new cache management method. Figure 1 The flowchart of the cache management method provided in the embodiment of the present application, the execution subject of the method can be a cache management device, the device can be set in any computer device with data storage and processing capabilities, can be set on the server side, and can also be set in a computer terminal with strong data processing capabilities. The method may include the following steps:
[0063] Step 101: The cache space is pre-divided into N groups, each group includes M cache blocks, and the cache blocks are used to cache messages. M and N are positive integers.
[0064] Step 102: In response to a message processing event, the cache management data used to manage the cache space is updated, the cache management data includes bits corresponding to N×M cache blocks, each cache block corresponds to K bits, and the bit values of the K bits are used to characterize the usage status of the corresponding cache block, where K is a positive integer greater than 1.
[0065] It can be seen that the embodiment of the present application divides the cache space into N groups by means of cache management data, each group contains M cache blocks, and each cache block corresponds to K bits, which are used to characterize its usage status. This method does not require an additional control module to manage messages, but directly uses cache management data to dynamically update and reflect the usage of cache blocks. When a message processing event occurs, the cache management data can be quickly responded and updated, thereby achieving efficient management and allocation of cache blocks. This design not only simplifies the system structure and reduces resource consumption, but also improves the flexibility and real-time performance of cache management, effectively improving the performance and efficiency of the entire network system.
[0066] The following is a detailed description of the steps in the above process and the effects that can be further produced in conjunction with the embodiments. It should be noted that the "first" and "second" and other limitations involved in the present disclosure do not have limitations in terms of size, order, and quantity, and are only used to distinguish them in name. For example, "first specified operation" and "second specified operation" are only used to distinguish two operations in name. "First result threshold" and "second result threshold" are only used to distinguish two thresholds in name. And so on.
[0067] The above step 101, i.e., "preliminarily dividing the cache space into N groups, each group including M cache blocks, the cache blocks are used to cache messages, and M and N are positive integers", is described in detail below in conjunction with an embodiment.
[0068] First, the cache space is divided into N groups, each group contains M cache blocks, that is, a total of N×M cache blocks, where N and M are both positive integers.
[0069] Specifically, the cache space is divided into N independent groups, each group can be regarded as a sub-cache area, and each sub-cache area is further divided into M cache blocks. Each cache block is a basic storage unit used to cache messages. The size of each cache block can be configured according to actual needs to meet different storage and management requirements.
[0070] This division makes cache management highly flexible and scalable. When the system needs to adjust the cache capacity or management strategy, it only needs to adjust the values of N and M without large-scale reconstruction of the entire cache management mechanism.
[0071] The specific values of N and M can be flexibly set according to actual needs, and are not limited in the embodiments of the present application.
[0072] The above step 102, ie, "updating cache management data for managing cache space in response to a message processing event" is described in detail below in conjunction with an embodiment.
[0073] In an embodiment of the present application, cache management data is created in advance, and the cache management data is used to manage the cache space.
[0074] like Figure 2 The figure is a schematic diagram of cache management data. The cache management data includes bits corresponding to N×M cache blocks, each cache block corresponds to K bits, that is, the cache management data consists of N×M×K bits, and its core is the mapping relationship between each cache block and K bits.
[0075] The bit values of the K bits are used to represent the usage status of the corresponding cache block, where the usage status includes the cache block being free and the cache block being occupied.
[0076] If the cache block caches the multicast message, the bit values of the K bits corresponding to the cache block are used to represent the number of times the multicast message is to be forwarded.
[0077] That is to say, the bit values of the K bits corresponding to the cache block can not only represent the usage status of the corresponding cache block, but also realize the counting function of the multicast message.
[0078] In an embodiment of the present application, cache management data may be stored in a storage unit corresponding to the cache management device, for example, the storage unit is built into the cache management device. In essence, cache management and multicast counting are achieved through mapping of the storage unit and the cache.
[0079] In addition, for unicast messages and multicast messages, the bit widths required for the usage status of the cache block are also different.
[0080] In the case of multicast messages, the usage status of the cache block needs K bits to represent, and the K bits can also count the multicast messages, that is, represent the number of times the multicast messages are to be forwarded.
[0081] In the case of unicast messages, the usage status of the cache block only needs to be represented by a specific bit among the K bits, such as the first bit among the K bits. This is because the unicast message only needs to be forwarded to one receiving end, and it is sufficient to represent the usage status of the cache block by 0 and 1. Specifically, when a specific bit among the K bits is 1, it indicates that the cache block is occupied and the unicast message is still stored in the cache block; when a specific bit among the K bits is 0, it indicates that the cache block is idle.
[0082] Cache management data can be implemented using a variety of data structures, such as lists, arrays, etc., as long as they can reflect the mapping relationship between each cache block and K bits. The embodiment of the present application does not limit the data structure of the cache management data.
[0083] The message processing event in the embodiment of the present application may be an event of receiving a message cache request, or an event of forwarding a message in a cache block.
[0084] When the message processing event is an event of receiving a message cache request, such as Figure 3 As shown, updating the cache management data may include the following steps:
[0085] Step 301: In response to receiving a message cache request, determining the number of cache blocks that the message needs to occupy;
[0086] Step 302: searching, according to the cache management data, from the N×M cache blocks, a target cache block that satisfies the number of cache blocks required to be occupied by the message;
[0087] Step 303: Allocate the target cache block to the message, and update the bit value of the bit corresponding to the target cache block.
[0088] In step 301, when a message cache request is received, the message size and the capacity of each cache block need to be determined first. The message size is usually in bytes, and the capacity of the cache block is pre-set. The number of cache blocks required for the message is determined by dividing the message size by the capacity of the cache block and rounding up to get the number of cache blocks required. For example, if the message size is 1000 bytes and the capacity of each cache block is 256 bytes, 4 cache blocks need to be occupied (1000÷256≈4).
[0089] In step 302, according to the number of cache blocks required to be occupied by the message, a cache block with a free usage status, ie, a target cache block, can be quickly found in the cache management data, thereby achieving efficient cache allocation.
[0090] As an implementable method, when the message is a multicast message, the cache management data is traversed, and the first specified operation is performed on the bit values of K bits corresponding to each cache block until the number of target cache blocks determined meets the number of cache blocks required by the multicast message.
[0091] The first designation operation includes: judging the usage status of the current cache block according to the bit values of K bits corresponding to the current cache block; and determining the current cache block as the target cache block when the usage status of the current cache block is idle.
[0092] The traversing of the cache management data refers to checking the bit values of the K bits corresponding to the cache blocks in each group one by one in a specified order to obtain the usage status of the cache blocks.
[0093] In each group, cache blocks are usually arranged in a certain order, such as a low to high numbering order. The traversal process starts from the first cache block of the group and checks the K bits corresponding to each cache block in turn until all cache blocks in the group have been checked. After traversing all cache blocks in a group, the next group will be traversed in the order of the group. For example, if the cache space is divided into N groups, the traversal order is from group 1 to group N. During the traversal process, once the required number of cache blocks is found, the traversal can be stopped to improve efficiency.
[0094] In the first designated operation, judging the usage status of the current cache block according to the bit values of the K bits corresponding to the current cache block can be implemented as follows:
[0095] An OR operation is performed on the bit values of K bits corresponding to the current cache block to obtain a result value. When the result value meets the first result threshold, the usage state of the current cache block is determined to be idle. When the result value meets the second result threshold, the usage state of the current cache block is determined to be occupied.
[0096] Taking K=3 as an example, the first result threshold is 0, and the second result threshold is 1.
[0097] The bit values of the K bits corresponding to the current cache block are 000, and the result value obtained after the OR operation is 0, so the usage status of the current cache block is idle.
[0098] The bit values of the K bits corresponding to the current cache block are 001, and the result value obtained after the OR operation is 1, and the usage status of the current cache block is occupied.
[0099] In addition to the above implementation, the values represented by the K bits corresponding to the current cache block can also be counted, and when the value is 0, the current cache block is idle, and when it is not 0, the current cache block is occupied. The embodiment of the present application does not limit this implementation.
[0100] As another achievable manner, when the message is a unicast message, the cache management data is traversed, and the second specified operation is performed on the bit value of the specified bit in the K bits corresponding to each cache block, until the number of the determined target cache blocks meets the number of cache blocks required to be occupied by the unicast message;
[0101] The second designation operation includes: judging the usage status of the current cache block according to the bit value of the designated bit among the K bits corresponding to the current cache block; and determining the current cache block as the target cache block when the usage status of the current cache block is idle.
[0102] The traversing of the cache management data refers to checking the bit values of designated bits among the K bits corresponding to the cache blocks in each group one by one in a designated order to obtain the usage status of the cache blocks.
[0103] In the second designated operation, judging the usage status of the current cache block according to the bit value of the designated bit among the K bits corresponding to the current cache block can be implemented as follows:
[0104] When the bit value of the designated bit position meets the first result threshold, determining that the usage state of the current cache block is idle;
[0105] When the bit value of the designated bit satisfies the second result threshold, it is determined that the usage state of the current cache block is occupied.
[0106] Still taking K=3 as an example, the designated bit is the first bit among the K bits, that is, the lowest bit, the first result threshold is 0, and the second result threshold is 1.
[0107] The bit values of the K bits corresponding to the current cache block are 000, and the first bit is 0, so the usage status of the current cache block is idle.
[0108] The bit values of the K bits corresponding to the current cache block are 001, and the first bit is 1, so the usage status of the current cache block is occupied.
[0109] In addition to the above implementation, the values represented by the K bits corresponding to the current cache block can also be counted, and when the value is 0, the current cache block is idle, and when it is not 0, the current cache block is occupied. The embodiment of the present application does not limit this implementation.
[0110] In step 303, allocating the target cache block to the message means caching the message in the target cache block.
[0111] In the case of multicast messages, the bit value of the bit corresponding to the target cache block is updated, which can be implemented as follows:
[0112] Determine the multicast number of the multicast message; wherein the multicast number refers to the number of receiving ends to which the multicast message needs to be forwarded.
[0113] The K bits corresponding to each target cache block are assigned values using the multicast number; wherein the assigned K bits not only indicate that the target cache block is updated from an idle state to an occupied state, but also the bit value can represent the number of times the multicast message is to be forwarded.
[0114] Still taking K=3 as an example, if the multicast number of the multicast message is 5, the K bits corresponding to the target cache block are assigned a value of 101, and the number of times the multicast message is to be forwarded is 5.
[0115] For unicast messages, the bit value of the bit corresponding to the target cache block is updated, which can be implemented as follows:
[0116] Assign a value to a designated bit among the K bits corresponding to each target cache block.
[0117] Still taking K=3 as an example, the designated bit is the first bit among the K bits, and the first bit among the three bits corresponding to the target cache block is assigned a value of 1, indicating that the target cache block is updated from the idle state to the occupied state. The bit values of the other two bits among the three bits corresponding to the target cache block do not need to be operated and remain at the initial value.
[0118] When the message processing event is a message forwarding event, the bit value of the bit corresponding to the cache block where the forwarded message is located is updated, which may include the following two situations:
[0119] The first case: when the message is a multicast message, in response to the multicast message being forwarded once, the value represented by the K bits corresponding to the cache block where the forwarded message is located is reduced until the bit value of the K bits corresponding to the cache block where the forwarded message is located indicates that the usage status of the corresponding cache block is idle, and the cache block where the forwarded message is located is released.
[0120] Specifically, the K bits corresponding to the cache block where the forwarded message is located are equivalent to the counter of the multicast message, which can realize the counting of the multicast message. When the multicast message is forwarded once, the value represented by the K bits corresponding to the cache block where it is located can be reduced by itself. For example, the multicast number of the multicast message is 5, and the K bits corresponding to the cache block where it is located are 101 (the corresponding decimal value is 5). When it is forwarded once, the K bits become 100 (the corresponding decimal value is 4). When the K bits are 000 (the corresponding decimal value is 0), it indicates that the use state of the cache block is idle, and the multicast message has been forwarded. At this time, the cache block occupied by it can be released.
[0121] The second case: when the message is a unicast message, in response to the unicast message being forwarded, the bit value of the designated bit among the K bits corresponding to the cache block where the forwarded message is located is restored to represent the usage state as idle, and the cache block where the forwarded message is located is released.
[0122] Specifically, when a unicast message is forwarded, the K bits corresponding to the cache block where the message is located change from 001 to 000, that is, the first bit 1 is restored to the initial value 0. At this time, the usage state of the cache block is idle, and the cache block where the message is located is released.
[0123] In the embodiment of the present application, when the cache block caches a multicast message, the K bits corresponding to the cache block can not only represent the usage status of the cache block, but also realize the counting function of the multicast messages stored in the cache block. This method integrates the cache management and multicast counting functions, and there is no need to add additional counters to manage the counting of multicast messages. In this way, not only the system structure is simplified and resource consumption is reduced, but also the flexibility and real-time performance of cache management are improved.
[0124] The above is a description of a specific embodiment of the specification. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in an order different from that in the embodiments and still achieve the desired results. In addition, the processes depicted in the drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.
[0125] According to an embodiment of another aspect, a cache management device is provided. Figure 4 A schematic block diagram of a cache management device according to an embodiment is shown. Figure 4 As shown, the device 400 is applied to a cache space divided into N groups, each group including M cache blocks, and the cache blocks are used to cache messages. The device 400 includes:
[0126] A storage unit 40, configured to store cache management data for managing cache space;
[0127] The update unit 41 is configured to update the cache management data used to manage the cache space in response to the message processing event, wherein the cache space is divided into N groups, each group includes M cache blocks, and the cache blocks are used to cache messages, and M and N are positive integers; the cache management data includes bits corresponding to N×M cache blocks, each cache block corresponds to K bits, and the bit values of the K bits are used to characterize the usage status of the corresponding cache block, and K is a positive integer greater than 1.
[0128] Optionally, the updating unit 41 includes a first updating module 411;
[0129] The first update module 411 is configured to:
[0130] In response to receiving a message cache request, determining the number of cache blocks required to be occupied by the message;
[0131] According to the cache management data, searching, from the N×M cache blocks, a target cache block that satisfies the number of cache blocks required to be occupied by the message;
[0132] The target cache block is allocated to the message, and the bit value of the bit corresponding to the target cache block is updated.
[0133] Optionally, the updating unit 41 includes a second updating module 412;
[0134] The second updating module 412 is configured to: in response to an event that a message in the cache block is forwarded, update a bit value of a bit corresponding to the cache block where the forwarded message is located.
[0135] Optionally, the message is a multicast message, and the first updating module 411 is configured to:
[0136] Traversing the cache management data, performing a first specified operation on the bit values of K bits corresponding to each cache block, until the number of determined target cache blocks meets the number of cache blocks required to be occupied by the multicast message;
[0137] The first designation operation includes: judging the usage status of the current cache block according to the bit values of K bits corresponding to the current cache block; and determining the current cache block as the target cache block when the usage status of the current cache block is idle.
[0138] Optionally, the first updating module 411 is configured to:
[0139] Determining the multicast number of the multicast message;
[0140] The K bits corresponding to each of the target cache blocks are assigned values using the multicast number; wherein the values represented by the K bits after the assignment are used to represent the number of times the multicast message is to be forwarded.
[0141] Optionally, the first updating module 411 is configured to:
[0142] Perform an OR operation on the bit values of the K bits corresponding to the current cache block to obtain a result value;
[0143] When the result value satisfies a first result threshold, determining that the usage state of the current cache block is idle;
[0144] When the result value meets the second result threshold, it is determined that the usage state of the current cache block is occupied.
[0145] Optionally, the message is a unicast message, and the first updating module 411 is configured to:
[0146] Traversing the cache management data, performing a second specified operation on a bit value of a specified bit among the K bits corresponding to each cache block, until the number of target cache blocks determined satisfies the number of cache blocks required to be occupied by the unicast message;
[0147] The second designated operation includes: judging the usage status of the current cache block according to the bit value of the designated bit among the K bits corresponding to the current cache block; and determining the current cache block as the target cache block when the usage status of the current cache block is idle.
[0148] Optionally, the first updating module 411 is configured to:
[0149] Assign a value to a designated bit among the K bits corresponding to each of the target cache blocks.
[0150] Optionally, the first updating module 411 is configured to:
[0151] When the bit value of the designated bit position meets the first result threshold, determining that the usage state of the current cache block is idle;
[0152] When the bit value of the designated bit position meets the second result threshold, it is determined that the usage status of the current cache block is occupied.
[0153] Optionally, the second updating module 412 is configured to:
[0154] When the message is a multicast message, in response to the multicast message being forwarded once, the value represented by the K bits corresponding to the cache block where the forwarded message is located is decremented until the bit value of the K bits indicates that the usage state of the corresponding cache block is idle, and the cache block where the forwarded message is located is released;
[0155] When the message is a unicast message, in response to the unicast message being forwarded, the bit value of a designated bit among the K bits corresponding to the cache block where the forwarded message is located is restored to represent the usage state as idle, and the cache block where the forwarded message is located is released.
[0156] Each embodiment in this specification is described in a progressive manner, and the same or similar parts between the embodiments can refer to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the system or system embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can refer to the partial description of the method embodiment. The system and system embodiments described above are merely schematic, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. Ordinary technicians in this field can understand and implement it without creative work.
[0157] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with the relevant laws, regulations and standards of the relevant countries and regions, and provide corresponding operation entrances for users to choose to authorize or refuse.
[0158] In addition, an embodiment of the present application further provides a computer-readable storage medium on which a computer program is stored, and when the program is executed by a processor, the steps of any one of the methods in the aforementioned method embodiments are implemented.
[0159] And an electronic device, comprising:
[0160] one or more processors; and
[0161] A memory associated with the one or more processors, the memory being used to store program instructions, wherein the program instructions, when read and executed by the one or more processors, execute the steps of the method described in any one of the aforementioned method embodiments.
[0162] The present application also provides a computer program product, including a computer program, which implements the steps of any one of the methods in the aforementioned method embodiments when executed by a processor.
[0163] in, Figure 5The architecture of the electronic device is shown as an example, which may include a processor 510, a video display adapter 511, a disk drive 512, an input / output interface 513, a network interface 514, and a memory 520. The processor 510, the video display adapter 511, the disk drive 512, the input / output interface 513, the network interface 514, and the memory 520 may be communicatively connected via a communication bus 530.
[0164] The processor 510 may be implemented by a general-purpose CPU, a microprocessor, an application-specific integrated circuit (ASIC), or one or more integrated circuits, etc., and is used to execute relevant programs to implement the technical solutions provided in this application.
[0165] The memory 520 can be implemented in the form of ROM (Read Only Memory), RAM (Random Access Memory), static storage device, dynamic storage device, etc. The memory 520 can store an operating system 521 for controlling the operation of the electronic device 500, and a basic input and output system (BIOS) 522 for controlling the low-level operation of the electronic device 500. In addition, a web browser 523, a data storage management system 524, a cache management device 400, etc. can also be stored. The above-mentioned cache management device 400 can be an application program that specifically implements the operations of the aforementioned steps in the embodiment of the present application. In short, when the technical solution provided by the present application is implemented by software or firmware, the relevant program code is stored in the memory 520 and is called and executed by the processor 510.
[0166] The input / output interface 513 is used to connect the input / output module to realize information input and output. The input / output module can be configured in the device as a component (not shown in the figure), or it can be externally connected to the device to provide corresponding functions. The input device may include a keyboard, a mouse, a touch screen, a microphone, various sensors, etc., and the output device may include a display, a speaker, a vibrator, an indicator light, etc.
[0167] The network interface 514 is used to connect to a communication module (not shown) to realize communication interaction between the device and other devices. The communication module can realize communication through a wired mode (such as USB, network cable, etc.) or a wireless mode (such as mobile network, WIFI, Bluetooth, etc.).
[0168] The bus 530 comprises a pathway for transmitting information between the various components of the device (eg, the processor 510, the video display adapter 511, the disk drive 512, the input / output interface 513, the network interface 514, and the memory 520).
[0169] It should be noted that, although the above device only shows a processor 510, a video display adapter 511, a disk drive 512, an input / output interface 513, a network interface 514, a memory 520, a bus 530, etc., in the specific implementation process, the device may also include other components necessary for normal operation. In addition, it can be understood by those skilled in the art that the above device may also only include components necessary for implementing the solution of the present application, and does not necessarily include all the components shown in the figure.
[0170] It can be known from the description of the above implementation methods that those skilled in the art can clearly understand that the present application can be implemented by means of software plus a necessary general hardware platform. Based on such an understanding, the technical solution of the present application can be essentially or partly contributed to the prior art in the form of a computer program product, which can be stored in a storage medium such as ROM / RAM, a magnetic disk, an optical disk, etc., and includes several instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in the various embodiments of the present application or certain parts of the embodiments.
[0171] The technical solution provided by the present application is described in detail above. The principle and implementation method of the present application are described in detail using specific examples. The description of the above embodiments is only used to help understand the method and core idea of the present application. At the same time, for those skilled in the art, according to the idea of the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as limiting the present application.
Claims
1. A cache management method based on multicast counting, characterized in that: The cache space is divided into N groups, each group includes M cache blocks, the cache blocks are used to cache messages, M and N are positive integers, and the method includes: In response to a message processing event, cache management data for managing the cache space is updated, the cache management data including bits corresponding to N×M cache blocks, each cache block corresponding to K bits, the bit values of the K bits are used to represent the usage status of the corresponding cache block, and K is a positive integer greater than 1; The cache management data is stored in a storage unit corresponding to the cache management device.
2. The method according to claim 1, characterized in that If the cache block caches a multicast message, the bit values of the K bits corresponding to the cache block are used to represent the number of times the multicast message is to be forwarded.
3. The method according to claim 1, characterized in that: The updating of cache management data for managing the cache space in response to the message processing event includes: In response to receiving a message cache request, determining the number of cache blocks required to be occupied by the message; According to the cache management data, searching, from the N×M cache blocks, a target cache block that satisfies the number of cache blocks required to be occupied by the message; The target cache block is allocated to the message, and the bit value of the bit corresponding to the target cache block is updated.
4. The method according to claim 1, characterized in that: The updating of cache management data for managing the cache space in response to the message processing event includes: In response to an event that a message in the cache block is forwarded, a bit value of a bit corresponding to the cache block where the forwarded message is located is updated.
5. The method according to claim 3, characterized in that: The message is a multicast message; The step of searching, according to the cache management data, from the M×N cache blocks, a target cache block that satisfies the number of cache blocks required to be occupied by the message comprises: Traversing the cache management data, performing a first specified operation on the bit values of K bits corresponding to each cache block, until the number of determined target cache blocks meets the number of cache blocks required to be occupied by the multicast message; The first designation operation includes: judging the usage status of the current cache block according to the bit values of K bits corresponding to the current cache block; and determining the current cache block as the target cache block when the usage status of the current cache block is idle.
6. The method according to claim 5, characterized in that The updating of the bit value of the bit corresponding to the target cache block includes: Determining the multicast number of the multicast message; The K bits corresponding to each of the target cache blocks are assigned values using the multicast number.
7. The method according to claim 5, characterized in that The determining, according to the bit values of the K bits corresponding to the current cache block, the usage status of the current cache block includes: Perform an OR operation on the bit values of the K bits corresponding to the current cache block to obtain a result value; When the result value satisfies a first result threshold, determining that the usage state of the current cache block is idle; When the result value meets the second result threshold, it is determined that the usage state of the current cache block is occupied.
8. The method according to claim 3, characterized in that The message is a unicast message; The step of searching, according to the cache management data, from the N×M cache blocks, a target cache block that satisfies the number of cache blocks required to be occupied by the message comprises: Traversing the cache management data, performing a second specified operation on a bit value of a specified bit among the K bits corresponding to each cache block, until the number of target cache blocks determined satisfies the number of cache blocks required to be occupied by the unicast message; The second designated operation includes: judging the usage status of the current cache block according to the bit value of the designated bit among the K bits corresponding to the current cache block; and determining the current cache block as the target cache block when the usage status of the current cache block is idle.
9. The method according to claim 8, characterized in that The updating of the bit value of the bit corresponding to the target cache block includes: Assign a value to a designated bit among the K bits corresponding to each of the target cache blocks.
10. The method according to claim 8, characterized in that The determining, according to the bit value of a designated bit among the K bits corresponding to the current cache block, the usage status of the current cache block includes: When the bit value of the designated bit position meets the first result threshold, determining that the usage state of the current cache block is idle; When the bit value of the designated bit position meets the second result threshold, it is determined that the usage status of the current cache block is occupied.
11. The method according to claim 4, characterized in that In response to the event that the message in the cache block is forwarded, updating the bit value of the bit corresponding to the cache block where the forwarded message is located includes: When the message is a multicast message, in response to the multicast message being forwarded once, the value represented by the K bits corresponding to the cache block where the forwarded message is located is decremented until the bit value of the K bits indicates that the usage state of the corresponding cache block is idle, and the cache block where the forwarded message is located is released; When the message is a unicast message, in response to the unicast message being forwarded, the bit value of a designated bit among the K bits corresponding to the cache block where the forwarded message is located is restored to represent the usage state as idle, and the cache block where the forwarded message is located is released.
12. A cache management device based on multicast counting, characterized in that: Applicable to a cache space divided into N groups, each group including M cache blocks, the cache blocks being used to cache messages, the M and N being positive integers, the device comprising: A storage unit configured to store cache management data for managing cache space; An update unit is configured to update the cache management data in response to a message processing event; the cache space is divided into N groups, each group includes M cache blocks, the cache blocks are used to cache messages, and M and N are positive integers; the cache management data includes bits corresponding to N×M cache blocks, each cache block corresponds to K bits, and the bit values of the K bits are used to characterize the usage status of the corresponding cache block, and K is a positive integer greater than 1.
13. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the program is executed by a processor, the steps of the method described in any one of claims 1 to 11 are implemented.
14. An electronic device, characterized in that: include: one or more processors; as well as A memory associated with the one or more processors, the memory being used to store program instructions, wherein the program instructions, when read and executed by the one or more processors, execute the steps of the method described in any one of claims 1 to 11.
15. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 11 are implemented.