Interrupt request method based on time overhead and control device

Abstract

The invention provides an interrupt request method based on time overhead and a control device, and belongs to the technical field of data processing, and the method comprises the following steps: network communication equipment receives a message needing to be uploaded to a CPU (Central Processing Unit), analyzes the message, and judges a switching condition according to the remaining time overhead of a current transaction, the execution interrupt switching time overhead and a dynamic interrupt priority mechanism; if the priority of the message is higher than the priority of the current transaction or the remaining time overhead for completing the current transaction is greater than the time overhead for executing interruption switching, generating an interruption request and notifying a CPU (Central Processing Unit) to process; otherwise, after waiting for the CPU to complete the current transaction, generating an interrupt request and notifying the CPU to process. The method has the beneficial effects that the problem of low use efficiency of the CPU caused by frequent response interruption and task switching of the CPU when the network data flow is relatively large is avoided, and the real-time performance of data uploading is kept while the use efficiency of the CPU is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of data processing, and in particular to an interrupt request method and a control device based on time overhead. Background Art

[0002] Network communication devices are connected to the central processing unit (CPU) through a protocol bus. When the device receives a message to be uploaded to the CPU, it notifies the CPU's operating system to receive and process the message in the form of an interrupt request.

[0003] The most commonly used interruption strategy for current network communication devices is to generate an interruption request to the CPU after receiving a data packet or accumulating more data packets. The CPU will interrupt the current transaction, receive the data packets transmitted by the interface, and disable the interrupt interface at the same time. After processing the interruption transaction, the previous transaction will be restored and the interrupt interface will be enabled again. This strategy will frequently interrupt and switch contexts when the network data traffic is large, resulting in a high CPU load on interrupt scheduling, which reduces the CPU utilization efficiency. In addition, there are also strategies to improve CPU utilization efficiency by reducing the number of interruptions, but they cannot meet the real-time nature of uploading data at the same time. Summary of the invention

[0004] In view of the above technical problems, the present invention provides an interrupt request method and control device based on time overhead, and the specific technical solution is as follows:

[0005] An interrupt request method based on time cost, comprising:

[0006] Step 1: The network communication device receives a message to be uploaded to the CPU, and parses the message and the CPU's current transaction execution information to obtain a parsing result;

[0007] Step 2: Determine whether the switching condition is met according to the analysis result and the set dynamic interrupt priority mechanism:

[0008] If yes, go to step 3;

[0009] If not, proceed to step 4;

[0010] Step 3, the network communication device generates an interrupt request, sends the interrupt request to the CPU, and then proceeds to step 5;

[0011] Step 4, after the network communication device waits for the CPU to complete the current transaction, an interrupt request is generated, and the interrupt request is sent to the CPU, and then step 6 is entered;

[0012] Step 5: The CPU receives the interrupt request, responds to the interrupt, processes and completes the interrupt task, and restores the execution scene before the interrupt;

[0013] Step 6: The CPU receives the interrupt request, responds to the interrupt, and processes and completes the interrupt task.

[0014] Preferably, the step 1 parses the CPU current transaction execution information, including parsing to obtain the current transaction priority coefficient PPI.

[0015] Preferably, in step 1, when parsing the received message uploaded to the CPU, the message type characteristics are extracted, the priority coefficient PPI is generated by parsing, and the real-time interrupt priority index IPI is calculated: IPI=γ×PPI, where γ is a dynamic weight factor with a value range of 0~1, which is dynamically adjusted according to the CPU load state. The higher the load, the lower the value.

[0016] Preferably, the message type features used to generate the PPI include a DSCP tag and a VLAN tag.

[0017] Preferably, the priority coefficient PPI calculation method includes:

[0018] The values ​​of the DSCP tag and VLAN tag are standardized and mapped to the range of 0-100 to obtain

[0019] D = 100 × DSCP value / 63;

[0020] V = 100 × VLAN value / 7;

[0021] Then the priority coefficient PPI = α×D+β×V;

[0022] Where α and β represent the weights of DSCP and VLAN respectively.

[0023] Preferably, α=0.7, β=0.3.

[0024] Preferably, in step 2, the dynamic interrupt priority mechanism set includes:

[0025] If IPI is greater than or equal to PPI, it is determined that the switching condition is met; otherwise, it is further determined whether the remaining time overhead of the CPU to complete the current transaction is greater than the time overhead of executing the interrupt switch.

[0026] Preferably, the dynamic interrupt priority mechanism set in step 2 further includes:

[0027] If the remaining time overhead for completing the current transaction is greater than the time overhead for executing the interrupt switch, it is determined that the switching condition is met; otherwise, it is determined that the switching condition is not met.

[0028] Preferably, before step 1, the step further includes:

[0029] Through the configuration information, the average number of clock cycles CPIe for executing various instructions and the average number of clock cycles CPIs for executing various interrupt switching instructions are provided as the parsing conditions of step 1;

[0030] In the step 1, parsing the message and the CPU current transaction execution information includes: parsing the number of remaining instructions n executed by the current transaction and the number of registers m that need to be saved and restored at the execution site;

[0031] The remaining time overhead of the current transaction=CPIe×n, and the execution interrupt switching time overhead=CPIs×m.

[0032] The control device of the interrupt request method based on time overhead includes: a first module, a second module, a third module, a fourth module, a fifth module and a sixth module, which respectively execute step 1, step 2, step 3, step 4, step 5 and step 6.

[0033] The advantages or beneficial effects of the technical solution of the present invention are: interrupt requests are designed based on the dynamic interrupt priority mechanism, the remaining transaction execution time and the interrupt switching time overhead, thereby reducing the number of interrupts generated, avoiding excessive load caused by frequent interrupt switching of the CPU when the network data traffic is large, improving the CPU utilization efficiency while maintaining the real-time nature of the uploaded data. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 The figure is a flow chart of an interrupt request method based on time overhead in a preferred embodiment of the present invention.

[0035] Figure 2 It is a schematic diagram of the effect of the interrupt request method based on time overhead in a preferred embodiment of the present invention. DETAILED DESCRIPTION

[0036] The technical scheme of the present invention will be described in detail below in conjunction with the accompanying drawings and specific embodiments. The embodiments are only a part of the present invention, not all embodiments. Based on the embodiments of the present invention, for ordinary technicians in the field, without paying creative work, other embodiments obtained all belong to the scope of protection of the present invention.

[0037] See also Figure 1 In a preferred embodiment of the present invention, in view of the problems in the prior art, a time-cost-based interrupt request method is provided, comprising:

[0038] An interrupt request method based on time cost, comprising:

[0039] Step 1: The network communication device receives a message to be uploaded to the CPU, and parses the message and the CPU's current transaction execution information to obtain a parsing result;

[0040] Step 2: Determine whether the switching condition is met according to the analysis result and the set dynamic interrupt priority mechanism:

[0041] If yes, go to step 3;

[0042] If not, proceed to step 4;

[0043] Step 3, the network communication device generates an interrupt request, sends the interrupt request to the CPU, and then proceeds to step 5;

[0044] Step 4, after the network communication device waits for the CPU to complete the current transaction, an interrupt request is generated, and the interrupt request is sent to the CPU, and then step 6 is entered;

[0045] Step 5: The CPU receives the interrupt request, responds to the interrupt, processes and completes the interrupt task, and restores the execution scene before the interrupt;

[0046] Step 6: The CPU receives the interrupt request, responds to the interrupt, and processes and completes the interrupt task.

[0047] Preferably, the step 1 parses the CPU current transaction execution information, including parsing to obtain the current transaction priority coefficient PPI.

[0048] Preferably, in step 1, when parsing the received message uploaded to the CPU, the message type characteristics are extracted, the priority coefficient PPI is generated by parsing, and the real-time interrupt priority index IPI is calculated: IPI=γ×PPI, where γ is a dynamic weight factor with a value range of 0~1, which is dynamically adjusted according to the CPU load state. The higher the load, the lower the value.

[0049] Preferably, the message type features used to generate the PPI include a DSCP tag and a VLAN tag.

[0050] Preferably, the priority coefficient PPI calculation method includes:

[0051] Normalize the values ​​of the DSCP tag and VLAN tag respectively and map their values ​​to the range of 0-100 to obtain:

[0052] D = 100 × DSCP value / 63;

[0053] V = 100 × VLAN value / 7;

[0054] Then the priority coefficient PPI = α×D+β×V;

[0055] Where α and β represent the weights of DSCP and VLAN respectively.

[0056] Preferably, α=0.7, β=0.3.

[0057] Preferably, in step 2, the dynamic interrupt priority mechanism set includes:

[0058] If IPI is greater than or equal to PPI, it is determined that the switching condition is met; otherwise, it is further determined whether the remaining time overhead of the CPU to complete the current transaction is greater than the time overhead of executing the interrupt switch.

[0059] Preferably, the dynamic interrupt priority mechanism set in step 2 further includes:

[0060] If the remaining time overhead for completing the current transaction is greater than the time overhead for executing the interrupt switch, it is determined that the switching condition is met; otherwise, it is determined that the switching condition is not met.

[0061] Preferably, before step 1, the step further includes:

[0062] Through the configuration information, the average number of clock cycles CPIe for executing various instructions and the average number of clock cycles CPIs for executing various interrupt switching instructions are provided as the parsing conditions of step 1;

[0063] In the step 1, parsing the message and the CPU current transaction execution information includes: parsing the number of remaining instructions n executed by the current transaction and the number of registers m that need to be saved and restored at the execution site;

[0064] The remaining time overhead of the current transaction=CPIe×n, and the execution interrupt switching time overhead=CPIs×m.

[0065] This embodiment also provides a control device for implementing the above-mentioned time overhead-based interrupt request method, including: a first module, a second module, a third module, a fourth module, a fifth module and a sixth module, which respectively execute step 1, step 2, step 3, step 4, step 5 and step 6.

[0066] See also Figure 2 The advantages or beneficial effects of the technical solution of the present invention are: designing interrupt requests based on the dynamic interrupt priority mechanism, the remaining transaction execution time and the interrupt switching time overhead, reducing the number of interrupts generated, avoiding the CPU from frequently switching interrupts when the network data traffic is large, causing excessive load, improving the CPU utilization efficiency while maintaining the real-time nature of the uploaded data.

[0067] The above are only preferred embodiments of the present invention, and are not intended to limit the implementation methods and protection scope of the present invention. For those skilled in the art, it should be aware that all solutions obtained by equivalent substitutions and obvious changes made using the contents of this specification and illustrations should be included in the protection scope of the present invention.

Claims

1. An interrupt request method based on time overhead, characterized in that: include: Step 1: The network communication device receives a message to be uploaded to the CPU, and parses the message and the CPU's current transaction execution information to obtain a parsing result; Step 2: Determine whether the switching condition is met according to the analysis result and the set dynamic interrupt priority mechanism: If yes, go to step 3; If not, proceed to step 4; Step 3, the network communication device generates an interrupt request, sends the interrupt request to the CPU, and then proceeds to step 5; Step 4, after the network communication device waits for the CPU to complete the current transaction, an interrupt request is generated, and the interrupt request is sent to the CPU, and then step 6 is entered; Step 5: The CPU receives the interrupt request, responds to the interrupt, processes and completes the interrupt task, and restores the execution scene before the interrupt; Step 6: The CPU receives the interrupt request, responds to the interrupt, and processes and completes the interrupt task.

2. The interrupt request method based on time overhead according to claim 1, characterized in that: The step 1 parses the CPU current transaction execution information, including parsing to obtain the current transaction priority coefficient PPI.

3. The interrupt request method based on time overhead according to claim 2, characterized in that: In the step 1, when parsing the received message uploaded to the CPU, the message type characteristics are extracted, the priority coefficient PPI is parsed to generate, and the real-time interrupt priority index IPI is calculated: IPI=γ×PPI, where γ is a dynamic weight factor with a value range of 0~1, which is dynamically adjusted according to the CPU load status. The higher the load, the lower the value.

4. The interrupt request method based on time overhead according to claim 3, characterized in that: The packet type features used to generate the PPI include a DSCP tag and a VLAN tag.

5. The interrupt request method based on time overhead according to claim 4, characterized in that: The priority coefficient PPI calculation method includes: Normalize the values ​​of the DSCP tag and VLAN tag respectively and map their values ​​to the range of 0-100 to obtain: D = 100 × DSCP value / 63; V = 100 × VLAN value / 7; Then the priority coefficient PPI = α×D+β×V; Where α and β represent the weights of DSCP and VLAN respectively.

6. The interrupt request method based on time overhead according to claim 5, characterized in that: α=0.7, β=0.3。 7. An interrupt request method based on time overhead according to claim 3, 4, 5 or 6, characterized in that: In step 2, the dynamic interrupt priority mechanism is set, including: If IPI is greater than or equal to PPI, it is determined that the switching condition is met; otherwise, it is further determined whether the remaining time overhead of the CPU to complete the current transaction is greater than the time overhead of executing the interrupt switch.

8. The interrupt request method based on time overhead according to claim 7, characterized in that: The dynamic interrupt priority mechanism set in step 2 further includes: If the remaining time overhead for completing the current transaction is greater than the time overhead for executing the interrupt switch, it is determined that the switching condition is met; otherwise, it is determined that the switching condition is not met.

9. The interrupt request method based on time overhead according to claim 8, characterized in that: The step 1 also includes: Through the configuration information, the average number of clock cycles CPIe for executing various instructions and the average number of clock cycles CPIs for executing various interrupt switching instructions are provided as the parsing conditions of step 1; In the step 1, parsing the message and the CPU current transaction execution information includes: parsing the number of remaining instructions n executed by the current transaction and the number of registers m that need to be saved and restored at the execution site; The remaining time overhead of the current transaction=CPIe×n, and the execution interrupt switching time overhead=CPIs×m.

10. A control device for implementing the interrupt request method based on time overhead as claimed in claim 1, characterized in that: include: The first module, the second module, the third module, the fourth module, the fifth module and the sixth module respectively execute step 1, step 2, step 3, step 4, step 5 and step 6.

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