An Interrupt Request Method and Control Device Based on Time Overhead

Through the interrupt request method based on time overhead and dynamic interrupt priority mechanism, the problem of excessive CPU load in network communication equipment is solved, and efficient and stable data upload of CPU under high data traffic is achieved.

CN119996514BActive Publication Date: 2025-07-11BEIJING HEZHONG FANGDA TECH CO LTD
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Patent Information

Application Number
CN202510481050.4
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-04-17
Publication Date
2025-07-11
Estimated Expiration
2045-04-17

AI Technical Summary

Technical Problem

When the network data traffic is large, frequent interruption and switching of existing network communication devices leads to excessive CPU load, reducing the efficiency of CPU usage, and at the same time failing to meet the real-time nature of data upload.

Method used

The interrupt request method based on time overhead and dynamic interrupt priority mechanism is adopted. By analyzing the packet and the CPU's current transaction information, the priority index and time overhead are calculated, and the interruption request is dynamically judged whether an interrupt request is generated, reducing the number of interrupts.

Benefits of technology

Reduce the number of interrupts, avoid excessive CPU load, improve CPU usage efficiency, and maintain real-time data upload.

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Abstract

The present invention provides an interrupt request method and a control device based on time overhead, belonging to the technical field of data processing, including: when a network communication device receives a message to be uploaded to the CPU, it parses the message and determines a switching condition according to the remaining time overhead of the current transaction, the execution interrupt switching time overhead, and the dynamic interrupt priority mechanism; if the message priority is higher than the current transaction priority or the remaining time overhead for completing the current transaction is greater than the execution interrupt switching time overhead, an interrupt request is generated to notify the CPU for processing; otherwise, after waiting for the CPU to complete the current transaction, an interrupt request is generated to notify the CPU for processing. Beneficial effects: Avoid the problem of low CPU utilization caused by the CPU frequently responding to interrupts and switching tasks when the network data traffic is large, and improve the CPU utilization while maintaining the real-time nature of the uploaded data.
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Description

Technical Field

[0001] The present invention relates to the technical field of data processing, and in particular to an interrupt request method and a control device based on time overhead. Background Art

[0002] A network communication device is connected to a Central Processing Unit (CPU) through a protocol bus. When the device receives a message that needs to be uploaded to the CPU, it notifies the operating system of the CPU to receive and process the message in the form of an interrupt request.

[0003] The most commonly used interrupt strategy for current network communication devices is to generate an interrupt request sent to the CPU every time a data message is received or after accumulating more data messages. The CPU will interrupt the current transaction, receive the data message transmitted by the interface, and disable the interrupt interface at the same time. After processing the interrupt transaction, the previous transaction is restored, and the interrupt interface is enabled again. This strategy will frequently interrupt and switch contexts in the case of large network data traffic, resulting in a high CPU load occupied by interrupt scheduling and reducing the CPU usage efficiency. In addition, there is also a strategy to improve the CPU usage efficiency by reducing the number of interrupts generated, but it cannot meet the real-time requirement of uploading data at the same time. Summary of the Invention

[0004] In view of the above technical problems, the present invention provides an interrupt request method and a control device based on time overhead. The specific technical solutions are as follows:

[0005] An interrupt request method based on time overhead, comprising:

[0006] Step 1, a network communication device receives a message that needs to be uploaded to the CPU, and parses the message and the execution information of the current transaction of the CPU to obtain a parsing result;

[0007] Step 2, judging whether the switching condition is satisfied according to the parsing result and the set dynamic interrupt priority mechanism:

[0008] If so, go to Step 3;

[0009] If not, go to Step 4;

[0010] Step 3, the network communication device generates an interrupt request, sends the interrupt request to the CPU, and enters Step 5;

[0011] Step 4, the network communication device waits for the CPU to complete the current transaction, generates an interrupt request, sends the interrupt request to the CPU, and enters Step 6;

[0012] Step 5, the CPU receives the interrupt request, performs an interrupt response, processes and completes the interrupt task, and restores the execution scene before the interrupt;

[0013] Step 6, the CPU receives the interrupt request, performs an interrupt response, processes and completes the interrupt task.

[0014] Preferably, in step 1, the CPU current transaction execution information is parsed, including parsing to obtain the current transaction priority coefficient PPI.

[0015] Preferably, in step 1, when parsing the message uploaded to the CPU, the message type feature is extracted, the priority coefficient PPI' is parsed and generated, and the real-time interrupt priority index IPI is calculated: IPI = γ×PPI', where γ is a dynamic weight factor, and the value range is 0 to 1, which is dynamically adjusted according to the CPU load status. The higher the load, the lower the value.

[0016] Preferably, the message type features for generating PPI' include DSCP tags and VLAN tags.

[0017] Preferably, the calculation method of the priority coefficient PPI includes:

[0018] The values of the DSCP tag and the VLAN tag are respectively normalized, and their values are mapped to the range of 0 - 100 to obtain

[0019] D = 100×DSCP value / 63;

[0020] V = 100×VLAN value / 7;

[0021] Then the priority coefficient PPI = α×D + β×V;

[0022] Where α and β respectively represent the weights of DSCP and VLAN.

[0023] Preferably, α = 0.7 and β = 0.3.

[0024] Preferably, in step 2, the set dynamic interrupt priority mechanism includes:

[0025] If IPI is greater than or equal to PPI, it is determined that the switching condition is met; otherwise, it continues to be determined whether the remaining time cost for the CPU to complete the current transaction is greater than the time cost for executing the interrupt switch.

[0026] Preferably, the dynamic interrupt priority mechanism set in step 2 further includes:

[0027] If the remaining time cost for completing the current transaction is greater than the time cost for executing the interrupt switch, it is determined that the switching condition is met; otherwise, it is determined that the switching condition is not met.

[0028] Preferably, before step 1, it further includes:

[0029] Provide the average number of clock cycles CPIe for executing various instructions and the average number of clock cycles CPIs for executing various interrupt switching instructions as the parsing conditions in step 1 based on the configuration information.

[0030] In the above step 1, parsing the message and the current transaction execution information of the CPU includes: parsing the remaining number of instructions n to be executed in the current transaction and the number of registers m that need to be saved and restored in the execution context.

[0031] The remaining time overhead of the current transaction = CPIe × n, and the time overhead for executing the interrupt switch = CPIs × m.

[0032] A control device for an interrupt request method based on time overhead includes: a first module, a second module, a third module, a fourth module, a fifth module, and a sixth module, which respectively execute step 1, step 2, step 3, step 4, step 5, and step 6.

[0033] The advantages or beneficial effects of the technical solution of the present invention are as follows: Designing the interrupt request based on the dynamic interrupt priority mechanism, the remaining execution time of the transaction, and the overhead of the interrupt switch reduces the number of interrupts generated, avoids the CPU from frequently switching interrupts when the network data traffic is large, resulting in an excessive load, and improves the CPU usage efficiency while maintaining the real-time nature of the uploaded data. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 It is a flowchart of an interrupt request method based on time overhead in a preferred embodiment of the present invention.

[0035] Figure 2 It is a schematic diagram of the effect of an interrupt request method based on time overhead in a preferred embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0036] The technical solution of the present invention will be described in detail below with reference to the drawings and specific embodiments. The embodiments are only a part of the present invention, not all embodiments. Based on the embodiments of the present invention, for those of ordinary skill in the art, without creative efforts, all other embodiments obtained fall within the scope of protection of the present invention.

[0037] Refer to Figure 1 , in a preferred embodiment of the present invention, to address the problems of the prior art, an interrupt request method based on time overhead is provided, including:

[0038] An interrupt request method based on time overhead includes:

[0039] Step 1: The network communication device receives the packets to be uploaded to the CPU, parses the packets and the current transaction execution information of the CPU, and obtains the parsing result;

[0040] Step 2: Determine whether the switching condition is met according to the parsing result and the set dynamic interrupt priority mechanism:

[0041] If yes, go to Step 3;

[0042] If no, go to Step 4;

[0043] Step 3: The network communication device generates an interrupt request, sends the interrupt request to the CPU, and enters Step 5;

[0044] Step 4: After waiting for the CPU to complete the current transaction, the network communication device generates an interrupt request, sends the interrupt request to the CPU, and enters Step 6;

[0045] Step 5: The CPU receives the interrupt request, performs an interrupt response, processes and completes the interrupt task, and restores the execution scene before the interrupt;

[0046] Step 6: The CPU receives the interrupt request, performs an interrupt response, processes and completes the interrupt task.

[0047] Preferably, in Step 1, parsing the current transaction execution information of the CPU includes parsing to obtain the current transaction priority coefficient PPI.

[0048] Preferably, in Step 1, when parsing the packets received and uploaded to the CPU, extract the packet type characteristics, parse and generate the priority coefficient PPI', and calculate the real-time interrupt priority index IPI: IPI = γ×PPI', where γ is a dynamic weight factor, and its value range is 0 to 1, which is dynamically adjusted according to the CPU load status. The higher the load, the lower the value.

[0049] Preferably, the packet type characteristics used to generate PPI' include DSCP tags and VLAN tags.

[0050] Preferably, the calculation method of the priority coefficient PPI' includes:

[0051] Normalize the values of the DSCP tag and the VLAN tag respectively, map their values to the range of 0 - 100, and obtain:

[0052] D = 100×DSCP value / 63;

[0053] V = 100×VLAN value / 7;

[0054] Then the priority coefficient PPI = α×D + β×V;

[0055] Among them, α and β respectively represent the weights of DSCP and VLAN.

[0056] Preferably, α = 0.7 and β = 0.3.

[0057] Preferably, in step 2, the set dynamic interrupt priority mechanism includes:

[0058] If IPI is greater than or equal to PPI, it is determined that the handover condition is met; otherwise, it continues to be determined whether the remaining time cost of the CPU to complete the current transaction is greater than the time cost of executing the interrupt handover.

[0059] Preferably, the dynamic interrupt priority mechanism set in step 2 further includes:

[0060] If the remaining time cost of completing the current transaction is greater than the time cost of executing the interrupt handover, it is determined that the handover condition is met; otherwise, it is determined that the handover condition is not met.

[0061] Preferably, before step 1, it further includes:

[0062] Through the configuration information, the average number of clock cycles CPIe for executing various instructions and the average number of clock cycles CPIs for executing various interrupt handover instructions are provided as the parsing conditions for step 1;

[0063] In step 1, parsing the message and the CPU current transaction execution information includes: parsing the remaining number of instructions n executed by the current transaction and the number of registers m that need to be saved and restored for the execution context;

[0064] The remaining time cost of the current transaction = CPIe × n, and the time cost of executing the interrupt handover = CPIs × m.

[0065] This embodiment also provides a control device for implementing the above interrupt request method based on time cost, including: a first module, a second module, a third module, a fourth module, a fifth module, and a sixth module, which respectively execute step 1, step 2, step 3, step 4, step 5, and step 6.

[0066] See Figure 2 , the advantages or beneficial effects of the technical solution of the present invention are: Designing the interrupt request based on the dynamic interrupt priority mechanism, the remaining execution time of the transaction, and the time cost of the interrupt handover reduces the number of interrupts generated, avoids the CPU from frequently switching interrupts when the network data traffic is large, resulting in excessive load, and improves the CPU usage efficiency while maintaining the real-time nature of the uploaded data.

[0067] The above are only preferred embodiments of the present invention, and thus do not limit the implementation manners and protection scope of the present invention. For those of ordinary skill in the art, it should be realized that all the solutions obtained by equivalent substitutions and obvious changes made by using the content of this specification and the drawings should be included within the protection scope of the present invention.

Claims

1. A method for interrupt request based on time overhead, characterized in that Including: Step 1: The network communication device receives a packet to be uploaded to the CPU, parses the packet and the current transaction execution information of the CPU, and obtains a parsing result; Step 2: Determine whether the switching condition is met according to the parsing result and the set dynamic interrupt priority mechanism: If yes, go to Step 3; If no, go to Step 4; Step 3: The network communication device generates an interrupt request, sends the interrupt request to the CPU, and enters Step 5; Step 4: After the network communication device waits for the CPU to complete the current transaction, it generates an interrupt request, sends the interrupt request to the CPU, and enters Step 6; Step 5: The CPU receives the interrupt request, performs an interrupt response, processes and completes the interrupt task, and restores the execution scene before the interrupt; Step 6: The CPU receives the interrupt request, performs an interrupt response, processes and completes the interrupt task; Wherein: The parsing of the current transaction execution information of the CPU in Step 1 includes parsing to obtain the current transaction priority coefficient PPI; and when parsing the packet uploaded to the CPU, extracting the packet type characteristics, parsing and generating the priority coefficient PPI', and calculating the real-time interrupt priority index IPI: IPI = γ×PPI', where γ is a dynamic weight factor, and its value range is 0 to 1, which is dynamically adjusted according to the CPU load status. The higher the load, the lower the value; In Step 2, the set dynamic interrupt priority mechanism includes: If IPI is greater than or equal to PPI, it is determined that the switching condition is met; otherwise, continue to determine whether the remaining time overhead for the CPU to complete the current transaction is greater than the execution interrupt switching time overhead; If the remaining time overhead for completing the current transaction is greater than the execution interrupt switching time overhead, it is determined that the switching condition is met; otherwise, it is determined that the switching condition is not met.

2. The interrupt request method based on time overhead according to claim 1, wherein The packet type characteristics used to generate PPI' include DSCP tags and VLAN tags.

3. The interrupt request method based on time overhead according to claim 2, wherein, The calculation method of the priority coefficient PPI' includes: Normalize the values of the DSCP tag and the VLAN tag respectively, map their values to the 0-100 range, and obtain: D = 100×DSCP value / 63; V = 100×VLAN value / 7; Then the priority coefficient PPI = α×D + β×V; Where α and β represent the weights of DSCP and VLAN respectively.

4. The interrupt request method based on time overhead according to claim 3, wherein α=0.7, β=0.3。 5. The interrupt request method based on time overhead according to claim 4, wherein Before Step 1, it also includes: Through configuration information, provide the average number of clock cycles CPIe for executing various instructions and the average number of clock cycles CPIs for executing various interrupt switching instructions as the parsing conditions for Step 1; In Step 1, the parsing of the packet and the current transaction execution information of the CPU includes: parsing the remaining number of instructions n executed by the current transaction and the number of registers m that need to be saved and restored in the execution scene; The remaining time overhead of the current transaction = CPIe×n, and the execution interrupt switching time overhead = CPIs×m.

6. The control device for implementing the interrupt request method based on time overhead as described in claim 1, characterized in that, Including: The first module, the second module, the third module, the fourth module, the fifth module, and the sixth module, which respectively execute Step 1, Step 2, Step 3, Step 4, Step 5, and Step 6.

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