Flip chip structure and circuit board thereof

Abstract

The invention relates to a flip chip structure and a circuit board thereof. The flip chip structure comprises a circuit board and a chip, the circuit board is provided with a plurality of first inner pins and a plurality of second inner pins, each first inner pin is provided with a first joint part, an included angle is formed between a second joint part of each second inner pin and a connection section, an included angle is formed between the center line of each first joint part and the center line of each second joint part, and the chip is arranged on the circuit board. The chip is provided with a plurality of first protruding blocks and a plurality of second protruding blocks, an included angle is formed between the center line of each first protruding block and the center line of each second protruding block, the first protruding blocks are connected to the first connecting parts, and the second protruding blocks are connected to the second connecting parts and the connecting sections, so that the situation that bonding displacement occurs between the inner pins and the protruding blocks is avoided, or the chip is connected with the inner pins and the protruding blocks. The offset of the joint displacement can be reduced.

Description

Technical Field

[0001] The present invention relates to a flip chip structure and a circuit board thereof, which are used to avoid bonding shift when the bump of a chip is bonded to the inner pin of a circuit board, or to reduce the offset of the bonding shift. Background Art

[0002] See also Fig.10 and Fig.11 The conventional circuit board 11 forms a circuit layer 11b on a substrate 11a, and covers the circuit layer 11b with a protective layer (not shown in the figure). The protective layer exposes a chip setting area 11c of the substrate 11a, a plurality of inner pins 11b1 and a plurality of outer pins (not shown in the figure) of the circuit layer 11b. The plurality of inner pins 11b1 are arranged in the chip setting area 11c along the first axis X direction, and a plurality of bumps 12a of the chip 12 are connected to the plurality of inner pins 11b1 to form a flip-chip structure 10.

[0003] However, since the expansion coefficients of the substrate 11a, the circuit layer 11b and the protective layer are not matched, when the multiple bumps 12a are bonded to the multiple inner pins 11b1, the process environment (such as temperature, etc.) will cause the circuit board 12 to expand and contract, resulting in a bonding shift between the multiple bumps 12a and the multiple inner pins 11b1 in the chip setting area 11c. When the offset of the bonding shift is too large, the multiple bumps 11a will be unable to bond to the multiple inner pins 12a or the bonding area will be insufficient. Summary of the invention

[0004] The main purpose of the present invention is to provide a flip-chip structure and a circuit board thereof, wherein a first joint portion of a first inner pin and a second joint portion of a second inner pin are arranged along different directions in a chip arrangement area of ​​the circuit board, so that a first bump and a second bump of the chip are respectively bonded to the first joint portion and the second joint portion along the arrangement directions of the first joint portion and the second joint portion, so as to increase the ability of the circuit board to resist expansion and contraction changes, which can avoid the bonding shift between the inner pin and the bump, or can reduce the offset of the bonding shift to solve the problem that the bump cannot be bonded to the inner pin or the bonding area is insufficient.

[0005] A flip-chip structure of the present invention includes a circuit board and a chip, the circuit board has a chip setting area, a plurality of first inner pins and a plurality of second inner pins, the plurality of first inner pins and the plurality of second inner pins are arranged in the chip setting area, the first inner pin has a first pin portion and a first joint portion, the second inner pin has a second pin portion and a second joint portion, the second pin portion has a first connecting section, the first connecting section connects to the second joint portion, the second joint portion and the first connecting section have a first included angle, along a first axis direction, the plurality of first joint portions and the plurality of second joint portions are staggered in the chip setting area, along a second axis direction intersecting the first axis, the first joint portion and the second joint portion are staggered in the chip setting area, There is a first spacing between the second bonding parts, the first bonding part is closer to the edge of the chip setting area than the second bonding part, and there is a second angle between the first center line of the first bonding part and the second center line of the second bonding part. The chip has an active surface, a plurality of first bumps and a plurality of second bumps. Along the first axis direction, the plurality of first bumps and the plurality of second bumps are staggered on the active surface. Along the second axis direction, the first bump is closer to the edge of the active surface than the second bump. There is a third angle between the third center line of the first bump and the fourth center line of the second bump. The first bump is bonded to the first bonding part, and the second bump is bonded to the second bonding part and the first connecting section.

[0006] Preferably, the second pin portion has a first body, the first body has a first length, the first connecting section has a second length, and the second length is greater than the first length.

[0007] Preferably, the second pin portion has a second connecting section, the second connecting section is located between the first connecting section and the first body, the second connecting section has a third length, and the third length gradually decreases from the first connecting section toward the first body.

[0008] Preferably, along the third center line direction, the first protrusion has a first width, the second protrusion has a second width, the second width is smaller than the first width, and along the fourth center line direction, the first protrusion has a fourth length, the second protrusion has a second length, the first width is greater than the fourth length, the fifth length is greater than the second width, the second width is smaller than the first width, the fifth length is greater than the fourth length, and the fifth length is not greater than the first width.

[0009] Preferably, the fifth length is smaller than the first width.

[0010] Preferably, along the second axis direction, the first bonding portion is arranged in the chip setting area, and the first center line extends along the second axis direction; along the first axis direction, the second bonding portion is arranged in the chip setting area, and the second center line extends along the first axis direction.

[0011] Preferably, the circuit board further comprises a plurality of third inner pins, the plurality of third inner pins are arranged in the chip setting area, the third inner pin has a third pin portion and a third joint portion, the third pin portion has a third connecting section, the third connecting section is connected to the third joint portion, a fourth angle is formed between the third joint portion and the third connecting section, along the first axis direction, the plurality of first joint portions, the plurality of second joint portions and the plurality of third joint portions are alternately arranged in the chip setting area, along the second axis direction, the first joint portion and the third joint portion have a second spacing therebetween, the third joint portion and the third joint portion are The second spacing is smaller than the first spacing, the first bonding portion is closer to the edge of the chip setting area than the third bonding portion, a fifth angle is formed between the first center line and the fifth center line of the third bonding portion, the chip has a plurality of third bumps, along the first axis direction, the plurality of first bumps, the plurality of second bumps and the plurality of third bumps are staggered on the active surface, the first bump is closer to the edge of the active surface than the third bump, a sixth angle is formed between the third center line and the sixth center line of the third bump, and the third bump is bonded to the third bonding portion and the third connecting section.

[0012] Preferably, along the third center line direction, the third protrusion has a third width, which is smaller than the first width; along the sixth center line direction, the third protrusion has a sixth length, which is larger than the fourth length.

[0013] Preferably, along the second axis direction, the first joint portion is arranged in the chip setting area, the first center line and the third center line extend along the second axis direction, and along the first axis direction, the second joint portion and the third joint portion are arranged in the chip setting area, and the second center line, the fourth center line, the fifth center line and the sixth center line extend along the first axis direction.

[0014] Preferably, the second engaging portion is in an inverted L-shape, a T-shape, a Y-shape or a cross shape.

[0015] A flip-chip structured circuit board of the present invention comprises a chip setting area, a plurality of first inner pins and a plurality of second inner pins, the first inner pin having a first joint portion, the second inner pin having a second pin portion and a second joint portion, the second pin portion having a first connecting section, the first connecting section connecting the second joint portion, a first angle being formed between the second joint portion and the first connecting section, the second joint portion and the first connecting section being used to join a bump, along a first axis direction, the plurality of first joint portions and the plurality of second joint portions are staggeredly arranged in the chip setting area, along a second axis direction intersecting the first axis, a first spacing is formed between the first joint portion and the second joint portion, the first joint portion is closer to the edge of the chip setting area than the second joint portion, a second angle being formed between a first center line of the first joint portion and a second center line of the second joint portion.

[0016] Preferably, the second pin portion has a first body, the first body has a first length, the first connecting section has a second length, and the second length is greater than the first length.

[0017] Preferably, the second pin portion has a second connecting section, the second connecting section is located between the first connecting section and the first body, the second connecting section has a third length, and the third length gradually decreases from the first connecting section toward the first body.

[0018] Preferably, along the second axis direction, the first bonding portion is arranged in the chip setting area, and the first center line extends along the second axis direction; along the first axis direction, the second bonding portion is arranged in the chip setting area, and the second center line extends along the first axis direction.

[0019] Preferably, the circuit board further includes a plurality of third internal pins, the plurality of third internal pins are arranged in the chip setting area, the plurality of third internal pins have a third pin portion and a third joint portion, the third pin portion has a third connecting section, the third connecting section is connected to the third joint portion, a fourth angle is formed between the third joint portion and the third connecting section, along the first axis direction, the plurality of first joint portions, the plurality of second joint portions and the third joint portion are alternately arranged in the chip setting area, along the second axis direction, a second spacing is formed between the first joint portion and the third joint portion, the second spacing is smaller than the first spacing, the first joint portion is closer to the edge of the chip setting area than the third joint portion, and a fifth angle is formed between the first center line and the fifth center line of the third joint portion.

[0020] Preferably, along the second axis direction, the first bonding portion is disposed in the chip setting area, along the first axis direction, the second bonding portion and the third bonding portion are disposed in the chip setting area, and the second center line and the fifth center line extend along the first axis direction.

[0021] Preferably, the second engaging portion is in an inverted L-shape, a T-shape, a Y-shape or a cross shape.

[0022] The present invention uses the first bonding portion and the second bonding portion arranged along different directions to allow the first bump and the second bump of the chip to be respectively bonded to the first bonding portion and the second bonding portion along the arrangement directions of the first bonding portion and the second bonding portion, so as to increase the ability of the circuit board to resist expansion and contraction changes in the arrangement directions of the first bonding portion and the second bonding portion. This can avoid the bonding shift between the first bonding portion, the second bonding portion and the first bump and the second bump, or reduce the offset of the bonding shift to solve the problem that the bump cannot be bonded to the inner pin or the bonding area is insufficient. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 : A top view of the flip chip structure of the present invention.

[0024] Figure 2 , Figure 3 , Figure 4A , Figure 4B : A partial top view of a circuit board with a flip-chip structure of the present invention.

[0025] FIG. 5A to FIG. 5D : Schematic diagram of the shape of the second joining portion of the present invention.

[0026] Figure 6 : Bottom view of the chip of the flip chip structure of the present invention.

[0027] Figure 7 : A partial top view of a chip with a flip-chip structure of the present invention.

[0028] Figure 8 , Fig. 9 : A partial top view of the flip chip structure of the present invention.

[0029] Fig.10 : A cross-sectional view of a conventional flip chip structure.

[0030] Fig.11 : A top view of a conventional flip chip structure.

[0031]

Main component symbol description

[0032] 10: Flip chip structure 11: Circuit board

[0033] 11a: substrate 11b: circuit layer

[0034] 11b1: internal pin 11c: chip setting area

[0035] 12: Chip 12a: Bump

[0036] 100: Flip chip structure 110: Circuit board

[0037] 110a: Circuit layer 111: Chip setting area

[0038] 111a: edge 112: first inner pin

[0039] 112a: first lead portion 112b: first joint portion

[0040] 113: second inner pin 113a: second lead portion

[0041] 113a1: first connecting section 113a2: second connecting section

[0042] 113a3: first body 113b: second joint portion

[0043] 114: third inner pin 114a: third pin portion

[0044] 114a1: third connecting section 114a2: second body

[0045] 114b: third joint portion 120: chip

[0046] 121: Active surface 122: First bump

[0047] 123: second bump 124: third bump

[0048] A: First angle B: Second angle

[0049] C: The third angle D: The fourth angle

[0050] E: fifth angle F: sixth angle

[0051] L1: First center line L2: Second center line

[0052] L3: The third center line L4: The fourth center line

[0053] L5: Fifth center line L6: Sixth center line

[0054] H1: first length H2: second length

[0055] H3: third length H4: fourth length

[0056] H5: fifth length H6: sixth length

[0057] S1: first spacing S2: second spacing

[0058] W1: first width W2: second width

[0059] W3: Third width X: First axis

[0060] Y: Second axis DETAILED DESCRIPTION

[0061] See also Figure 1 , Figure 2 and Figure 6 A flip chip structure 100 of the present invention includes a circuit board 110 and a chip 120. In the present embodiment, the circuit board 110 has a substrate (not shown), a circuit layer 110a and a protective layer (not shown). The substrate can be selected from a soft material (such as polyimide Polyimide, PI or polyethyleneterephthalate Polyethyleneterephthalate, PET), etc. The protective layer can be selected from a green paint (Solder mask or Solder Resist), etc. The protective layer covers the circuit layer 110a and exposes the chip setting area 111 of the circuit board 110. The chip 120 is flip-chip bonded to the chip setting area 111 with an active surface 121.

[0062] See also Figure 2 and Figure 3 The circuit layer 110a includes a plurality of first internal pins 112 and a plurality of second internal pins 113. The plurality of first internal pins 112 and the plurality of second internal pins 113 are disposed in the chip setting area 111. The first internal pin 112 has a first lead portion 112a and a first joint portion 112b. In the present embodiment, along the second axis Y direction, the first joint portion 112b is disposed in the chip setting area 111.

[0063] See also Figure 2 and Figure 3 The second inner pin 113 has a second pin portion 113a and a second joint portion 113b. The second pin portion 113a has a first connecting section 113a1 and a first body 113a3. The first connecting section 113a1 connects the second joint portion 113b. A first angle A is formed between the second joint portion 113b and the first connecting section 113a1. The first body 113a3 has a first length H1. The first connecting section 113a1 has a second length H2. The second length H2 is greater than the first length H1. In the present embodiment, along the first axis X direction intersecting the second axis Y, the second joint portion 113b is disposed in the chip setting area 111, even if the first joint portion 112b and the second joint portion 113b are disposed in the chip setting area 111 along different directions.

[0064] See also Figures 2 to 4B, along the first axis X direction, the plurality of first bonding portions 112b and the plurality of second bonding portions 113b are alternately arranged in the chip setting area 111, along the second axis Y direction, there is a first spacing S1 between the first bonding portion 112b and the second bonding portion 113b, the first bonding portion 112b is closer to an edge 111a of the chip setting area 111 than the second bonding portion 113b, and there is a second angle B between a first center line L1 of the first bonding portion 112b and a second center line L2 of the second bonding portion 113b. In the present embodiment, the first center line L1 extends along the second axis Y direction, and the second center line L2 extends along the first axis X direction.

[0065] See also Figure 3 The second pin portion 113a has a second connecting section 113a2, the second connecting section 113a2 is located between the first connecting section 113a1 and the first body 113a3, and the second connecting section 113a2 has a third length H3, and the third length H3 gradually decreases from the first connecting section 113a1 toward the first body 113a3.

[0066] See also Figures 3 to 4B The circuit layer 110a further includes a plurality of third inner pins 114, wherein the plurality of third inner pins 114 are disposed in the chip setting area 111, and the third inner pin 114 has a third pin portion 114a and a third joint portion 114b, wherein the third pin portion 114a has a third connecting section 114a1 and a second body 114a2, wherein the third connecting section 114a1 is connected to the third joint portion 114b, and a fourth angle D is formed between the third joint portion 114b and the third connecting section 114a1.

[0067] See also Figures 3 to 4B , along the first axis X direction, the plurality of first bonding portions 112b, the plurality of second bonding portions 113b and the plurality of third bonding portions 114b are alternately arranged in the chip setting area 111, along the second axis Y direction, there is a second spacing S2 between the first bonding portion 112b and the third bonding portion 114b, the second spacing S2 is smaller than the first spacing S1, the first bonding portion 112b is closer to the edge 111a of the chip setting area 111 than the third bonding portion 114b, the third bonding portion 114b is closer to the edge 111a of the chip setting area 111 than the second bonding portion 113b, a fifth angle E is formed between the first center line L1 and a fifth center line L5 of the third bonding portion 114b, and in the present embodiment, the fifth center line L5 extends along the second axis Y direction.

[0068] See also Figure 3 , FIG. 5A to FIG. 5DThe second joining portion 113b or the third joining portion 114b is T-shaped, inverted L-shaped, cross-shaped or Y-shaped.

[0069] See also Figure 6 and Figure 7 The chip 120 has the active surface 121, a plurality of first bumps 122 and a plurality of second bumps 123. In the present embodiment, the chip 120 further has a plurality of third bumps 124. Along the first axis X direction, the plurality of first bumps 122, the plurality of second bumps 123 and the plurality of third bumps 124 are alternately arranged on the active surface 121. Along the second axis Y direction, the first bump 122 is closer to the edge 121a of the active surface 121 than the second bump 123 and the third bump 124. The third bump 124 is closer to the edge 121a of the active surface 121 than the second bump 123. A third angle C is formed between a third center line L3 of the first bump 122 and a fourth center line L4 of the second bump 123. The second angle B is substantially equal to the third angle C. In the present embodiment, the third center line L3 extends along the second axis Y direction, and the fourth center line L4 extends along the first axis X direction.

[0070] See also Figure 7 , along the direction of the fourth center line L4, the first protrusion 122 has a fourth length H4, the second protrusion 123 has a fifth length H5, and the fifth length H5 is greater than the fourth length H4. A sixth angle F is formed between the third center line L3 and the sixth center line L6 of the third protrusion 124. In the present embodiment, the sixth center line L6 extends along the direction of the first axis X. Along the direction of the sixth center line L6, the third protrusion 124 has a sixth length H6, and the sixth length H6 is greater than the fourth length H4. In the present embodiment, the sixth length H6 is less than the fifth length H5. The setting direction of the first protrusion 122 is the same as that of the first joining portion 112b, the setting direction of the second protrusion 123 is the same as that of the second joining portion 113b, and the setting direction of the third protrusion 124 is the same as that of the third joining portion 114b.

[0071] See also Figure 7 Along the direction of the third center line L3, the first bump 122 has a first width W1, the second bump 123 has a second width W2, and the third bump 124 has a third width W3. The first width W1 is greater than the fourth length H4, the fifth length H5 is greater than the second width W2, and the sixth length H6 is greater than the third width W3. The second width W2 and the third width W3 are less than the first width W1, and the fifth length H5 is not greater than the first width W1. Preferably, the fifth length H5 is less than the first width W1, and the sixth length H6 is less than the first width W1, so as to reduce the amount of material (such as gold) used in the second bump 123 and the third bump 124.

[0072] See also Figure 8 and Fig. 9 The first bump 122 is connected to the first connection portion 112b, the second bump 123 is connected to the second connection portion 113b and the first connection section 113a1, and the third bump 124 is connected to the third connection portion 114b and the third connection section 114a1. By means of the first connection portion 112b, the second connection portion 113b and the third connection portion 114b arranged in different directions in the chip setting area 111, and by means of the first bump 122, the second bump 123 3 and the third protrusion 124 are arranged in the same direction as the first joint portion 112b, the second joint portion 113b and the third joint portion 114b, so as to increase the ability of the circuit board 110 to resist expansion and contraction changes in the first axis X direction and the second axis Y direction, which can avoid the bonding shift between the first inner pin 112, the second inner pin 113, the third inner pin 114 and the first protrusion 122, the second protrusion 123, and the third protrusion 124, or reduce the offset of the bonding shift.

[0073] See also Figure 3 , Figure 7 and Fig. 9 In addition, by virtue of the second width W2 of the second bump 123 being smaller than the first width W1 of the first bump 122, the second length H5 of the second bump 123 being larger than the fourth length H4 of the first bump 122, and the fifth length H5 being no larger than the first width W1, the material (such as gold, etc.) used to manufacture the second bump 123 can be reduced. In addition, by virtue of the second length H2 of the first connecting section 113a1 being larger than the first length H1 of the first body 113a3, when the second bump 123 is connected to the second connecting portion 113b and the first connecting section 113a1, the connection area between the second bump 123 and the second inner pin 113 can be increased to prevent the second bump 123 from being separated from the second inner pin 113, and the ability of the circuit board 110 to resist expansion and contraction changes can be increased.

[0074] The above description is only a preferred embodiment of the present invention and does not limit the present invention in any form. Although the present invention has been disclosed as a preferred embodiment as above, it is not used to limit the present invention. Any technician familiar with the profession can make some changes or modify the technical contents disclosed above into equivalent embodiments without departing from the scope of the technical solution of the present invention. However, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present invention without departing from the content of the technical solution of the present invention still fall within the scope of the technical solution of the present invention.

Claims

1. A flip chip structure, characterized in that: Include: A circuit board, comprising a chip setting area, a plurality of first inner pins and a plurality of second inner pins, wherein the plurality of first inner pins and the plurality of second inner pins are arranged in the chip setting area, the first inner pin has a first pin portion and a first joint portion, the second inner pin has a second pin portion and a second joint portion, the second pin portion has a first connecting section, the first connecting section connects to the second joint portion, a first angle is formed between the second joint portion and the first connecting section, along a first axis direction, the plurality of first joint portions and the plurality of second joint portions are staggered in the chip setting area, along a second axis direction intersecting the first axis, a first spacing is formed between the first joint portion and the second joint portion, the first joint portion is closer to an edge of the chip setting area than the second joint portion, a second angle is formed between a first center line of the first joint portion and a second center line of the second joint portion; and The chip has an active surface, a plurality of first bumps and a plurality of second bumps. Along the first axis direction, the plurality of first bumps and the plurality of second bumps are staggered on the active surface. Along the second axis direction, the first bump is closer to the edge of the active surface than the second bump. A third angle is formed between a third center line of the first bump and a fourth center line of the second bump. The first bump is joined to the first joining portion, and the second bump is joined to the second joining portion and the first connecting section.

2. The flip chip structure according to claim 1, characterized in that: The second pin portion has a first body, the first body has a first length, the first connecting section has a second length, and the second length is greater than the first length.

3. The flip chip structure according to claim 2, characterized in that: The second pin portion has a second connecting section, the second connecting section is located between the first connecting section and the first body, the second connecting section has a third length, and the third length gradually decreases from the first connecting section toward the first body.

4. The flip chip structure according to claim 1, characterized in that: Along the third center line direction, the first bump has a first width, the second bump has a second width, the second width is smaller than the first width, along the fourth center line direction, the first bump has a fourth length, the second bump has a second length, the first width is greater than the fourth length, the fifth length is greater than the second width, the second width is smaller than the first width, the fifth length is greater than the fourth length, and the fifth length is not greater than the first width.

5. The flip chip structure according to claim 4, characterized in that: The fifth length is smaller than the first width.

6. The flip chip structure according to claim 1, characterized in that: Along the second axis direction, the first joint portion is disposed in the chip setting area, and the first center line extends along the second axis direction. Along the first axis direction, the second joint portion is disposed in the chip setting area, and the second center line extends along the first axis direction.

7. The flip chip structure according to claim 1, characterized in that: The circuit board further includes a plurality of third inner pins, the plurality of third inner pins are arranged in the chip setting area, the third inner pin has a third pin portion and a third joint portion, the third pin portion has a third connecting section, the third connecting section is connected to the third joint portion, and a fourth angle is formed between the third joint portion and the third connecting section. Along the first axis direction, the plurality of first joint portions, the plurality of second joint portions and the plurality of third joint portions are alternately arranged in the chip setting area. Along the second axis direction, there is a second spacing between the first joint portion and the third joint portion. The second spacing The distance is smaller than the first spacing, the first bonding portion is closer to the edge of the chip setting area than the third bonding portion, a fifth angle is formed between the first center line and the fifth center line of the third bonding portion, the chip has a plurality of third bumps, along the first axis direction, the plurality of first bumps, the plurality of second bumps and the plurality of third bumps are alternately arranged on the active surface, the first bump is closer to the edge of the active surface than the third bump, a sixth angle is formed between the third center line and the sixth center line of the third bump, and the third bump is bonded to the third bonding portion and the third connecting section.

8. The flip chip structure according to claim 7, characterized in that: Along the third center line direction, the third protrusion has a third width, which is smaller than the first width. Along the sixth center line direction, the third protrusion has a sixth length, which is larger than the fourth length.

9. The flip chip structure according to claim 8, characterized in that: Along the second axis direction, the first bonding portion is arranged in the chip setting area, the first center line and the third center line extend along the second axis direction, along the first axis direction, the second bonding portion and the third bonding portion are arranged in the chip setting area, and the second center line, the fourth center line, the fifth center line and the sixth center line extend along the first axis direction.

10. The flip chip structure according to claim 1, wherein: The second joint portion is in an inverted L-shape, a T-shape, a Y-shape or a cross shape.

11. A circuit board with a flip chip structure, characterized in that: Include: Chip setting area; a plurality of first inner pins, each of the first inner pins having a first joint portion; and A plurality of second inner pins, each second inner pin having a second pin portion and a second joint portion, the second pin portion having a first connecting section, the first connecting section connecting the second joint portion, a first angle being formed between the second joint portion and the first connecting section, the second joint portion and the first connecting section being used to join a bump, along a first axis direction, the plurality of first joint portions and the plurality of second joint portions are alternately arranged in the chip setting area, along a second axis direction intersecting the first axis, a first spacing is formed between the first joint portion and the second joint portion, the first joint portion is closer to the edge of the chip setting area than the second joint portion, and a second angle is formed between a first center line of the first joint portion and a second center line of the second joint portion.

12. The flip chip circuit board according to claim 11, characterized in that: The second pin portion has a first body, the first body has a first length, the first connecting section has a second length, and the second length is greater than the first length.

13. The flip chip circuit board according to claim 12, characterized in that: The second pin portion has a second connecting section, the second connecting section is located between the first connecting section and the first body, the second connecting section has a third length, and the third length gradually decreases from the first connecting section toward the first body.

14. The flip chip circuit board according to claim 11, characterized in that: Along the second axis direction, the first joint portion is disposed in the chip setting area, and the first center line extends along the second axis direction. Along the first axis direction, the second joint portion is disposed in the chip setting area, and the second center line extends along the first axis direction.

15. The flip chip circuit board according to claim 11, characterized in that: The circuit board further includes a plurality of third inner pins, which are arranged in the chip setting area. The plurality of third inner pins have a third pin portion and a third joint portion, the third pin portion has a third connecting section, the third connecting section is connected to the third joint portion, and a fourth angle is formed between the third joint portion and the third connecting section. Along the first axis direction, the plurality of first joint portions, the plurality of second joint portions and the third joint portion are alternately arranged in the chip setting area. Along the second axis direction, a second spacing is formed between the first joint portion and the third joint portion, and the second spacing is smaller than the first spacing. The first joint portion is closer to the edge of the chip setting area than the third joint portion, and a fifth angle is formed between the first center line and the fifth center line of the third joint portion.

16. The flip chip circuit board according to claim 15, characterized in that: The first joint portion is disposed in the chip setting area along the second axis direction, the second joint portion and the third joint portion are disposed in the chip setting area along the first axis direction, and the second center line and the fifth center line extend along the first axis direction.

17. The flip chip circuit board according to claim 11, characterized in that: The second joint portion is in an inverted L-shape, a T-shape, a Y-shape or a cross shape.

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