Capacitor-incorporating sheet, interposer, and semiconductor element

Abstract

This sheet (1) with a built-in capacitor has a conductor layer (200) and a porous layer (100) provided on the conductor layer (200), and the porous layer (100) is provided with: a capacitor part (120) having a structure of metal layer (121)-dielectric layer (122)-metal layer (123) provided in a porous structure (101) of the porous layer (100); a through-hole part (110) in which a conductor (111) is filled in the porous structure (101) of the porous layer (100); and a porous insulating part (130) which is provided around the through-hole part (110) and in which the porous structure (101) is not filled with a conductor, the conductor layer (200) being provided with: a metal conductor (230); a first via hole section (210) that passes through the metal conductor (230) directly below the via hole section (100) and is connected to the via hole section (110); and a first insulating part (220) that is provided around the first via hole part (210) and insulates the first via hole part (210) from the metal conductor (230).

Description

Technical Field

[0001] The present invention relates to a capacitor built-in sheet, an interposer and a semiconductor element. Background Art

[0002] As a typical capacitor element used in a semiconductor integrated circuit, for example, a MIM (Metal Insulator Metal) capacitor is known. A MIM capacitor is a capacitor having a parallel plate structure in which an insulator is sandwiched between a lower electrode and an upper electrode.

[0003] Patent document 1 discloses a stacked semiconductor device package in which a logic circuit is mounted on one surface of a substrate and a capacitor is mounted on the other surface of the substrate, and the logic circuit and the capacitor are electrically connected. In addition, it is disclosed that the capacitor is sealed with an insulator and a through hole filled with metal is provided on the insulator.

[0004] Patent Document 2 describes a capacitor structure including a substrate, a conductive layer on the substrate, and a porous layer on the conductive layer. The porous layer includes a first portion having a conductor and a second portion having a MIM capacitor structure.

[0005] Patent Document 1: International Publication No. 2016 / 099523

[0006] Patent document 2: European Patent Application Publication No. 4009340

[0007] According to the structure described in Patent Document 1, since a package substrate is present between the logic circuit and the capacitor, the distance between the logic circuit and the capacitor is long, the ESL becomes high, and the impedance characteristics in the high frequency region are insufficient.

[0008] In addition, the structure of Patent Document 2 has a problem that the MIM capacitor structure and the power supply line on the substrate side cannot be integrated. Summary of the invention

[0009] The present invention is completed to solve the above-mentioned problems, and its purpose is to provide a capacitor built-in sheet (Integrated capacitor sheet) that can improve the impedance characteristics in the high-frequency region by adopting a structure that shortens the distance between semiconductor components such as logic circuits and capacitor parts, and can lead out the conductor provided in the porous layer provided with the capacitor structure in the thickness direction and integrate it with the power supply line on the substrate side.

[0010] The built-in capacitor sheet of the present invention comprises a conductor layer and a porous layer arranged on the conductor layer, wherein the porous layer comprises: a capacitor portion having a structure of a metal layer-dielectric layer-metal layer having a porous structure arranged on the porous layer; a through-hole portion in which the porous structure of the porous layer is filled with a conductor; and a porous insulating portion arranged around the through-hole portion and in which no conductor is filled. The conductor layer comprises: a metal conductor; a first conductive hole portion penetrating the metal conductor directly below the through-hole portion and connected to the through-hole portion; and a first insulating portion arranged around the first conductive hole portion to insulate the first conductive hole portion from the metal conductor.

[0011] The interposer of the present invention includes: the built-in capacitor sheet of the present invention; and a redistribution layer disposed on at least one main surface of the built-in capacitor sheet.

[0012] The semiconductor element of the present invention includes at least the capacitor built-in sheet of the present invention and a semiconductor portion, which are integrated together.

[0013] According to the present invention, a capacitor built-in sheet can be provided, which can improve the impedance characteristics in the high-frequency region by adopting a structure that shortens the distance between semiconductor components such as logic circuits and capacitor parts, and can lead out the conductor provided in the porous layer provided with the capacitor structure in the thickness direction and integrate it with the power supply line on the substrate side. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 This is a cross-sectional view schematically showing an example of the built-in capacitor sheet according to the first embodiment of the present invention.

[0015] Figure 2A It is an enlarged cross-sectional view of the capacitor portion.

[0016] Figure 2B It is an enlarged cross-sectional view of the through hole portion.

[0017] Figure 2C It is an enlarged cross-sectional view of a porous insulating portion.

[0018] Figure 3 This is a cross-sectional view schematically showing an example of a built-in capacitor sheet according to a second embodiment of the present invention.

[0019] Figure 4 This is a cross-sectional view schematically showing an example of a built-in capacitor sheet according to a third embodiment of the present invention.

[0020] Figure 5 This is a cross-sectional view schematically showing an example of a built-in capacitor sheet according to a fourth embodiment of the present invention.

[0021] Figure 6This is a cross-sectional view schematically showing an example of a built-in capacitor sheet according to a fifth embodiment of the present invention.

[0022] Figure 7 This is a cross-sectional view schematically showing an example of a built-in capacitor sheet according to a sixth embodiment of the present invention.

[0023] Figure 8 This is a cross-sectional view schematically showing an example of a built-in capacitor sheet according to a seventh embodiment of the present invention.

[0024] Fig. 9 This is a cross-sectional view schematically showing an example of a built-in capacitor sheet according to an eighth embodiment of the present invention.

[0025] Fig.10 is included Figure 6 An enlarged view of the area A and area B surrounded by dotted lines.

[0026] Fig.11 It is a cross-sectional view schematically showing an example of the interposer of the present invention.

[0027] Fig.12 is included Fig.11 An enlarged view of a portion of region C surrounded by a dotted line.

[0028] Fig.13A This is a process diagram schematically showing an example of a process for manufacturing a built-in capacitor sheet.

[0029] Fig. 13B This is a process diagram schematically showing an example of a process for manufacturing a built-in capacitor sheet.

[0030] Fig. 13C This is a process diagram schematically showing an example of a process for manufacturing a built-in capacitor sheet.

[0031] Fig.13D This is a process diagram schematically showing an example of a process for manufacturing a built-in capacitor sheet.

[0032] Fig.13E This is a process diagram schematically showing an example of a process for manufacturing a built-in capacitor sheet.

[0033] Fig.14A This is a process diagram schematically showing an example of a manufacturing process of a built-in capacitor sheet and an interposer.

[0034] Fig. 14B This is a process diagram schematically showing an example of a manufacturing process of a built-in capacitor sheet and an interposer.

[0035] Fig. 14CThis is a process diagram schematically showing an example of a manufacturing process of a built-in capacitor sheet and an interposer.

[0036] Fig.14D This is a process diagram schematically showing an example of a manufacturing process of a built-in capacitor sheet and an interposer.

[0037] Fig.14E This is a process diagram schematically showing an example of a manufacturing process of a built-in capacitor sheet and an interposer.

[0038] Fig.14F This is a process diagram schematically showing an example of a manufacturing process of a built-in capacitor sheet and an interposer.

[0039] Figure 14G This is a process diagram schematically showing an example of a manufacturing process of a built-in capacitor sheet and an interposer.

[0040] Fig.15 This is a cross-sectional view schematically showing an example of use of a capacitor built-in sheet and an interposer.

[0041] Fig.16 This is a cross-sectional view schematically showing another example of use of the built-in capacitor sheet and the interposer.

[0042] Fig.17 This is a cross-sectional view schematically showing another example of use of the built-in capacitor sheet and the interposer.

[0043] Fig.18 This is a cross-sectional view schematically showing another example of use of the built-in capacitor sheet and the interposer.

[0044] Fig.19 It is a cross-sectional view schematically showing an example of the semiconductor element of the present invention. DETAILED DESCRIPTION

[0045] Hereinafter, the built-in capacitor sheet, interposer, and semiconductor element of the present invention will be described.

[0046] However, the present invention is not limited to the following configurations, and can be appropriately modified and applied within the scope of the gist of the present invention. In addition, a configuration in which two or more of the preferred configurations of the present invention described below are combined is also the present invention.

[0047] The embodiments shown below are examples, and it is of course possible to partially replace or combine the structures shown in different embodiments. In Embodiment 2 and after Embodiment 2, the description of matters shared with Embodiment 1 is also omitted, and only the differences are described. In particular, the same effects achieved by the same structure are not mentioned in sequence in each embodiment.

[0048] In the following description, when the embodiments are not particularly distinguished, they are simply referred to as "the built-in capacitor sheet of the present invention", "the interposer of the present invention" and "the semiconductor element of the present invention". The shapes and arrangements of the built-in capacitor sheet, the interposer and the semiconductor element of the present invention are not limited to the examples shown in the drawings.

[0049] [Implementation Method 1]

[0050] The built-in capacitor sheet of the present invention has a conductor layer and a porous layer arranged on the conductor layer. The porous layer comprises: a capacitor portion having a structure of a metal layer-dielectric layer-metal layer having a porous structure arranged on the porous layer; a through-hole portion, in which the porous structure of the porous layer is filled with a conductor; and a porous insulating portion, which is arranged around the through-hole portion and in which no conductor is filled in the porous structure. In addition, the conductor layer comprises: a metal conductor; a first conductive hole portion, which passes through the metal conductor directly below the through-hole portion and is connected to the through-hole portion; and a first insulating portion, which is arranged around the first conductive hole portion to insulate the first conductive hole portion from the metal conductor.

[0051] Hereinafter, a built-in capacitor sheet having these structures will be described as a built-in capacitor sheet according to the first embodiment of the present invention.

[0052] Figure 1 This is a cross-sectional view schematically showing an example of the built-in capacitor sheet according to the first embodiment of the present invention. Figure 2A is an enlarged cross-sectional view of the capacitor section. Figure 2B is an enlarged cross-sectional view of the through hole portion. Figure 2C It is an enlarged cross-sectional view of a porous insulating portion.

[0053] Figure 1 The capacitor built-in sheet 1 shown includes a conductor layer 200 and a porous layer 100 provided on the conductor layer 200. The porous layer 100 includes a capacitor portion 120, a through-hole portion 110, and a porous insulating portion 130.

[0054] The porous layer 100 is preferably a porous structure formed by anodizing aluminum (AAO structure: Anodic Aluminum Oxide). Figure 2A , Figure 2B as well as Figure 2C , a wall surface 101 a of the porous structure 101 is shown. The porous layer 100 includes through holes extending from a surface 103 of the porous layer to the conductor layer 200 in the thickness direction of the porous layer 100 .

[0055] like Figure 2AAs shown, the capacitor part 120 has a structure including a metal layer 121, a dielectric layer 122, and a metal layer 123 on the wall surface 101a of the porous structure 101. This structure is a Metal-Insulator-Metal structure (hereinafter also referred to as MIM structure), and functions as a capacitor.

[0056] The MIM structure is preferably formed by atomic layer deposition (ALD).

[0057] The through hole portion 110 is a structure that enables electrical conduction between the main surface 102 of the porous layer on the conductor layer side and the surface 103 of the porous layer (the main surface of the porous layer on the opposite side to the conductor layer).

[0058] like Figure 2B As shown in FIG. 1 , the through hole portion 110 has a structure in which a conductor 111 is filled in the porous structure 101. In other words, the through hole portion 110 has a structure in which the conductor 111 is filled and extends from the main surface 102 on the conductor layer side of the porous layer to the main surface 103 on the opposite side of the conductor layer of the porous layer. By filling the conductor 111 in the porous structure 101 in the through hole portion 110, the through hole portion 110 has a structure in which the main surface 102 on the conductor layer side of the porous layer 100 and the surface 103 of the porous layer can be electrically connected. As the conductor 111, copper or nickel is preferably used.

[0059] like Figure 2C As shown, the porous insulating portion 130 has a structure in which a conductor is not filled in the porous structure 101. Since the conductor is not filled in the porous structure, the porous insulating portion 130 becomes an insulator. The porous insulating portion 130 exists between the through-hole portion 110 and the capacitor portion 120, and insulates the through-hole portion 110 and the capacitor portion 120, so that the through-hole portion 110 and the capacitor portion 120 are not conductive in the porous layer 100.

[0060] The conductor layer 200 is a layer including a metal conductor 230 , a first via portion 210 , and a first insulating portion 220 . The metal conductor 230 is in contact with the capacitor portion 120 , and one electrode (anode or cathode) of the capacitor portion 120 is drawn out from the metal conductor 230 .

[0061] The metal constituting the metal conductor 230 may be one type or multiple types of metals. For example, a multilayer conductor layer having a three-layer structure of W—Al—Ti from the side close to the porous layer may be used.

[0062] The first via hole portion 210 is a via hole provided directly below the through hole portion 110 so as to penetrate the metal conductor 230. In other words, the first via hole portion 210 is provided along the direction in which the through hole portion 110 extends from the main surface 102 on the conductor layer side of the porous layer of the through hole portion 110 and is connected to the through hole portion 110.

[0063] The first via hole portion is preferably made of metal. The metal constituting the first via hole portion 210 is preferably copper. Since the through hole portion 110 is connected to the first via hole portion 210 on the main surface 202 of the porous layer side of the conductor layer, the through hole portion 110 can be led out to the main surface 203 of the conductor layer on the opposite side of the porous layer. As a result, a structure is obtained in which conduction is obtained from the surface 103 of the porous layer to the main surface 203 of the conductor layer on the opposite side of the porous layer. That is, a capacitor built-in sheet can be obtained in which the conductor provided in the porous layer can be led out in the thickness direction.

[0064] A first insulating portion 220 is provided around the first via hole 210 to insulate the first via hole 210 from the metal conductor 230. The first insulating portion 220 is preferably made of a resin material, and any resin material that can be used as an insulating material can be used.

[0065] The metal conductor 230 is electrically connected to one electrode of the capacitor portion 120 . However, since the first via portion 210 and the metal conductor 230 are insulated by the first insulating portion 220 , the capacitor portion 120 is electrically insulated from the first via portion 210 and the through-hole portion 110 .

[0066] [Implementation Method 2]

[0067] The built-in capacitor sheet according to the second embodiment of the present invention further includes a lead electrode portion in which a conductor is filled in the porous structure of the porous layer and is connected to the metal conductor of the conductor layer at the bottom.

[0068] Figure 3 This is a cross-sectional view schematically showing an example of a built-in capacitor sheet according to a second embodiment of the present invention.

[0069] Figure 3 The capacitor built-in sheet 2 shown has a lead electrode portion 140 in the porous layer 100 .

[0070] The extraction electrode portion 140 has a structure in which a conductor is filled in a porous structure. As a structure in the porous layer 100 , the structure of the through hole portion 110 is the same as the structure of the extraction electrode portion 140 .

[0071] The lead electrode portion 140 is connected at the bottom to the metal conductor 230 of the conductor layer 200. The lead electrode portion 140 is different from the through hole portion 110 in that there is no first via hole portion 210 but there is a metal conductor 230 directly below the lead electrode portion 140.

[0072] In addition, similarly to the through-hole portion 110 , the lead electrode portion 140 has a structure that allows electrical conduction between the main surface 102 of the porous layer 100 on the conductor layer side and the surface 103 of the porous layer.

[0073] The lead-out electrode portion 140 is connected to the metal conductor 230 of the conductor layer 200. Since the metal conductor 230 is in contact with the capacitor portion 120, one electrode of the capacitor portion 120 is led out to the metal conductor 230, and thus the lead-out electrode portion 140 is electrically connected to the capacitor portion 120 via the metal conductor 230. With this structure, one electrode of the capacitor portion 120 is led out to the surface 103 of the porous layer via the metal conductor 230.

[0074] That is, by providing the extraction electrode portion 140 , the position where the electrode is extracted from the capacitor portion 120 can be changed.

[0075] [Implementation method 3]

[0076] The built-in capacitor sheet according to the third embodiment of the present invention further includes a columnar metal electrode connected to the metal conductor of the conductor layer at the bottom thereof, in the same layer as the porous layer.

[0077] Figure 4 This is a cross-sectional view schematically showing an example of a built-in capacitor sheet according to a third embodiment of the present invention.

[0078] Figure 4 The capacitor built-in sheet 3 shown has a columnar metal electrode 150 on the porous layer 100 .

[0079] The pillar-shaped metal electrode 150 is made of a dense metal rather than a porous structure. The pillar-shaped metal electrode 150 is located at the same layer as the porous layer (located at the same height as the porous layer in the capacitor built-in sheet), but is not a part of the porous layer.

[0080] The pillar-shaped metal electrode 150 is connected at the bottom to the metal conductor 230 of the conductor layer 200. There is no first via portion 210 directly below the pillar-shaped metal electrode 150, but there is the metal conductor 230.

[0081] In addition, similarly to the through-hole portion 110 , the pillar-shaped metal electrode 150 has a structure that allows electrical conduction between the main surface 102 of the porous layer 100 on the conductor layer side and the surface 103 of the porous layer.

[0082] As the columnar metal electrode, it is preferable to use aluminum that has not been anodized. In the process of anodizing aluminum to form a porous layer, a portion of the aluminum is masked so that it does not come into contact with the aqueous acid solution used in the anodization. As a result, the masked portion is not anodized, and a portion of the metal that does not become the porous layer remains. The remaining metal portion can be used as the columnar metal electrode 150.

[0083] By providing the columnar metal electrode 150, one electrode of the capacitor unit 120 is led out to the surface 103 of the porous layer via the metal conductor 230, similarly to the case where the lead electrode unit 140 is provided. That is, by providing the columnar metal electrode 150, the lead position of the electrode from the capacitor unit 120 can be changed.

[0084] [Implementation Method 4]

[0085] In the capacitor built-in sheet according to the fourth embodiment of the present invention, the porous layer includes a plurality of capacitor parts, the metal conductor is connected to any one of the metal layers of each capacitor part, and the conductor layer further includes a third insulating part that insulates the metal conductors connected to different capacitor parts.

[0086] Figure 5 This is a cross-sectional view schematically showing an example of a built-in capacitor sheet according to a fourth embodiment of the present invention.

[0087] Figure 5 The capacitor built-in sheet 4 shown has a plurality of capacitor sections 120 in the porous layer 100. The capacitor section 120 shown in the center of the drawing is referred to as a capacitor section 120a, and the capacitor section 120 shown on the right side of the drawing is referred to as a capacitor section 120b.

[0088] The plurality of capacitor portions 120 included in the built-in capacitor sheet 4 may be arranged in an array form such as a lattice or a zigzag pattern when viewed from above.

[0089] The metal conductor 230 is connected to each capacitor unit 120. The metal conductor 230 shown in the center of the figure is referred to as the metal conductor 230a, and the metal conductor 230 shown on the right side of the figure is referred to as the metal conductor 230b. The capacitor unit 120a is connected to the metal conductor 230a, and the capacitor unit 120b is connected to the metal conductor 230b. However, a third insulating portion 240 is provided between the metal conductor 230a and the metal conductor 230b, and the metal conductor 230a and the metal conductor 230b are electrically insulated. As a result, the capacitor unit 120a is electrically separated from the capacitor unit 120b.

[0090] The material constituting the third insulating portion 240 is not limited, but is preferably an inorganic insulating material, and SiO 2 can be preferably used.

[0091] [Implementation method 5]

[0092] The built-in capacitor sheet of the fifth embodiment of the present invention further comprises a substrate on which the conductor layer is placed. The substrate further comprises: a substrate, a second via hole portion penetrating the substrate directly below the first via hole portion and integrated with the first via hole portion, and a second insulating portion provided around the second via hole portion and integrated with the first insulating portion.

[0093] Figure 6 This is a cross-sectional view schematically showing an example of a built-in capacitor sheet according to a fifth embodiment of the present invention.

[0094] Figure 6 The capacitor built-in sheet 5 shown includes a substrate 300, and the conductor layer 200 is placed on the substrate 300. As the substrate 300, a silicon substrate, a glass substrate, an organic substrate, or the like can be used.

[0095] The substrate 300 is provided with a base material 330 , a second via hole portion 310 penetrating the base material 330 , and a second insulating portion 320 provided around the second via hole portion 310 .

[0096] In the substrate 300 , a portion other than the through holes forming the second via hole portion 310 and the second insulating portion 320 is a base material 330 .

[0097] The substrate 330 may also be a semiconductor. When the substrate 330 is a semiconductor, it may be a material such as silicon. When the substrate is not an insulator, an insulating layer is preferably provided between the substrate 330 and the conductor layer 200, and SiO2 is preferably used as the insulating layer. Fig.13A In the following), a diagram showing a SiO 2 layer 340 provided between the substrate 330 and the conductor layer 200 is shown.

[0098] The substrate 330 may be an insulator. When the substrate 330 is an insulator, it may be glass, an organic material, or the like.

[0099] The second via hole portion 310 is integrated with the first via hole portion 210. When manufacturing the built-in capacitor sheet 5 of the fifth embodiment, the first via hole portion 210 and the second via hole portion 310 can be formed at the same time.

[0100] The second via hole 310 is preferably made of metal, and copper is preferably used as the metal constituting the second via hole 310. When the substrate 300 is made of silicon, a via hole such as the second via hole 310 is a structure called a TSV (Through Silicon Via).

[0101] The second insulating portion 320 is integrated with the first insulating portion 220. When manufacturing the built-in capacitor sheet 5 of the fifth embodiment, the first insulating portion 220 and the second insulating portion 320 can be formed at the same time.

[0102] The second insulating portion 320 is preferably made of a resin material, and any resin material that can be used as an insulating material can be used.

[0103] Since the second conductive hole portion 310 is integrated with the first conductive hole portion 210, and the first conductive hole portion 210 is connected to the through-hole portion 110 directly below the through-hole portion 110, the through-hole portion 110 can be led out to the main surface 303 of the substrate on the opposite side of the porous layer. As a result, a structure is obtained in which conduction is provided from the surface 103 of the porous layer to the main surface 303 of the substrate on the opposite side of the porous layer. That is, a capacitor built-in sheet can be obtained in which the conductor provided in the porous layer can be led out from the substrate in the thickness direction.

[0104] [Implementation Method 6]

[0105] In the built-in capacitor sheet according to the sixth embodiment of the present invention, a plurality of first and second via holes are provided for one through hole.

[0106] Figure 7 This is a cross-sectional view schematically showing an example of a built-in capacitor sheet according to a sixth embodiment of the present invention.

[0107] exist Figure 7 In the capacitor built-in sheet 6 shown, four first via holes 210 and second via holes 310 are provided for one through hole 110, a first insulating portion 220 is provided around each first via hole 210, and a second insulating portion 320 is provided around each second via hole 310. Figure 7 , two first and second via holes 210 and 310 visible from the front side and the first and second insulating portions 220 and 320 surrounding them are shown.

[0108] With this structure, the cost (the cost of the plating process) when forming the first and second via holes can be reduced.

[0109] [Implementation method 7]

[0110] In the built-in capacitor sheet according to the seventh embodiment of the present invention, a plurality of first and second via holes are provided for a plurality of through holes.

[0111] Figure 8 This is a cross-sectional view schematically showing an example of a built-in capacitor sheet according to a seventh embodiment of the present invention.

[0112] exist Figure 8 In the capacitor built-in sheet 7 shown, four first via holes 210 and four second via holes 310 are provided for four through-holes 110, a first insulating portion 220 is provided around each first via hole 210, and a second insulating portion 320 is provided around each second via hole 310. Figure 8, two through-hole portions 110 , two first via-hole portions 210 , and a second via-hole portion 310 and the first insulating portion 220 and the second insulating portion 320 around them are shown.

[0113] With this structure, the resistance values ​​of the through hole portion 110 , the first through hole portion 210 , and the second through hole portion 310 can be reduced, and stress applied to one through hole portion 110 can be alleviated.

[0114] [Embodiment 8]

[0115] In the built-in capacitor sheet according to the eighth embodiment of the present invention, the third via hole portion formed by filling with the conductive paste is provided.

[0116] Fig. 9 This is a cross-sectional view schematically showing an example of a built-in capacitor sheet according to an eighth embodiment of the present invention.

[0117] exist Fig. 9 The capacitor shown is built into the sheet 8, in Figure 7 The capacitor built-in sheet 6 shown in the figure further includes a substrate-side resin layer 350 provided below the substrate 300 , and includes a third via hole portion 360 formed by filling an opening provided in the substrate-side resin layer 350 with a conductive paste.

[0118] Since the third via hole portion 360 is connected to the second via hole portion 310 provided on the substrate 300 , the third via hole portion 360 is connected to the through hole portion 110 via the second via hole portion 310 and the first via hole portion 210 .

[0119] The through hole portion 110 is led out to the surface of the substrate-side resin layer 350 (the main surface of the substrate-side resin layer on the opposite side to the substrate).

[0120] As a material of the substrate-side resin layer, for example, ABF (Ajinomoto Laminated Film (registered trademark)) can be used.

[0121] [Common matters in Embodiments 1 to 8]

[0122] In any of the built-in capacitor sheets of the present invention, it is preferable that a portion of the first insulating portion penetrates into a porous layer adjacent to the first insulating portion.

[0123] Furthermore, it is preferable that a part of the first via hole portion penetrates into the porous layer adjacent to the first via hole portion.

[0124] Fig.10 is included Figure 6 An enlarged view of the area A and area B surrounded by dotted lines.

[0125] exist Fig.10FIG. 2 schematically shows a situation in which a portion of the first insulating portion 220 (resin material) enters the porous structure of the porous insulating portion 130 in the porous layer 100 in region A. FIG. 2 schematically shows a situation in which a portion of the first via portion 210 (metal) enters the porous structure of the porous insulating portion 130 in the porous layer 100 in region B.

[0126] As the first insulating portion 220 enters the porous layer 100 , the bonding between the first insulating portion 220 and the porous layer 100 is strengthened, and the connection reliability of the built-in capacitor sheet is improved.

[0127] Likewise, as the first via hole 210 penetrates into the porous layer 100 , the bonding between the first via hole 210 and the porous layer 100 is strengthened, and the connection reliability of the built-in capacitor sheet is improved.

[0128] The positions where the first insulating portion 220 and the first via hole portion 210 enter the porous layer 100 are not particularly limited. However, since other materials can easily enter the porous insulating portion 130 , it is preferred that the first insulating portion 220 and the first via hole portion 210 enter the porous insulating portion 130 .

[0129] In addition, the first insulating portion 220 may be in contact with the porous insulating portion 130 as a whole on the entire main surface 102 on the conductive layer side of the porous layer, so that the first insulating portion 220 enters the porous layer 100 and exerts an anchoring effect on the entire surface where the first insulating portion 220 contacts the porous layer 100.

[0130] [Interposer]

[0131] Next, an example of the interposer of the present invention will be described.

[0132] The interposer of the present invention includes the built-in capacitor sheet of the present invention and a redistribution layer disposed on at least one main surface of the built-in capacitor sheet. The redistribution layer preferably includes an organic insulating layer.

[0133] The redistribution layer is called RDL (Redistribution Layer).

[0134] Fig.11 It is a cross-sectional view schematically showing an example of the interposer of the present invention.

[0135] Fig.11 The interposer 20 shown has Figure 6 The capacitor built-in sheet 5 and the rewiring layer 400 are shown. The rewiring layer 400 is arranged on the surface 103 of the porous layer included in the capacitor built-in sheet 5 .

[0136] The rewiring layer 400 includes an organic insulating layer 410 and wiring 420, and the wiring 420 is electrically connected to the through-hole portion 110 or the capacitor portion 120. The position and interval of the electrodes provided on the surface of the built-in capacitor sheet 5 can be changed by the rewiring layer 400. As a result, it becomes easy to connect other semiconductor elements such as logic circuits.

[0137] By means of the wiring 420 provided in the rewiring layer 400, both the anode and cathode of the capacitor section 120 may be led out to the rewiring layer 400, or only one of the anode and cathode of the capacitor section 120 may be led out to the rewiring layer 400. Assuming that only one electrode is led out to the rewiring layer 400, the other electrode is led out to the opposite side of the rewiring layer 400 (the conductor layer side, the substrate side).

[0138] exist Fig.11 In the example in which the rewiring layer is provided on the built-in capacitor sheet having a substrate, the interposer of the present invention may also be provided on the built-in capacitor sheet not having a substrate (see Embodiments 1 to 4).

[0139] Alternatively, a rewiring layer may be provided on the principal surface of the conductor layer opposite to the porous layer, or on the principal surface of the substrate opposite to the porous layer. Alternatively, a rewiring layer may be provided on both principal surfaces of the built-in capacitor sheet.

[0140] exist Fig.11 In the example, the rewiring layer is shown to have an organic insulating layer, but the rewiring layer may also have an inorganic insulating layer and an organic insulating layer. That is, the rewiring layer may also be a combination of an inorganic rewiring layer including an inorganic insulating layer and wiring in contact with the built-in capacitor sheet, and an organic rewiring layer including an organic insulating layer and wiring provided on the inorganic rewiring layer.

[0141] In the interposer of the present invention, it is preferable that a part of the rewiring layer penetrates into a porous layer adjacent to the rewiring layer.

[0142] Fig.12 yes Fig.11 FIG. 1 is an enlarged view of a portion including a region C surrounded by a dotted line.

[0143] exist Fig.12 , a state where, in a region C, a portion of the organic insulating layer 410 of the rewiring layer 400 and a portion of the wiring 420 enter into the porous structure of the porous insulating portion 130 in the porous layer 100 is schematically shown.

[0144] Furthermore, when the inorganic insulating layer in the rewiring layer is in contact with the porous layer, a part of the inorganic insulating layer may enter the porous layer adjacent to the rewiring layer.

[0145] Since a part of the rewiring layer 400 enters the porous layer 100 , the bonding between the rewiring layer 400 and the porous layer 100 is strengthened, and the connection reliability of the interposer is improved.

[0146] The position where the rewiring layer 400 enters the porous layer 100 is not particularly limited, but since other materials can easily enter the porous insulating portion 130 , it is preferable that the rewiring layer 400 enters the porous insulating portion 130 .

[0147] [Capacitor built-in sheet and method for manufacturing interposer]

[0148] Fig.13A , Fig. 13B , Fig. 13C , Fig.13D as well as Fig.13E This is a process diagram schematically showing an example of a process for manufacturing a built-in capacitor sheet. Fig.14A , Fig. 14B , Fig. 14C , Fig.14D , Fig.14E , Fig.14F as well as Figure 14G This is a process diagram schematically showing an example of a manufacturing process of a built-in capacitor sheet and an interposer.

[0149] Hereinafter, the steps of manufacturing the built-in capacitor sheet of the present invention and the steps of manufacturing the interposer of the present invention using the manufactured built-in capacitor sheet will be described successively.

[0150] First, a substrate having a conductor layer laminated on its surface is prepared.

[0151] exist Fig.13A 3 shows a structure in which a SiO2 layer 340 is provided on a substrate 300 made of silicon, and a conductor layer composed of a Ti layer 510, an Al layer 520, a W layer 530, and an Al layer 540 is sequentially stacked on the SiO2 layer 340. The structure of the conductor layer provided on the substrate 300 is not limited to the above structure, but since the uppermost layer of the conductor layer is a layer that becomes a porous layer, it is preferably an Al layer.

[0152] Next, a part or all of the conductor layer is anodized to form a porous layer. Fig. 13B Shown in Fig.13A The uppermost Al layer 540 is anodized to aluminum oxide, and the porous layer 100 has an AAO structure. The anodization reaction stops at the W layer 530, and the W layer 530 as a conductor layer is exposed at the bottom of the porous structure of the porous layer 100.

[0153] In addition, if a portion of the Al layer is masked in this step so as not to contact the aqueous acid solution used in the anodization, the masked portion is not anodized and remains as a metal portion that does not become a porous layer. The remaining metal portion can be used as the columnar metal electrode 150 (see Figure 4 ) to use.

[0154] Next, if Fig. 13C As shown, a first mask 104 is provided on the surface 103 of the porous layer. A SiO2 film can be used as the first mask 104. The first mask 104 is patterned and formed at a predetermined position on the surface 103 of the porous layer. In addition, the first mask 104 is not provided at a location where the through hole portion 110 is formed in the next step.

[0155] The first mask 104 is preferably formed of a material that does not penetrate into the porous structure and covers the surface 103 of the porous layer.

[0156] Next, if Fig.13D As shown, the porous layer is filled with a conductor to form a through hole 110. By filling the portion of the porous layer where the first mask 104 is not provided with the conductor, the through hole 110 can be formed only at a predetermined portion of the porous layer. It is preferred that the porous layer is filled with a conductor by electroplating. Copper or nickel is preferably used as the conductor.

[0157] In addition, the process for forming the lead electrode portion 140 is also the same. Similar to the case of forming the through hole portion 110 , the first mask 104 is not provided at the portion where the lead electrode portion 140 is to be formed, and the conductor is filled in the porous layer.

[0158] The through hole portion 110 and the extraction electrode portion 140 have different functions in the subsequent steps, but have the same structure at this stage.

[0159] In the subsequent process, when the opening is not formed in the conductor layer directly below the porous layer filled with the conductor, the first conductive hole portion and the first insulating portion are not formed, and the porous layer filled with the conductor and the metal conductor are kept connected, this portion is not a through-hole portion but a lead-out electrode portion.

[0160] Next, after stripping the first mask 104, as Fig.13E As shown, a second mask 105 is provided on the surface of the porous layer. A SiO2 film can be used as the second mask 105. The second mask 105 is patterned and formed at a predetermined position on the surface 103 of the porous layer. The second mask 105 is not provided at a location where the capacitor portion 120 is formed in the following steps.

[0161] exist Fig.13E, the process of forming the capacitor section 120 is also shown. For the portion of the surface 103 of the porous layer where the second mask 105 is not formed, a three-layer structure (MIM structure) of a metal layer, a dielectric layer, and a metal layer is formed by the ALD method to form the capacitor section 120. The metal layer, the dielectric layer, and the metal layer constituting the MIM structure are preferably materials that enter the porous structure and are formed along the wall surface of the porous structure.

[0162] In the previous process, the portion where the conductor is not filled in the porous layer and the MIM structure is not formed is the remaining portion of the structure where the conductor is not filled in the porous structure, and becomes the porous insulating portion 130 (see Figure 1 and Figure 2C ). When the second mask 105 is peeled off, the capacitor built-in sheet of the present invention is obtained.

[0163] Next, a rewiring layer is provided on the surface of the porous layer. Hereinafter, an example in which an inorganic rewiring layer and an organic rewiring layer are provided as the rewiring layer will be described.

[0164] First, an inorganic redistribution layer is provided on the surface of the porous layer.

[0165] When an inorganic rewiring layer is provided as the rewiring layer, the inorganic rewiring layer can be provided by performing steps such as film formation and patterning of a SiO2 layer as an inorganic insulating layer, formation of a wiring layer, and planarization by CMP on the surface of the porous layer.

[0166] exist Fig.14A and Fig. 14B , a process of forming an inorganic redistribution layer is shown.

[0167] The inorganic rewiring layer includes an inorganic insulating layer 430 and wirings 440. Of the wirings 440, wirings 440a provided on the capacitor portion 120 and wirings 440b provided on the extraction electrode portion 140 serve as cathodes or anodes of the capacitor portion.

[0168] In addition, among the wirings 440 , the wiring 440 c provided on the through-hole portion 110 serves as a connection electrode of the through-hole portion.

[0169] The wiring 440 a provided on the capacitor portion 120 is preferably an aluminum electrode, and the wiring 440 b and the wiring 440 c provided at other locations are preferably copper electrodes.

[0170] Next, an organic rewiring layer is provided on the surface of the inorganic rewiring layer.

[0171] When an organic rewiring layer is provided as the rewiring layer, the organic rewiring layer can be provided by performing steps such as forming a resin layer as an organic insulating layer and patterning and forming a wiring layer on the surface of the inorganic rewiring layer.

[0172] exist Fig. 14C , a process of forming an organic redistribution layer is shown.

[0173] The organic redistribution layer has an organic insulating layer 410 and wirings 420 .

[0174] Through the above steps, the rewiring layer 400 including the inorganic rewiring layer and the organic rewiring layer is provided.

[0175] Next, an opening is formed toward the substrate side, and a via hole portion and an insulating portion are formed toward the opening.

[0176] exist Fig.14D , the substrate 300 is ground to be thinner, and an opening 301 is provided at a predetermined position of the substrate 300. The opening can be formed in the substrate by etching the material (typically silicon) of the substrate.

[0177] Then, if Fig.14E As shown, the SiO2 layer 340 and the conductor layer (Ti layer 510, Al layer 520, W layer 530) are etched from the position of the opening 301 to form an opening directly below the through hole 110. The opening is filled with a resin 550.

[0178] Then, if Fig.14F As shown, an opening is provided in the resin 550 , and the opening is filled with a via conductor 560 . The via conductor 560 is connected to the through hole portion 110 , and the through hole portion 110 is led out to the surface of the substrate 300 .

[0179] The resin 550 provided in the previous step becomes the first insulating portion 220 in the conductor layer 200 and becomes the second insulating portion 320 in the substrate 300. The first insulating portion 220 and the second insulating portion 320 are integrated. In addition, the via conductor 560 becomes the first via hole portion 210 in the conductor layer 200 and becomes the second via hole portion 310 in the substrate 300. The first via hole portion 210 and the second via hole portion 310 are integrated.

[0180] After the above steps, the interposer of the present invention is obtained. In addition, the structure after removing the redistribution layer from the obtained interposer is the capacitor built-in sheet of the present invention. That is, in the above steps, the interposer of the present invention having the capacitor built-in sheet of the present invention is obtained.

[0181] In addition, if Figure 14G As shown, in order to improve solder bonding properties, UBM 570 (Under Bump Metal) may be provided on the via conductor 560 .

[0182] In addition, in the above-mentioned process, a through hole portion and a capacitor portion are formed in the substrate, and after the rewiring layer is provided, an opening is provided in the substrate and the conductor layer, and a resin and a via conductor (a first via hole portion, a second via hole portion, a first insulating portion, and a second insulating portion) are formed, but the order may be changed. That is, after the opening is provided in the substrate and the conductor layer and the resin and the via conductor (a first via hole portion, a second via hole portion, a first insulating portion, and a second insulating portion) are formed, a through hole portion and a capacitor portion may be formed in the substrate, and a rewiring layer may be provided.

[0183] Next, examples of using the built-in capacitor sheet and interposer of the present invention will be described.

[0184] [Use Example 1]

[0185] Fig.15 This is a cross-sectional view schematically showing an example of use of a capacitor built-in sheet and an interposer.

[0186] exist Fig.15 6 shows a mounting structure 601, which is stacked from the bottom with a motherboard 610, a package substrate 620, an interposer 21, and a semiconductor component 630. The motherboard 610 and the package substrate 620 are connected via bumps 615, the package substrate 620 and the interposer 21 are connected via bumps 625, and the interposer 21 and the semiconductor component 630 are connected via bumps 635.

[0187] The interposer 21 has a Figure 3 The lead-out electrode portion 140 described in Figure 6 The capacitor built-in sheet 9 of the substrate 300 described above.

[0188] Anode 124 of capacitor section 120 of built-in capacitor sheet 9 is led out onto capacitor section 120, and cathode 125 is led out onto lead electrode section 140 via metal conductor 230. That is, anode 124 and cathode 125 of capacitor section 120 are both led out to rewiring layer 400 side.

[0189] Since there is no package substrate between the interposer 21 having the capacitor portion and the semiconductor component 630 such as a logic circuit, the distance between the capacitor and the semiconductor component is short, and ESL can be reduced, thereby improving impedance characteristics in a high frequency region.

[0190] Since first and second vias 210 and 310 are integrally provided directly below via 110 of built-in capacitor sheet 9 , via 110 is led out to the substrate side. Second via 310 is connected to bump 625 , which is connected to package substrate 620 .

[0191] That is, the conductor provided in the porous layer can be led out in the thickness direction and integrated with the power supply line on the substrate side.

[0192] [Use Example 2]

[0193] Fig.16 This is a cross-sectional view schematically showing another example of use of the built-in capacitor sheet and the interposer.

[0194] Fig.16 The mounting structure 602 shown is a structure similar to Fig.15 The mounting structure shown is almost the same, but the connection between the package substrate 620 and the interposer 21 is a bump-less connection structure without using bumps.

[0195] Since ESL is easily generated at the bump portion, impedance characteristics can be improved by using bumpless connection.

[0196] Furthermore, by not using a bump, the height of the entire mounting structure can be reduced, which contributes to a reduction in thickness.

[0197] [Use Example 3]

[0198] Fig.17 This is a cross-sectional view schematically showing another example of use of the built-in capacitor sheet and the interposer.

[0199] Fig.17 The interposer 22 used in the mounting structure 603 shown has the capacitor built-in sheet 10 .

[0200] In capacitor built-in sheet 10 , anode 124 of capacitor portion 120 is led out above capacitor portion 120 , and cathode 125 is led out below capacitor portion 120 via conductor layer 200 .

[0201] When the capacitor-embedded sheet and interposer of the present invention are used, such a mounting structure can be adopted, and thus the degree of freedom in design is high.

[0202] The anode and the cathode may be led out from different principal surfaces of the capacitor unit 120. If the leading surfaces of the anode and the cathode have different structures, it is easy to use as a coupling capacitor.

[0203] In addition, in the built-in capacitor sheet 10 , since it is not necessary to lead one electrode of the capacitor portion 120 to the rewiring layer side, the lead electrode portion 140 may not be provided.

[0204] [Use Example 4]

[0205] Fig.18 This is a cross-sectional view schematically showing another example of use of the built-in capacitor sheet and the interposer.

[0206] exist Fig.18 In the mounting structure 604 shown, Fig.15 In the mounting structure shown, the interposer 21 is used in the up-down direction. That is, the redistribution layer 400 is located on the package substrate 620 side, and the built-in capacitor sheet 9 is located on the semiconductor component 630 side.

[0207] In addition, although not shown in the figure, it is also possible to use an interposer in which the rewiring layer is provided on both sides of the built-in capacitor sheet. In this case, the structure is [semiconductor component - (rewiring layer - built-in capacitor sheet - rewiring layer) - package substrate]. The part (rewiring layer - built-in capacitor sheet - rewiring layer) is the interposer.

[0208] When the capacitor-embedded sheet and interposer of the present invention are used, such a mounting structure can be adopted, and thus the degree of freedom in design is high.

[0209] [Semiconductor components]

[0210] Next, an example of the semiconductor element of the present invention is described.

[0211] The semiconductor element of the present invention includes at least the built-in capacitor sheet of the present invention and a semiconductor portion integrated therewith. Preferably, the built-in capacitor sheet and the semiconductor portion are integrated via a redistribution layer.

[0212] Fig.19 It is a cross-sectional view schematically showing an example of the semiconductor element of the present invention.

[0213] Fig.19 The semiconductor device 700 shown includes a portion (calculation unit) having a function of performing calculations as a semiconductor portion 710 and an interposer 21. The interposer 21 includes the built-in capacitor sheet 9 having the extraction electrode portion 140 and the substrate 300 described in the first example of use, and a rewiring layer 400.

[0214] The wiring 420 of the rewiring layer of the interposer 21 and the electrodes of the semiconductor portion 710 are connected and integrated by collective sealing. Fig.19 The semiconductor element 700 shown does not have a connection portion such as a solder bump, but has a stacked structure in which the wiring 420 constituting the rewiring layer 400 and the electrode of the semiconductor portion 710 are continuous.

[0215] In other words, it can be said that the structure of the interposer of the present invention is partially included in the semiconductor element 700 as one element.

[0216] As the semiconductor element of the present invention, Fig.19 The structure of the semiconductor element 700 shown is different, and also includes a structure in which the interposer and the semiconductor portion are connected by micro bumps, and the interposer and the semiconductor portion are collectively sealed and integrated.

[0217] In addition, a structure including a built-in capacitor sheet and a semiconductor portion without including a rewiring layer, directly connecting the built-in capacitor sheet and the semiconductor portion, and sealing them together to form an integrated structure is also included.

[0218] In addition, as the function of the semiconductor unit, there can be mentioned functions such as a calculation unit (logic circuit), a storage unit (Memory), and a control unit, but the function is not particularly limited.

[0219] In this specification, the following contents are disclosed.

[0220] <1> A capacitor built-in sheet comprising a conductor layer and a porous layer provided on the conductor layer,

[0221] The porous layer comprises:

[0222] A capacitor unit having a structure of a porous metal layer-dielectric layer-metal layer provided on the porous layer;

[0223] A through hole portion, wherein the porous structure of the porous layer is filled with a conductor; and

[0224] The porous insulating portion is arranged around the through hole portion, and the conductor is not filled in the porous structure.

[0225] The conductor layer has:

[0226] Metal conductors;

[0227] A first conductive hole portion, penetrating the metal conductor directly below the through hole portion, and connected to the through hole portion; and

[0228] The first insulating portion is disposed around the first via portion to insulate the first via portion from the metal conductor.

[0229] <2> The capacitor built-in sheet according to <1>, wherein:

[0230] The metal conductor is connected to the metal layer of any one of the capacitor parts.

[0231] The porous layer further includes a lead electrode portion, wherein a conductor is filled in a porous structure of the porous layer and the lead electrode portion is connected to the metal conductor of the conductor layer at a bottom.

[0232] <3> The built-in capacitor sheet according to <1> or <2>, wherein:

[0233] A columnar metal electrode is further provided on the same layer as the porous layer, and the columnar metal electrode is connected to the metal conductor of the conductor layer at the bottom.

[0234] <4> The built-in capacitor sheet according to any one of <1> to <3>, wherein

[0235] The porous layer has a plurality of capacitor portions.

[0236] The metal conductor is connected to the metal layer of any one of the capacitor parts.

[0237] The conductive layer further includes a third insulating portion configured to insulate the metal conductors connected to different capacitor portions from each other.

[0238] <5> The built-in capacitor sheet according to any one of <1> to <4>, wherein

[0239] further comprising a substrate, wherein the conductor layer is placed on the substrate,

[0240] The above substrate also has:

[0241] Base material;

[0242] A second conductive hole portion, penetrating through the substrate directly below the first conductive hole portion and integrated with the first conductive hole portion; and

[0243] The second insulating portion is provided around the second via portion and is integrated with the first insulating portion.

[0244] <6> The capacitor built-in sheet according to <5>, wherein:

[0245] An insulating layer is further provided between the substrate and the conductor layer.

[0246] <7> The capacitor built-in sheet according to <5>, wherein:

[0247] The above-mentioned substrate is an insulator.

[0248] <8> The capacitor built-in sheet according to any one of <1> to <7>, wherein

[0249] A portion of the first insulating portion enters the porous layer adjacent to the first insulating portion.

[0250] <9> The built-in capacitor sheet according to any one of <1> to <8>, wherein

[0251] A portion of the first via hole portion enters the porous layer adjacent to the first via hole portion.

[0252] <10> An interposer comprising:

[0253] The capacitor built-in sheet according to any one of <1> to <9>; and

[0254] The redistribution layer is disposed on at least one main surface of the capacitor built-in sheet.

[0255] <11> The interposer according to <10>, wherein:

[0256] The rewiring layer includes an organic insulating layer.

[0257] <12> The interposer according to <10> or <11>, wherein:

[0258] A portion of the rewiring layer penetrates into the porous layer adjacent to the rewiring layer.

[0259] <13> A semiconductor element including at least the capacitor-embedded sheet according to any one of <1> to <9> and a semiconductor portion integrated therewith.

[0260] <14> The semiconductor element according to <13>, wherein the built-in capacitor sheet and the semiconductor portion according to any one of <1> to <9> are integrated via a redistribution layer.

[0261] Description of Reference Numerals

[0262] 1, 2, 3, 4, 5, 6, 7, 8, 9, 10…capacitor built-in sheet; 20, 21, 22…interposer; 100…porous layer; 101…porous structure; 101a…wall surface of porous structure; 102…main surface of the conductor layer side of the porous layer; 103…surface of the porous layer (main surface of the porous layer opposite to the conductor layer (substrate)); 104…first mask (masking of the surface of the porous layer); 105…second mask (masking of the surface of the porous layer); 110…through Hole portion; 111…conductor; 120, 120a, 120b…capacitor portion; 121…metal layer; 122…dielectric layer; 123…metal layer; 124…anode of capacitor; 125…cathode of capacitor; 130…porous insulating portion; 140…lead electrode portion (porous structure); 150…columnar metal electrode (dense metal); 200…conductor layer; 202…main surface of the conductor layer on the porous layer side; 203…main surface of the conductor layer on the opposite side to the porous layer side; 210… first conductive hole portion; 220 ... first insulating portion; 230, 230a, 230b ... metal conductor; 240 ... third insulating portion; 300 ... substrate; 301 ... opening of substrate; 303 ... main surface of substrate opposite to porous layer; 310 ... second conductive hole portion; 320 ... second insulating portion; 330 ... substrate; 340 ... SiO2 layer; 350 ... substrate side resin layer; 360 ... third conductive hole portion; 400 ... rewiring layer; 410 ... organic insulating layer; 420 ... wiring; 430 …inorganic insulating layer; 440, 440a, 440b, 440c…wiring; 510…Ti layer; 520…Al layer; 530…W layer; 540…Al layer; 550…resin; 560…conductor; 570…UBM; 601, 602, 603, 604…mounting structure; 610…motherboard; 615…bump; 620…package substrate; 625…bump; 630…semiconductor component; 635…bump; 700…semiconductor element; 710…semiconductor unit.

Claims

1. A capacitor built-in sheet comprising a conductor layer and a porous layer provided on the conductor layer, The porous layer comprises: A capacitor unit having a structure of a porous metal layer-dielectric layer-metal layer provided on the porous layer; A through hole portion, wherein the porous structure of the porous layer is filled with a conductor; and The porous insulating portion is arranged around the through hole portion, and the conductor is not filled in the porous structure. The conductor layer has: Metal conductors; A first conductive hole portion, penetrating the metal conductor directly below the through hole portion, and connected to the through hole portion; and The first insulating portion is disposed around the first via portion to insulate the first via portion from the metal conductor.

2. The built-in capacitor sheet according to claim 1, wherein: The metal conductor is connected to the metal layer of any one of the capacitor parts. The porous layer further includes a lead electrode portion, wherein a conductor is filled in a porous structure of the porous layer and the lead electrode portion is connected to the metal conductor of the conductor layer at a bottom.

3. The built-in capacitor sheet according to claim 1 or 2, wherein: A columnar metal electrode is further provided on the same layer as the porous layer, and the columnar metal electrode is connected to the metal conductor of the conductor layer at the bottom.

4. The built-in capacitor sheet according to any one of claims 1 to 3, wherein The porous layer has a plurality of capacitor portions. The metal conductor is connected to the metal layer of any one of the capacitor parts. The conductive layer further includes a third insulating portion configured to insulate the metal conductors connected to different capacitor portions from each other.

5. The built-in capacitor sheet according to any one of claims 1 to 4, wherein further comprising a substrate, wherein the conductor layer is placed on the substrate, The above substrate also has: Base material; A second conductive hole portion, penetrating through the substrate directly below the first conductive hole portion and integrated with the first conductive hole portion; and The second insulating portion is provided around the second via portion and is integrated with the first insulating portion.

6. The built-in capacitor sheet according to claim 5, wherein: An insulating layer is further provided between the substrate and the conductor layer.

7. The built-in capacitor sheet according to claim 5, wherein: The above-mentioned substrate is an insulator.

8. The built-in capacitor sheet according to any one of claims 1 to 7, wherein A portion of the first insulating portion enters the porous insulating portion adjacent to the first insulating portion.

9. The built-in capacitor sheet according to any one of claims 1 to 8, wherein A portion of the first via hole portion enters the porous insulating portion adjacent to the first via hole portion.

10. An interposer comprising: The capacitor built-in sheet according to any one of claims 1 to 9; and The redistribution layer is disposed on at least one main surface of the capacitor built-in sheet.

11. The interposer according to claim 10, wherein: The rewiring layer includes an organic insulating layer.

12. The interposer according to claim 10 or 11, wherein: A portion of the rewiring layer enters the porous insulating portion adjacent to the rewiring layer. 13 . A semiconductor element comprising at least the capacitor-embedded sheet according to claim 1 and a semiconductor portion integrated together.

14. The semiconductor element according to claim 13, wherein The built-in capacitor sheet according to any one of claims 1 to 9 and the semiconductor portion are integrated via a rewiring layer.

Images