Low dropout regulator and electronic device

Abstract

The invention relates to a low dropout linear regulator and electronic equipment, the low dropout linear regulator comprises a first transconductance amplifier, a second transconductance amplifier, a third transconductance amplifier, a summator and a power tube, the first input end of the first transconductance amplifier is coupled with the second end of the power tube, the second input end of the first transconductance amplifier inputs reference voltage, and the third transconductance amplifier outputs the reference voltage; the output end of the first transconductance amplifier is coupled with the first input end of the summator and the input end of the second transconductance amplifier; the output end of the second transconductance amplifier is coupled with the input end of the third transconductance amplifier; the output end of the third transconductance amplifier is coupled with the second input end of the summator; the output end of the summator is coupled with the control end of the power tube; the first end of the power tube inputs power supply voltage, and the second end of the power tube is coupled with the first end of the load path. According to the scheme, the high-frequency power supply rejection ratio performance in the heavy load mode is good.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic circuits, and in particular to a low voltage drop linear regulator and electronic equipment. Background Art

[0002] As a power management module, a low dropout linear regulator (Low Dropout Out, LDO) needs to have good stability in different load modes.

[0003] In the traditional design of low-dropout linear regulators, in order to ensure the stability of the circuit in light load mode, a compensation capacitor with a larger capacitance is required, which will result in poor high-frequency power supply rejection ratio (PSRR) performance of the low-dropout linear regulator in heavy load mode. Summary of the invention

[0004] An object of the present invention is at least to provide a low voltage dropout linear regulator having a good power supply rejection ratio performance in a heavy load mode.

[0005] In a first aspect, the present invention provides a low voltage drop linear regulator, comprising: a first transconductance amplifier, a second transconductance amplifier, a third transconductance amplifier, an adder and a power tube, wherein: the first transconductance amplifier, a first input end thereof is coupled to the second end of the power tube, a second input end thereof inputs a reference voltage, and an output end thereof is coupled to the first input end of the adder and the input end of the second transconductance amplifier; the second transconductance amplifier, an output end thereof is coupled to the input end of the third transconductance amplifier; the third transconductance amplifier, an output end thereof is coupled to the second input end of the adder; the adder, an output end thereof is coupled to the control end of the power tube; the power tube, a first end thereof inputs a power supply voltage, and a second end thereof is coupled to the first end of a load path.

[0006] A three-stage transconductance amplifier is provided. For the power tube, the input signal of its control end includes the output signal of the first transconductance amplifier and the output signal of the third transconductance amplifier. Therefore, the low voltage drop linear regulator can provide a higher loop gain, and thus can provide a higher power supply rejection ratio.

[0007] Optionally, the low voltage dropout linear regulator further includes: a load mode adjustment unit, coupled to the power tube and the second transconductance amplifier, and adapted to control the output of the adder based on a load current on the load path.

[0008] Optionally, the load current is greater than a first threshold, and the output of the adder is the sum of the output of the third transconductance amplifier and the output of the first transconductance amplifier; the load current is less than a second threshold, and the output of the adder is the output of the first transconductance amplifier; the first threshold is less than the second threshold.

[0009] By setting a load mode adjustment unit, the input signal of the control end of the power tube is adjusted based on the load current on the load path. In heavy load mode, the input signal of the control end of the power tube includes the output signal of the first transconductance amplifier and the output signal of the third transconductance amplifier, providing a higher loop gain, and the low voltage difference linear regulator can provide a higher power supply rejection ratio. In light load mode, the input signal of the control end includes the output signal of the first transconductance amplifier, providing a lower loop gain, which can ensure the loop stability in light load mode, and can effectively ensure the loop stability.

[0010] Optionally, the load mode adjustment unit includes: a power detection tube and a power detection resistor, wherein: the power detection tube, the control end of which is coupled to the control end of the power tube, the first end of which inputs the power supply voltage, and the second end of which is coupled to the first end of the power detection resistor; the power detection resistor, the second end of which is coupled to the second end of the load path and the ground end.

[0011] Optionally, the power detection tube is a second PMOS tube; the second PMOS tube has a source inputting the power supply voltage, a gate coupled to the control end of the power tube, and a drain coupled to the first end of the power detection resistor.

[0012] Optionally, the load mode adjustment unit also includes: a bias tube; the bias tube has a control end coupled to the second end of the power detection tube, a first end inputting a bias voltage, and a second end coupled to the power supply end of the second transconductance amplifier; the bias voltage is less than the power supply voltage.

[0013] Optionally, the bias tube includes a third PMOS tube; the third PMOS tube has a source terminal inputting the bias voltage, a gate terminal coupled to the control terminal of the bias tube, and a drain terminal coupled to the power supply terminal of the second transconductance amplifier.

[0014] Optionally, the second transconductance amplifier is in phase with the third transconductance amplifier and in phase opposition with the first transconductance amplifier; or, the second transconductance amplifier is in phase with the third transconductance amplifier and in phase with the first transconductance amplifier.

[0015] Optionally, the power tube includes a first PMOS tube; the first PMOS tube has a source terminal inputting the power supply voltage, a gate terminal coupled to the output terminal of the adder, and a drain terminal coupled to the first terminal of the load path.

[0016] In a second aspect, the present invention further provides an electronic device, comprising any one of the above-mentioned low voltage dropout linear regulators. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 is a schematic structural diagram of a low voltage dropout linear regulator in an embodiment of the present invention;

[0018] Figure 2 is a schematic structural diagram of another low voltage drop linear regulator in an embodiment of the present invention;

[0019] Figure 3 yes Figure 2 The equivalent circuit diagram of the low dropout linear regulator in heavy load mode provided in;

[0020] Figure 4 yes Figure 2 The equivalent circuit diagram of the low dropout linear regulator in low load mode is provided in. DETAILED DESCRIPTION

[0021] As described in the background technology above, in order to ensure the stability of the circuit in light load mode, a compensation capacitor with a larger capacitance needs to be used, which will result in poor high-frequency PSRR performance of the low-dropout linear regulator in heavy load mode.

[0022] In the embodiment of the present invention, a three-stage transconductance amplifier is provided. For the power tube, the input signal of its control end includes the output signal of the first transconductance amplifier and the output signal of the third transconductance amplifier. Therefore, the low voltage drop linear regulator can provide a higher loop gain, and thus can provide a higher power supply rejection ratio.

[0023] In order to make the above-mentioned objects, features and beneficial effects of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0024] The embodiment of the present invention provides a low voltage drop linear regulator, referring to Figure 1 .

[0025] In the embodiment of the present invention, the low voltage drop linear regulator includes: a first transconductance amplifier gm1, a second transconductance amplifier gm2, a third transconductance amplifier gm3, an adder and a power tube M p ,in:

[0026] The first input terminal of the first transconductance amplifier gm1 is connected to the power tube M pThe second end of the first transconductance amplifier gm1 is coupled to the first input end of the adder, the second input end of the first transconductance amplifier gm1 inputs a preset reference voltage Vref, and the output end of the first transconductance amplifier gm1 is coupled to the first input end of the adder and the input end of the second transconductance amplifier gm2;

[0027] An output terminal of the second transconductance amplifier gm2 is coupled to an input terminal of the third transconductance amplifier gm3;

[0028] An output terminal of the third transconductance amplifier gm3 is coupled to a second input terminal of the adder;

[0029] The output of the adder is connected to the power tube M p coupled to a control terminal;

[0030] Power tube M p The first end input power supply voltage VDD, power tube M p The second end of the power tube M is coupled to the first end of the load path. p The output voltage of the second end of is Vout. The voltage of the control end of the power tube is Vp.

[0031] In a specific implementation, the power tube M p The second end of can be regarded as the output end of the low voltage difference linear regulator. The two input ends of the first transconductance amplifier gm1 can be regarded as the input ends of the low voltage difference linear regulator.

[0032] In a specific implementation, the power tube M p The gate of the first PMOS tube is the power tube M. p The control end is coupled to the output end of the adder; the source of the first PMOS tube is the power tube M p The first end of the PMOS tube is connected to the power supply voltage VDD; the drain of the first PMOS tube is the power tube M p The second end is coupled to the load path.

[0033] In a specific implementation, the second end of the load path is grounded. The load path can be an external power load connected to the output end of the low voltage drop linear regulator. The load path has an equivalent impedance of a certain resistance value, and the equivalent impedance of the load path can also be called a load resistance R L The current flowing through the load path can be simply referred to as load current.

[0034] In the embodiment of the present invention, the low voltage drop linear regulator can include two working modes: a heavy load working mode and a light load working mode. The working mode of the low voltage drop linear regulator is determined by the load resistor R L Determined by, or determined by the load current. Load resistance R L The product of the current and the load current is the power supply voltage VDD.

[0035] In a specific implementation, when the load resistance R L When the resistance value of the load resistor R is small, the corresponding load current is large, which means that the low voltage drop linear regulator is in heavy load mode; when the load resistor R L When the resistance value of is large, the corresponding load current is small, which means that the low dropout linear regulator is in light load mode.

[0036] Specifically, when the load current on the load path is greater than a preset first threshold, it can be determined that the low voltage dropout linear regulator is in a heavy load mode; when the load current on the load path is less than a preset second threshold, it can be determined that the low voltage dropout linear regulator is in a light load mode. The first threshold is greater than the second threshold.

[0037] For example, the first threshold is 1 milliampere (mA), and the second threshold is 10 microamperes (μA). For another example, the first threshold is 2 milliamperes, and the second threshold is 30 microamperes.

[0038] It can be understood that the specific values ​​of the first threshold and the second threshold can be set according to specific application scenarios and are not limited to the above examples.

[0039] In the embodiment of the present invention, when the low-dropout linear regulator is in the heavy-load mode, the working path of the low-dropout linear regulator includes: the working path from the first transconductance amplifier gm1 to the adder, and the working path from the first transconductance amplifier gm1, the second transconductance amplifier gm2, and the third transconductance amplifier gm3 to the adder. p The input signal of the control end is the sum of the first signal output by the first transconductance amplifier gm1 and the second signal output by the third transconductance amplifier gm3. The second output signal is the signal obtained after the first output signal is amplified by the second transconductance amplifier gm2 and the third transconductance amplifier gm3.

[0040] Thus, the input to the power tube M p The signal at the control end is enhanced, and a higher loop gain can be achieved. Therefore, when the low-dropout linear regulator is in heavy load mode, a higher power supply rejection ratio can be provided.

[0041] In a specific implementation, the second transconductance amplifier gm2 is in phase with the third transconductance amplifier gm3, and the second transconductance amplifier gm2 is in phase with the first transconductance amplifier gm1. Alternatively, the second transconductance amplifier gm2 is in phase with the third transconductance amplifier gm3, and the second transconductance amplifier gm2 is in phase with the first transconductance amplifier gm1.

[0042] In the embodiment of the present invention, the low voltage drop linear regulator may further include a load mode adjustment unit. The load mode adjustment unit may be connected to the power tube M pThe load mode adjustment unit can control the output of the adder based on the load current on the load path to control the power tube M p The input of the control terminal.

[0043] In a specific implementation, when the load mode adjustment unit detects that the load current is greater than a preset first threshold, the output of the adder can be controlled to be: the sum of the output of the third transconductance amplifier gm3 and the output of the first transconductance amplifier gm1; when the load mode adjustment unit detects that the load current is less than a preset second threshold, the output of the adder can be controlled to be: the output of the first transconductance amplifier gm1.

[0044] That is, when the load mode adjustment unit detects that the low voltage drop linear regulator is in heavy load mode, the power tube M p The input of the control terminal is the sum of the first signal and the second signal; when the load mode adjustment unit detects that the low voltage drop linear regulator is in the light load mode, the power tube M p The input of the control terminal is the first signal.

[0045] Reference Figure 2 , a schematic diagram of the structure of another low voltage dropout linear regulator in an embodiment of the present invention is given.

[0046] In a specific implementation, the load mode adjustment unit may include a power detection tube M fb And the power detection resistor R fb ,in:

[0047] Power detection tube M fb The control end and the power tube M p The control end is coupled to the power detection tube M fb The first end of the input power supply voltage VDD, the power detection tube M fb The second end of the power detection resistor R fb coupled to a first end of

[0048] Power detection resistor R fb The second end of the load path is coupled to the second end of the load path and the ground.

[0049] In a specific implementation, the load mode adjustment unit may further include a bias tube M b ,in:

[0050] Bias tube M b The control end and the power detection tube M fb The second end of the bias tube M is coupled b The first end of the bias tube is input with a bias voltage Vbias, and the second end of the bias tube is coupled to the power supply terminal of the second transconductance amplifier gm2; the bias voltage Vbias is lower than the above-mentioned power supply voltage VDD.

[0051] In a specific implementation, the power detection tube M fb It can be a second PMOS tube. The source of the second PMOS tube is the power detection tube M fb The first end of the PMOS tube is connected to the power supply voltage VDD; the drain of the second PMOS tube is the power detection tube M fb The second end of the power detection resistor R fb is coupled to the first end of .

[0052] Bias tube M b It can be a third PMOS tube. The source of the third PMOS tube is the bias tube M b The first end of the third PMOS tube is used to input the bias voltage Vbias; the drain of the third PMOS tube is used to bias the tube M b The second end of the third PMOS tube is coupled to the power supply end of the second transconductance amplifier gm2; the gate of the third PMOS tube is the bias tube M b The control end and the power detection tube M fb is coupled to the second end of .

[0053] In a specific implementation, the power detection resistor R fb It can be a variable resistor. By adjusting the power detection resistor R fb The resistance value of the power detection tube M fb The output voltage Vfb of the second end can be adjusted by adjusting the variation range. After the required Vfb is obtained, the power detection resistor R fb The resistance value remains unchanged.

[0054] In a specific implementation, the power detection tube M fb The width-to-length ratio can be much smaller than the power detection tube M fb The width-to-length ratio.

[0055] In some embodiments, the power detection tube M fb The width-to-length ratio of the power tube M p In other embodiments, the power detection tube M fb The width-to-length ratio of the power tube M p The aspect ratio is 1 / 1000. fb The width-to-length ratio of the power tube M p The specific value of the aspect ratio can be selected based on the actual application scenario.

[0056] The following is the above Figure 2 The working principle of the low dropout linear regulator provided in is explained.

[0057] When the low dropout linear regulator is in heavy load mode, the power detection resistor R fbThe current Ifb flowing through the power tube M is large. fb The voltage Vfb at the second end of the (second PMOS tube) is a large voltage. b The gate of the third PMOS tube is input with a high level. At this time, the bias tube M b In cut-off state.

[0058] When the low dropout linear regulator is in heavy load mode, the corresponding equivalent circuit is as follows: Figure 3 Bias tube M b In cut-off state, not involved in work.

[0059] It can be seen that when the low voltage dropout linear regulator is in heavy load mode, the control end of the control tube inputs the sum of the first signal and the second signal, which can provide a higher loop gain, and the low voltage dropout linear regulator can provide a higher power supply rejection ratio.

[0060] When the LDO regulator is in low load mode, the power sense resistor R fb The current Ifb flowing through the power tube M is small. fb The voltage Vfb at the second end of the (second PMOS tube) is a small voltage. b The gate of the third PMOS tube is input at a low level. At this time, the bias tube M b In the on state.

[0061] The corresponding equivalent circuit is Figure 4 Bias tube M b In the on state, the second transconductance amplifier gm2 and the third transconductance amplifier gm3 are connected through the bias tube M b Bypass to the bias voltage Vbias. At this time, the power tube M p The control terminal only inputs the first signal.

[0062] Therefore, when the low voltage dropout linear regulator is in a low load mode, a lower loop gain can be achieved to ensure loop stability in the light load mode without additionally setting a compensation capacitor.

[0063] In summary, the above Figure 2 The low-dropout linear regulator provided in the circuit can adaptively adjust the input signal of the control end of the power tube according to the load current. In heavy load mode, the low-dropout linear regulator can provide a higher loop gain, thereby providing a higher power supply rejection ratio. In light load mode, it can provide a lower loop gain to ensure the loop stability in light load mode, which can effectively ensure the loop stability.

[0064] An embodiment of the present invention further provides an electronic device, comprising the low voltage dropout linear regulator provided by any of the above embodiments.

[0065] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A low voltage dropout linear regulator, characterized in that: include: A first transconductance amplifier, a second transconductance amplifier, a third transconductance amplifier, an adder, and a power tube, wherein: The first transconductance amplifier has a first input terminal coupled to the second terminal of the power tube, a second input terminal inputting a reference voltage, and an output terminal coupled to the first input terminal of the adder and the input terminal of the second transconductance amplifier; The second transconductance amplifier has an output terminal coupled to an input terminal of the third transconductance amplifier; The third transconductance amplifier has an output terminal coupled to the second input terminal of the adder; The adder, an output end of which is coupled to the control end of the power tube; The power tube has a first end inputting a power supply voltage, and a second end coupled to a first end of a load path.

2. The low voltage dropout linear regulator according to claim 1, characterized in that: Also includes: The load mode adjustment unit is coupled to the power tube and the second transconductance amplifier, and is suitable for controlling the output of the adder based on the load current on the load path.

3. The low voltage dropout linear regulator according to claim 2, characterized in that: The load current is greater than a first threshold, and the output of the adder is the sum of the output of the third transconductance amplifier and the output of the first transconductance amplifier; the load current is less than a second threshold, and the output of the adder is the output of the first transconductance amplifier; the first threshold is less than the second threshold.

4. The low voltage dropout linear regulator according to claim 3, characterized in that: The load mode adjustment unit includes: a power detection tube and a power detection resistor, wherein: The power detection tube has a control end coupled to the control end of the power tube, a first end inputting the power supply voltage, and a second end coupled to the first end of the power detection resistor; The second end of the power detection resistor is coupled to the second end of the load path and the ground.

5. The low voltage dropout linear regulator according to claim 4, characterized in that: The power detection tube is a second PMOS tube; The second PMOS tube has a source electrode inputting the power supply voltage, a gate electrode coupled to the control end of the power tube, and a drain electrode coupled to the first end of the power detection resistor.

6. The low voltage dropout linear regulator according to claim 4, characterized in that: The load mode adjustment unit further includes: a bias tube; The bias tube has a control end coupled to the second end of the power detection tube, a first end inputting a bias voltage, and a second end coupled to the power supply end of the second transconductance amplifier; the bias voltage is less than the power supply voltage.

7. The low voltage dropout linear regulator according to claim 6, characterized in that: The bias tube includes a third PMOS tube; The third PMOS tube has a source terminal inputting the bias voltage, a gate terminal coupled to the control terminal of the bias tube, and a drain terminal coupled to the power supply terminal of the second transconductance amplifier.

8. The low dropout linear regulator according to claim 1, wherein: The second transconductance amplifier is in phase with the third transconductance amplifier and in phase opposition with the first transconductance amplifier; or the second transconductance amplifier is in phase with the third transconductance amplifier and in phase with the first transconductance amplifier.

9. The low voltage dropout linear regulator according to any one of claims 1 to 8, characterized in that: The power tube comprises a first PMOS tube; The first PMOS tube has a source electrode inputting the power supply voltage, a gate electrode coupled to the output end of the adder, and a drain electrode coupled to the first end of the load path.

10. An electronic device, characterized in that: It comprises a low voltage dropout linear regulator as described in any one of claims 1 to 9.

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