Method for integrally acquiring temperature of server

Abstract

The invention discloses an integrated server temperature acquisition method, and relates to the technical field of temperature acquisition, the method is applied to a programmable logic module, and the programmable logic module is in communication connection with temperature sensors of a plurality of devices and in communication connection with a CPU. And transmitting a plurality of pieces of equipment temperature information of the temperature sensors responding to the plurality of pieces of equipment to the CPU. And when the state machine is in the idle state and the operation state is effective, starting signals are sent to the temperature sensors of the multiple devices. When the start signal is a read operation, a number of device temperature information is received from temperature sensors of a number of devices through the read operation. And when the start signal is the write operation, writing data into the temperature sensors of the plurality of devices through the write operation. The technical problem that in the prior art, in a multi-sensor temperature monitoring scene, the burden of a CPU on I2C communication and data acquisition is too heavy, and consequently the execution efficiency of a core task and the reliability of real-time monitoring of the equipment temperature are reduced is solved.

Description

Technical Field

[0001] The present application relates to the technical field related to temperature collection, and in particular to an integrated method for obtaining server temperature. Background Art

[0002] In the existing electronic equipment temperature monitoring system, the more common technical solution is that the CPU is directly connected to the I2C bus to obtain the temperature information of each component. In this way, the CPU, as the main control unit, directly exchanges data with each temperature sensor on the I2C bus or components with temperature monitoring function. For example, on the computer motherboard, the CPU will establish a communication link with the temperature sensors inside each chip (such as the south bridge chip, the north bridge chip, etc.) and other key components (such as the power module, the memory module, etc.) through the I2C bus. Its operating process is usually that the CPU sends temperature reading instructions to each component in turn according to a predetermined timing, and then waits for the component to respond and receive the returned temperature data. Next, the CPU needs to organize and analyze this data to determine whether there is any abnormal temperature.

[0003] Since the CPU has to handle a large number of other core tasks, such as data calculation and instruction execution, the frequent involvement of the I2C communication process for temperature monitoring will occupy its valuable computing resources and time slices, resulting in a certain degree of impact on the overall system performance. Especially when multiple tasks are concurrent or the device is under high load operation, the CPU may not be able to respond to the temperature monitoring requirements in a timely manner, thereby increasing the risk of device failure due to overtemperature.

[0004] Therefore, in the multi-sensor temperature monitoring scenario in the prior art, the CPU is overburdened with I2C communication and data collection, resulting in technical problems such as reduced efficiency in executing its core tasks and reduced reliability in real-time monitoring of device temperature. Summary of the invention

[0005] This application provides an integrated method for obtaining server temperature, which solves the technical problem in the prior art that in the multi-sensor temperature monitoring scenario, the CPU is overloaded with I2C communication and data acquisition, resulting in a decrease in the efficiency of its core task execution and the reliability of real-time monitoring of device temperature. By transferring the I2C communication and preliminary processing of temperature monitoring to a programmable logic device, the CPU resources are released and the real-time performance of temperature acquisition and the overall stability of the system are improved.

[0006] The present application provides an integrated method for obtaining server temperature, which is applied to a programmable logic module, wherein the programmable logic module is communicatively connected to temperature sensors of several devices, and is communicatively connected to a CPU, including: transmitting temperature information of several devices in response to the temperature sensors of the several devices to the CPU, wherein the number of the several devices is at least 1.

[0007] In the implementation, the programmable logic module is an FPGA module or a CPLD module. The communication connection protocol between the programmable logic module and the temperature sensors of several devices is the I2C protocol. The communication connection protocol between the programmable logic module and the CPU is the I2C protocol.

[0008] In the implementation, responding to the temperature information of several devices of the temperature sensors of several devices includes: when the state machine is in an idle state and the running state is valid, sending a start signal to the temperature sensors of the several devices; when the start signal is a read operation, receiving the temperature information of several devices from the temperature sensors of the several devices through the read operation; when the start signal is a write operation, writing data to the temperature sensors of the several devices through the write operation.

[0009] In the implementation method, when the start signal is a write operation, data is written to the temperature sensors of the several devices through the write operation, including: entering a write preparation state, and sending write control information to the temperature sensors of the several devices at the same time, and obtaining a first response signal, wherein the write control information includes a device address and a read-write control bit; when the first response signal is correct, determining whether there are still register addresses to be sent, and if so, entering the process of executing the register address sending process, and if not, starting to write data; when writing is completed, determining whether there is still data to be written; if so, continuing to write, and if not, stopping writing, and after completion, the state machine returns to an idle state.

[0010] In the implementation method, when the first response signal is correct, it is determined whether there are still register addresses to be sent. If so, the process of sending the register addresses is entered, including: sending the register addresses to the temperature sensors of the several devices to obtain the second response signal; when the second response signal is correct and the temperature sensor is in a read operation state, receiving the temperature sensor from the temperature sensors of the several devices; when the second response signal is correct and the temperature sensor is in a write operation state, writing data to the temperature sensors of the several devices; when the second response signal is wrong, ending the process and returning to the idle state.

[0011] In the implementation, when the start signal is a read operation, the temperature information of several devices is received from the temperature sensors of the several devices through the read operation, including: when the start signal is a read operation, the read operation is started, and the read control information is sent to the temperature sensors of the several devices to obtain a third response signal; when the third response signal is correct, the state machine executes the read data state to start receiving data; when the third response signal information is wrong, the state machine enters the stop state to end the current read data communication process; wherein, when the third response signal is correct, the state machine executes the read data state to start receiving data, including: when the reading is completed, it is determined whether there is any data to be read; if so, continue reading, if not, stop reading, and after completion, the state machine returns to the idle state.

[0012] In the implementation method, several device temperature information are transmitted to the CPU, including: when the state machine processes the idle state, receiving the device address and operation type sent by the CPU; when the device address matches the own device address, configuring the fourth response signal to be correct, and when the device address does not match the own device address, configuring the fourth response signal to be wrong; when the fourth response signal is correct, and the operation type is a read operation, and the several device temperature information are ready, sending the several device temperature information to the CPU; when the fourth response signal is correct, and the operation type is a write operation, executing the reception of write data from the CPU for storage; when the fourth response signal is wrong, ending the process state machine and jumping back to the idle state.

[0013] In an implementation, when the fourth response signal is correct, the operation type is a read operation, and the plurality of device temperature information is not ready, the process state machine is terminated and jumps back to an idle state.

[0014] An integrated method for acquiring server temperature proposed in this application is applied to a programmable logic module, which is connected to the temperature sensors of several devices and to the CPU. The temperature information of several devices in response to the temperature sensors of several devices is transmitted to the CPU. When the state machine is in an idle state and the running state is valid, a start signal is sent to the temperature sensors of several devices. When the start signal is a read operation, several device temperature information is received from the temperature sensors of several devices through a read operation. When the start signal is a write operation, data is written to the temperature sensors of several devices through a write operation. The technical problem that the CPU is overloaded with I2C communication and data acquisition in the multi-sensor temperature monitoring scenario in the prior art is solved, resulting in a decrease in the efficiency of its core task execution and the reliability of real-time monitoring of device temperature. By transferring the I2C communication and preliminary processing of temperature monitoring to a programmable logic device, the technical effect of releasing CPU resources and improving the real-time performance of temperature acquisition and the overall stability of the system is achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the following briefly introduces the drawings of the embodiments of the present disclosure. Obviously, the drawings described below only relate to some embodiments of the present disclosure, and are not intended to limit the present disclosure.

[0016] Figure 1 A schematic diagram of the application structure of an integrated method for obtaining server temperature provided in an embodiment of the present application.

[0017] Figure 2 A schematic diagram of a flow chart of a programmable logic module sending write data to components in an integrated method for obtaining server temperature provided in an embodiment of the present application.

[0018] Figure 3 A schematic diagram of a flow chart of a programmable logic module sending read data to components in an integrated method for obtaining server temperature provided in an embodiment of the present application. DETAILED DESCRIPTION

[0019] The above description is only an overview of the technical solution of the present application. In order to more clearly understand the technical means of the present application, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are listed below.

[0020] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings. The described embodiments should not be regarded as limiting the present application. All other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of this application.

[0021] In the following description, reference is made to "some embodiments", which describe a subset of all possible embodiments, but it is understood that "some embodiments" may be the same subset or different subsets of all possible embodiments, and may be combined with each other without conflict, and the terms "first\second" involved are merely to distinguish similar objects and do not represent a specific ordering of objects. The terms "including" and "having" and any variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product, or server that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or modules that are not clearly listed or inherent to these processes, methods, products, or devices. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those generally understood by technicians in the technical field of this application. The terms used herein are for the purpose of describing the embodiments of the present application only.

[0022] The present application embodiment provides an integrated method for obtaining server temperature, which is applied to Figure 1 The application structure shown, the method is applied to a programmable logic module, the programmable logic module is connected to the temperature sensors of several devices and is connected to the CPU, including:

[0023] The temperature information of the plurality of devices in response to the temperature sensors of the plurality of devices is transmitted to the CPU, wherein the plurality of devices is at least one.

[0024] Specifically, the temperature sensors are distributed on each server device component that needs to monitor the temperature, and the several devices are at least 1. The temperature sensor is connected to the programmable logic module (FPGA module or CPLD module) through a corresponding bus, and the collected temperature data is transmitted to the CPLD, taking the CPLD module as an example, and the temperature data summarized and pre-processed by the CPLD is received by the CPU (main processor), and further analyzed and processed.

[0025] Among them, the communication connection protocol between the programmable logic module (FPGA module or CPLD module) and the temperature sensors of several devices is an I2C protocol connection. FPGA has higher logic resources and more flexible programmability. It can realize complex digital circuits through programming for acquiring and processing temperature data. For example, FPGA can process multiple I2C bus interfaces in parallel and obtain temperature data from multiple components at the same time, which is similar to the function of CPLD. Moreover, FPGA can flexibly configure its internal logic units according to specific application scenarios, such as implementing more complex temperature data filtering algorithms or building more efficient data transmission protocols. In terms of processing speed, the parallel processing capability of FPGA enables it to complete the acquisition and preprocessing of temperature data faster than CPLD in some cases. For some applications with extremely high requirements for real-time temperature data, such as high-speed electronic equipment heat dissipation control or high-precision industrial temperature monitoring, the high-performance processing capability of FPGA can ensure fast and accurate acquisition of temperature data. FPGA is usually more expensive than CPLD. Its complex internal structure and higher performance lead to higher manufacturing costs. For some cost-sensitive application scenarios, such as simple temperature monitoring in consumer electronics, the use of FPGA may increase product costs and reduce product competitiveness.

[0026] The communication connection protocol between the programmable logic module and the CPU is the I2C protocol. I2C is a common two-wire communication protocol with two buses, SCL (serial clock line) and SDA (serial data line). Multiple devices can be connected to the same bus, and each device is distinguished by a unique address. The address of the temperature sensor may be 0x48, 0x49, 0x4A, etc., depending on the hardware design or sensor model. When working, the programmable logic module serves as the core control unit of the system, responsible for communicating with each temperature sensor on the I2C bus to obtain temperature data. The I2C master device code function is implemented internally, including an accurate clock generation module for generating a clock signal (SCL) that complies with the I2C bus specification to ensure the synchronization and stability of data transmission. The programmable logic module then transmits the aggregated temperature data to the CPU for subsequent processing through another I2C bus interface.

[0027] The method provided by the embodiment of the present application also includes: when the state machine is in an idle state and the running state is valid, sending a start signal to the temperature sensors of the several devices; when the start signal is a read operation, receiving several device temperature information from the temperature sensors of the several devices through the read operation; when the start signal is a write operation, writing data to the temperature sensors of the several devices through the write operation.

[0028] Responding to the temperature information of several devices from the temperature sensors of several devices, including: when the state machine is in an idle state, the state machine has no read or write operation, and the bus is also in an idle or waiting state. And the "running state valid" signal is true (i.e., new transmission is allowed), and a start signal is sent to the temperature sensors of the several devices. When the state machine inside the programmable logic module (CPLD / FPGA) detects that the current idle (idle) and the run (run) signal are valid, it means that a new I2C communication operation can be performed. If the upper layer instruction (or flag) indicates that a read operation is to be performed this time, and several device temperature information is received from the temperature sensors of the several devices through the read operation, the state machine will enter states such as rd_ready, rd_ctrl, rd_addr, rd_data, stop, etc. according to the "read" process. In the read operation state, the CPLD will receive several device temperature information from the temperature sensor. If a write operation is to be performed this time, a series of states related to writing will be entered, such as wr_ready, wr_ctrl, wr_addr, wr_data, stop. Then, data is written to the temperature sensor through the "write operation process", such as configuring registers, setting alarm thresholds, etc. The specific workflow is as follows: CPLD sends write data to components: Write preparation (wr_ready state): When the system is in idle state and the run signal is valid, the state machine enters the wr_ready state. In this state, some initialization settings will be performed, and then the relevant flag bits (such as FF) will be judged. If the conditions are met, it is ready to enter the next key state, call the headstate task to process the start signal related settings, prepare to send write control information, and then jump to the wr_ctrl state.

[0029] Send write control information (wr_ctrl state): In the wr_ctrl state, call the sh8out task to send control information related to the write operation, mainly the device address (dev_addr) and the corresponding read and write control bits, which are used to select the slave device to communicate on the I2C bus and inform it that the next step is the write operation process. After the transmission is completed, wait for the response (ack) signal returned by the slave device. The subsequent direction is determined according to the response signal: if the response signal is correct (ack is 1), then determine whether there is a register address to be sent. If so, enter the wr_addr state to send the register address. If not, directly enter the wr_data state to start writing data; if the response signal is incorrect (ack is 0), enter the stop state to end the current data writing communication process.

[0030] Send register address (wr_addr state): When entering the wr_addr state, call the sh8out task to send the register address information (reg_addr) to the selected slave device. After the sending is completed, wait for the response signal and decide the subsequent operation according to the response. If the response is correct and the current operation is a read operation (rd is 1), enter the rd_start state to start the data reading process; if the response is correct and the operation is a write operation (rd is 0), enter the wr_data state to prepare to write data; if the response is wrong, end the current operation and return to the idle state.

[0031] Write data (wr_data state): In the wr_data state, call the sh8out task to send the data (w_data) to be written to the slave device. After each set of data is sent (determined by the code logic based on relevant counters, etc.), it will be determined whether there is more data to be written. If there is still data to be written, call the moveout task to prepare the next set of data and continue to send data; if all the required data has been written, enter the stop state to end the data writing operation.

[0032] End the write operation (stop state): In the stop state, call the stopstate task to process the stop related operations, such as setting the data line (sda), clock line (scl) and other states to appropriate values. After completion, the state machine returns to the idle state, waiting for the next write data or other I2C communication operation to be triggered. This solves the technical problem that in the multi-sensor temperature monitoring scenario in the prior art, the CPU is overloaded with I2C communication and data acquisition, resulting in a decrease in the efficiency of its core task execution and the reliability of real-time monitoring of device temperature. By transferring the I2C communication and preliminary processing of temperature monitoring to the programmable logic device, the CPU resources are released and the real-time performance of temperature acquisition and the overall stability of the system are improved.

[0033] like Figure 2 As shown, the method provided by the embodiment of the present application also includes: entering a write preparation state, and sending write control information to the temperature sensors of the several devices at the same time to obtain a first response signal, wherein the write control information includes a device address and a read-write control bit; when the first response signal is correct, determining whether there are still register addresses to be sent, and if so, entering the execution process of sending the register address, and if not, starting to write data; when writing is completed, determining whether there is still data to be written; if so, continuing to write, and if not, stopping writing, and after completion, the state machine returns to an idle state.

[0034] Writing data to the temperature sensors of the several devices through a write operation includes: the state machine first jumps from idle to a write preparation state, namely the wr_ready state. In the wr_ready state, initialization operations are performed, such as clearing the counter, setting the flag bit, and calling tasks such as headstate to generate the start signal of I2C. After that, it jumps to the state of sending control information (such as wr_ctrl). The write control information includes "target device address" and "read / write control bit". In the I2C protocol, a byte contains a 7-bit device address + 1-bit read / write flag (for example: 0 means write, 1 means read). When the CPLD calls a task such as sh8out to send the byte, if the target slave device (temperature sensor) recognizes that the address matches, it returns the first response signal (ack). If the first response signal is correct (ack=1), it is determined according to the system logic whether "the register address needs to be sent". If yes, the register address sending process is executed, and if no, data is written. If the first response signal is incorrect (ack=0), the write operation is terminated and the stop state is entered. After the register address is sent (or when there is no need to send the register address), the data writing phase (corresponding to the wr_data state) will be entered. After each set of data (bytes) is written, it will determine whether there is still data to be written. If there is, continue writing; if not, jump to stop writing (stop). If there is no data to be written, stop writing, and the state machine returns to the idle state after completion. That is, when the last byte is written, the state machine enters stop, calls the stopstate task, and sends a stop signal (StopCondition), indicating that this write communication is over; then returns to idle to wait for the next I2C operation.

[0035] The method provided by the embodiment of the present application also includes: sending a register address to the temperature sensors of the several devices to obtain a second response signal; when the second response signal is correct and the temperature sensor is in a read operation state, receiving the temperature sensor from the temperature sensors of the several devices; when the second response signal is correct and the temperature sensor is in a write operation state, writing data to the temperature sensors of the several devices; when the second response signal is wrong, ending the process and returning to the idle state.

[0036] When the first response signal is correct, determine whether there are still register addresses to be sent. If so, enter the process of executing the register address sending process, including: when the address is confirmed to be correct in the wr_ctrl state and the register address needs to be continued to be sent, the state machine enters wr_addr and calls sh8out to output the register address byte to the slave device. If the second response signal is correct, it is necessary to distinguish the current actual operation type: If it is in a read operation (rd=1): this means that data needs to be received from the device, and the read process will enter to receive the temperature sensor from the temperature sensors of the several devices. If it is in a write operation (rd=0): this means that it is still in the data write process, then write data to the temperature sensors of the several devices, and then jump to the wr_data state to execute the write. If the second response signal is an error, end this process immediately and return to the idle state (or return to idle through the stop state).

[0037] like Figure 3 As shown, the method provided by the embodiment of the present application also includes: when the start signal is a read operation, starting the read operation, sending read control information to the temperature sensors of the several devices, and obtaining a third response signal; when the third response signal is correct, the state machine executes the read data state to start receiving data; when the third response signal information is wrong, the state machine enters the stop state to end the current read data communication process; wherein, when the third response signal is correct, the state machine executes the read data state to start receiving data, including: when the reading is completed, determining whether there is still data to be read; if so, continue reading, if not, stop reading, and after completion, the state machine returns to the idle state.

[0038] When the system is in idle state and the run signal is valid, if the upper logic determines that the "read operation" is to be performed next, the read control information is sent to the temperature sensors of the several devices, and the state machine enters the rd_start state. In this state, some initialization operations are performed, such as setting relevant flags, etc., and then the headstate task is called to process the start signal related settings to prepare for the subsequent formal sending of the read control information. After completion, the state machine jumps to the rd_ctrl state.

[0039] Send read control information (rd_ctrl state): In the rd_ctrl state, call the sh8out task to send control information related to the read operation. The information sent here includes the device address (dev_addr) and sets the corresponding read and write control bits to select the corresponding slave device on the bus and inform it to perform the read operation next. After the transmission is completed, wait for the response (ack) signal from the slave device and decide the subsequent direction according to the response signal. If the response signal is correct (ack is 1), the state machine enters the rd_data state to start receiving data; if the response signal is incorrect (ack is 0), it enters the stop state to end the data reading communication process.

[0040] Receive data (rd_data state): After entering the rd_data state, call the sh8in task to receive the data returned from the device bit by bit. After receiving each byte of data, the corresponding data integration operation will be performed. During the receiving process, the code will determine whether there is more data to be read based on the preset read and write count variables. If there is still data to be read, continue to call the sh8in task to receive the next byte of data; if all the required data has been read, end the data receiving link and enter the stop state.

[0041] End the read operation (stop state): In the stop state, call the stopstate task to handle stop-related operations, such as setting the status of the data line (sda), clock line (scl), etc. After completion, the state machine returns to the idle state and waits for the next read data or other I2C communication operation to be triggered.

[0042] The method provided by the embodiment of the present application also includes: when the state machine processes the idle state, receiving the device address and operation type sent by the CPU; when the device address matches the device address itself, configuring the fourth response signal to be correct, and when the device address does not match the device address itself, configuring the fourth response signal to be wrong; when the fourth response signal is correct, and the operation type is a read operation, and the several device temperature information is ready, sending the several device temperature information to the CPU; when the fourth response signal is correct, and the operation type is a write operation, executing the reception of write data from the CPU for storage; when the fourth response signal is wrong, ending the process state machine and jumping back to the idle state.

[0043] Several device temperature information are transmitted to the CPU, including: when the state machine processes the idle state (STAT_IDLE state), wait for the master device (CPU) to send the start signal iic_8bit_start; once the signal is detected, it means that the "device address and operation type (read / write bit)" sent by the master device is about to be received. The receiving device address (STAT_DEV_ADD state) device receives the "device address + R / W flag (operation type)" of the master device bit by bit in this state. After completing the 8-bit reception, it is stored in the write data register (or temporary register). When the device address matches its own device address, the fourth response signal is configured to be correct. When the device address does not match its own device address, the fourth response signal is configured to be wrong.

[0044] When the fourth response signal is correct, and the operation type is a read operation, and the several device temperature information is ready to send the several device temperature information to the CPU, then enter the send data read state (STAT_RD). When the fourth response signal is correct, and the operation type is a write operation, then execute receiving the write data from the CPU for storage, that is, the slave device receives the data written by the CPU bit by bit in this state, and stores it to the target register in the write data response (STAT_WD_ACK). When the fourth response signal is an error, the end process state machine jumps back to the idle state, that is, when the response error (address mismatch) or the stop condition is detected after the read / write is completed, enter STOP, and the state machine returns to the idle state (STAT_IDLE). When the fourth response signal is correct, and the operation type is a read operation, and the several device temperature information is not ready, for example, the temperature sensor has not completed the measurement, or the cache register is still being updated, then the end process state machine jumps back to the idle state.

[0045] The method of CPLD uploading temperature to CPU: The specific execution steps are as follows: Idle (STAT_IDLE state) initializes multiple internal signals related to the data line mode and state, and waits for the I2C communication start signal. Once iic_8bit_start is detected, the corresponding flag is set. At the falling edge of the clock line, the state machine jumps to the receiving device address state (STAT_DEV_ADD) and starts to receive the device address sent by the master device.

[0046] The receiving device address (STAT_DEV_ADD state) receives the device address sent by the master device bit by bit at the middle moment of the clock line high level, stores it into the specified read data register for each received bit, and sets a read counter for counting. After receiving the complete 8-bit address, the received address data is stored into the specified write data register, and then the state machine switches to the device address response state (STAT_DEV_ACK), ready to send a response signal to the master device.

[0047] The device address response (STAT_DEV_ACK state) sets the response flag W_ack_flag at the middle moment of the clock line low level, and determines the response data based on the comparison result of the received device address and its own address, and obtains whether the master device is reading or writing this time. When the response flag is valid and the falling edge of the clock arrives, the subsequent state is determined according to the response situation and the operation type: if the response is correct and it is a read operation, it is also necessary to determine whether the data is ready. If it is ready, it enters the sending read data state (STAT_RD), and if it is not ready, it enters the stop state (STAT_STOP); if the response is correct and it is a write operation, it enters the receiving write data state (STAT_WD); if the response is wrong, it directly enters the stop state.

[0048] When receiving write data (STAT_WD state), the write data sent by the master device is continuously received bit by bit at the middle moment of the clock high level. Each received bit is stored in the read data register and updated. After receiving 8 bits of data, the state machine jumps to the write data acknowledgment state (STAT_WD_ACK). At the same time, in this state, it will also detect whether a new iic_8bit_start signal appears again. Depending on whether there is a stop signal, it will decide whether to continue the current write data receiving state or return to the idle state to wait for the start of new communication.

[0049] Write data response (STAT_WD_ACK state) sets the response flag at the middle moment of the clock low level, stores the received data in the write data register, and determines whether a set of data has been received according to the write counter count. If so, the O_slv_rx8bit_end flag is set. Then, according to the rising and falling edges of the clock, the byte count is updated, the relevant flag bits are cleared, and the state is switched. It may continue to return to the receive write data state to receive more data.

[0050] Send read data (STAT_RD state) sets the data line mode to send, and sends the stored data bit by bit (get the corresponding bit data from the write data register) at the middle moment of the clock low level, and counts through the read counter. After sending 8 bits of data, enter the read data response state (STAT_RD_ACK), and reset the relevant status and flag bits.

[0051] Read data response (STAT_RD_ACK state) sets the read data response flag R_ack_flag at the middle of the clock high level, and determines the response state R_ack_stat based on the inversion of the received master device response signal. When the response flag is valid and the clock falling edge arrives, the subsequent operation is determined based on the response state. If the response is correct, it returns to the sending read data state to continue sending data. If the response is wrong, it enters the stop state.

[0052] Stop (STAT_STOP state) In this state, the state machine waits for the iic_8bit_stop signal. If the stop signal is detected, the state machine jumps back to the idle state (STAT_IDLE) to prepare for the next I2C communication; if not detected, it continues to wait in the stop state.

[0053] The technical solution provided by the embodiment of the present invention, the method is applied to a programmable logic module, the programmable logic module is connected to the temperature sensors of several devices in communication, and is connected to the CPU in communication. The temperature information of several devices in response to the temperature sensors of several devices is transmitted to the CPU. When the state machine is in an idle state and the running state is valid, a start signal is sent to the temperature sensors of the several devices. When the start signal is a read operation, the temperature information of several devices is received from the temperature sensors of the several devices through the read operation. When the start signal is a write operation, data is written to the temperature sensors of the several devices through the write operation. The technical problem that the CPU is overloaded in I2C communication and data acquisition in the multi-sensor temperature monitoring scenario in the prior art is solved, resulting in a decrease in the efficiency of its core task execution and the reliability of real-time monitoring of device temperature. By transferring the I2C communication and preliminary processing of temperature monitoring to the programmable logic device, the CPU resources are released and the real-time performance of temperature acquisition and the overall stability of the system are improved.

[0054] Note that the above are only preferred embodiments of the present invention and the technical principles used. It will be understood by those skilled in the art that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments, and may also include more other equivalent embodiments without departing from the concept of the present invention.

Claims

1. An integrated method for obtaining server temperature, characterized in that: Applied to a programmable logic module, the programmable logic module is connected to the temperature sensors of several devices and is connected to the CPU, including: The temperature information of the plurality of devices in response to the temperature sensors of the plurality of devices is transmitted to the CPU, wherein the plurality of devices is at least one.

2. The method according to claim 1, characterized in that The programmable logic module is an FPGA module or a CPLD module.

3. The method according to claim 1, characterized in that The communication connection protocol between the programmable logic module and the temperature sensors of several devices is the I2C protocol.

4. The method according to claim 1, characterized in that The communication connection protocol between the programmable logic module and the CPU is the I2C protocol.

5. The method according to claim 1, characterized in that Respond to the temperature information of several devices from the temperature sensors of several devices, including: When the state machine is in an idle state and the running state is valid, sending a start signal to the temperature sensors of the plurality of devices; When the start signal is a read operation, receiving a plurality of device temperature information from the temperature sensors of the plurality of devices through the read operation; When the start signal is a write operation, data is written to the temperature sensors of the plurality of devices through the write operation.

6. The method according to claim 5, characterized in that When the start signal is a write operation, writing data to the temperature sensors of the plurality of devices through the write operation includes: Entering a write preparation state, and simultaneously sending write control information to the temperature sensors of the plurality of devices to obtain a first response signal, wherein the write control information includes a device address and a read-write control bit; When the first response signal is correct, determine whether there are register addresses to be sent, if yes, enter the register address sending process, if no, start writing data; When writing is completed, determine whether there is still data to be written; If yes, continue writing; if no, stop writing. After completion, the state machine returns to the idle state.

7. The method according to claim 6, characterized in that When the first response signal is correct, it is determined whether there are still register addresses to be sent, and if so, the register address sending process is executed, including: Sending register addresses to temperature sensors of the plurality of devices to obtain a second response signal; When the second response signal is correct and the temperature sensor is in a read operation state, receiving a temperature sensor from the temperature sensors of the plurality of devices; When the second response signal is correct and the temperature sensor is in a write operation state, writing data to the temperature sensors of the plurality of devices; When the second response signal is an error, the process is terminated and returns to the idle state.

8. The method according to claim 5, characterized in that When the start signal is a read operation, receiving a plurality of device temperature information from the temperature sensors of the plurality of devices through the read operation includes: When the start signal is a read operation, the read operation is started, and the read control information is sent to the temperature sensors of the plurality of devices to obtain a third response signal; When the third response signal is correct, the state machine executes the data reading state to start receiving data; When the third response signal information is an error, the state machine enters a stop state to end the current data reading communication process; Wherein, when the third response signal is correct, the state machine executes the data reading state to start receiving data, including: When the reading is completed, determine whether there is still data to be read; If yes, continue reading; if no, stop reading. After completion, the state machine returns to the idle state.

9. The method according to claim 1, characterized in that Several device temperature information is transmitted to the CPU, including: When the state machine is processing the idle state, it receives the device address and operation type sent by the CPU; When the device address matches the own device address, the fourth response signal is configured as correct; when the device address does not match the own device address, the fourth response signal is configured as wrong; When the fourth response signal is correct, the operation type is a read operation, and the plurality of device temperature information is ready, sending the plurality of device temperature information to the CPU; When the fourth response signal is correct and the operation type is a write operation, receiving write data from the CPU for storage; When the fourth response signal is an error, the process state machine is terminated and jumps back to the idle state.

10. The method according to claim 9, characterized in that Also includes: When the fourth response signal is correct, the operation type is a read operation, and the plurality of device temperature information are not ready, the process state machine is terminated and jumps back to the idle state.

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