Potting Process Simulation Method

Abstract

The present invention provides a potting process simulation method, including: constructing a geometric model based on the obtained parameters of the chip, solder balls and substrate; dividing the geometric model into key simulation areas and non-key simulation areas; respectively determining and classifying the key simulation areas and non-key simulation areas; simplifying the geometric model based on the determination and classification results; performing mesh division on the simplified geometric model to generate a finite element model; setting initial conditions and boundary conditions, and performing fluid field coupling analysis on the finite element model. By dividing the geometric model of the potting process into key simulation areas and non-key simulation areas, then simplifying the geometric model based on the determination and classification results, performing mesh division on the simplified geometric model to generate a finite element model, first simplifying the model and then generating a finite element model based on the simplified model, the calculation amount of the finite element model is simplified, thereby achieving the purpose of reducing the calculation amount.

Description

Technical Field

[0001] The present invention belongs to the technical field of electronic packaging device simulation, and in particular relates to a potting process simulation method. Background Art

[0002] The flip-chip packaging technology has been adopted in a wide range of applications, broadening different packaging forms and having advantages such as small size, self-aligning installation, good heat dissipation, and high input / output. In flip-chip packaging, the front side of the chip faces downwards and aligns with the substrate, and alloy solder balls are used as connecting conductors to connect the chip and the substrate. However, the heat generated during the operation of the flip-chip may cause thermal stress fatigue damage or even failure due to the mismatch of the thermal expansion coefficients between the substrate and the chip. For this reason, the underfill process for flip-chip has emerged. This process reduces the thermal stress by filling the encapsulation material between the substrate and the chip. It is reported that the underfill process can extend the connection life of solder joints by 30 to 50 times. Due to the importance of the underfill process for flip-chip packaging, scholars have conducted extensive research on this process and made some important progress. However, due to the narrowness and complexity of the underfill space and the diversity of filling methods, accurately and efficiently predicting the underfill flow process still requires further research and solution.

[0003] Problems such as insufficient filling and voids often occur during the underfill flow process. These problems are more serious when the solder balls are unevenly distributed. The analytical method can only study one-dimensional flow and cannot make predictions for various problems that occur during underfill. Experimental research requires specific experimental devices, is time-consuming and laborious, and has a high cost. Many researchers have proposed using numerical simulation to study the flow behavior of underfill fluids. The accuracy and efficiency of the simulation are important indicators for measuring the numerical analysis method of underfill. The three-dimensional underfill simulation method has been relatively mature, but the calculation efficiency is low.

[0004] The inventor found the following problems in the prior art during the implementation of this embodiment:

[0005] 1. In the underfill process of ball grid array packaging, the two-dimensional numerical method is used to simulate the underfill flow process working condition. The solder joints are small and dense, resulting in a large number of finite element meshes in the numerical simulation calculation, a long finite element calculation time, and even the existing computers cannot calculate, making it impossible to quickly obtain the results of the numerical simulation.

[0006] 2. The existing solder joint simplification methods for ball grid array packaging include the material homogenization method and the local material homogenization method. Neither of these two simplification methods can meet the requirement of restoring the movement state of the fluid between the solder joints during the filling process as much as possible, and the solder joint structure must be retained. Summary of the Invention

[0007] In view of the problems existing in the prior art, the present invention provides a potting process simulation method, which at least partially solves the problems of long finite element calculation time and inability to quickly obtain the results of numerical simulation in the prior art.

[0008] An embodiment of the present disclosure provides a potting process simulation method, including:

[0009] Constructing a geometric model based on the obtained parameters of the chip, solder balls and substrate;

[0010] Dividing the geometric model into a key simulation area and a non-key simulation area;

[0011] Respectively determining and classifying the key simulation area and the non-key simulation area;

[0012] Simplifying the geometric model based on the determination and classification results;

[0013] Performing mesh generation on the simplified geometric model to generate a finite element model;

[0014] Performing fluid field coupling analysis on the finite element model with the set initial conditions and boundary conditions.

[0015] Optionally, the determining and classifying the key simulation area and the non-key simulation area includes:

[0016] Dividing the key simulation area into those that can be simplified and those that cannot be simplified;

[0017] Dividing the non-key simulation area into those that are easy to simplify and those that are not easy to simplify.

[0018] Optionally, for those in the key simulation area that can be simplified, find the arrangement characteristics and perform sparsification processing.

[0019] Optionally, dividing the key simulation area into those that can be simplified and those that cannot be simplified includes:

[0020] The key positions at the glue inlet are divided into those that can be simplified, or the key positions at the glue inlet are simplified according to 5:1.

[0021] Optionally, dividing the key simulation area into those that can be simplified and those that cannot be simplified includes:

[0022] The solder joints at the edge periphery are divided into those that cannot be simplified, and the number of solder balls at the symmetric boundary is divided into those that can be simplified; the number of solder balls in the main area is divided into those that can be simplified, and the solder joints at the inner periphery edge are divided into those that can be simplified.

[0023] Optionally, the number of solder balls at the symmetric boundary is simplified according to 10:1, the number of solder balls in the main area is simplified according to 25:1, and the solder joints at the inner periphery edge are simplified according to 10:1.

[0024] Optionally, generating a finite element model by meshing the simplified geometric model includes:

[0025] Defining the element type and material type of the finite element model.

[0026] Optionally, the set initial conditions and boundary conditions include reducing the dimension of the simplified physical characteristic parameters after simplifying the physical characteristic parameters according to the CSF technology. The dimension reduction is based on the fact that the total volume before simplification is equal to the total volume after simplification, and setting the initial conditions and boundary conditions of the dimension-reduced physical characteristic parameters.

[0027] Optionally, the set initial conditions and boundary conditions include:

[0028] Invoking a porous medium model, defining the area filled with materials other than solder balls as a porous medium area, and setting the porosity to 1.

[0029] The potting process simulation method provided by the present invention divides the geometric model of the potting process into a key simulation area and a non-key simulation area, then simplifies the geometric model based on the determination classification result, meshes the simplified geometric model to generate a finite element model, simplifies the model first, and then generates a finite element model based on the simplified model, which simplifies the calculation amount of the finite element model, thereby achieving the purpose of reducing the calculation amount.

[0030] In this embodiment, by setting the initial conditions and boundary conditions, the requirement of simulating and restoring the state of the fluid movement between solder joints during the filling process is achieved, and the purpose of achieving the simulation effect without using the solder joint structure is achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] By describing the exemplary embodiments of the present disclosure in more detail with reference to the accompanying drawings, the above and other objects, features, and advantages of the present disclosure will become more apparent. Among them, in the exemplary embodiments of the present disclosure, the same reference numerals generally represent the same components.

[0032] Figure 1 It is a flowchart of the potting process simulation method provided by the embodiment of the present disclosure;

[0033] Figure 2 It is a 1 / 2 simplified two-dimensional model provided by the embodiment of the present disclosure;

[0034] Figure 3 It is a schematic diagram of the solder joint structure provided by the embodiment of the present disclosure;

[0035] Figures 4a to 4d It is a liquid phase contour map provided by the embodiment of the present disclosure.

[0036] Among them, 1 - edge peripheral solder joint; 2 - glue bin; 3 - key position of glue inlet; 4 - solder ball at symmetric boundary; 5 - solder ball in main area; 6 - remaining inner peripheral edge solder joints. Specific embodiments

[0037] The embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings.

[0038] It should be clear that the following uses specific specific examples to illustrate the implementation manners of the present disclosure. Those skilled in the art can easily understand other advantages and effects of the present disclosure from the content disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of the present disclosure, rather than all the embodiments. The present disclosure can also be implemented or applied through other different specific implementation manners. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present disclosure. It should be noted that, without conflict, the following embodiments and the features in the embodiments can be combined with each other. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present disclosure without creative efforts belong to the scope of protection of the present disclosure.

[0039] It should be noted that the following describes various aspects of the embodiments within the scope of the appended claims. It should be obvious that the aspects described herein can be embodied in a wide variety of forms, and any specific structure and / or function described herein is illustrative only. Based on the present disclosure, those skilled in the art should understand that one aspect described herein can be implemented independently of any other aspect, and two or more of these aspects can be combined in various ways. For example, any number of aspects described herein can be used to implement the device and / or practice the method. In addition, this device and / or practice this method can be implemented using other structures and / or functions in addition to one or more of the aspects described herein.

[0040] It also should be noted that the drawings provided in the following embodiments only illustrate the basic concept of the present disclosure in a schematic manner. The drawings only show the components related to the present disclosure rather than being drawn according to the number, shape and size of the components in actual implementation. The type, quantity and proportion of each component in its actual implementation can be an arbitrary change, and the component layout type may also be more complex.

[0041] In addition, in the following description, specific details are provided to facilitate a thorough understanding of the examples. However, those skilled in the art will understand that the described aspects can be practiced without these specific details.

[0042] This embodiment is used for the process simulation of the potting operation of a ball grid array packaged chip and the judgment of the underfill and cavity generation areas.

[0043] A two-dimensional filling numerical analysis method is obtained by reducing the dimension of a three-dimensional model. Compared with the three-dimensional method, this two-dimensional method has obvious efficiency advantages. In the face of a model with a large number of solder joints, if two-dimensional modeling is completely based on the structural dimensions, it will lead to a huge number of meshes in the finite element calculation, resulting in too long calculation time or even the problem that the existing computer cannot submit the calculation. Therefore, often only dimensionality reduction processing is not enough, and the number of solder joints also needs to be simplified in the two-dimensional plane. How to simplify it can effectively reduce the model size and ensure the minimum damage to the calculation accuracy is a major problem to be faced at present. Therefore, special methods need to be used to process the potted solder joints to meet the calculation efficiency and accuracy.

[0044] Numerical analysis is an important method for studying the flow behavior of underfill fluids. Many researchers have proposed different numerical analysis methods for this. The generalized Hele-Shaw model can only reflect the viscous resistance of parallel plates to flow and cannot reflect the viscous resistance of each solder ball to flow, let alone the non-uniformity of capillary pressure and viscous resistance. If permeability and average capillary pressure are used to reflect the resistance and driving force of parallel plates and solder balls to flow, the non-uniformity of capillary pressure and viscous resistance still cannot be reflected. Although the basic two-dimensional numerical analysis model based on the continuum surface force (CSF) technology can reflect the capillary pressure and viscous resistance caused by solder balls and their non-uniformity, it cannot reflect the capillary pressure and viscous resistance caused by parallel plates. In short, although the above two-dimensional numerical analysis methods have high calculation efficiency, they cannot comprehensively and accurately reflect the influence of chips, substrates, and solder balls on capillary driving force and resistance.

[0045] The CSF technology is applied to the three-dimensional numerical simulation of underfill flow. The three-dimensional numerical simulation based on the CSF technology can better reflect the capillary driving pressure and viscous resistance caused by chips, substrates, and solder balls, and can also reflect their non-uniformity. The CSF technology reflects capillary force through the normal direction and curvature of the fluid interface, which requires the meshes to be divided finely enough, resulting in a large amount of calculation and low efficiency in three-dimensional simulation. According to the two-dimensional characteristics of the underfill flow field space and the underfill flow process, the three-dimensional numerical model of underfill flow based on the CSF technology is dimensionally reduced to obtain a new two-dimensional numerical analysis model of underfill flow. In three-dimensional simulation, since chips, solder balls, and substrates can be intuitively reflected in the model, fluent can automatically calculate the capillary driving force according to the geometric shape, so there is no need to consider the setting of capillary driving force, and only the relevant items of viscous resistance need to be set. After the underfill model is two-dimensionalized, the underfill flow field area becomes a two-dimensional plane instead of a three-dimensional space. The height gap within the entire underfill area is the same, so the flow in the XOY plane can be considered to be simulated to predict the flow in the entire underfill area.

[0046] In this embodiment, the XOY plane is the plane parallel to the substrate surface, and the Z-axis is the axis perpendicular to the substrate.

[0047] For ease of understanding, as Figure 1 shown, this embodiment discloses a potting process simulation method, including:

[0048] Step S101: Construct a geometric model based on the obtained chip, solder ball, and substrate parameters;

[0049] Establish a geometric model composed of a chip, solder balls, and a substrate, analyze the importance of each part in the model, and classify them according to whether they can be simplified.

[0050] Step S102: Divide the geometric model into a key simulation area and a non-key simulation area;

[0051] Optionally, in the step of dividing the geometric model into a key simulation area and a non-key simulation area, the key simulation area is the bubble generation area in the XOY plane, and the non-key simulation area is the Z-axis direction area.

[0052] Step S103: Make determination and classification for the key simulation area and the non-key simulation area respectively;

[0053] Optionally, the determination and classification of the key simulation area and the non-key simulation area include:

[0054] Divide the key simulation area into those that can be simplified and those that cannot be simplified;

[0055] Divide the non-key simulation area into those that are easy to simplify and those that are not easy to simplify.

[0056] Optionally, for those in the key simulation area that can be simplified, find the arrangement characteristics and perform sparsification processing.

[0057] For those in the key simulation area that can be simplified, such as solder joints, find the arrangement characteristics and perform sparsification processing. Those that cannot be simplified, such as the dimensional position relationship between parts.

[0058] For those in the non-key simulation area that are easy to simplify, such as geometric features in the Z-axis direction, directly ignore them. Those that are not easy to simplify, such as the capillary force generated by the near-gap between the substrate and the chip in the Z-axis direction, are simulated in the following way.

[0059] Set the source term of the liquid in the porous medium according to the surface force term of the viscous resistance of the power-law fluid for the parallel plate:

[0060] and are additional surface force terms, reflecting the fluid on the parallel plate in the x and y directions. If the underfill encapsulant is a power-law fluid, then:

[0061] ,

[0062] ,

[0063] h is the gap height between the chip and the substrate, 、 are the components of the velocity vector of the fluid microelement in the x and y directions respectively. The x and y directions are the x and y directions of the XOY plane. m is the coefficient of the power-law constitutive equation, and n is the exponent of the power-law constitutive equation.

[0064] The surface force term reflecting the viscous resistance of the parallel plates to the power-law fluid and are equivalent to the momentum loss source term generated by the porous medium to the power-law fluid. The expression of this source term is:

[0065] ,

[0066] ,

[0067] The coefficients in the formula and can be expressed as , .

[0068] Such as Figure 2 shown, optionally, the key simulation area is divided into areas that can be simplified and areas that cannot be simplified, including:

[0069] The key positions at the glue inlet are areas that cannot be simplified. The solder joints at the outer edge are divided into areas that cannot be simplified. The number of solder balls at the symmetric boundary can be simplified. The number of solder balls in the main area can be simplified. The solder joints at the inner edge can be simplified.

[0070] Step S104: Simplify the geometric model based on the determination classification result;

[0071] Optionally, simplifying the geometric model based on the determination classification result includes:

[0072] The number of solder balls at the symmetric boundary is simplified according to 10:1. The number of solder balls in the main area is simplified according to 25:1. The solder joints at the inner edge are simplified according to 10:1. When the key positions at the glue inlet are classified as areas that can be simplified, the key positions at the glue inlet are simplified according to 5:1.

[0073] Step S105: Generate a finite element model by meshing the simplified geometric model;

[0074] Optionally, generating a finite element model by meshing the simplified geometric model includes:

[0075] Define the element type and material type of the finite element model.

[0076] Step S106: Set the initial conditions and boundary conditions, and perform a fluid field coupling analysis on the finite element model.

[0077] Optionally, the set initial conditions and boundary conditions include reducing the dimension of the physical characteristic parameters after simplifying them according to the CSF technology. The dimension reduction is based on the total volume before simplification being equal to the total volume after simplification, and setting the initial conditions and boundary conditions of the physical characteristic parameters after dimension reduction.

[0078] The physical characteristic parameters include the actual inlet, outlet, gas-liquid two-phase flow, wall adhesion value, etc.

[0079] Optionally, the set initial conditions and boundary conditions include:

[0080] Call the porous medium model, define the area filled with materials other than solder balls as the porous medium area, and set the porosity to 1. The viscous resistance of the chip and the substrate to glycerol:

[0081] Two-dimensional inlet pressure , and the outlet pressure is 0, indicating that the outlet is connected to the atmosphere.

[0082] When running the above simulation method, after initializing the parameters, set the calculation analysis step, and then perform the simulation run after setting the required results to obtain the liquid phase contour map and the animation of the liquid phase contour map.

[0083] As Figure 3 shown, the shape of the solder joint is a spherical zone, and the volume formula of the spherical zone is:

[0084] ,

[0085] where r1 is the top circle radius, r2 is the bottom circle radius, and h is the height of the spherical zone.

[0086] For the solder joints of the ball grid array package, it is approximately considered that the top circle and the bottom circle have equal radii, that is, r1 = r2 = r0. When simplifying the solder joints in this embodiment, the area not covered by the solder joints remains unchanged, so the height h of the solder joints is a fixed value. Therefore, the volume of the solder joints of the ball grid array package is expressed as:

[0087] ,

[0088] The volume of the solder joint is positively correlated with the square of the top circle and bottom circle radii of the solder joint, that is:

[0089] ,

[0090] When ignoring the height of the solder joints, it is only necessary to ensure that the total volume V before simplification is equal to the total volume V after simplification, and several local small solder joints are simplified into one large solder joint. The specific simplification method is as Figure 2 shown.

[0091] After completing the simplification work, the simulation settings can be carried out. The parameter settings during the program operation are as follows:

[0092] VOF (Modified HRIC): The first-phase fluid is air, and the second-phase is the filled melt glue;

[0093] Laminar flow: Gravity is not considered;

[0094] Solver: Based on the pressure method (Pressure-Based);

[0095] Time type: Transient;

[0096] Velocity equation: Absolute velocity;

[0097] Discrete format solution: Implicit;

[0098] Pressure-velocity coupling: PISO;

[0099] Pressure term: PRESTO;

[0100] Momentum phase usage: QUICK;

[0101] After setting the above parameters, run the simulation program. The obtained liquid-phase cloud diagram is as Figures 4a to 4d shown, Figure 4a for the initial state, Figure 4b for the initial stage of filling, Figure 4c for the middle stage of filling, Figure 4d for the final stage of filling.

[0102] The electronic device disclosed in this embodiment includes a memory and a processor. The memory is used to store non-temporary computer-readable instructions. Specifically, the memory may include one or more computer program products, and the computer program products may include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. The volatile memory may include, for example, random access memory (RAM) and / or cache memory, etc. The non-volatile memory may include, for example, read-only memory (ROM), hard disk, flash memory, etc.

[0103] The processor may be a central processing unit (CPU) or other forms of processing units with data processing capabilities and / or instruction execution capabilities, and may control other components in the electronic device to perform desired functions. In an embodiment of the present disclosure, the processor is used to run the computer-readable instructions stored in the memory, so that the electronic device executes all or part of the steps of the potting process simulation method of the various embodiments of the present disclosure described above.

[0104] Those skilled in the art should understand that, in order to solve the technical problem of how to obtain a good user experience effect, well-known structures such as communication buses and interfaces may also be included in this embodiment, and these well-known structures should also be included in the protection scope of the present disclosure.

[0105] The electronic device may include a processing device (such as a central processing unit, a graphics processing unit, etc.), which may perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) or a program loaded from a storage device into a random access memory (RAM). In the RAM, various programs and data required for the operation of the electronic device are also stored. The processing device, ROM, and RAM are connected to each other through a bus. An input / output (I / O) interface is also connected to the bus.

[0106] Generally, the following devices may be connected to the I / O interface: an input device including, for example, a sensor or a visual information acquisition device; an output device including, for example, a display screen; a storage device including, for example, a magnetic tape, a hard disk, etc.; and a communication device. The communication device may allow the electronic device to communicate with other devices (such as edge computing devices) wirelessly or wiredly to exchange data.

[0107] Specifically, according to the embodiments of the present disclosure, the process described above with reference to the flowchart may be implemented as a computer software program. For example, an embodiment of the present disclosure includes a computer program product, which includes a computer program carried on a non-transitory computer-readable medium, and the computer program includes program codes for executing the method shown in the flowchart. In such an embodiment, the computer program may be downloaded and installed from the network through the communication device, or installed from the storage device, or installed from the ROM. When the computer program is executed by the processing device, all or part of the steps of the potting process simulation method of the embodiments of the present disclosure are executed.

[0108] For a detailed description of this embodiment, reference may be made to the corresponding descriptions in the foregoing embodiments, and details will not be repeated here.

[0109] The computer-readable storage medium disclosed in this embodiment stores non-transitory computer-readable instructions. When the non-transitory computer-readable instructions are run by a processor, all or part of the steps of the potting process simulation method of the various embodiments of the present disclosure described above are executed.

[0110] The above computer-readable storage media include, but are not limited to: optical storage media (e.g., CD-ROMs and DVDs), magneto-optical storage media (e.g., MOs), magnetic storage media (e.g., magnetic tapes or removable hard disks), media with built-in rewritable non-volatile memories (e.g., memory cards), and media with built-in ROMs (e.g., ROM cartridges).

[0111] For a detailed description of this embodiment, reference may be made to the corresponding descriptions in the foregoing embodiments, which will not be repeated here.

[0112] The basic principles of the present disclosure have been described above in connection with specific embodiments. However, it should be noted that the advantages, benefits, effects, etc. mentioned in the present disclosure are only examples and not limitations, and it cannot be considered that these advantages, benefits, effects, etc. are essential for each embodiment of the present disclosure. In addition, the above-disclosed specific details are only for the purposes of illustration and facilitating understanding, rather than limitations. The above details do not limit the present disclosure to necessarily implement using the above specific details.

[0113] In the present disclosure, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. The block diagrams of the devices, apparatuses, equipment, and systems involved in the present disclosure are only illustrative examples and do not intend to require or imply that they must be connected, arranged, and configured in the manner shown in the block diagrams. As those skilled in the art will recognize, these devices, apparatuses, equipment, and systems can be connected, arranged, and configured in any manner. Words such as "including", "comprising", "having", etc. are open-ended terms meaning "including but not limited to", and can be used interchangeably with them. The words "or" and "and" used herein refer to the word "and / or", and can be used interchangeably with it, unless the context clearly indicates otherwise. The word "such as" used herein refers to the phrase "such as but not limited to", and can be used interchangeably with it.

[0114] In addition, as used herein, the "or" used in the listing of items starting with "at least one" indicates a disjunctive listing, so that for example, the listing of "at least one of A, B, or C" means A or B or C, or AB or AC or BC, or ABC (i.e., A and B and C). Furthermore, the term "exemplary" does not mean that the described examples are preferred or better than other examples.

[0115] It should also be noted that in the systems and methods of the present disclosure, each component or each step can be decomposed and / or recombined. These decompositions and / or recombinations should be regarded as equivalent solutions of the present disclosure.

[0116] Various changes, substitutions, and alterations to the technology described herein may be made without departing from the teachings defined by the appended claims. In addition, the scope of the claims of this disclosure is not limited to the specific aspects of the processes, machines, manufactures, compositions of events, means, methods, and acts described above. Current or later-developed processes, machines, manufactures, compositions of events, means, methods, or acts that perform substantially the same function or achieve substantially the same result as the corresponding aspects described herein may be utilized. Accordingly, the appended claims include such processes, machines, manufactures, compositions of events, means, methods, or acts within their scope.

[0117] The foregoing description of the disclosed aspects is provided to enable any person skilled in the art to make or use the present disclosure. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other aspects without departing from the scope of the present disclosure. Thus, the present disclosure is not intended to be limited to the aspects shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

[0118] The foregoing description has been presented for purposes of illustration and description. In addition, this description is not intended to limit the embodiments of the present disclosure to the forms disclosed herein. Although several example aspects and embodiments have been discussed above, those skilled in the art will recognize some of their variations, modifications, alterations, additions, and subcombinations.

Claims

1. A potting process simulation method, characterized in that, Including: Construct a geometric model based on the obtained chip, solder ball, and substrate parameters; Divide the geometric model into key simulation regions and non-key simulation regions; Conduct determination and classification on the key simulation regions and non-key simulation regions respectively; Simplify the geometric model based on the determination and classification results; Perform mesh generation on the simplified geometric model to generate a finite element model; Set initial conditions and boundary conditions, and conduct fluid field coupling analysis on the finite element model; In the step of dividing the geometric model into key simulation regions and non-key simulation regions, the key simulation region is the bubble generation region in the XOY plane, and the non-key simulation region is the Z-axis direction region; The determination and classification of the key simulation regions and non-key simulation regions include: Divide the key simulation regions into those that can be simplified and those that cannot be simplified; Divide the non-key simulation regions into those that are easily simplified and those that are not easily simplified; Dividing the key simulation regions into those that can be simplified and those that cannot be simplified includes: The solder joints on the edge periphery are classified as those that cannot be simplified, and the number of solder balls at the symmetric boundary is classified as those that can be simplified; the number of solder balls in the main region is classified as those that can be simplified, and the solder joints on the inner periphery are classified as those that can be simplified; Dividing the non-key simulation regions into those that are easily simplified and those that are not easily simplified includes directly ignoring the geometric features in the Z-axis direction that are easily simplified, and simulating the capillary force generated by the near-gap between the substrate and the chip in the Z-axis direction that is not easily simplified.

2. The potting process simulation method according to claim 1, wherein For those in the key simulation regions that can be simplified, find the arrangement characteristics and perform sparsification processing.

3. The potting process simulation method according to claim 2, wherein Dividing the key simulation regions into those that can be simplified and those that cannot be simplified includes: The key positions at the glue inlet are classified as those that cannot be simplified, or the key positions at the glue inlet are simplified according to a ratio of 5:

1.

4. The potting process simulation method according to claim 1, characterized in that, The number of solder balls at the symmetric boundary is simplified according to a ratio of 10:1, the number of solder balls in the main region is simplified according to a ratio of 25:1, and the solder joints on the inner periphery are simplified according to a ratio of 10:

1.

5. The potting process simulation method according to claim 1, wherein The step of performing mesh generation on the simplified geometric model to generate a finite element model includes: Define the element type and material type of the finite element model.

6. The potting process simulation method according to claim 1, characterized in that The set initial conditions and boundary conditions include that after simplifying the physical characteristic parameters according to the CSF technology, dimensionality reduction is performed on the simplified physical characteristic parameters. The dimensionality reduction is based on the fact that the total volume before simplification is equal to the total volume after simplification, and the initial conditions and boundary conditions of the dimensionality-reduced physical characteristic parameters are set.

7. The potting process simulation method according to claim 1, characterized in that The set initial conditions and boundary conditions include: Call the porous medium model, define the region except the solder balls in the underfill as the porous medium region, and set the porosity to 1.

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