Silicon oxide silicon nitride stack ion assisted etching

Abstract

A method for ion assisted etching of a stack of alternating silicon oxide and silicon nitride layers in an etch chamber is provided. An etch gas comprising a fluorine component, helium, and a fluorohydrocarbon or hydrocarbon is flowed into the etch chamber. The gas is formed as an in-situ plasma in the etch chamber. A bias voltage of about 10 volts to about 100 volts is provided to accelerate helium ions to the stack and activate a surface of the stack to form an activated surface for ion assisted etching, where the in-situ plasma etches the activated surface of the stack.

Description

This application is a divisional application of the invention patent application with application number 201780063863.5, application date October 9, 2017, and invention name “Ion-assisted etching of silicon oxide and silicon nitride stack”. CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims the benefit of priority to U.S. Provisional Application No. 62 / 410,225, filed on October 19, 2016, and U.S. Application No. 15 / 726,120, filed on October 5, 2017, which are incorporated herein by reference for all purposes. Background Art

[0002] The present disclosure relates to the formation of semiconductor devices. More particularly, the present disclosure relates to the formation of step-step semiconductor devices.

[0003] During semiconductor wafer processing, stair-step features are sometimes needed. For example, in 3D flash memory devices, multiple cells are stacked together in a chain to save space and increase packaging density. The stair structure allows electrical contact with each gate layer. This stair structure can be formed by multiple alternating silicon oxide layers and silicon nitride layers, where this stack is designated as an ONON stack. In addition to stair-step semiconductor devices, ONON stacks can also be used to form other semiconductor devices. Summary of the invention

[0004] To achieve the foregoing and in accordance with the purposes of the present disclosure, a method for ion-assisted etching of a stack of alternating silicon oxide layers and silicon nitride layers in an etching chamber is provided. An etching gas comprising a fluorine component, helium, and a fluorinated hydrocarbon or hydrocarbon is flowed into the etching chamber. The gas is formed into an in-situ plasma in the etching chamber. A bias voltage of about 10 volts to about 100 volts is provided to accelerate helium ions to the stack and activate the surface of the stack to form an activated surface of the stack for ion-assisted etching, wherein the in-situ plasma etches the activated surface of the stack.

[0005] In another implementation, a method for forming a step-step structure in a stack in a plasma processing chamber is provided, wherein the stack has an organic mask, and wherein the stack includes a plurality of bilayers of silicon oxide and silicon nitride, the method comprising a plurality of cycles, wherein each cycle comprises: trimming the organic mask; and ion-assisted etching of at least one complete bilayer of the stack. The ion-assisted etching comprises: flowing an etching gas comprising a fluorine component, helium, and a fluorinated hydrocarbon or hydrocarbon into an etching chamber; forming the etching gas into an in-situ plasma in the etching chamber; and providing a bias voltage of about 10 volts to about 100 volts to accelerate helium ions to the stack in the etching chamber and activate a surface of the stack to form an activated surface of the stack, wherein the in-situ plasma etches the activated surface of the stack.

[0006] These and other features of the present disclosure will be described in more detail below in the specific embodiments of the present disclosure in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The present disclosure is illustrated by way of example and not by way of limitation in the figures of the accompanying drawings in which like reference numerals refer to similar elements and in which:

[0008] Figure 1 is a high-level flow diagram of a process that may be used in embodiments of the present disclosure.

[0009] Figure 2 yes Figure 1 A more detailed flow chart of step 108 regarding forming the step-step structure using ion-assisted etching is shown in FIG.

[0010] Figures 3A-3F is a schematic cross-sectional view of a stack etched according to an embodiment of the present disclosure.

[0011] Figure 4 is a schematic diagram of a plasma processing chamber that may be used to practice the present disclosure.

[0012] Figure 5 A computer system suitable for implementing a controller used in embodiments of the present disclosure is shown. DETAILED DESCRIPTION

[0013] The present disclosure will now be described in detail with reference to some preferred embodiments of the present disclosure as illustrated in the accompanying drawings. In the following description, many specific details are set forth to provide a comprehensive understanding of the present disclosure. However, it is apparent to those skilled in the art that the present disclosure may be implemented without some or all of these specific details. In other examples, known process steps and / or structures are not described in detail to avoid making the present disclosure unnecessarily difficult to understand.

[0014] For ease of understanding, Figure 1 1 is a high-level flow chart of a process that can be used in embodiments of the present disclosure to form a step-step structure in a stack. An organic mask is formed on a stack of alternating silicon oxide layers and silicon nitride (ONON) layers (step 104). The step-step structure is formed using ion-assisted etching (step 108). The organic mask is trimmed (step 112). If the etching of the step-step is not completed (step 116), the process proceeds to the ion-assisted etching step-step formation step (step 108). Otherwise, the process is complete and other steps can be performed.

[0015] Figure 2 2 is a more detailed flow chart of the steps of forming a step-step structure using ion-assisted etching. An etching gas is flowed into a processing chamber (step 204), wherein the etching gas includes a fluorine-containing component, helium, and a hydrofluorocarbon or fluorocarbon component. The etching gas forms a plasma in a plasma chamber (step 208). A low bias voltage of 10 to 100 volts is provided to cause ion bombardment of helium ions to activate the surface of the stack for ion-assisted etching, wherein the plasma etches the activated surface of the stack (step 212). The ion-assisted etching process is stopped (step 216). Example

[0016] In an example of an implementation of the present invention, a stair-step memory array is etched. In this memory array, a memory stack is formed on a wafer. Figure 3A 300 is a cross-sectional view of a stack 300 including a plurality of layers of a memory stack 304 formed on a wafer 308. In this embodiment, each of the plurality of memory stacks is formed of a silicon nitride (SiN) layer 312 forming an ONON stack and a silicon oxide (SiO2) layer 316 bilayer on the silicon nitride (SiN) layer 312. An organic mask 320 is formed on the memory stack 304 (step 104). The organic mask may be a photoresist mask formed using a spin coating process and photolithographic patterning. In an alternative, the organic mask may be an organic layer that is spin coated or otherwise applied without photolithographic patterning.

[0017] The stack 300 may be placed in a processing tool to perform subsequent steps. Figure 4 Processing tools that may be used in implementations of the present disclosure are shown. Figure 44 is a schematic diagram of a plasma processing system 400, which includes a plasma processing tool 401. The plasma processing tool 401 is an inductively coupled plasma etching tool and includes a plasma reactor 402 having a plasma processing chamber 404 therein. A transformer coupled power (TCP) controller 450 and a bias power controller 455 control a TCP power source 451 and a bias power source 456, respectively, to affect a plasma 424 generated within the plasma processing chamber 404.

[0018] The TCP controller 450 sets a set point for a TCP power source 451, which is configured to provide a 13.56 MHz RF signal (tuned by a TCP matching network 452) to a TCP coil 453 located near the plasma processing chamber 404. An RF transparent window 454 is provided to separate the plasma processing chamber 404 from the TCP coil 453 while enabling energy to be transferred from the TCP coil 453 to the plasma processing chamber 404.

[0019] A bias power controller 455 sets a set point for a bias power source 456 configured to supply an RF signal tuned by a bias matching network 457 to a chuck electrode 408 located within the plasma processing chamber 404 to generate a direct current (DC) bias on the electrode 408, which is adapted to receive the stack 300.

[0020] A gas supply mechanism or gas source 410 includes a gas source or multiple gas sources 416 connected via a gas manifold 417 to supply appropriate chemicals required for the process to the interior of the plasma processing chamber 404. A gas exhaust mechanism 418 includes a pressure control valve 419 and an exhaust pump 420 to remove particles from the plasma processing chamber 404 and maintain a specific pressure within the plasma processing chamber 404.

[0021] A temperature controller 480 controls the temperature of a refrigeration recirculation system disposed within the chuck electrode 408 by controlling a refrigeration power source 484. The plasma processing system also includes an electronic control circuit 470. The plasma processing system may also have an endpoint detector. An example of such an inductively coupled plasma processing chamber is the Kiyo built by Lam Research Corporation (Frement, CA), which is used to etch silicon layers, polysilicon layers, and conductive layers in addition to etching dielectric materials and organic materials. In other embodiments of the present disclosure, a capacitive coupling system may be used.

[0022] Figure 55 is a high-level block diagram representing a computer system 500, which is suitable for implementing the control circuit 470 used in the embodiments of the present disclosure. The computer system can have many physical forms, ranging from integrated circuits, printed circuit boards and small handheld devices to giant supercomputers. The computer system 500 includes one or more processors 502, and can also include an electronic display device 504 (for displaying graphics, text and other data), a main memory 506 (e.g., a random access memory (RAM)), a storage device 508 (e.g., a hard disk drive), a removable storage device 510 (e.g., an optical drive), a user interface device 512 (e.g., a keyboard, a touch screen, a keyboard, a mouse or other pointing devices, etc.), and a communication interface 514 (e.g., a wireless network interface). The communication interface 514 enables software and data to be transmitted between the computer system 500 and an external device via a link. The system can also include a communication infrastructure 516 (e.g., a communication bus, a crossbar or a network), and the above-mentioned device / module is connected to the communication infrastructure 516.

[0023] The information transmitted via the communication interface 514 may be in the form of signals such as electronic signals, electromagnetic signals, optical signals or other signals that can be received through the communication interface 514 via a communication link that carries the signal and can be implemented using a wire or cable, optical fiber, telephone line, mobile phone link, radio frequency link and / or other communication channels. Through such a communication interface, it is expected that one or more processors 502 can receive information from the network during the execution of the above-mentioned method steps, or can output information to the network during the execution of the above-mentioned method steps. In addition, the method embodiments of the present disclosure can be executed only on a processor or can be executed on a network such as the Internet in conjunction with a remote processor that shares a portion of the processing.

[0024] The term "non-transitory computer-readable medium" is generally used to refer to media such as main memory, auxiliary memory, removable storage devices and storage devices (such as hard disks, flash memory, disk drive memory, CD-ROMs), and other forms of permanent memory, and should not be interpreted as covering transient subject matter such as carrier waves or signals. Examples of computer code include machine code such as generated by a compiler, and files containing higher-level code executed by a computer using an interpreter. Computer-readable media can also be computer code transmitted by a computer data signal embodied in a carrier wave and representing a sequence of instructions that can be executed by a processor.

[0025] In this example, the step-step is ion-assisted etched (step 108). An etching gas is flowed into the processing chamber (step 204), wherein the etching gas includes a fluorine-containing component, helium and a hydrofluorocarbon or fluorocarbon component. In this example, the etching gas is substantially composed of 50sccm SF6, 100sccm CHF3, and 700sccm He. CHF3 is a hydrofluorocarbon component. SF6 is a fluorine-containing component. The etching gas is formed into a plasma (step 208). An inductively coupled RF power is provided at 13.56MHz and a power of 2600 watts. A low bias of 50 volts is provided to cause ion bombardment of helium ions (step 212) to activate the surface of the stack to perform ion-assisted etching, wherein the activated surface of the stack is etched by in-situ plasma. The etching process is stopped after 25 seconds (step 216). The etching process can be stopped by stopping the flow of the etching gas. In addition, the RF power can be stopped. If the RF power is used to provide trimming, the RF power can continue. Figure 3B 324 is a cross-sectional view of stack 300 after ion-assisted etching of a step-step in the stack. The exposed horizontal surfaces of the stack have been etched. In this example, two bi-layers of silicon oxide and silicon nitride were etched to form a first step 324.

[0026] The organic mask is trimmed (step 112). An example of a recipe for trimming an organic mask provides a pressure between 30 mTorr and 400 mTorr. A trim gas is flowed from a gas source 416 to a plasma processing chamber 404 (step 504), wherein the trim gas is 1000 sccm O2, 40 sccm N2, and 50 sccm NF3. The trim gas is formed into a plasma. In this example, 1800 watts of TCP power is provided at 13.56 MHz. A bias voltage of 0 volts is provided. The plasma is maintained for 20 seconds to 60 seconds, and then the trim gas is stopped. Figure 3C is a cross-sectional view of the stack 300 after trimming the organic mask 320 .

[0027] If the step is not complete (step 116), another step-to-step is ion-assisted etched using the organic mask as a mask (step 108). The same recipe as the previous step-to-step etch can be used. Figure 3D is a cross-sectional view of stack 300 after step-step etching. In this example, two silicon oxide and silicon nitride bilayers are etched to form second step 328 while deepening first step 324. The deepening of first step 324 etches the first step without the use of a mask and provides vertical sidewalls and corners without faceting.

[0028] The organic mask 320 is trimmed again (step 112). The same trimming recipe may be used. Figure 3Eis a cross-sectional view of the stack 300 after trimming the organic mask 320 (step 112).

[0029] If the step is not complete (step 116), another step-to-step is ion-assisted etched using the organic mask as a mask (step 108). The same recipe as the previous step-to-step etch can be used. Figure 3F is a cross-sectional view of stack 300 after step-step etching. In this example, two bi-layers of silicon oxide and silicon nitride are etched to form third step 332 while deepening second step 328 and first step 324.

[0030] The process continues until the staircase is complete (step 116). The cycle is then stopped. Additional processes may be provided, such as removing the organic mask.

[0031] The finished steps provide an improved structure of steps created using other processes in a faster manner than other processes. The characteristic of this step-step etching is that the unmasked area that forms the step is etched. Other etching processes may depend on chemical etching, which alternates between selectively etching silicon oxide relative to silicon nitride and then selectively etching silicon nitride relative to silicon oxide. This etching process will alternate etching gas chemicals and other parameters to alternate selectivity. Such a process that uses alternating etching to selectively etch each layer is slower than the above-mentioned embodiment, which uses a single etching process to etch multiple individual layers by a single etching process. In addition, it is more difficult to control the vertical profile of this chemical etching because chemical etching will etch vertical surfaces in addition to etching horizontal surfaces. As a result, the resulting step structure will have a tapered profile. This chemical etching of silicon oxide will use silicon nitride as a mask and etching stop. This chemical etching of silicon nitride will use silicon oxide as a mask and etching stop. Other previous processes may rely on ion bombardment to etch silicon oxide and silicon nitride by a single etching process. This ion bombardment tends to have some non-vertical ion orientation. This non-vertical ion orientation causes sidewall loss. In addition, this bombardment may facet the corners of the step-steps. Such faceting can also lead to a tapered profile. The previous process may add a temporary mask to protect the sidewalls or an organic mask. The formation of this mask further increases the processing time.

[0032] The above-mentioned embodiment provides ion-assisted etching. Helium ions with a low bias voltage of 10 volts to 100 volts provide ion assistance for etching while avoiding ion bombardment damage caused by ion bombardment etching. Helium ions provide low atomic weight to avoid ion bombardment damage. The bias voltage should be sufficient to activate the surface without causing any additional damage or faceting to the corners of the steps. Preferably, the bias voltage enables the helium ions to activate the surface of the stack without etching the stack. On the contrary, the activated surface of the stack is etched by plasma chemistry. The flow rate of the fluorine-containing component and the hydrofluorocarbon or hydrocarbon can be used as a control parameter to provide the desired etching while providing sufficient passivation to prevent sidewall damage and faceting while performing ion-assisted etching. Ion assistance enables the use of a single etching process to etch both silicon oxide and silicon nitride. This embodiment provides a stepped structure with vertical sidewalls or sidewalls with reduced slope. It has been found that the speed of the etching process provided by the above-mentioned embodiment is twice that of the baseline chemical etching process that alternates between selective etching chemicals. In addition, it has been found that the above embodiment etches the ONON layer more selectively relative to the organic mask and helps to improve the L / V ratio, which is the ratio of lateral organic mask trimming to vertical organic mask height loss. It has been found that the above embodiment can etch 3 pairs of silicon oxide / silicon nitride double layers with a total thickness of 170nm in about 30 seconds compared to conventional chemical etching using two alternating etching recipes that takes about 60 seconds. Therefore, the speed of the above embodiment is about twice the speed of the previous etching process. It is found that the above embodiment has a vertical profile greater than 85°, while conventional chemical etching using two alternating etching recipes has a vertical profile less than 80°. In the specification and claims, the vertical profile is defined as having a profile greater than 85° from the horizon. Since the embodiment provides ion-assisted etching, only the area activated by ion assistance is chemically etched. As a result, sidewall etching is reduced without the need for a protective sidewall layer. Therefore, during the etching process, the step-step structure has no mask on some steps and the sidewalls of the steps.

[0033] In addition, the above-described embodiments provide a single etching process with a selectivity ratio of about 1 to 1 between etching silicon oxide and silicon nitride. This allows the etching rate of silicon oxide to be as fast as the etching rate of silicon nitride. In such a single step process for etching multiple silicon oxide layers and silicon nitride layers, it is desirable to etch silicon oxide and silicon nitride at the same rate.

[0034] Preferably, the fluorine-containing component is SF6 or NF3, which acts as the main etchant for etching SiN. Preferably, the hydrofluorocarbon or fluorocarbon is CHF3 or CF4, which acts as the main etchant for etching silicon oxide. It has been found that the correct balance of these two etchants combined with ion assistance can prevent lateral chemical etching. For large He dilutions, most of the ions come from He. Preferably, the flow rate of He is at least twice the flow rate of the remaining components of the etching gas, which is measured in volume flow rate (sccm). The flow rate of the remaining components of the etching gas is equal to the flow rate of the etching gas minus the flow rate of helium. More preferably, the flow rate of He is at least four times the flow rate of the remaining components of the etching gas. Preferably, the low bias is between 10 volts and 100 volts. More preferably, the low bias is between 20 volts and 70 volts. Preferably, etching is at a low pressure of 5 millitorr to 20 millitorr to reduce collisions between ions, resulting in a higher percentage of vertical ions.

[0035] Preferably, the cycle is repeated at least 5 times, thereby providing at least five steps-steps. More preferably, at least 8 steps-steps can be provided. In other embodiments, the steps-steps can be formed in one or more horizontal directions (X or Y).

[0036] In other embodiments, other features may be etched into multiple silicon oxide and silicon nitride bilayers using a single ion assisted etch process. The ion assisted etch process will reduce faceting and sidewall etching on non-step-step structures while increasing the etch rate of the bilayer.

[0037] In other embodiments, the first layer is a silicon nitride layer. In other embodiments, the last step is an etching step, wherein the organic layer is not subsequently trimmed after the last etching step. In some embodiments, ion-assisted etching can be used to etch high aspect ratio features, such as contacts.

[0038] In some embodiments, the etching gas consists essentially of a fluorine component, helium, and a fluorinated hydrocarbon or hydrocarbon. In other embodiments, the etching gas comprises a fluorine component, helium, and a fluorinated hydrocarbon or hydrocarbon, to which one or more of HBr, COS, Cl2, N2, Ar, H2, or SiCl4 are added. For example, in one embodiment, the etching gas consists essentially of a fluorine component, helium, HBr, COS, and a fluorinated hydrocarbon or hydrocarbon. In another embodiment, the etching gas consists essentially of a fluorine component, helium, HBr or COS, and a fluorinated hydrocarbon or hydrocarbon.

[0039] In one embodiment, the stack comprises at least two pairs of bilayers of silicon oxide and silicon nitride. In another embodiment, the stack comprises at least 100 pairs of bilayers of silicon oxide and silicon nitride.

[0040] Although the present disclosure has been described according to a number of preferred embodiments, there are modifications, permutations, and various alternative equivalents that fall within the scope of the present disclosure. It should also be noted that there are multiple alternative ways to implement the methods and devices of the present disclosure. Therefore, it is intended that the appended claims be interpreted as including all of these modifications, permutations, and various alternative equivalents that fall within the spirit and scope of the present disclosure.

Claims

1. A method for ion-assisted etching of a stack of alternating silicon oxide layers and silicon nitride layers in an etching chamber, comprising: flowing an etching gas comprising a fluorine component, helium, and a fluorinated hydrocarbon or hydrocarbon into the etching chamber; forming the etching gas into an in-situ plasma in the etching chamber; as well as providing a bias voltage of about 10 volts to about 100 volts to accelerate helium ions to the stack and activate a surface of the stack to form an activated surface for ion-assisted etching, wherein the in-situ plasma etches the activated surface of the stack, wherein the helium ions do not etch the stack, and wherein the in-situ plasma chemically etches only the activated surface of the stack. 2 . The method of claim 1 , wherein the flow rate of helium of the etching gas is at least twice the flow rate of the remaining components of the etching gas.

3. The method of claim 1, wherein the stack comprises at least two pairs of bilayers of silicon oxide and silicon nitride.

4. The method of claim 1, wherein the stack comprises at least 100 pairs of silicon oxide and silicon nitride bilayers. 5 . The method of claim 1 , wherein forming the etching gas into an in-situ plasma comprises providing RF power to the etching chamber by inductive coupling.

6. The method of claim 1, wherein the stack is in the form of a step-step structure, wherein the step-step structure has a mask on a portion of the stack, wherein the mask does not cover some steps and sidewalls of the steps. 7 . The method of claim 1 , wherein the layer stack is disposed below an organic mask, and further comprising trimming the organic mask.

8. The method of claim 1, wherein the etching gas further comprises at least one of HBr, COS, Cl2, N2, Ar, H2, or SiCl4.

9. A method for forming a step-step structure in a stack in a plasma processing chamber, wherein the stack has an organic mask, and wherein the stack comprises a plurality of bilayers of silicon oxide and silicon nitride, the method comprising a plurality of cycles, wherein each cycle comprises: a) trimming the organic mask; as well as b) ion-assisted etching of at least one complete bilayer of the stack, wherein the ion-assisted etching comprises: flowing an etching gas comprising a fluorine component, helium, and a fluorinated hydrocarbon or hydrocarbon into the etching chamber; forming the etching gas into an in-situ plasma in the etching chamber; and providing a bias voltage of about 10 volts to about 100 volts to accelerate helium ions to the stack in the etching chamber and activate a surface of the stack to form an activated surface of the stack, wherein the in-situ plasma etches the activated surface of the stack, wherein the helium ions do not etch the stack, and wherein the in-situ plasma chemically etches only the activated surface of the stack.

10. The method of claim 9, wherein the cycle of step a-step b is repeated at least 5 times. The method of claim 9 , wherein the organic mask is a photoresist mask.

12. The method according to claim 9, wherein steps a-b are performed in an inductively coupled plasma processing chamber.

13. The method of claim 9, wherein the flow rate of helium of the etching gas is at least twice the flow rate of the remaining components of the etching gas.

14. The method of claim 9, wherein the etching gas further comprises at least one of HBr, COS, Cl2, N2, Ar, H2, or SiCl4.

15. The method of claim 9, wherein the flow rate of helium of the etching gas is at least twice the flow rate of the remaining components of the etching gas.

16. The method of claim 9, wherein the flow rate of helium of the etching gas is at least four times the flow rates of the remaining components of the etching gas.

17. The method of claim 9, wherein the etching is performed at a pressure of 5 to 20 mTorr.

18. The method of claim 1, wherein the flow rate of helium of the etching gas is at least twice the flow rate of the remaining components of the etching gas.

19. The method of claim 1, wherein the flow rate of helium of the etching gas is at least four times the flow rate of the remaining components of the etching gas.

20. The method of claim 1, wherein the etching is performed at a pressure of 5 to 20 mTorr.

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