Digital active EMI filtering method and circuit based on square wave analysis and reconstruction

Abstract

The invention relates to a digital active EMI filtering method and circuit based on square wave analysis and reconstruction, and the method comprises the steps: obtaining common-mode noise source waveform data of a Buck circuit; determining compensation capacitance parameters according to a compensation circuit equivalent model, and generating compensation voltage data reduced by the common-mode noise source waveform data in an equal ratio; synchronously outputting PWM and the compensation voltage data through a synchronous control mechanism, and injecting the PWM and the compensation voltage data into a ground wire; and measuring the time delay between the PWM output signal and the DAC output signal, and reconstructing the compensation voltage data to carry out time delay compensation. By adopting the digital active EMI filtering method and circuit based on square wave analysis and reconstruction provided by the invention, time delay can be eliminated and common-mode EMI noise can be reduced while no detection is realized, the cost is reduced and the size is reduced.

Description

Technical Field

[0001] The present application relates to the technical field of EMI suppression of power electronic converters, and in particular to a digital active EMI filtering method and circuit based on square wave analytical reconstruction. Background Art

[0002] At present, power electronics technology is developing rapidly, and power electronic converters are increasingly widely used in new energy, electric vehicles, industrial control and other fields. With the popularization of wide bandgap semiconductor devices (such as SiC and GaN), converters are driven to develop in the direction of high switching frequency and high power density. However, high switching frequency can easily lead to higher voltage change rate (dv / dt) and current change rate (di / dt), as well as stronger electromagnetic coupling between components, further exacerbating the electromagnetic interference (EMI) problem of power electronic converters.

[0003] In the face of electromagnetic interference from power electronic converters, EMI filters are usually used to suppress it. Traditional EMI filters are divided into two types: passive and active. Among them, passive EMI filters are composed of passive devices such as inductors and capacitors, which can suppress electromagnetic interference, but their size is large and it is difficult to adapt to the needs of high power density. Active EMI filters detect the electromagnetic interference voltage or current generated by the power electronic converter, amplify it through an operational amplifier, and then inject it into the system through an injection circuit, thereby effectively reducing the size, but the bandwidth requirements for active devices are high, and the cost is high. It also requires an additional isolated power supply.

[0004] In the prior art, with the rise of digital control technology, digital active EMI filtering technology is obtained by combining digital control with active EMI filters, such as Fig.12 As shown in the figure, its core principle is the same as the traditional active EMI filtering technology, except that the active devices are replaced by digital controllers, an analog-to-digital converter (ADC) is added to the detection loop, and a digital-to-analog converter (DAC) is added to the injection loop, thereby reducing costs and reducing volume. However, in the above digital active EMI filtering technology, the ADC in the detection loop and the DAC in the injection loop still require a relatively high cost, and after the two digital-to-analog and analog-to-digital conversion processes of the ADC and DAC, the system will have a certain delay, which will affect the EMI suppression effect.

[0005] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present disclosure, and therefore may include information that does not constitute the prior art known to ordinary technicians in the field. Summary of the invention

[0006] In response to the above problems, the present application provides a digital active EMI filtering method and circuit based on square wave analytical reconstruction, which can eliminate delays while reducing costs and volume.

[0007] To achieve the purpose of this application, this application provides the following technical solutions:

[0008] In a first aspect, the present application provides a digital active EMI filtering method based on square wave analytical reconstruction, comprising:

[0009] Acquire the common-mode noise source waveform data of the buck circuit under test; wherein the common-mode noise source waveform data is the time domain waveform data points of the drain-source voltage of the lower tube of the bridge arm of the buck circuit;

[0010] Determine compensation capacitance parameters according to the compensation circuit equivalent model, and generate compensation voltage data that is proportionally reduced from the common mode noise source waveform data;

[0011] Through a synchronous control mechanism, pulse width modulation (PWM) and the compensation voltage data are synchronously output and injected into the ground line;

[0012] The delay between PWM and DAC is measured, and the compensation voltage data is reconstructed to perform delay compensation.

[0013] In a possible implementation, the step of obtaining the common-mode noise source waveform data of the Buck circuit includes:

[0014] The drain-source voltage of the lower tube of the Buck circuit bridge arm is used as the common-mode noise source;

[0015] Obtain the drain-source voltage of the lower tube of the bridge arm of the Buck circuit by mathematical modeling;

[0016] The drain-source voltage of the lower tube of the bridge arm of the Buck circuit is equivalent to a trapezoidal wave, and a first formula is established to obtain the rise time, fall time, switching period and duty cycle of the time domain waveform data of the drain-source voltage of the lower tube of the bridge arm of the Buck circuit; the first formula includes: a rising stage, a flat-top stage, a falling stage and a shut-off stage;

[0017] According to the rise time, fall time, switching period and duty cycle, the time domain waveform data points of the drain-source voltage of the lower tube of the Buck circuit bridge arm are obtained.

[0018] In a possible implementation, the first formula is:

[0019] ;

[0020] in, is the drain-source voltage of the lower tube of the Buck circuit bridge arm, is the input voltage of the Buck circuit, is the voltage rise time, is the voltage drop time, is the duty cycle, is the switching cycle, For time.

[0021] In a possible implementation, the step of determining compensation capacitance parameters according to the compensation circuit equivalent model and generating compensation voltage data proportionally reduced from the common mode noise source waveform data includes:

[0022] Constructing an equivalent model of the compensation circuit including a noise source, a compensation capacitor, a parasitic capacitor and a linear impedance stabilization network (LISN) to ground branch;

[0023] According to the compensation circuit equivalent model, the relationship between the equivalent model compensation voltage and the equivalent model noise source voltage is obtained by adopting the superposition cancellation principle, and a second formula is constructed;

[0024] Increase the equivalent model compensation capacitance according to the second formula, reduce the equivalent model compensation voltage to the output range of the DAC, and obtain the proportionality coefficient and the compensation capacitance parameter;

[0025] The waveform data of the drain-source voltage of the lower tube of the bridge arm of the Buck circuit is reduced according to the proportional coefficient to obtain the compensation voltage data, and the data is stored in the digital controller.

[0026] In a possible implementation, the second formula is:

[0027] ;

[0028] in, is the equivalent model compensation voltage, is the noise source voltage, is the parasitic capacitance, For the compensation capacitor, is the proportionality coefficient.

[0029] In a possible implementation, the step of obtaining the relationship between the equivalent model compensation voltage and the equivalent model noise source voltage by using the superposition cancellation principle according to the compensation circuit equivalent model and constructing the second formula includes:

[0030] According to the compensation circuit equivalent model, the relationship between the equivalent model compensation voltage and the equivalent model noise source voltage is derived using the superposition cancellation principle to obtain a third formula; the third formula is:

[0031] ;

[0032] in, is the equivalent model parasitic capacitance impedance, is the equivalent model LISN ground branch impedance, To compensate for the capacitance impedance;

[0033] The second formula is obtained by simplifying the third formula.

[0034] In a possible implementation, the step of synchronously outputting PWM and the compensation voltage data through a synchronous control mechanism and injecting the data into the ground line includes:

[0035] The compensation voltage data is stored as an array, the length of which corresponds to the number of sampling points of the switching cycle, to obtain a compensation voltage array;

[0036] Outputting the compensation voltage array directly from the memory to the DAC via direct memory access, with the output frequency being the same as the timer frequency;

[0037] Interrupting the PWM so that when each PWM starts, the starting point of the compensation voltage array output by the DAC is synchronized with the starting point of the PWM;

[0038] The compensation voltage is injected into the ground line through the compensation capacitor by the DAC.

[0039] In a possible implementation, the step of interrupting the PWM so that when each PWM starts, the starting point of the DAC outputting the compensation voltage array is synchronized with the starting point of the PWM includes:

[0040] Setting the interrupt condition to reaching the starting point of the PWM cycle;

[0041] When an interrupt is performed, the output index of the compensation voltage array is reset to 0;

[0042] The compensation voltage and the PWM are outputted in synchronization with a starting point.

[0043] In a possible implementation, the step of measuring the delay between PWM and DAC and reconstructing the compensation voltage data to compensate for the delay includes:

[0044] Actually testing and outputting the time difference between the compensation voltage and the PWM;

[0045] The first n data corresponding to the time difference in the compensation voltage array are moved to the end of the array.

[0046] In a second aspect, the present application further provides a digital active EMI filter circuit based on square wave analytical reconstruction, which is used to perform the above-mentioned digital active EMI filter method based on square wave analytical reconstruction, wherein the circuit includes an injection circuit and a digital control circuit;

[0047] The digital control circuit is connected to the EUT through an injection circuit, and includes a digital controller and a DAC connected to each other; the digital controller is used to drive the switch tube, and is used to store the compensation voltage data proportionally reduced by the common mode noise source waveform data, and is used to reconstruct the compensation voltage data for delay compensation, and is used to control PWM and the DAC output synchronization; the DAC is used to analog output the compensation voltage data;

[0048] The injection circuit includes a compensation capacitor, which is used to inject the compensation voltage data output synchronously with PWM into the ground line.

[0049] The technical solution provided by this application may have the following beneficial effects:

[0050] The digital active EMI filtering method and circuit based on square wave analysis and reconstruction provided by the present application can save two detection capacitors and ADC in the traditional digital active EMI filter, as well as the resistors in the injection loop and each injection capacitor, thereby reducing the cost and the volume; at the same time, no detection link is required, and delay is eliminated by reconstructing data.

[0051] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation of the present invention. Obviously, the accompanying drawings described below are only some embodiments of the present disclosure. For those of ordinary skill in the art, other accompanying drawings can be obtained based on these accompanying drawings without creative work.

[0053] Figure 1 A flowchart of a digital active EMI filtering method based on square wave analysis and reconstruction provided in an embodiment of the present application;

[0054] Figure 2 A flowchart of step S100 of a digital active EMI filtering method based on square wave analytical reconstruction provided in an embodiment of the present application;

[0055] Figure 3 A flowchart of step S200 of a digital active EMI filtering method based on square wave analytical reconstruction provided in an embodiment of the present application;

[0056] Figure 4 A flowchart of step S300 of a digital active EMI filtering method based on square wave analytical reconstruction provided in an embodiment of the present application;

[0057] Figure 5 A flowchart of step S400 of a digital active EMI filtering method based on square wave analytical reconstruction provided in an embodiment of the present application;

[0058] Figure 6 A logic diagram of a digital active EMI filtering method based on square wave analytical reconstruction provided in an embodiment of the present application;

[0059] Figure 7 A schematic diagram of an equivalent model of a compensation circuit of a digital active EMI filtering method based on square wave analytical reconstruction provided in an embodiment of the present application;

[0060] Figure 8 A PWM interrupt logic diagram of a digital active EMI filtering method based on square wave analytical reconstruction provided in an embodiment of the present application;

[0061] Fig. 9 A schematic diagram of compensation voltage data reconstruction of a digital active EMI filtering method based on square wave analytical reconstruction provided in an embodiment of the present application;

[0062] Fig.10 A simulation spectrum effect diagram of a digital active EMI filtering method based on square wave analytical reconstruction provided in an embodiment of the present application;

[0063] Fig.11 A schematic diagram of the structure of a digital active EMI filter circuit based on square wave analysis and reconstruction provided in an embodiment of the present application;

[0064] Fig.12 This is a schematic diagram of the circuit structure of the existing digital active EMI filtering technology in the background technology of this application. DETAILED DESCRIPTION

[0065] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in a variety of forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that the disclosure will be more comprehensive and complete and to fully convey the concepts of the example embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

[0066] In this example implementation, a digital active EMI filtering method based on square wave analytical reconstruction for dynamic interference power management under conditions of sparse feedback and missing observation is first provided. Figure 1 As shown in , the digital active EMI filtering method based on square wave analytical reconstruction may include the following steps:

[0067] Step S100: Acquire common-mode noise source waveform data of a Buck circuit; wherein the common-mode noise source waveform data is a time-domain waveform data point of a drain-source voltage of a lower tube of a bridge arm of the Buck circuit.

[0068] Step S200: determining compensation capacitance parameters according to the compensation circuit equivalent model, and generating compensation voltage data that is geometrically reduced from the common mode noise source waveform data.

[0069] Step S300: synchronously outputting PWM and the compensation voltage data through a synchronous control mechanism and injecting them into the ground line.

[0070] Step S400: measuring the delay between PWM and DAC, and reconstructing compensation voltage data to perform delay compensation.

[0071] The digital active EMI filtering method based on square wave analysis and reconstruction can achieve better EMI suppression effect based on fewer circuit links, lower cost, smaller volume and shorter delay. The method is simulated in Simulink, and the simulation spectrum results are as follows: Fig.10 As shown, it can be seen that this method can achieve 20-30dB EMI attenuation in the full frequency band.

[0072] Next, we will refer to Figures 2 to 6 Each step of the digital active EMI filtering method based on square wave analytical reconstruction in this example implementation is described in more detail.

[0073] In step S100, the common-mode noise source waveform data of the Buck circuit is obtained; wherein the common-mode noise source waveform data includes a rise time, a fall time, a switching period and a duty cycle.

[0074] It should be noted that the noise source is located first. Through modeling analysis, it can be known that the common-mode noise source of the Buck circuit is the voltage across the drain and source of the lower tube. , that is, the drain-source voltage of the lower tube of the Buck circuit bridge arm.

[0075] In a possible implementation, step S100 may further include the following sub-steps:

[0076] In step S110, the drain-source voltage of the lower tube of the Buck circuit bridge arm is used as a common mode noise source.

[0077] In step S120, the drain-source voltage of the lower tube of the bridge arm of the Buck circuit is obtained by mathematical modeling.

[0078] In step S130, the drain-source voltage of the lower tube of the bridge arm of the Buck circuit is equivalent to a trapezoidal wave, and a first formula is established to obtain the rise time, fall time, switching period and duty cycle of the time domain waveform of the drain-source voltage of the lower tube of the bridge arm of the Buck circuit; the first formula includes: a rising stage, a flat-top stage, a falling stage and a shutdown stage.

[0079] In step S140, the time domain waveform data points of the drain-source voltage of the lower tube of the bridge arm of the Buck circuit are obtained according to the rise time, the fall time, the switching period and the duty cycle.

[0080] Optionally, the method for obtaining the waveform data of the drain-source voltage of the lower tube of the bridge arm of the Buck circuit can also be: simulation method: simulating the circuit in simulation software and storing Waveform data; Experimental test method: In the actual experiment, when the converter works in a steady state, an oscilloscope is used to measure the waveform of the lower tube waveform and store the data.

[0081] Furthermore, the first formula is:

[0082] ;

[0083] in, is the drain-source voltage of the lower tube of the Buck circuit bridge arm, is the input voltage of the Buck circuit, is the voltage rise time, is the voltage drop time, is the duty cycle, is the switching cycle, For time.

[0084] It should be noted that in the first formula, It is the rising stage, indicating that the voltage rises linearly to ; It is the flat top stage, indicating that the voltage is maintained ; It is the descending stage, indicating that the voltage drops linearly to 0V; It is the shutdown stage, indicating that the voltage is maintained at 0V.

[0085] In step S200, compensation capacitor parameters are determined according to the compensation circuit equivalent model, and compensation voltage data is generated by scaling down the common mode noise source waveform data.

[0086] It should be noted that the compensation circuit equivalent model can be expressed as Figure 7As shown in the figure, by abstracting the noise source, compensation capacitor, parasitic capacitor and LISN ground branch in the actual circuit into a mathematical model, a simplified framework is provided for theoretical analysis, which helps to derive the proportional relationship between the compensation voltage and the noise source, thereby determining the compensation capacitor parameters and verifying the compensation effect, avoiding complex actual circuit debugging.

[0087] In a possible implementation, step S200 may further include the following sub-steps:

[0088] In step S210, a noise source is constructed. , compensation capacitor , parasitic capacitance LISN to ground branch Equivalent model of the compensation circuit.

[0089] In step S220, according to the compensation circuit equivalent model, the relationship between the equivalent model compensation voltage and the equivalent model noise source voltage is obtained by adopting the superposition cancellation principle, and a second formula is constructed.

[0090] In step S230, the equivalent model compensation capacitance is increased according to the second formula, the equivalent model compensation voltage is reduced to the output range of the DAC, and the proportionality coefficient and the compensation capacitance parameter are obtained.

[0091] In step S240, the waveform data of the drain-source voltage of the lower tube of the bridge arm of the Buck circuit is reduced according to the proportional coefficient to obtain the compensation voltage data, and the data is stored in the digital controller.

[0092] It should be noted that the compensation voltage data is obtained by reducing the waveform data of the drain-source voltage of the lower tube of the bridge arm of the Buck circuit according to the proportional coefficient, which can be expressed as , the obtained compensation voltage can be stored in the digital controller by means of a lookup table.

[0093] Furthermore, the second formula is:

[0094] ;

[0095] in, is the equivalent model compensation voltage, is the noise source voltage, is the parasitic capacitance, For the compensation capacitor, is the proportionality coefficient.

[0096] It is understandable that by increasing This reduces the compensation voltage amplitude to ensure it is within the output range of the DAC.

[0097] It should be noted that, according to the compensation circuit equivalent model, the relationship between the equivalent model compensation voltage and the equivalent model noise source voltage is derived using the superposition cancellation principle to obtain a third formula; the third formula is:

[0098] ;

[0099] in, is the equivalent model parasitic capacitance impedance, is the equivalent model LISN ground branch impedance, To compensate for the capacitor impedance.

[0100] The second formula is obtained by simplifying the third formula.

[0101] It can be understood that the superposition cancellation principle means that in the circuit, by injecting a compensation voltage with equal amplitude and opposite phase to the noise source voltage, the two are superimposed at a specific node (such as the LISN port) to cancel each other out, thereby eliminating common-mode noise.

[0102] In step S300, the PWM and the compensation voltage data are synchronously output and injected into the ground line through a synchronous control mechanism.

[0103] It should be noted that the PWM and the compensation voltage data are output synchronously.

[0104] In a possible implementation, step S300 may include the following sub-steps:

[0105] In step S310, the compensation voltage data is stored as an array, the length of which corresponds to the number of sampling points of the switching cycle, to obtain a compensation voltage array.

[0106] It should be noted that the compensation voltage data can be stored as an array or a data table, and the system can be initialized, including: configuring the digital controller peripherals: initializing the clock, GPIO pins and other basic functions. Configure the PWM module (which can be an enhanced pulse width modulation ePWM module), set the switching frequency and duty cycle; initialize the DAC: set the reference voltage and output range of the DAC, and configure the trigger mode of the DAC. At the same time, when storing the compensation voltage data as an array, the compensation voltage data can be discretized into a digital signal, and the data can be stored as an array according to the number of sampling points of the switching cycle. The length of the array is equal to the number of sampling points of the switching cycle, ensuring that each PWM cycle outputs a complete compensation voltage waveform.

[0107] In step S320 , the compensation voltage array is directly output from the memory to the DAC via direct memory access (DMA), and the output frequency is the same as the timer frequency.

[0108] It should be noted that the DMA function is enabled to transfer the compensation voltage array directly from the memory to the DAC, and the DMA transfer frequency is set to be consistent with the timer frequency to ensure accurate output of each sampling point. The index of the compensation voltage array is strictly aligned with the PWM cycle to ensure that the first data point is output at the start of each switching cycle.

[0109] In step S330, the PWM is interrupted so that when each PWM starts, the starting point of the DAC outputting the compensation voltage array is synchronized with the starting point of the PWM.

[0110] It should be noted that the interruption of the PWM may be to trigger an interruption using a rising edge of the PWM, reset the array index to 0 in the interrupt service program, start the timer, and ensure synchronization of the starting point of each switching cycle.

[0111] In step S340, the compensation voltage is injected into the ground line through the compensation capacitor by the DAC.

[0112] It can be understood that the compensation capacitor is used to ensure that the compensation voltage amplitude adapts to the DAC output range. The compensation voltage data stored in the digital controller is converted into an analog voltage signal by the DAC. The compensation voltage and common-mode noise are superimposed between the PE line and the ground with opposite phases to achieve noise cancellation.

[0113] Optionally, step S330 may include the following sub-steps:

[0114] In step S331, the interrupt condition is set to reach the starting point of the PWM cycle.

[0115] In step S332, when an interrupt is performed, the output index of the compensation voltage array is reset to 0.

[0116] In step S333, the compensation voltage and the PWM synchronized with the starting point are output.

[0117] It should be noted that if Figure 8 As shown in FIG. 1 , it is a logic diagram of PWM interruption. After the interruption is triggered, the output compensation voltage array sequence number is reset, the timer is started, and the interruption flag is cleared, so that the starting point of the compensation voltage array is output synchronously with the starting point of PWM.

[0118] In step S400, the delay between PWM and DAC is measured, and compensation voltage data is reconstructed to perform delay compensation.

[0119] It should be noted that the time difference between the PWM signal and the DAC output compensation voltage can be measured by ; Move the first n data in the compensation voltage array to the end of the array to advance the compensation voltage phase , aligned with the noise source, such as Fig. 9 At the same time, the delay change can be monitored in real time and the data sequence can be automatically updated through the software algorithm to ensure the stability of the compensation effect.

[0120] Furthermore, the step S400 may include the following sub-steps:

[0121] In step S410, the time difference between the compensation voltage and the PWM is actually tested and outputted.

[0122] In step S420, the first n data corresponding to the time difference in the compensation voltage array are moved to the end of the array.

[0123] Furthermore, in this exemplary embodiment, a digital active EMI filter circuit based on square wave analytical reconstruction is also provided, which is used to perform the above-mentioned digital active EMI filter method based on square wave analytical reconstruction. Fig.11 As shown in , the circuit may include a LISN, an injection circuit and a digital control circuit.

[0124] The LISN is connected to the step-down circuit under test and is connected to the digital control circuit through the injection circuit, and is used to provide a stable impedance environment for electromagnetic interference measurement so that the impedance seen from the power supply end is constant.

[0125] The digital control circuit includes a digital controller and a DAC connected to each other; the digital controller is used to obtain common-mode noise source waveform data, and to store compensation voltage data proportionally reduced from the common-mode noise source waveform data, and to reconstruct the compensation voltage data for delay compensation, and to control PWM and the DAC output synchronization; the DAC is used to perform analog output of the compensation voltage data.

[0126] The injection circuit includes a compensation capacitor, which is used to inject the compensation voltage data output synchronously with PWM into the ground line.

[0127] It should be noted that the compensation voltage data is calculated in advance and stored in the digital controller, such as Fig.11 As shown, the LISN includes a power supply ,resistance ,inductance ,capacitance , and resistance , providing a stable impedance environment for EMI measurement, ensuring that the impedance seen from the power supply end is constant, and ensuring the repeatability and accuracy of EMI measurement. , , The Buck circuit under test includes: switch tube and , Switching tube parasitic capacitance , , Node switch , Connect inductor , output capacitor ,load , output common mode capacitance and , parasitic capacitance and drive ; control and Alternate conduction to achieve the voltage reduction function. Connect the switch node to the protective ground wire; when the switch tube is turned on or off, The point voltage changes at high frequency, through It couples common-mode noise current to the protection ground line and becomes an EMI source.

[0128] The overall working principle of the circuit is that LISN provides a stable basis for EMI measurement. The Buck circuit generates common-mode noise when working. The digital control circuit injects compensation signals through DAC and compensation capacitors, and uses currents with opposite phases to offset the noise, thereby reducing the system EMI radiation and achieving electromagnetic compatibility.

[0129] Those skilled in the art will readily appreciate other embodiments of the present disclosure after considering the specification and practicing the invention disclosed herein. This application is intended to cover any modification, use or adaptation of the present disclosure, which follows the general principles of the present disclosure and includes common knowledge or customary techniques in the art that are not disclosed in the present disclosure. The specification and examples are intended to be exemplary only, and the true scope and spirit of the present disclosure are indicated by the appended claims.

[0130] The above embodiments are only used to illustrate the technical solution of the present application, but not to limit it. The present application is not limited to the exact structure described above and illustrated in the accompanying drawings, and it cannot be determined that the specific implementation of the present application is limited to these descriptions. For ordinary technicians in the technical field to which the present application belongs, various changes and modifications made without departing from the concept of the present application should be deemed to belong to the protection scope of the present application.

Claims

1. A digital active EMI filtering method based on square wave analytical reconstruction, characterized in that: include: Acquire common-mode noise source waveform data of a Buck circuit; wherein the common-mode noise source waveform data is a time-domain waveform data point of the drain-source voltage of the lower tube of the bridge arm of the Buck circuit; Determine compensation capacitance parameters according to the compensation circuit equivalent model, and generate compensation voltage data that is proportionally reduced from the common mode noise source waveform data; Through a synchronous control mechanism, PWM and the compensation voltage data are synchronously output and injected into the ground line; The delay between PWM and DAC is measured, and the compensation voltage data is reconstructed to perform delay compensation.

2. The digital active EMI filtering method based on square wave analytical reconstruction according to claim 1 is characterized in that: The step of obtaining the common mode noise source waveform data of the Buck circuit includes: The drain-source voltage of the lower tube of the Buck circuit bridge arm is used as the common-mode noise source; Obtain the drain-source voltage of the lower tube of the bridge arm of the Buck circuit by mathematical modeling; The drain-source voltage of the lower tube of the bridge arm of the Buck circuit is equivalent to a trapezoidal wave, and a first formula is established to obtain the rise time, fall time, switching period and duty cycle of the time domain waveform of the drain-source voltage of the lower tube of the bridge arm of the Buck circuit; the first formula includes: a rising stage, a flat-top stage, a falling stage and a shut-off stage; According to the rise time, fall time, switching period and duty cycle, the time domain waveform data points of the drain-source voltage of the lower tube of the Buck circuit bridge arm are obtained.

3. The digital active EMI filtering method based on square wave analytical reconstruction according to claim 2 is characterized in that: The first formula is: ； in, is the drain-source voltage of the lower tube of the Buck circuit bridge arm, is the input voltage of the Buck circuit, is the voltage rise time, is the voltage drop time, is the duty cycle, is the switching cycle, For time.

4. The digital active EMI filtering method based on square wave analytical reconstruction according to claim 1 is characterized in that: The step of determining compensation capacitance parameters according to the compensation circuit equivalent model and generating compensation voltage data proportionally reduced from the common mode noise source waveform data comprises: Constructing an equivalent model of the compensation circuit including a noise source, a compensation capacitor, a parasitic capacitor and a LISN-to-ground branch; According to the compensation circuit equivalent model, the relationship between the equivalent model compensation voltage and the equivalent model noise source voltage is obtained by adopting the superposition cancellation principle, and a second formula is constructed; Increase the equivalent model compensation capacitance according to the second formula, reduce the equivalent model compensation voltage to the output range of the DAC, and obtain the proportionality coefficient and the compensation capacitance parameter; The waveform data of the drain-source voltage of the lower tube of the bridge arm of the Buck circuit is reduced according to the proportional coefficient to obtain the compensation voltage data, and the data is stored in the digital controller.

5. The digital active EMI filtering method based on square wave analytical reconstruction according to claim 4 is characterized in that: The second formula is: ； in, is the equivalent model compensation voltage, is the noise source voltage, is the parasitic capacitance, For the compensation capacitor, is the proportionality coefficient.

6. The digital active EMI filtering method based on square wave analytical reconstruction according to claim 5 is characterized in that: The step of obtaining the relationship between the equivalent model compensation voltage and the equivalent model noise source voltage by using the superposition cancellation principle according to the compensation circuit equivalent model and constructing the second formula includes: According to the compensation circuit equivalent model, the relationship between the equivalent model compensation voltage and the equivalent model noise source voltage is derived using the superposition cancellation principle to obtain a third formula; the third formula is: ； in, is the equivalent model parasitic capacitance impedance, is the equivalent model LISN ground branch impedance, To compensate for the capacitance impedance; The second formula is obtained by simplifying the third formula.

7. The digital active EMI filtering method based on square wave analytical reconstruction according to claim 2 is characterized in that: The step of synchronously outputting PWM and the compensation voltage data through a synchronous control mechanism and injecting the data into the ground line comprises: The compensation voltage data is stored as an array, the length of which corresponds to the number of sampling points of the switching cycle, to obtain a compensation voltage array; Outputting the compensation voltage array directly from the memory to the DAC via direct memory access, with the output frequency being the same as the timer frequency; Interrupting the PWM so that when each PWM starts, the starting point of the compensation voltage array output by the DAC is synchronized with the starting point of the PWM; The compensation voltage is injected into the ground line through the compensation capacitor by the DAC.

8. The digital active EMI filtering method based on square wave analytical reconstruction according to claim 7 is characterized in that: The step of interrupting the PWM so that when each PWM starts, the starting point of the DAC outputting the compensation voltage array is synchronized with the starting point of the PWM comprises: Setting the interrupt condition to reaching the starting point of the PWM cycle; When an interrupt is performed, the output index of the compensation voltage array is reset to 0; The compensation voltage and the PWM are outputted in synchronization with a starting point.

9. The digital active EMI filtering method based on square wave analytical reconstruction according to claim 1 is characterized in that: The step of measuring the delay between PWM and DAC and reconstructing the compensation voltage data to compensate for the delay includes: Actually testing and outputting the time difference between the compensation voltage and the PWM; The first n data corresponding to the time difference in the compensation voltage array are moved to the end of the array.

10. A digital active EMI filter circuit based on square wave analytical reconstruction, characterized in that: The circuit is used to perform the digital active EMI filtering method based on square wave analytical reconstruction as described in any one of claims 1 to 9, and the circuit includes an injection circuit and a digital control circuit; The digital control circuit is connected to the EUT via an injection circuit, and includes a digital controller and a DAC connected to each other; The digital controller is used to drive the switch tube, and is used to store the compensation voltage data proportionally reduced by the common mode noise source waveform data, and is used to reconstruct the compensation voltage data for delay compensation, and is used to control PWM and the DAC output synchronization; The DAC is used to perform analog output of the compensation voltage data; The injection circuit includes a compensation capacitor, which is used to inject the compensation voltage data output synchronously with PWM into the ground line.

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