Semiconductor integrated circuit for monitoring battery voltage and electronic circuit system

Abstract

The invention provides a semiconductor integrated circuit for battery voltage monitoring and an electronic circuit system, which can perform stable monitoring through a microcomputer and accurately grasp the battery voltage. A battery voltage monitoring semiconductor integrated circuit includes: a voltage input terminal (VIN) to which a voltage from a battery to be monitored is input; voltage division circuits (R1, R2) having a series resistor for dividing the voltage of the voltage input terminal; and an output terminal for outputting a voltage corresponding to the voltage divided by the voltage division circuit, the battery voltage monitoring semiconductor integrated circuit comprising: a voltage buffer circuit (51) connected between a connection node (N1) of the series resistor and the output terminal; and a clamp circuit (52) that clamps the potential of the connection node of the series resistor.

Description

Technical Field

[0001] The present invention relates to a battery voltage monitoring semiconductor integrated circuit that generates and outputs a voltage for monitoring a battery voltage in an electronic circuit system having an LSI (large scale semiconductor integrated circuit) that operates using a voltage from a battery as a power source, and an electronic circuit system using the battery voltage monitoring semiconductor integrated circuit. Background Art

[0002] In recent years, automobiles are equipped with electronic devices such as car audio and navigation devices, and electronic circuit systems having microcomputers (MCUs) that control them. These electronic devices and electronic circuit systems are supplied with a voltage obtained by stepping down the voltage from a battery using a DC-DC comparator or the like as a power supply voltage.

[0003] However, the voltage of the battery for automobiles is unstable. If the battery voltage drops during operation, the system may malfunction or lose control. Therefore, when the power supply voltage is monitored and drops below a predetermined level, the microcomputer needs to know the situation immediately. In addition, the voltage of the battery used for the vehicle-mounted system is 12V to 18V, and the voltage is stepped down to 3.3V, for example, by a DC-DC comparator and supplied to the microcomputer.

[0004] Conventionally, there is a technique for resetting a microcomputer by using a reset IC that generates a reset signal when the power supply voltage is monitored and drops below a predetermined level. Patent document 1 discloses an invention related to such a reset IC and a system that detects a drop in battery voltage and resets the microcomputer using the reset IC.

[0005] There is also a method of monitoring the battery voltage by a microcomputer. In this case, a configuration is adopted in which a microcomputer having a built-in AD converter is used and a voltage obtained by dividing the battery voltage using a series resistor is input to an I / O port for the built-in AD converter.

[0006] There is also an invention relating to a semiconductor integrated circuit having a function of monitoring the state of a battery voltage in place of a microcomputer (for example, Patent Document 2).

[0007] The reset IC described in Patent Document 1 is an IC that generates a reset signal by detecting a drop in battery voltage or overvoltage by comparing the voltage obtained by dividing the power supply voltage (battery voltage) of the monitored object by a series resistor with a reference voltage through a comparator. Since it is a method of applying a reset to a microcomputer, instantaneous monitoring is possible, but there is a problem that stable battery voltage monitoring cannot be performed.

[0008] In addition, in the case of a battery for an automobile, the battery may be disconnected due to, for example, a wire falling off due to vibration of the vehicle body, and the battery voltage may rise sharply due to a phenomenon called load dump, thereby causing an overvoltage state. Therefore, in the case of a technology for monitoring the battery voltage by a microcomputer, if the voltage divided by a series resistor is input to the I / O port for the AD converter, there is a problem that the components of the I / O port of the microcomputer may be damaged due to the overvoltage accompanying the rapid rise in the battery voltage.

[0009] Patent Document 1: Japanese Patent Application Publication No. 2022-129021

[0010] Patent Document 2: International Publication No. 2010 / 074290 Summary of the invention

[0011] The present invention has been made in view of the above-mentioned problems, and an object of the present invention is to provide a semiconductor integrated circuit for monitoring battery voltage which can monitor the battery voltage stably and accurately by a microcomputer, and an electronic circuit system using the semiconductor integrated circuit for monitoring battery voltage.

[0012] Another object of the present invention is to provide a semiconductor integrated circuit for monitoring battery voltage that can prevent damage to components of an I / O port of a microcomputer when the battery voltage rises suddenly, and an electronic circuit system using the semiconductor integrated circuit for monitoring battery voltage.

[0013] In order to achieve the above-mentioned object, the present invention provides a semiconductor integrated circuit for monitoring battery voltage, comprising: a voltage input terminal to which a voltage from a battery to be monitored is input; a voltage dividing circuit having a series resistor for dividing the voltage of the voltage input terminal; and an output terminal for outputting a voltage corresponding to the voltage divided by the voltage dividing circuit.

[0014] The battery voltage monitoring semiconductor integrated circuit comprises:

[0015] a voltage buffer circuit connected between a connection node of the series resistors and the output terminal; and

[0016] A clamp circuit clamps the potential of a connection node of the series resistors.

[0017] According to the semiconductor integrated circuit for monitoring battery voltage having the above-mentioned structure, a voltage proportional to the battery voltage input to the voltage input terminal is output from the voltage buffer circuit, so that the battery voltage can be stably monitored by the microcomputer and can be monitored with good accuracy. In addition, since the clamp circuit is provided, the voltage output from the voltage buffer circuit can be suppressed even if the battery voltage rises sharply, so when a system is configured in which the output voltage of the voltage buffer circuit is input to the microcomputer, damage to the elements of the I / O port of the microcomputer can be prevented.

[0018] According to the present invention, a battery voltage monitoring semiconductor integrated circuit (hereinafter referred to as a battery voltage monitoring IC) capable of stably monitoring a battery voltage with good accuracy by a microcomputer and an electronic circuit system using the battery voltage monitoring semiconductor integrated circuit can be realized. In addition, the present invention has the following effect: when the battery voltage rises sharply, it is possible to prevent the components of the I / O port of the microcomputer from being damaged. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 This is a circuit configuration diagram showing an embodiment of a battery voltage monitoring IC to which the present invention is applied and an example of a preferred system using the battery voltage monitoring IC.

[0020] Figure 2 This is a circuit configuration diagram showing an embodiment of a battery voltage monitoring IC according to the present invention.

[0021] Figure 3 1 is a circuit configuration diagram showing a specific example of a buffer circuit constituting the battery voltage monitoring IC according to the embodiment.

[0022] Figure 4 This is a circuit diagram showing a specific example of a clamp circuit constituting the battery voltage monitoring IC according to the embodiment.

[0023] Figure 5 (A) is a graph showing the relationship between the battery voltage of the monitoring target and the output voltage divided into 1 / 6 as an example when no clamp circuit is provided in the battery voltage monitoring IC of the embodiment. Figure 5 (B) is a graph showing the relationship between the battery voltage and the output voltage divided into 1 / 6 in the battery voltage monitoring IC according to the embodiment provided with the clamp circuit.

[0024] Figure 6 This is a circuit diagram showing a configuration example of a conventional general battery voltage monitoring circuit.

[0025] Figure 7 This is a circuit diagram showing a specific example of an internal voltage generating circuit in a case where an internal voltage generating circuit is provided as a modification of the battery voltage monitoring IC of the embodiment.

[0026] Figure 8 (A) Figure 8 (B) is a circuit configuration diagram showing a modified example of the battery voltage monitoring IC according to the embodiment. DETAILED DESCRIPTION

[0027] Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

[0028] Figure 1 FIG. 2 shows an example of a system suitable for using the battery voltage monitoring IC to which the present invention is applied. Figure 1 As shown, regarding this system, a DC voltage VBAT of 12V to 18V from a battery 11 is stepped down to a low voltage such as 3.3V by a DC voltage conversion circuit 12 such as a DC-DC comparator or a regulator (LDO), and is supplied to a semiconductor device 14 such as a microcomputer (MCU) 13 or a SoC (system on chip) installed on a vehicle-mounted control substrate.

[0029] In addition, Figure 1 In the system shown, a microcomputer with a built-in AD converter (ADC) is used as the microcomputer 13, and a battery voltage monitoring IC 15 of the present invention is provided to monitor the battery voltage VBAT, and an output voltage Vout obtained by dividing the input voltage VIN of the battery voltage monitoring IC 15 into 1 / n is input to the ADC input terminal I / O (ADC) of the microcomputer 13. Furthermore, when the battery voltage VBAT drops below a predetermined level or becomes an overvoltage, the microcomputer 13 detects this and generates a reset signal RST, which is output to the semiconductor device 14.

[0030] Furthermore, the microcomputer 13 is configured to generate and output a control signal or a set voltage to the battery voltage monitoring IC 15 .

[0031] Figure 2 A circuit configuration of one embodiment of the battery voltage monitoring IC 15 is shown.

[0032] like Figure 2 As shown, the battery voltage monitoring IC 15 of this embodiment includes: a voltage input terminal VIN and a ground terminal GND to which a DC voltage VBAT from a battery 11 is input, a switch element SW and series resistors R1 and R2 for voltage division connected in series between these terminals, and an external terminal CE for inputting an enable signal for controlling the on / off of the switch element SW from the outside. In addition, in this embodiment, although not particularly limited, it is configured to turn on / off the switch element SW by inverting the signal input to the external terminal CE using an inverter INV.

[0033] In addition, the battery voltage monitoring IC 15 includes: a voltage buffer circuit 51 composed of a voltage follower or the like, whose input terminal is connected to the connection node N1 of the voltage-dividing resistors R1 and R2; a voltage output terminal OUT for outputting the output voltage Vout of the voltage buffer circuit 51 to the outside; a clamp circuit 52 for clamping the potential of the connection node N1 of the voltage-dividing resistors R1 and R2; and an external terminal VIO to which the set voltage V_I / O input to the clamp circuit 52 is input. In addition, the set voltage V_I / O is set by the microcomputer 13 or the like to an arbitrary potential corresponding to the system to be applied.

[0034] Figure 3 A specific circuit example of the voltage buffer circuit 51 constituting the battery voltage monitoring IC 15 of the present embodiment is shown.

[0035] like Figure 3 As shown in FIG. 1 , the voltage buffer circuit 51 in this embodiment has an input stage 51A, which is composed of a pair of differential input PMOS transistors M1 and M2, current mirror NMOS transistors M3 and M4 connected between the drain terminals of the transistors M1 and M2 and the ground point, and a constant current resistor R3 connected between the connection node N0 of the switch element SW and the resistor R1 and the common source terminal of the differential input PMOS transistors M1 and M2. And the voltage V1 of the connection node N1 of the resistors R1 and R2 for voltage division is input to the gate terminal of the transistor M1. In addition, instead of the resistor R3, for example, a constant current source using a constant voltage source and a current mirror circuit can be used.

[0036] The voltage buffer circuit 51 includes an output stage 51B including a resistor R4 and an NMOS transistor M5 connected in series between a connection node N0 of the switch element SW and the resistor R1 and a ground point, and an NMOS transistor M6 and the resistor R5 connected via a source follower from R4 and M5. The potential of the connection node N2 of the transistors M1 and M3 of the input stage 51A is applied to the gate terminal of the transistor M5. In addition, a constant current source may be used instead of the resistor R4, as in the case of the resistor R3.

[0037] In addition, the gate terminal of the transistor M6 of the output stage 51B is connected to the connection node N3 of the resistor R4 and the transistor M5, the connection node N4 of the transistor M6 and the resistor R5 is connected to the output terminal OUT, and the potential of the connection node N4 is applied to the gate terminal of the differential input transistor M2 of the input stage 51A. The voltage buffer circuit 51 has the same structure and the same function as a general differential amplifier circuit, and therefore, a detailed description of the operation is omitted.

[0038] As described above, the battery voltage monitoring IC 15 of the present embodiment is provided with the voltage buffer circuit 51 , so that the output impedance can be reduced and the influence of noise due to wiring routing can be reduced.

[0039] Figure 4 A specific circuit example of the clamp circuit 52 constituting the battery voltage monitoring IC 15 of the present embodiment is shown.

[0040] like Figure 4 As shown, the clamp circuit 52 in this embodiment has: a differential input stage 52A, which is composed of a pair of differential input NMOS transistors M11, M12, current mirror PMOS transistors M13, M14 connected between the drain terminals of the transistors M11, M12 and the power supply voltage terminal of the circuit, and a constant current resistor R6 connected between the common source terminal of the differential input transistors M11, M12 and the ground point. The gate terminal of the transistor M11 is connected to the external terminal VIO, and is configured to be input with a voltage V_I / O from the outside. In addition, the resistors R6 and R7 can also be constant current sources.

[0041] In addition, the clamp circuit 52 of the present embodiment has an output stage 52B having an amplifier circuit composed of a PMOS transistor M15 and a resistor R7 connected in series between the power supply voltage terminal of the circuit and the ground point, and a PMOS transistor M16 to which a potential of a connection node N5 between the drain terminal of the transistor M15 and the resistor R7 is applied. In addition, the clamp circuit 52 of the present embodiment is configured to operate using the voltage V_I / O of the external terminal VIO as a power supply voltage, but the power supply voltage of the differential input stage 52A and the output stage 52B in the clamp circuit 52 may also be the voltage of the voltage input terminal VIN supplied via the switch SW, that is, the voltage V0 of the node N0.

[0042] In the clamp circuit 52 having the above-described structure, the differential input stage 52A drives the transistors M15 and M16 of the output stage 52B so that the gate voltage of the transistor M12 is consistent with the gate voltage of M11, that is, the voltage V_I / O of the external terminal VIO. Figure 3 When the voltage V1 of the connection node N1 of the voltage-dividing resistors R1 and R2 is higher than the voltage V_I / O, the source current of M16 is increased, thereby clamping the voltage V1 of the node N1 to V_I / O.

[0043] Furthermore, in this embodiment, although not particularly limited, the differential input stage 52A is configured to operate as a differential amplifier with an offset. Specifically, the offset voltage Voff is preset to several hundred mV so that V1>V_I / O. Thus, V1=V_I / O+Voff, and the output voltage Vout of IC15 can vary within the entire dynamic range of the AD converter of the microcomputer to which the voltage is input.

[0044] More specifically, the differential amplifier generally has an offset voltage ΔV of several hundred mV due to manufacturing variations. However, when the offset voltage ΔV is negative, if the offset voltage Voff is not set in advance, it is clamped to V1 = V_I / O×ΔV.

[0045] On the other hand, if the differential input stage 52A is designed to have an offset voltage Voff of several hundred mV as described above, the offset voltage Voff and the offset voltage -ΔV caused by manufacturing variations cancel each other out, and V1 = V_I / O is obtained. The maximum value of Vout becomes the upper limit of the dynamic range of the AD converter.

[0046] On the other hand, when the offset voltage due to manufacturing variation is positive (+ΔV), the clamp voltage V1 = V_I / O + Voff + ΔV, and the maximum value of Vout shifts to a higher side, so the dynamic range of the AD converter can be effectively used.

[0047] Next, the advantage of providing the above-mentioned clamp circuit 52 in IC 15 will be described.

[0048] Figure 5 (A) shows the characteristics of the output voltage Vout of the battery voltage monitoring IC when there is no clamp circuit 52. Figure 5 (B) shows the characteristics of the output voltage Vout of the battery voltage monitoring IC with the clamp circuit 52. The resistors R1 and R2 for voltage division are set to have a resistance ratio so that a voltage V1 which compresses the voltage VBAT (for example, 30V) of the input terminal VIN to 1 / 6 is generated at the node N1.

[0049] In the absence of the clamping circuit 52, as Figure 5 As shown in (A), if the input voltage VBAT rises from 0V to 30V and then drops from 30V to 0V after a predetermined time, the output voltage Vout follows the change of the input voltage VBAT, rising from 0V to 5V and then dropping from 5V to 0V after a predetermined time. Therefore, when VBAT = 30V, Vout = 5V. When this voltage Vout is input to the ADC input terminal I / O (ADC) of a microcomputer operating at a power supply voltage of 3.3V, the internal components of the microcomputer may be damaged.

[0050] On the other hand, in the case where the clamp circuit 52 is present, as shown in FIG. Figure 5 As shown in (B), if the input voltage VBAT rises from 0V to 30V and then drops from 30V to 0V after a predetermined time, the output voltage Vout follows the change of the input voltage VBAT and rises from 0V, but becomes constant at time t1 when it reaches the voltage V_I / O of the external terminal VIO before t2 when VBAT reaches 30V. In addition, during the process of the input voltage VBAT dropping, it changes in a manner that it starts to drop from time t4 when the voltage of VBAT / 6 reaches V_I / O after time t3 when VBAT starts to drop from 30V.

[0051] Therefore, if the voltage V_I / O of the external terminal VIO is set to 3.3V, for example, even if VBAT = 30V, the upper limit of Vout is 3.3V, and even if Vout is input to the ADC input terminal I / O (ADC) of a microcomputer operating at a power supply voltage of 3.3V, the internal components of the microcomputer will not be damaged. Figure 1 When the battery voltage monitoring IC 15 of the present embodiment is used in the vehicle-mounted system shown, even if the voltage VBAT of the battery 11 jumps up due to startup, load dump, etc. and becomes an overvoltage state, Vout can be limited by the clamping circuit 52 to protect the I / O port of the microcomputer 13 from the influence of the overvoltage.

[0052] In addition, the battery voltage monitoring IC 15 of the present embodiment is provided with a switch SW and an external terminal CE for inputting a control signal of the switch SW, so that by turning off the switch SW, current can be prevented from flowing through the voltage dividing resistors R1 and R2 at all times, thereby reducing current consumption and suppressing battery consumption.

[0053] Furthermore, unlike the system described in Patent Document 1 which uses a reset IC to monitor the battery voltage, a voltage (V1) proportional to the battery voltage VBAT can be input to the microcomputer 13. Therefore, the microcomputer can always monitor the battery status and perform processing such as detection of abnormalities such as low voltage and prediction of battery life.

[0054] Furthermore, the battery voltage monitoring IC 15 of the present embodiment has fewer external terminals than the LSI of Patent Document 2, and can use a small 5-pin package, thereby achieving cost reduction and space saving.

[0055] Furthermore, the battery voltage monitoring IC 15 of the present embodiment also has advantages as described below, compared with conventional general battery voltage monitoring circuits.

[0056] exist Figure 6 2 shows a configuration example of a conventional general battery voltage monitoring circuit.

[0057] like Figure 6 As shown, in the case of a conventional battery voltage monitoring circuit, the following structure is generally adopted: series resistors R1 and R2 for dividing the voltage VBAT of the battery 11 are set in the front stage of the microcomputer 13, and the voltage divided by the resistors R1 and R2 is input to the ADC input terminal I / O (ADC) of the microcomputer 13.

[0058] However, in Figure 6 In such a battery voltage monitoring circuit, since current always flows through the voltage dividing resistors R1 and R2, much current is wasted. Furthermore, since the resistors R1 and R2 are configured as external resistors using discrete components with large variations, there is a problem that the accuracy of the monitoring voltage input to the microcomputer is reduced.

[0059] In addition, in the case of a conventional battery voltage monitoring circuit, even if a clamp circuit is provided, a Zener diode Dz is generally connected between the connection node N1 of the resistors R1 and R2 and the ground point. In such a circuit, there are the following problems: leakage current flows through the Zener diode Dz, an error occurs in the potential of the node N1, and the number of components increases.

[0060] Furthermore, when the resistors R1 and R2 are formed by external elements, wiring needs to be routed to connect the resistor elements, and the wiring length increases, which makes the wiring more susceptible to the influence of noise.

[0061] In contrast, according to Figure 2 to Figure 4 In the battery voltage monitoring IC15 of the above-mentioned embodiment having the structure as shown and the system using the battery voltage monitoring IC15, the resistors R1 and R2 used for voltage division are on-chip resistor elements. Therefore, compared with the case of using external elements, the deviation of the resistance ratio becomes smaller and the accuracy of the monitoring voltage input to the microcomputer becomes higher.

[0062] In addition, since there is no need to route wiring for connecting a resistor outside the IC, the IC is less susceptible to the influence of noise.

[0063] Furthermore, since an external resistor and a Zener diode are not required, there is an advantage that the number of components can be reduced, the mounting density of the circuit can be increased, and miniaturization can be achieved.

[0064] (Variation Example)

[0065] Next, a modification of the battery voltage monitoring IC 15 of the above-described embodiment will be described.

[0066] The first variant is Figure 2In the battery voltage monitoring IC 15 shown, the voltage V_I / O input to the clamp circuit 52 is input from the external terminal VIO. In contrast, a constant voltage circuit for generating the voltage V_I / O is provided inside the IC, and the external terminal VIO is omitted to reduce the number of IC terminals.

[0067] Figure 7 An example of a voltage generating circuit that generates the voltage V_I / O is shown.

[0068] Figure 7 The voltage generating circuit has: a depletion-type NMOS transistor M21 and an enhancement-type NMOS transistor M22, which are connected in series between a power supply voltage terminal and a ground point; and a depletion-type NMOS transistor M23 and series resistors R8 and R9, which are also connected in series between the power supply voltage terminal and the ground point. Among them, the gate and source of the transistor M21 are coupled, the gate terminal of the transistor M23 is connected to the source terminal of M21, and the gate terminal of the transistor M22 is connected to the connection node N6 of the resistors R8 and R9, and a constant voltage is output from the source terminal of the transistor M23. In addition, such a constant voltage circuit is a well-known circuit as disclosed in Japanese Patent Laid-Open No. 8-30345, etc., so the detailed description of the operation is omitted.

[0069] Figure 8 (A) Figure 8 (B) indicates Figure 2 Another modified example of the battery voltage monitoring IC 15 according to the embodiment.

[0070] in, Figure 8 The battery voltage monitoring IC15 of the modified example shown in (A) is constructed by providing an external terminal EF for outputting an error flag FLG and an open-drain NMOS transistor M17 connected between the terminal EF and a ground point. When the clamp circuit 52 clamps the potential of the connection node N1 between the resistors R1 and R2, the transistor M17 is turned on and the error flag FLG is output from the external terminal EF.

[0071] Furthermore, a pull-up resistor Rp is connected to the transmission line connected to the external terminal EF, and when the transistor M17 is turned on, a current is drawn from the pull-up resistor Rp, and a low-level signal is output to the microcomputer.

[0072] In addition, the signal for turning on the transistor M17 can be generated by providing a comparator in the clamp circuit 52. For example, the comparator generates Figure 4 By comparing the potential of the node N5 with a predetermined reference voltage Vref, it is detected that the clamp circuit 52 has entered the clamping operation. By appropriately setting the reference voltage Vref, it is possible to output an error flag FLG when the input voltage VBAT becomes an overvoltage and enters the clamping operation.

[0073] on the other hand, Figure 8 The battery voltage monitoring IC15 of the modified example shown in (B) is configured to include a reset circuit 53 for generating a reset signal when an abnormal low voltage state is detected, an external terminal RS for outputting the reset signal RST, and an open-drain NMOS transistor M17 connected between the terminal RS and a ground point. When the output of the voltage buffer circuit 51 drops below a predetermined voltage, the reset circuit 53 turns on the transistor M17 and outputs the reset signal RST from the external terminal RS.

[0074] The reset circuit 53 can be configured by, for example, a comparator that detects that the input voltage VBAT has reached an abnormally low voltage state by comparing the output voltage of the voltage buffer circuit 51 with a predetermined reference voltage.

[0075] In addition, the following modification is also possible: Figure 8 The external terminal RS, transistor M17 and reset circuit 53 shown in (B) of FIG. Figure 8 The external terminal EF, the transistor M17, and the comparator for detecting an overvoltage state shown in (A) are provided in the battery voltage monitoring IC15.

[0076] An embodiment and a modified example of the present invention have been described above, but the present invention is not limited to the above embodiment, and various modifications can be made based on the technical concept of the present invention. For example, in the above embodiment, a battery voltage monitoring IC composed of MOS transistors has been described, but a battery voltage monitoring IC can also be composed of bipolar transistors instead of MOS transistors.

[0077] Furthermore, in the above-mentioned embodiment, a case where the present invention is applied to an in-vehicle system is described, but the present invention can be applied to an electronic circuit system other than an in-vehicle system.

[0078] Explanation of symbols

[0079] 11 ...battery, 12 ...DC voltage conversion circuit, 13 ...microcomputer (MCU), 14 ...semiconductor device, 15 ...battery voltage monitoring IC, 51 ...voltage buffer circuit, 52 ...clamp circuit, 53 ...reset circuit.

Claims

1. A semiconductor integrated circuit for monitoring battery voltage, comprising: a voltage input terminal to which a voltage from a battery to be monitored is input; a voltage dividing circuit having a series resistor for dividing the voltage of the voltage input terminal; and an output terminal for outputting a voltage corresponding to the voltage divided by the voltage dividing circuit, characterized in that: The battery voltage monitoring semiconductor integrated circuit comprises: a voltage buffer circuit connected between a connection node of the series resistors and the output terminal; and A clamp circuit clamps the potential of a connection node of the series resistors.

2. The semiconductor integrated circuit for monitoring battery voltage according to claim 1, wherein: The clamping circuit has: a differential input stage, one input terminal of which is input with a predetermined set voltage, and the other input terminal of which is connected to a connection node of the series resistor; as well as an output stage having a source follower circuit connected to the output node of the differential input stage and an output transistor having a control terminal to which the output of the source follower circuit is applied, The output transistor is connected between a connection node of the series resistors constituting the voltage dividing circuit and a ground point.

3. The semiconductor integrated circuit for monitoring battery voltage according to claim 2, wherein: A first external terminal is provided for inputting the set voltage from the outside to the one input terminal of the differential input stage.

4. The semiconductor integrated circuit for monitoring battery voltage according to claim 2, wherein: A constant voltage circuit is provided for generating the set voltage to be input to the one input terminal of the differential input stage.

5. The semiconductor integrated circuit for monitoring battery voltage according to claim 1, wherein: The battery voltage monitoring semiconductor integrated circuit comprises: a switching element connected in series with the series resistor constituting the voltage dividing circuit; and The second external terminal can input a signal for controlling the switching element to be turned on or off.

6. An electronic circuit system comprising: a semiconductor integrated circuit for monitoring battery voltage according to any one of claims 1 to 5; and a microcomputer having a built-in AD conversion circuit and having an input terminal to which a voltage to be AD-converted by the AD conversion circuit is input, characterized in that The voltage output from the output terminal of the battery voltage monitoring semiconductor integrated circuit is input to the input terminal of the microcomputer.

7. An electronic circuit system comprising: a semiconductor integrated circuit for monitoring battery voltage according to claim 3; and a microcomputer having a built-in AD conversion circuit and having an input terminal to which a voltage to be AD-converted by the AD conversion circuit is input, characterized in that: The voltage output from the output terminal of the battery voltage monitoring semiconductor integrated circuit is input to the input terminal of the microcomputer. The setting voltage is generated by the microcomputer, and the generated setting voltage is input to the first external terminal.

8. An electronic circuit system comprising: a semiconductor integrated circuit for monitoring battery voltage according to claim 5; and a microcomputer having a built-in AD conversion circuit and having an input terminal to which a voltage to be AD-converted by the AD conversion circuit is input, characterized in that: The voltage output from the output terminal of the battery voltage monitoring semiconductor integrated circuit is input to the input terminal of the microcomputer. A signal for controlling the switching element to be turned on or off is generated by the microcomputer, and the generated signal is input to the second external terminal.

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