Transmission rate multi-frequency-point configurable PCM frequency configuration system and method

Abstract

The invention belongs to the technical field of information coding transmission, and relates to a transmission rate multi-frequency-point configurable PCM frequency configuration system and method, and the system comprises a PCM transmission rate configuration parameter reading module, a frequency division source clock generation module, a frequency division source clock selection module, a frequency division coefficient selection module, a PCM framing module and a PCM generation module. The PCM transmission rate configuration parameter reading module is used for reading and loading a PCM transmission rate configuration parameter M; the frequency division source clock generation module is used for generating a frequency division source clock; the frequency division source clock selection module is used for determining a frequency division source clock CLK; the frequency division coefficient selection module is used for determining a frequency division coefficient; the PCM generation module is used for generating a PCM clock signal with a fixed frequency; and the PCM framing module is used for sending the PCM data needing to be sent at the next moment to the PCM generation module. Compared with a conventional PCM frequency configuration method, the PCM frequency configuration method has the advantages that the configuration flexibility is improved, and the requirements on the PCM transmission rate in different application scenes can be quickly met.

Description

Technical Field

[0001] The present invention belongs to the technical field of information coding and transmission, and in particular relates to a PCM frequency configuration system and method with configurable transmission rate and multiple frequency points. Background Art

[0002] Pulse Code Modulation (PCM) technology is widely used in the field of telemetry data collection and transmission. With the development and maturity of PCM technology, the transmission rate of PCM is also constantly improving. In different projects, the transmission rate of PCM is also different, such as 4.096MHz, 6.5536MHz, 9.8304MHz, etc., to meet the telemetry collection needs in different application scenarios.

[0003] At present, the common PCM frequency configuration method is to determine a fixed frequency division source clock and division coefficient according to the PCM transmission rate required by the current application scenario, and use FPGA to divide the division source clock to generate a PCM signal with the required transmission rate. However, this PCM generation method is not compatible with the PCM transmission rate requirements in different application scenarios. When the required PCM transmission rate changes, the FPGA needs to re-determine the frequency and division coefficient of the division source clock, change its clock division design, and re-synthesize and implement it. In other words, the current PCM frequency configuration method cannot achieve multi-frequency configurability of the transmission rate, and has poor configuration flexibility and scenario adaptability. It is not compatible with multiple application scenarios and cannot meet the requirements of different PCM transmission rates.

[0004] In summary, the existing methods cannot be simultaneously applied to multiple application scenarios with different requirements for PCM transmission rates. It is necessary to propose a transmission rate multi-frequency point configurable PCM frequency configuration method suitable for different application scenarios. Summary of the invention

[0005] 1. Technical issues to be resolved

[0006] The technical problem to be solved by the present invention is how to provide a PCM frequency configuration system and method with configurable transmission rate and multiple frequency points to meet the requirements of different PCM transmission rates in different application scenarios.

[0007] (II) Technical solution

[0008] In order to solve the above technical problems, the present invention proposes a PCM frequency configuration system with configurable transmission rate and multiple frequency points, including a PCM transmission rate configuration parameter reading module, a frequency division source clock generation module, a frequency division source clock selection module, a frequency division coefficient selection module, a PCM framing module and a PCM generation module, wherein:

[0009] The PCM transmission rate configuration parameter reading module is used to read and load the PCM transmission rate configuration parameter M, and send the PCM transmission rate configuration parameter M to the frequency division source clock selection module and the frequency division coefficient selection module;

[0010] The frequency division source clock generating module is used to perform frequency multiplication and frequency division on the basis of the source clock input by the external crystal oscillator, generate the frequency division source clock CLK, and send it to the frequency division source clock selecting module for selection according to the PCM transmission rate configuration parameter M;

[0011] The frequency division source clock selection module is used to determine the frequency division source clock CLK according to the PCM transmission reference frequency h and the received PCM transmission rate configuration parameter M, and send the frequency division source clock CLK to the PCM generation module;

[0012] The frequency division coefficient selection module is used to determine the frequency division coefficient N according to the received PCM transmission rate configuration parameter M, and send the frequency division coefficient N to the PCM generation module;

[0013] The PCM generating module is used to generate a PCM clock signal with a fixed frequency, determine the time period T required to send one byte of PCM data, send a PCM data acquisition signal to the PCM framing module with T as the period, and send the acquired PCM data to be sent at the PCM transmission rate f.

[0014] The PCM framing module is used to receive a PCM data acquisition signal and send the PCM data to be sent at the next moment to the PCM generating module.

[0015] Furthermore, the PCM transmission rate f is:

[0016]

[0017] At the same time, the present invention also proposes a PCM frequency configuration method based on the above system, comprising the following steps:

[0018] Step 1, FPGA is powered on, the PCM transmission rate configuration parameter reading module reads and loads the PCM transmission rate configuration parameter M, and sends it to the frequency division source clock selection module and the frequency division coefficient selection module;

[0019] Step 2, the frequency division source clock selection module determines the frequency division source clock CLK according to the PCM transmission reference frequency h and the received PCM transmission rate configuration parameter M, and sends the frequency division source clock CLK to the PCM generation module;

[0020] Step 3, the frequency division coefficient selection module determines the frequency division coefficient N according to the received PCM transmission rate configuration parameter M, and sends the frequency division coefficient N to the PCM generation module;

[0021] Step 4: The PCM generation module generates a fixed-frequency PCM clock signal using the received frequency-divided source clock CLK and the frequency-divided coefficient N. The PCM clock frequency of the PCM clock signal is the PCM transmission rate f:

[0022]

[0023] Step 5: The PCM generation module obtains the PCM data to be sent at a fixed period T according to the PCM clock frequency;

[0024] Step 6: After the PCM generating module obtains the PCM data to be sent, it sends the PCM data to be sent at the PCM transmission rate f determined in step 4.

[0025] Further, the PCM transmission rate configuration parameter M is stored in a reserved address in the EEPROM, and the PCM transmission rate configuration parameter M is:

[0026]

[0027] Furthermore, the frequency-divided source clock CLK is generated by a frequency-divided source clock generating module, and the frequency-divided source clock generating module performs frequency multiplication and frequency division on the basis of a source clock input by an external crystal oscillator to generate the frequency-divided source clock CLK.

[0028] Furthermore, in step 5, the fixed period T is:

[0029]

[0030] Furthermore, step 5 also includes:

[0031] The PCM generation module sends a PCM data acquisition signal to the PCM framing module with a period of T;

[0032] The PCM framing module receives the PCM data acquisition signal and sends the PCM data to be sent at the next moment to the PCM generating module.

[0033] (III) Beneficial effects

[0034] The present invention takes into account the different requirements for PCM transmission rate in different application scenarios, and adaptively designs the generation process of PCM signals during a power-on process. The PCM generation mechanism with configurable transmission rate and multiple frequency points proposed by the present invention improves its configuration flexibility compared to the conventional PCM frequency configuration method. It can quickly meet the requirements for PCM transmission rate in different application scenarios by configuring PCM transmission rate configuration parameters without the need for FPGA recompilation. It has good adaptability and can be generally applied to different scenarios. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 It is a schematic diagram of the system structure of the present invention;

[0036] Figure 2 It is a schematic diagram of the process of the present invention. DETAILED DESCRIPTION

[0037] In order to make the purpose, content and advantages of the present invention more clear, the specific implementation methods of the present invention are further described in detail below in conjunction with the drawings and examples.

[0038] like Figure 1 As shown, in a specific embodiment of the present invention, a PCM frequency configuration system with configurable transmission rate and multiple frequency points is proposed, including a PCM transmission rate configuration parameter reading module, a division source clock generating module, a division source clock selecting module, a division coefficient selecting module, a PCM framing module and a PCM generating module.

[0039] Among them, the PCM transmission rate configuration parameter reading module is mainly used to read and load the PCM transmission rate configuration parameter M. It reads the PCM transmission rate configuration parameter M according to the communication interface requirements of the EEPROM and sends it to the division source clock selection module and the division coefficient selection module.

[0040] The frequency division source clock generation module performs frequency multiplication and frequency division on the basis of the source clock input by the external crystal oscillator to generate the frequency division source clock CLK, and sends it to the frequency division source clock selection module for selection according to the PCM transmission rate configuration parameter M.

[0041] The frequency division source clock selection module determines the frequency division source clock CLK according to the PCM transmission reference frequency h and the received PCM transmission rate configuration parameter M, and sends it to the PCM generation module.

[0042] The frequency division coefficient selection module determines the frequency division coefficient N of the PCM generation module according to the received PCM transmission rate configuration parameter M, and sends it to the PCM generation module.

[0043] The PCM generation module generates a fixed-frequency PCM clock signal based on the frequency division source clock CLK and the frequency division coefficient N, and determines the time period T required to send one byte of PCM data, and sends a PCM data acquisition signal to the PCM framing module with T as the period. After the PCM generation module obtains one byte of PCM data to be sent, it sends the PCM data to be sent at the PCM transmission rate f.

[0044] PCM framing module: Every time the PCM framing module receives a PCM data acquisition signal, it sends the PCM data (one byte) to be sent at the next moment to the PCM generation module.

[0045] like Figure 2 As shown, in a specific embodiment of the present invention, a PCM frequency configuration method with configurable transmission rate and multiple frequency points is proposed, comprising the following steps:

[0046] Step 1: FPGA is powered on, and the PCM transmission rate configuration parameter reading module first reads and loads the PCM transmission rate configuration parameter M.

[0047] The PCM transmission rate configuration parameter M represents the integer multiple relationship between the PCM transmission rate f (MHz) actually required in the current application scenario and the PCM transmission reference frequency h. For example, if h is 0.8192MHz, then:

[0048]

[0049] In different application scenarios, the PCM transmission rate configuration parameter M in the scenario can be determined according to the actually required PCM transmission rate f, and stored in a fixed address of the EEPROM.

[0050] After the FPGA is powered on, the PCM transmission rate configuration parameter reading module can read the PCM transmission rate configuration parameter M according to the communication interface requirements of the EEPROM, and send it to the frequency division source clock selection module and the frequency division coefficient selection module, and then go to step 2;

[0051] Step 2: The frequency division source clock selection module determines the frequency division source clock CLK according to the PCM transmission reference frequency h and the received PCM transmission rate configuration parameter M, and sends it to the PCM generation module. The corresponding relationship between the frequency division source clock CLK and the PCM transmission rate configuration parameter M is shown in Table 1.

[0052] Table 1 Correspondence table of different PCM transmission rates f, PCM transmission rate configuration parameter M, frequency division source clock CLK, and frequency division coefficient N when the PCM transmission reference frequency h is 0.8192MHz

[0053]

[0054]

[0055] As can be seen from Table 1, the frequencies of the frequency division source clock sent to the PCM generation module may include 98.304MHz, 103.2192MHz, and 108.1344MHz. These three frequency division source clocks are all generated by the frequency division source clock generation module. The specific generation method is: the frequency division source clock generation module multiplies and divides the source clock input by the external crystal oscillator to generate three frequency division source clocks. The source clock frequencies of different external crystal oscillators are also different, and the multiplication and division methods of the corresponding frequency division source clock generation module are also different. Take a 40MHz crystal oscillator as an example.

[0056] When the crystal oscillator is 40MHz, the frequency division source clock generation module first multiplies the 40MHz source clock by 16 times and divides it by 15.625 times to generate a primary clock of 40.96MHz. The frequency division and multiplication methods are as follows:

[0057]

[0058] Then, the frequency is divided and multiplied again based on the primary clock of 40.96MHz to generate 98.304MHz, 103.2192MHz, and 108.1344MHz respectively. The frequency division and multiplication methods are as follows:

[0059] a) The 40.96MHz primary clock is multiplied by 23.625 and divided by 9.375 to generate a 103.2192MHz divided source clock, namely:

[0060]

[0061] b) The 40.96MHz primary clock is multiplied by 24 and divided by 10 to generate a 98.304MHz divided source clock, that is:

[0062]

[0063] c) The 40.96MHz primary clock is multiplied by 24.75 and divided by 9.375 to generate a 108.1344MHz divided source clock, that is:

[0064]

[0065] After the frequency division source clocks of 98.304MHz, 103.2192MHz and 108.1344MHz are generated by the frequency division source clock generation module, they are sent to the frequency division source clock selection module for selection according to the PCM transmission rate configuration parameter M. The selected frequency division source clock CLK is sent to the PCM generation module, and then go to step 3;

[0066] Step 3: The frequency division coefficient selection module determines the frequency division coefficient N of the PCM generation module according to the received PCM transmission rate configuration parameter M, and sends it to the PCM generation module. The corresponding relationship between the frequency division coefficient N and the PCM transmission rate configuration parameter M is shown in Table 1.

[0067] Go to step 4;

[0068] Step 4: The PCM generation module uses the received frequency division source clock CLK and the frequency division coefficient N to generate a fixed-frequency PCM clock signal. The PCM clock frequency is the PCM transmission rate f, that is:

[0069]

[0070] The corresponding relationship between different PCM transmission rates f and PCM transmission rate configuration parameter M, frequency division source clock CLK, and frequency division coefficient N is shown in Table 1. After determining the PCM clock signal frequency, go to step 5;

[0071] Step 5: The PCM generation module obtains the PCM data to be sent at a fixed period T according to the PCM clock frequency.

[0072] The period T is the time required for the PCM generation module to send one byte of PCM data, that is:

[0073]

[0074] The PCM generation module sends a PCM data acquisition signal to the PCM framing module with a period of T, which indicates that the PCM generation module needs to obtain one byte of PCM valid data for transmission. Each time the PCM framing module receives a PCM data acquisition signal, it sends the PCM data (one byte) to be sent at the next moment to the PCM generation module, and goes to step 6.

[0075] Step 6: After the PCM generation module obtains one byte of PCM data to be sent, it sends the PCM data to be sent at the PCM transmission rate f determined in step 4.

[0076] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the technical principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A PCM frequency configuration system with configurable transmission rate and multiple frequency points, characterized in that: It includes a PCM transmission rate configuration parameter reading module, a frequency division source clock generation module, a frequency division source clock selection module, a frequency division coefficient selection module, a PCM framing module and a PCM generation module, wherein: The PCM transmission rate configuration parameter reading module is used to read and load the PCM transmission rate configuration parameter M, and send the PCM transmission rate configuration parameter M to the frequency division source clock selection module and the frequency division coefficient selection module; The frequency division source clock generating module is used to perform frequency multiplication and frequency division on the basis of the source clock input by the external crystal oscillator, generate the frequency division source clock CLK, and send it to the frequency division source clock selecting module for selection according to the PCM transmission rate configuration parameter M; The frequency division source clock selection module is used to determine the frequency division source clock CLK according to the PCM transmission reference frequency h and the received PCM transmission rate configuration parameter M, and send the frequency division source clock CLK to the PCM generation module; The frequency division coefficient selection module is used to determine the frequency division coefficient N according to the received PCM transmission rate configuration parameter M, and send the frequency division coefficient N to the PCM generation module; The PCM generating module is used to generate a PCM clock signal with a fixed frequency, determine the time period T required to send one byte of PCM data, send a PCM data acquisition signal to the PCM framing module with T as the period, and send the acquired PCM data to be sent at the PCM transmission rate f. The PCM framing module is used to receive a PCM data acquisition signal and send the PCM data to be sent at the next moment to the PCM generating module.

2. A PCM frequency configuration system with configurable transmission rate and multiple frequency points according to claim 1, characterized in that: The PCM transmission rate f is:

3. The PCM frequency configuration method based on the system of claim 1, characterized in that: The steps include: Step 1, FPGA is powered on, the PCM transmission rate configuration parameter reading module reads and loads the PCM transmission rate configuration parameter M, and sends it to the frequency division source clock selection module and the frequency division coefficient selection module; Step 2, the frequency division source clock selection module determines the frequency division source clock CLK according to the PCM transmission reference frequency h and the received PCM transmission rate configuration parameter M, and sends the frequency division source clock CLK to the PCM generation module; Step 3, the frequency division coefficient selection module determines the frequency division coefficient N according to the received PCM transmission rate configuration parameter M, and sends the frequency division coefficient N to the PCM generation module; Step 4: The PCM generation module generates a fixed-frequency PCM clock signal using the received frequency-divided source clock CLK and the frequency-divided coefficient N. The PCM clock frequency of the PCM clock signal is the PCM transmission rate f: Step 5: The PCM generation module obtains the PCM data to be sent at a fixed period T according to the PCM clock frequency; Step 6: After the PCM generating module obtains the PCM data to be sent, it sends the PCM data to be sent at the PCM transmission rate f determined in step 4.

4. The method according to claim 3, characterized in that The PCM transmission rate configuration parameter M is stored in a reserved address in the EEPROM. The PCM transmission rate configuration parameter M is:

5. The method according to claim 4, characterized in that The frequency-divided source clock CLK is generated by a frequency-divided source clock generating module. The frequency-divided source clock generating module performs frequency multiplication and frequency division on the basis of a source clock input by an external crystal oscillator to generate the frequency-divided source clock CLK.

6. The method according to claim 5, characterized in that In step 5, the fixed period T is:

7. The method according to claim 6, characterized in that Step 5 also includes: The PCM generation module sends a PCM data acquisition signal to the PCM framing module with a period of T; The PCM framing module receives the PCM data acquisition signal and sends the PCM data to be sent at the next moment to the PCM generating module.

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