Out-of-band management system, operation method thereof and electronic equipment

Abstract

The invention discloses an out-of-band management system, an operation method of the out-of-band management system and electronic equipment, the out-of-band management system comprises a first single-chip microcomputer and a second single-chip microcomputer, and the operation method of the out-of-band management system comprises the following steps: starting up in response to the first single-chip microcomputer and the second single-chip microcomputer; sending a check code query instruction to the first single-chip microcomputer based on the second single-chip microcomputer; the first single-chip microcomputer generates a check code according to the received check code query instruction and sends the check code to the second single-chip microcomputer; the second single-chip microcomputer checks the received check code and sends corresponding information to the first single-chip microcomputer based on a check result; and the first single chip microcomputer executes corresponding operation according to the received information. According to the scheme of the invention, when the out-of-band management system runs, the external equipment is prevented from attacking and tampering the out-of-band management system, and the safety and reliability of the system are greatly improved.

Description

Technical Field

[0001] The present invention relates to the technical field of single chip microcomputers, and in particular to an out-of-band management system, an operation method thereof, and an electronic device. Background Art

[0002] With the rapid development of electronic technology, single-chip microcomputers are widely used in various electronic devices. However, the security issues of single-chip microcomputer-based out-of-band management systems are becoming increasingly prominent, especially in applications that require high security, such as industrial control, medical equipment, security monitoring, etc. Traditional single-chip microcomputer-based out-of-band management systems usually use a single single-chip microcomputer to perform all tasks, which makes the system vulnerable to attacks and tampering, and has poor security. Summary of the invention

[0003] In view of this, the present invention proposes an out-of-band management system and an operation method thereof and an electronic device, which solves the technical problem that the traditional out-of-band management system based on a single microcontroller is vulnerable to external attacks and tampering, resulting in poor security.

[0004] In one aspect, an embodiment of the present invention provides an operation method of an out-of-band management system, wherein the out-of-band management system includes a first single-chip microcomputer and a second single-chip microcomputer, and the method includes: In response to the first single-chip microcomputer and the second single-chip microcomputer being powered on, sending a verification code query instruction to the first single-chip microcomputer based on the second single-chip microcomputer; The first single chip microcomputer generates a check code according to the received check code query instruction, and sends the check code to the second single chip microcomputer; The second single chip microcomputer verifies the received verification code and sends corresponding information to the first single chip microcomputer based on the verification result; The first single chip microcomputer performs corresponding operations according to the received information.

[0005] In some embodiments of the present invention, the storage area of ​​the first single-chip microcomputer includes a plurality of storage partitions; the second single-chip microcomputer stores information of all storage partitions of the first single-chip microcomputer; Sending a verification code query instruction to the first single-chip microcomputer based on the second single-chip microcomputer includes: The second single-chip microcomputer generates a verification code query instruction based on the information of any storage partition of the first single-chip microcomputer, and sends the generated verification code query instruction to the first single-chip microcomputer.

[0006] In some embodiments of the present invention, the first single-chip microcomputer generates a verification code according to a received verification code query instruction, including: The secure boot firmware of the first single-chip computer obtains verification information from the received verification code query instruction, and calculates the verification information based on the verification algorithm to obtain the verification code.

[0007] In some embodiments of the present invention, sending the verification code to the second single-chip microcomputer includes: Encrypting the verification code and sending the encrypted verification code to the second single chip microcomputer; The second single chip microcomputer verifies the received verification code, including: The second single chip computer decrypts the received encrypted verification code to obtain a decrypted verification code, and compares the decrypted verification code with a pre-stored verification code to see whether they are consistent.

[0008] In some embodiments of the present invention, sending corresponding information to the first single-chip microcomputer based on the verification result includes: In response to the received verification code being consistent with the pre-stored verification code, the verification is passed, and a jump address is sent to the first single-chip microcomputer; The first single chip microcomputer performs corresponding operations according to the received information, including: In response to receiving the jump address sent by the second single-chip microcomputer, the first single-chip microcomputer jumps to the corresponding storage partition according to the received jump address to execute the program in the storage partition.

[0009] In some embodiments of the present invention, sending corresponding information to the first single-chip microcomputer based on the verification result includes: In response to the received verification code being inconsistent with the pre-stored verification code, the verification fails, and verification failure information is sent to the first single-chip microcomputer; The first single chip microcomputer performs corresponding operations according to the received information, including: In response to receiving the verification failure information sent by the second single-chip computer, the first single-chip computer determines whether the number of verification failures in the verification failure information reaches a first threshold; When the number of verification failures does not reach the first threshold, returning to the step of generating a verification code according to the received verification code query instruction by the first single-chip microcomputer and sending the verification code to the second single-chip microcomputer; When the number of verification failures reaches a first threshold, data stored on the second single-chip microcomputer and data stored in the secure boot firmware itself are erased based on the secure boot firmware.

[0010] In some embodiments of the present invention, the method further comprises: In response to the out-of-band management system being powered on for the first time after leaving the factory, the first single-chip microcomputer generates first encrypted information based on the first identification code, and sends the first encrypted information to the second single-chip microcomputer; The second single-chip microcomputer parses the first identification code from the first encrypted information, generates second encrypted information based on the first identification code, encrypts the handshake information based on the second encrypted information, and sends the encrypted handshake information to the first single-chip microcomputer; The first single chip computer verifies the received encrypted handshake information and performs corresponding operations based on the verification result.

[0011] In some embodiments of the present invention, the first single-chip microcomputer verifies the received encrypted handshake information and performs corresponding operations based on the verification result, including: The first single chip computer determines whether the encrypted handshake information is consistent with the pre-stored first handshake information; In response to the encrypted handshake information being consistent with the pre-stored first handshake information, the verification is successful, and the verification success information is sent to the second single-chip microcomputer so that the second single-chip microcomputer executes the step of sending a verification code query instruction to the first single-chip microcomputer based on the second single-chip microcomputer in response to the first single-chip microcomputer and the second single-chip microcomputer being turned on; In response to the encrypted handshake information being inconsistent with the pre-stored first handshake information, the verification fails, and a verification failure prompt message is output.

[0012] In another aspect, an embodiment of the present invention further provides an out-of-band management system, which includes a first single-chip microcomputer and a second single-chip microcomputer. The second single-chip microcomputer is configured to send a verification code query instruction to the first single-chip microcomputer in response to powering on. The first single-chip microcomputer is configured to generate a verification code according to the received verification code query instruction in response to powering on and receiving the verification code query instruction sent by the second single-chip microcomputer, and send the verification code to the second single-chip microcomputer. The second single-chip microcomputer is also configured to verify the received verification code, and send corresponding information to the first single-chip microcomputer based on the verification result to instruct the first single-chip microcomputer to perform a corresponding operation according to the received information.

[0013] On the other hand, an embodiment of the present invention further provides an electronic device, which includes the out-of-band management system as described in the above embodiment.

[0014] The present invention has at least the following beneficial effects: The present invention provides an out-of-band management system, an operation method thereof and an electronic device. The services of the out-of-band management system are executed by the cooperation of a first single-chip microcomputer and a second single-chip microcomputer. The second single-chip microcomputer verifies the second single-chip microcomputer before sending a jump address. After the verification is passed, the jump address is sent to the second single-chip microcomputer. The first single-chip microcomputer jumps to a corresponding storage area according to the jump address sent by the second single-chip microcomputer to execute the service, thereby preventing external devices from attacking and tampering with the out-of-band management system, and greatly improving the security and reliability of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present invention. For ordinary technicians in this field, other embodiments can be obtained based on these drawings without paying creative work.

[0016] Figure 1 A flowchart of an operation method of an out-of-band management system provided by an embodiment of the present invention; Figure 2 A flowchart of an operation method of a first single-chip microcomputer of an out-of-band management system provided by an embodiment of the present invention; Figure 3 A flowchart of a method for operating a second single-chip microcomputer of an out-of-band management system provided by an embodiment of the present invention; Figure 4 A flowchart of an operation method of an out-of-band management system provided by an embodiment of the present invention; Figure 5 A schematic diagram of the structure of an out-of-band management system provided by an embodiment of the present invention; Figure 6 A schematic diagram of the structure of an out-of-band management system provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0017] In order to make the objectives, technical solutions and advantages of the present invention more clearly understood, the embodiments of the present invention are further described in detail below in combination with specific embodiments and with reference to the accompanying drawings.

[0018] It should be noted that all expressions using "first" and "second" in the embodiments of the present invention are for distinguishing two non-identical entities with the same name or non-identical parameters. It can be seen that "first" and "second" are only for the convenience of expression and should not be understood as limitations on the embodiments of the present invention. The subsequent embodiments will not explain this one by one.

[0019] The present invention is described in detail below in conjunction with embodiments and drawings.

[0020] A first aspect of an embodiment of the present invention provides an operation method of an out-of-band management system, wherein the out-of-band management system includes a first single-chip microcomputer and a second single-chip microcomputer. Figure 1 As shown, the method includes steps S10 to S13.

[0021] S10, in response to the first single chip microcomputer and the second single chip microcomputer being powered on, sending a verification code query instruction to the first single chip microcomputer based on the second single chip microcomputer.

[0022] S11. The first single-chip microcomputer generates a verification code according to the received verification code query instruction, and sends the verification code to the second single-chip microcomputer.

[0023] S12: The second single-chip microcomputer verifies the received verification code, and sends corresponding information to the first single-chip microcomputer based on the verification result.

[0024] S13: The first single chip microcomputer performs corresponding operations according to the received information.

[0025] The first single-chip microcomputer can be used as a running machine, and the running machine is responsible for executing the code. The second single-chip microcomputer can be used as a query machine, and the query machine stores the check code and the jump address, and can also send the jump address to the first single-chip microcomputer. The first single-chip microcomputer and the second single-chip microcomputer can be connected through a serial port. When the external pin system is turned on, the first single-chip microcomputer and the second single-chip microcomputer are also turned on. The query machine randomly sends a check code query instruction to the running machine. After the running machine receives the check query instruction, it calculates the check code and returns the calculated check code to the query machine. The query machine verifies whether the check code sent by the running machine is consistent with the check code stored by the query machine. If the two are consistent, the jump address is sent to the running machine. After the running machine receives the jump address, it executes the program in the area corresponding to the jump address. If the two are inconsistent, a check failure message is sent to the running machine. After receiving the check failure message, the running machine performs further operations.

[0026] The out-of-band management system proposed in the embodiment of the present invention executes the services of the out-of-band management system through the cooperation of the first single-chip microcomputer and the second single-chip microcomputer. The second single-chip microcomputer verifies the second single-chip microcomputer before sending the jump address, and sends the jump address to the second single-chip microcomputer after the verification. The first single-chip microcomputer jumps to the corresponding storage area according to the jump address sent by the second single-chip microcomputer to execute the service, thereby preventing external devices from attacking and tampering with the out-of-band management system, and greatly improving the security and reliability of system operation.

[0027] In some embodiments of the present invention, the storage area of ​​the first single-chip microcomputer includes a plurality of storage partitions; the second single-chip microcomputer stores information of all storage partitions of the first single-chip microcomputer.

[0028] The storage area of ​​the first single-chip microcomputer is used to store program codes corresponding to the services to be executed, and the storage area of ​​the first single-chip microcomputer is divided into multiple storage partitions. Each storage partition can store program codes corresponding to different services and / or functions, and the storage method is a random storage method, thereby further improving the security of the out-of-band management system.

[0029] The storage area of ​​the second single-chip microcomputer stores the check code and the information of each storage partition of the first single-chip microcomputer. The information of the storage partition may include the starting address and size of the storage partition. The check code may be generated based on the information of the storage partition, for example, by calculating the starting address and size of the storage partition through a check algorithm.

[0030] In some examples, in order to further improve the security of the out-of-band management system, read-write protection may be set on the storage area of ​​the second single-chip microcomputer to prevent unauthorized external devices from reading the storage partition of the second single-chip microcomputer.

[0031] In some examples, in order to further improve the security of the out-of-band management system, a startup authorization code is also stored in the second single-chip microcomputer.

[0032] When the second single chip microcomputer successfully verifies the verification code and sends the jump address to the first single chip microcomputer, the startup authorization code and the jump address can be sent to the first single chip microcomputer together.

[0033] When the first single-chip microcomputer receives the jump address and startup authorization code sent by the second single-chip microcomputer, it first jumps to the corresponding storage partition based on the jump address to run the storage partition, then assigns the startup authorization code to a predefined variable, and determines whether the assigned variable is enabled. If the assigned variable is enabled, the operation continues; if the assigned variable is not enabled, the operation is terminated.

[0034] In some embodiments of the present invention, during normal operation after the out-of-band management system is started, the first single-chip microcomputer may also send a query jump address request to the second single-chip microcomputer to obtain a jump address. The second single-chip microcomputer receives the query jump address request sent by the first single-chip microcomputer, queries the jump address based on the request, and returns the queried jump address to the first single-chip microcomputer.

[0035] In some embodiments of the present invention, Figure 1 In step S10 shown, sending a verification code query instruction to the first single-chip microcomputer based on the second single-chip microcomputer includes: the second single-chip microcomputer generates a verification code query instruction based on information of any storage partition of the first single-chip microcomputer, and sends the generated verification code query instruction to the first single-chip microcomputer.

[0036] In some embodiments of the present invention, Figure 1 In step S11 shown, the first single-chip microcomputer generates a verification code according to the received verification code query instruction, which may include: the secure boot firmware of the first single-chip microcomputer obtains verification information from the received verification code query instruction, and calculates the verification information based on a verification algorithm to obtain a verification code.

[0037] In some embodiments of the present invention, Figure 1 In step S11 shown in FIG. 1 , sending the verification code to the second single-chip microcomputer may include: encrypting the verification code and sending the encrypted verification code to the second single-chip microcomputer. Figure 1In step S12 shown, the second single-chip microcomputer verifies the received verification code, which may include: the second single-chip microcomputer decrypts the received encrypted verification code to obtain the decrypted verification code, and compares the decrypted verification code with the pre-stored verification code to see whether they are consistent.

[0038] The first single chip microcomputer encrypts the calculated check code and then sends it to the second single chip microcomputer, thereby improving the security of communication between the first single chip microcomputer and the second single chip microcomputer and further improving the security of the out-of-band management system.

[0039] In some embodiments of the present invention, Figure 1 Step S12 shown in FIG. 1 may include sending corresponding information to the first microcontroller based on the verification result. Figure 3 Steps S31~S32 shown.

[0040] S31. In response to the received verification code being consistent with the pre-stored verification code, the verification is passed, and a jump address is sent to the first single-chip microcomputer.

[0041] When the first single-chip microcomputer receives the jump address sent by the second single-chip microcomputer, it can execute the following Figure 2 In step S24 shown, that is, the first single-chip microcomputer, in response to receiving the jump address sent by the second single-chip microcomputer, jumps to the corresponding storage partition according to the received jump address to execute the program in the storage partition.

[0042] S32: In response to the received verification code being inconsistent with the pre-stored verification code, the verification fails, and verification failure information is sent to the first single-chip microcomputer. When the first single-chip microcomputer receives the verification failure information sent by the second single-chip microcomputer, it can execute the following Figure 2 Steps S25~S27 shown.

[0043] S25, the first single-chip microcomputer, in response to receiving the verification failure information sent by the second single-chip microcomputer, determines whether the number of verification failures in the verification failure information reaches a first threshold; S26, when the number of verification failures does not reach the first threshold, returning to the step of generating a verification code according to the received verification code query instruction by the first single-chip microcomputer, and sending the verification code to the second single-chip microcomputer; S27: When the number of verification failures reaches a first threshold, erasing the data stored on the second single-chip microcomputer and the data stored in the secure boot firmware itself based on the secure boot firmware.

[0044] In some embodiments of the present invention, Figure 4 As shown, the operating method of the out-of-band management system provided by the embodiment of the present invention may also include the following steps S40~S42.

[0045] S40: In response to the out-of-band management system being powered on for the first time after leaving the factory, the first single-chip microcomputer generates first encrypted information based on the first identification code, and sends the first encrypted information to the second single-chip microcomputer.

[0046] S41, the second single chip microcomputer parses the first identification code from the first encrypted information, generates second encrypted information based on the first identification code, encrypts the handshake information based on the second encrypted information, and sends the encrypted handshake information to the first single chip microcomputer.

[0047] S42: The first single chip computer verifies the received encrypted handshake information, and performs corresponding operations based on the verification result.

[0048] The first identification code may be a UID (User Identifie) of the first single-chip microcomputer. The UID is a unique identifier of the first single-chip microcomputer and may be an identifier consisting of a string of letters, numbers or symbols.

[0049] When the two MCUs are powered on for the first time, the first MCU can generate the first encrypted information based on its own UID. There are many ways to generate the first encrypted information based on the UID. For example, the first encrypted information can be generated according to the UID using a first encryption algorithm, but it is not limited to this and can also be other ways. The first encryption algorithm can be a symmetric encryption algorithm or an asymmetric encryption algorithm.

[0050] After receiving the first encrypted information sent by the first single-chip microcomputer, the second single-chip microcomputer decrypts the first encrypted information based on the same first encryption algorithm to obtain the first identification code, and encrypts the first identification code through the second encryption algorithm to obtain the second encrypted information, and packages the second encrypted information with the handshake information and sends them to the first single-chip microcomputer. The second encryption algorithm can be a symmetric encryption algorithm or an asymmetric encryption algorithm.

[0051] After the first single-chip microcomputer receives the packaged second encrypted information and handshake information (i.e., the encrypted handshake information) sent by the second single-chip microcomputer, it determines whether the received encrypted handshake information is consistent with the pre-stored handshake information. If they are consistent, the verification is successful and a communication connection is established with the second single-chip microcomputer. If they are inconsistent, the verification fails and the verification failure information is returned to the second single-chip microcomputer.

[0052] When the out-of-band management system is powered on for the first time, the embodiment of the present invention verifies the first single-chip microcomputer and the second single-chip microcomputer through the above verification method, and establishes a communication connection between the first single-chip microcomputer and the second single-chip microcomputer if the verification passes, thereby ensuring the security of communication.

[0053] In some examples, when the first single-chip microcomputer and the second single-chip microcomputer perform the first power-on verification, the first encryption algorithm may use an asymmetric encryption algorithm, and the second encryption algorithm may use a symmetric encryption algorithm. The first single-chip microcomputer and the second single-chip microcomputer respectively use different encryption algorithms to encrypt the first identification code, thereby upgrading the verification complexity and further improving the security of out-of-band management system communications.

[0054] In some embodiments of the present invention, Figure 4 In step S42, the first single-chip microcomputer verifies the received encrypted handshake information, and performs corresponding operations based on the verification result, which may include the following steps: Figure 2 The following steps S21~S23 are shown.

[0055] S21, the first single-chip microcomputer receives the encrypted handshake information sent by the second single-chip microcomputer, and determines whether the encrypted handshake information is consistent with the pre-stored first handshake information; S22, in response to the encrypted handshake information being consistent with the pre-stored first handshake information, the verification is successful, and the verification success information is sent to the second single-chip microcomputer so that the second single-chip microcomputer executes the step of sending a verification code query instruction to the first single-chip microcomputer based on the second single-chip microcomputer in response to the first single-chip microcomputer and the second single-chip microcomputer being turned on; S23: In response to the encrypted handshake information being inconsistent with the pre-stored first handshake information, the verification fails, and a verification failure prompt message is output.

[0056] The first handshake information is generated in advance by the first single-chip microcomputer based on the first identification code and by an encryption algorithm, and the encryption algorithm is consistent with the encryption algorithm of the handshake information encrypted by the second single-chip microcomputer.

[0057] After the first single-chip microcomputer receives the encrypted handshake information sent by the second single-chip microcomputer, it determines whether the encrypted handshake information is consistent with the pre-stored first handshake information. If they are consistent, a verification success message is sent to the second single-chip microcomputer. After receiving the verification success message, the second single-chip microcomputer sends a check code query instruction to the first single-chip microcomputer. If they are inconsistent, a verification failure message can be sent to the second single-chip microcomputer and / or the host computer. After the second single-chip microcomputer and / or the host computer receives the verification failure prompt message, the number of verification failures can be counted, and based on the number of verification failures, it is decided whether to re-verify or stop verification.

[0058] In the embodiment of the present invention, the first single-chip microcomputer and the second single-chip microcomputer need to be verified when they are powered on for the first time. Only after the verification is passed can subsequent communication encryption be performed. If the verification fails, the two single-chip microcomputers cannot work normally, further improving the security and reliability of the out-of-band management system. In some examples, if the encrypted handshake information is inconsistent with the pre-stored first handshake information, the first single-chip microcomputer sends a verification failure prompt message to the second single-chip microcomputer. After receiving the verification failure prompt message, the second single-chip microcomputer counts the number of verification failures and determines whether the counted number of verification failures reaches a second threshold. If the counted number of verification failures reaches the second threshold, the program is terminated. If the counted number of verification failures does not reach the second threshold, the first single-chip microcomputer is notified to resend the first identification code for re-verification.

[0059] Based on the same inventive concept, according to another aspect of the present invention, an embodiment of the present invention further provides an out-of-band management system 50, such as Figure 5 As shown, the out-of-band management system 50 includes a first single-chip microcomputer 51 and a second single-chip microcomputer 52. The second single-chip microcomputer 52 is configured to send a verification code query instruction to the first single-chip microcomputer in response to power-on. The first single-chip microcomputer 51 is configured to generate a verification code according to the received verification code query instruction in response to power-on and receiving the verification code query instruction sent by the second single-chip microcomputer 52, and send the verification code to the second single-chip microcomputer 52. The second single-chip microcomputer 52 is also configured to verify the received verification code, and send corresponding information to the first single-chip microcomputer 51 based on the verification result to instruct the first single-chip microcomputer to perform a corresponding operation according to the received information.

[0060] The out-of-band management system proposed in the embodiment of the present invention can be applied to various electronic devices, for example, desktop computers, laptop computers, servers, mobile phones, vehicle-mounted computers, smart cars and other electronic devices.

[0061] The out-of-band management system proposed in the embodiment of the present invention can be applied to various fields, especially high-security fields, such as industrial control, medical equipment, security monitoring and other fields.

[0062] The out-of-band management system proposed in the embodiment of the present invention executes the services of the out-of-band management system through the cooperation of the first single-chip microcomputer and the second single-chip microcomputer. The second single-chip microcomputer verifies the second single-chip microcomputer before sending the jump address, and sends the jump address to the second single-chip microcomputer after the verification. The first single-chip microcomputer jumps to the corresponding storage area according to the jump address sent by the second single-chip microcomputer to execute the service, thereby preventing external devices from attacking and tampering with the out-of-band management system, and greatly improving the security and reliability of system operation.

[0063] In some embodiments, Figure 6 As shown, the first single-chip microcomputer 51 may include a secure boot module, a first encryption and decryption module, a first interaction module, a distributed firmware module and a first security protection module. The second single-chip microcomputer 52 may include a secure boot authorization module, a second encryption and decryption module, a second interaction module, an address jump query module and a second security protection module.

[0064] The secure boot module is used to perform a secure boot check on the first single-chip microcomputer when the first single-chip microcomputer is powered on.

[0065] The first encryption / decryption module is used to encrypt information to be sent to the second single-chip microcomputer and to decrypt the encrypted information received from the second single-chip microcomputer.

[0066] The first interaction module is used to pack the information into a sending protocol and send it to the second single-chip microcomputer, and receive and analyze the information sent by the second single-chip microcomputer.

[0067] The distributed firmware module is used to load the secure boot firmware to generate a verification code, generate a firmware address jump query command, and implement an address jump function according to the address returned by the second single-chip microcomputer.

[0068] The first security protection module is used to perform an erasure operation in the event of a verification failure.

[0069] The secure boot authorization module is used to perform a secure boot check on the first single-chip microcomputer when the second single-chip microcomputer is powered on.

[0070] The second encryption / decryption module is used to encrypt information to be sent to the first single-chip microcomputer and to decrypt the encrypted information received from the first single-chip microcomputer.

[0071] The second interaction module is used to pack the information into a sending protocol and send it to the first single-chip microcomputer, and receive and analyze the information sent by the first single-chip microcomputer.

[0072] The address jump query module is used to send a jump address to the first single-chip microcomputer based on a safety boot verification result or send a jump address to the first single-chip microcomputer based on a jump address request of the first single-chip microcomputer.

[0073] The second security protection module is used to set read and write protection for the storage area of ​​the second single-chip microcomputer.

[0074] Based on the same inventive concept, according to another aspect of the present invention, an embodiment of the present invention further provides an electronic device, which includes the out-of-band management system as described in the above embodiment.

[0075] The electronic device proposed in the embodiment of the present invention executes the services of the out-of-band management system through the cooperation of the first single-chip microcomputer and the second single-chip microcomputer. The second single-chip microcomputer verifies the second single-chip microcomputer before sending the jump address. After the verification is passed, the jump address is sent to the second single-chip microcomputer. The first single-chip microcomputer jumps to the corresponding storage area according to the jump address sent by the second single-chip microcomputer to execute the service, thereby preventing external devices from attacking and tampering with the out-of-band management system, greatly improving the security and reliability of the operation of the out-of-band management system and the electronic equipment system.

[0076] It should be understood that the various exemplary logic blocks, modules, circuits and algorithm steps described in conjunction with the disclosure herein can be implemented as electronic hardware, computer software or a combination of the two. In order to clearly illustrate this interchangeability of hardware and software, a general description has been given to the functions of various schematic components, blocks, modules, circuits and steps. Whether this function is implemented as software or implemented as hardware depends on specific applications and the design constraints imposed on the entire system. Those skilled in the art can implement the function in various ways for each specific application, but this implementation decision should not be interpreted as causing a departure from the disclosed scope of the embodiments of the present invention.

[0077] The above are exemplary embodiments disclosed in the present invention, but it should be noted that various changes and modifications may be made without departing from the scope of the embodiments disclosed in the present invention as defined in the claims. The functions, steps and / or actions of the method claims according to the disclosed embodiments described herein do not need to be performed in any particular order. The serial numbers of the embodiments disclosed in the above embodiments of the present invention are for description only and do not represent the advantages and disadvantages of the embodiments. In addition, although the elements disclosed in the embodiments of the present invention may be described or required in individual form, they may also be understood as multiple unless explicitly limited to the singular.

[0078] It should be understood that, as used herein, the singular forms "a", "an" are intended to include the plural forms as well, unless the context clearly supports an exception. It should also be understood that, as used herein, "and / or" refers to any and all possible combinations including one or more of the associated listed items.

[0079] A person skilled in the art should understand that the discussion of any of the above embodiments is only exemplary and is not intended to imply that the scope of the disclosure of the embodiments of the present invention (including the claims) is limited to these examples; under the concept of the embodiments of the present invention, the technical features in the above embodiments or different embodiments can also be combined, and there are many other changes in different aspects of the above embodiments of the present invention, which are not provided in detail for the sake of simplicity. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the embodiments of the present invention should be included in the protection scope of the embodiments of the present invention.

Claims

1. A method for operating an out-of-band management system, characterized in that: The out-of-band management system includes a first single-chip microcomputer and a second single-chip microcomputer, and the method includes: In response to the first single-chip microcomputer and the second single-chip microcomputer being powered on, sending a verification code query instruction to the first single-chip microcomputer based on the second single-chip microcomputer; The first single-chip microcomputer generates a verification code according to the received verification code query instruction, and sends the verification code to the second single-chip microcomputer; The second single-chip microcomputer verifies the received verification code, and sends corresponding information to the first single-chip microcomputer based on the verification result; The first single chip microcomputer performs corresponding operations according to the received information.

2. The method according to claim 1, characterized in that The storage area of ​​the first single-chip microcomputer includes a plurality of storage partitions; the second single-chip microcomputer stores information of all storage partitions of the first single-chip microcomputer; Sending a verification code query instruction to the first single-chip microcomputer based on the second single-chip microcomputer includes: The second single-chip microcomputer generates the verification code query instruction based on the information of any storage partition of the first single-chip microcomputer, and sends the generated verification code query instruction to the first single-chip microcomputer.

3. The method according to claim 2, characterized in that The first single-chip microcomputer generates a verification code according to the received verification code query instruction, including: The secure boot firmware of the first single-chip microcomputer obtains verification information from the received verification code query instruction, and calculates the verification information based on a verification algorithm to obtain a verification code.

4. The method according to claim 3, characterized in that Sending the verification code to the second single-chip microcomputer includes: encrypting the verification code and sending the encrypted verification code to the second single-chip microcomputer; The second single-chip microcomputer verifies the received verification code, including: the second single-chip microcomputer decrypts the received encrypted verification code to obtain the decrypted verification code, and compares the decrypted verification code with the pre-stored verification code to see whether they are consistent.

5. The method according to claim 4, characterized in that Sending corresponding information to the first single-chip microcomputer based on the verification result includes: in response to the received verification code being consistent with the pre-stored verification code, the verification is passed, and sending a jump address to the first single-chip microcomputer; The first single-chip microcomputer performs corresponding operations according to the received information, including: in response to receiving a jump address sent by the second single-chip microcomputer, the first single-chip microcomputer jumps to a corresponding storage partition according to the received jump address to execute a program in the storage partition.

6. The method according to claim 4, characterized in that Sending corresponding information to the first single-chip microcomputer based on the verification result includes: in response to the received verification code being inconsistent with the pre-stored verification code, the verification fails, sending verification failure information to the first single-chip microcomputer; The first single-chip microcomputer performs corresponding operations according to the received information, including: the first single-chip microcomputer determines whether the number of verification failures in the verification failure information reaches a first threshold in response to receiving the verification failure information sent by the second single-chip microcomputer; when the number of verification failures does not reach the first threshold, the first single-chip microcomputer generates a verification code according to the received verification code query instruction, and sends the verification code to the second single-chip microcomputer; when the number of verification failures reaches the first threshold, the data stored on the second single-chip microcomputer and the data stored in the secure boot firmware itself are erased based on the secure boot firmware.

7. The method according to claim 1, characterized in that Also includes: In response to the out-of-band management system being powered on for the first time after leaving the factory, the first single-chip microcomputer generates first encrypted information based on the first identification code, and sends the first encrypted information to the second single-chip microcomputer; The second single-chip microcomputer parses the first identification code from the first encrypted information, generates second encrypted information based on the first identification code, encrypts the handshake information based on the second encrypted information, and sends the encrypted handshake information to the first single-chip microcomputer; The first single chip microcomputer verifies the received encrypted handshake information and performs corresponding operations based on the verification result.

8. The method according to claim 7, characterized in that The first single chip computer verifies the received encrypted handshake information and performs corresponding operations based on the verification result, including: The first single-chip computer determines whether the encrypted handshake information is consistent with the pre-stored first handshake information; In response to the encrypted handshake information being consistent with the pre-stored first handshake information, the verification is successful, and a verification success message is sent to the second single-chip microcomputer so that the second single-chip microcomputer executes the step of sending a verification code query instruction to the first single-chip microcomputer based on the second single-chip microcomputer in response to the first single-chip microcomputer and the second single-chip microcomputer being turned on; In response to the encrypted handshake information being inconsistent with the pre-stored first handshake information, the verification fails, and a verification failure prompt message is output.

9. An out-of-band management system, characterized in that: The out-of-band management system includes a first single-chip microcomputer and a second single-chip microcomputer; The second single-chip microcomputer is configured to send a verification code query instruction to the first single-chip microcomputer in response to powering on; The first single-chip microcomputer is configured to generate a verification code according to the received verification code query instruction in response to being powered on and receiving the verification code query instruction sent by the second single-chip microcomputer, and send the verification code to the second single-chip microcomputer; The second single-chip microcomputer is further configured to verify the received verification code, and send corresponding information to the first single-chip microcomputer based on the verification result to instruct the first single-chip microcomputer to perform a corresponding operation according to the received information.

10. An electronic device, characterized in that: Includes the out-of-band management system as claimed in claim 9.

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