Electrostatic discharge protection device and forming method thereof

Abstract

The invention discloses an electrostatic discharge protection device and a forming method thereof, and the structure comprises a substrate which comprises a first well region and a second well region which are in contact with each other, and the first well region and the second well region are arranged along a first direction parallel to the surface of the substrate; the first doped regions are located in the first well region and are separated from one another, the first doped regions are arranged in the second direction parallel to the surface of the substrate, and the second direction is perpendicular to the first direction; and a plurality of second doped regions which are located in the second well region and are separated from one another, wherein the plurality of second doped regions are arranged along a second direction parallel to the surface of the substrate. The first doped regions and the second doped regions which are separated from each other reduce the area of the emitter, increase the working voltage of the electrostatic discharge protection device, improve the performance of the electrostatic discharge protection device, reduce the area of the electrostatic discharge protection device and improve the integration level of the electrostatic discharge protection device.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor manufacturing, and in particular to an electrostatic discharge protection device and a forming method thereof. Background Art

[0002] Electrostatic discharge (ESD) may damage the internal circuits of components, directly affecting the normal service life of the product, or even causing damage to the product. Therefore, when designing a chip, it is necessary to design an electrostatic discharge protection device on the port inside the chip.

[0003] Silicon Controlled Rectifier (SCR) electrostatic protection devices have the advantages of high discharge current per unit area, small on-resistance, strong robustness and high protection level due to their own positive feedback mechanism. They can achieve a higher electrostatic discharge protection level with a smaller layout area. Therefore, such devices will become popular devices for electrostatic protection of integrated circuits.

[0004] However, thyristor devices are still mainly concentrated in the low voltage field, that is, mainly low-voltage thyristor (Low-voltage-triggered SCR, abbreviated as LVTSCR) devices, which limits their application in integrated circuits. Thyristor devices with high operating voltage need to be further developed.

[0005] Therefore, the performance of existing thyristor electrostatic discharge protection devices needs to be improved urgently. Summary of the invention

[0006] The technical problem solved by the present invention is to provide an electrostatic discharge protection device and a forming method thereof, so as to improve the working voltage of the electrostatic discharge protection device.

[0007] To solve the above technical problems, an embodiment of the present invention provides an electrostatic discharge protection device, including: a substrate, the substrate including a first well region and a second well region in contact with each other, the first well region and the second well region are arranged along a first direction parallel to the substrate surface, and the first well region and the second well region have different conductivity types; a plurality of mutually discrete first doping regions located in the first well region, the plurality of first doping regions are arranged along a second direction parallel to the substrate surface, the second direction is perpendicular to the first direction, and the doping type of the first doping region is different from that of the first well region; a plurality of mutually discrete second doping regions located in the second well region, the plurality of second doping regions are arranged along a second direction parallel to the substrate surface, and the doping type of the second doping region is different from that of the second well region.

[0008] Optionally, the electrostatic discharge protection device further includes: a third doping region located in the first well region, the doping type of the third doping region is the same as that of the first well region, and the doping concentration of the third doping region is greater than the doping concentration of the first well region.

[0009] Optionally, the electrostatic discharge protection device further includes: a fourth doping region located in the second well region, the doping type of the fourth doping region is the same as that of the second well region, and the doping concentration of the fourth doping region is greater than the doping concentration of the second well region.

[0010] Optionally, the electrostatic discharge protection device also includes: a fifth doping region located in the first well region, the fifth doping region is located between adjacent first doping regions, the doping type of the fifth doping region is the same as that of the first well region, and the doping concentration of the fifth doping region is greater than the doping concentration of the first well region.

[0011] Optionally, the electrostatic discharge protection device also includes: a sixth doping region located in the second well region, the sixth doping region is located between adjacent second doping regions, the doping type of the sixth doping region is the same as that of the second well region, and the doping concentration of the sixth doping region is greater than the doping concentration of the second well region.

[0012] Optionally, the substrate includes a first semiconductor layer, an insulating layer located on the surface of the first semiconductor layer, and a second semiconductor layer located on the insulating layer; the bottoms of the first well region and the second well region are in contact with the top surface of the insulating layer.

[0013] Optionally, the second semiconductor layer has one or more layers, and the material of the second semiconductor layer includes: single crystal silicon, silicon germanium or germanium.

[0014] Optionally, the electrostatic discharge protection device further includes: an isolation structure located in the substrate, wherein the isolation structure surrounds the first well region and the second well region.

[0015] Optionally, the electrostatic discharge protection device further includes: a gate layer located on the top surface of the first well region and the surface of the second well region.

[0016] Optionally, the electrostatic discharge protection device further includes: a first contact layer located on the top surface of the first doping region, the top surface of the second doping region, the top surface of the third doping region, and the top surface of the fourth doping region.

[0017] Optionally, a width of the first doping region in the first direction ranges from 0.5 micrometers to 8 micrometers, and a width of the second doping region in the first direction ranges from 0.5 micrometers to 8 micrometers.

[0018] Optionally, the number of the first doping regions is the same as the number of the second doping regions, and the number of the fifth doping regions is the same as the number of the sixth doping regions.

[0019] Optionally, the number of the first doping region, the second doping region, the fifth doping region and the sixth doping region ranges from 1 to 16.

[0020] Optionally, the ion doping concentration of the first doping region is 1.0×10 15 atom / cm 3 Up to 9×10 15 atom / cm 3 The ion doping concentration of the second doping region is 1.0×10 15 atom / cm 3 Up to 9×10 15 atom / cm 3 The ion doping concentration of the third doping region is 1.0×10 12 atom / cm 3 to 1.0×10 13 atom / cm 3 The ion doping concentration of the fourth doping region is 1.0×10 12 atom / cm 3 to 1.0×10 13 atom / cm 3 The doping concentration of the fifth doping region is 1.0×10 15 atom / cm 3 Up to 9×10 15 atom / cm 3 The ion doping concentration of the sixth doping region is 1.0×10 15 atom / cm 3 Up to 9×10 15 atom / cm 3 .

[0021] Correspondingly, the technical solution of the present invention also provides a method for forming an electrostatic discharge protection device, including: providing a substrate, the substrate including a first well region and a second well region in contact, the first well region and the second well region are arranged along a first direction parallel to the substrate surface, and the first well region and the second well region have different conductivity types; forming a plurality of mutually discrete first doping regions in the first well region, the plurality of first doping regions are arranged along a second direction parallel to the substrate surface, the second direction is perpendicular to the first direction, and the doping type of the first doping region is different from that of the first well region; forming a plurality of mutually discrete second doping regions in the second well region, the plurality of second doping regions are arranged along a second direction parallel to the substrate surface, and the doping type of the second doping region is different from that of the second well region.

[0022] Optionally, the method for forming the first doped region and the second doped region includes: performing a first ion implantation treatment on the substrate to form a first well region; performing a second ion implantation treatment on the substrate to form a second well region; performing a third ion implantation treatment on the first well region to form a first doped region; and performing a fourth ion implantation treatment on the second well region to form a second doped region.

[0023] Optionally, the method for forming the electrostatic discharge protection device also includes: after forming the first doping region and the second doping region, performing a fifth ion implantation treatment on the first well region to form a third doping region; performing a sixth ion implantation treatment on the second well region to form a fourth doping region; performing a seventh ion implantation treatment on the first well region to form a fifth doping region; and performing an eighth ion implantation treatment on the second well region to form a sixth doping region.

[0024] Optionally, the conductivity types of the first well region and the second well region are opposite, the ion implantation energy of the first ion implantation process and the second ion implantation process is 10 KeV to 100 KeV, and the ion implantation dose of the first ion implantation process and the second ion implantation process is 1.0×10 12 atom / cm 2 to 1.0×10 13 atom / cm 2 The conductivity types of the first doping region and the second doping region are opposite, the ion implantation energy of the third ion implantation process and the fourth ion implantation process is 5KeV to 80KeV, and the ion implantation dose of the third ion implantation process and the fourth ion implantation process is 1.0×10 15 atom / cm 2 Up to 9×10 15 atom / cm 2 The conductivity types of the third doping region and the fourth doping region are opposite, the ion implantation energy of the fifth ion implantation process and the sixth ion implantation process is 5KeV to 100KeV, and the ion implantation dose of the fifth ion implantation process and the sixth ion implantation process is 1.0×10 12 atom / cm 2 to 1.0×10 13 atom / cm 2 The conductivity types of the fifth doping region and the sixth doping region are opposite, the ion implantation energy of the seventh ion implantation process and the eighth ion implantation process is 5KeV to 80KeV, and the ion implantation dose of the seventh ion implantation process and the eighth ion implantation process is 1×10 15 atom / cm 2 Up to 9×10 15 atom / cm2 .

[0025] Optionally, the substrate includes a first semiconductor layer, an insulating layer located on a surface of the first semiconductor layer, and a second semiconductor layer located on the insulating layer, and the bottoms of the first well region and the second well region are in contact with a top surface of the insulating layer.

[0026] Optionally, the second semiconductor layer has one or more layers, and the material of the second semiconductor layer includes: single crystal silicon, silicon germanium or germanium.

[0027] Optionally, the method for forming the electrostatic discharge protection device also includes: after forming the first well region and the second well region, etching both sides of the first well region and the second well region until the insulating layer is exposed to form a shallow trench; depositing an initial isolation structure in the shallow trench; and planarizing the initial isolation structure to form an isolation structure.

[0028] Optionally, the method for forming the electrostatic discharge protection device further includes: after forming the first well region and the second well region, depositing a gate layer on the top surfaces of the first well region and the second well region, wherein the gate layer exposes a portion of the surfaces of the first well region and the second well region.

[0029] Optionally, the method for forming the electrostatic discharge protection device further includes: after forming the gate layer, depositing a first contact layer on the top surfaces of the first doping region, the second doping region, the third doping region, the fourth doping region, the fifth doping region and the sixth doping region.

[0030] Optionally, the method for forming the electrostatic discharge protection device further includes: after forming the first well region and the second well region, forming a barrier layer on the top surfaces of the first well region and the second well region, wherein the barrier layer exposes a portion of the surface of the first well region and the second well region.

[0031] Optionally, the method for forming the electrostatic discharge protection device further includes: after forming the blocking layer, depositing a second contact layer on the top surfaces of the first doping region, the second doping region, the third doping region, the fourth doping region, the fifth doping region and the sixth doping region.

[0032] Optionally, the method for forming the electrostatic discharge protection device further includes: the width of the first doping region in the first direction ranges from 0.5 micrometers to 8 micrometers, and the width of the second doping region in the first direction ranges from 0.5 micrometers to 8 micrometers.

[0033] Optionally, the method for forming the electrostatic discharge protection device further includes: the number of the first doping regions is the same as the number of the second doping regions, and the number of the fifth doping regions is the same as the number of the sixth doping regions.

[0034] Optionally, the method for forming the electrostatic discharge protection device further includes: the number of the first doping region, the second doping region, the fifth doping region and the sixth doping region ranges from 1 to 16.

[0035] Compared with the prior art, the technical solution of the embodiment of the present invention has the following beneficial effects:

[0036] In the method for forming an electrostatic discharge protection device provided by the technical solution of the present invention, by forming a plurality of mutually separate first doping regions in the first well region, and forming a plurality of mutually separate second doping regions in the second well region, the areas of the first doping region and the second doping region are reduced, that is, the area of ​​the emitter is reduced, so that the electrostatic discharge protection device is in a high-resistance state, thereby increasing the operating voltage of the electrostatic discharge protection device, improving the performance of the electrostatic discharge protection device, and reducing the area of ​​the electrostatic discharge protection device, thereby improving the integration of the electrostatic discharge protection device. In addition, the electrostatic discharge protection device provided by the technical solution of the present invention can be formed on different substrates, thereby improving the uniformity and stability of the manufacturing process.

[0037] Furthermore, the number of the first doping region and the second doping region in the technical solution of the present invention can be adjusted, thereby controlling the area of ​​the first doping region and the second doping region, that is, controlling the area of ​​the emitter, so that the working voltage of the electrostatic discharge protection device changes with the area of ​​the first doping region and the second doping region, thereby realizing the controllability of the working voltage of the electrostatic discharge protection device and improving the performance of the electrostatic discharge protection device.

[0038] Furthermore, the technical solution of the present invention forms a fifth doping region between several mutually discrete first doping regions, and forms a sixth doping region between several mutually discrete second doping regions, so that the body contact area between the first doping regions and the second doping regions is increased, thereby improving the conductivity of the electrostatic discharge protection device.

[0039] Furthermore, in the technical solution of the present invention, the barrier layers on the top surface of the first region, the top surface of the first well region, the top surface of the second region, the top surface of the third region, the second well region and the top surface of the fourth region achieve precise alignment of the second contact layer formed subsequently, avoiding the risk of gate oxide breakdown of the electrostatic discharge protection device during high voltage and high power applications, and simplifies the process steps.

[0040] In the electrostatic discharge protection device provided by the technical solution of the present invention, a plurality of mutually separate first doping regions located in the first well region, and a plurality of mutually separate second doping regions located in the second well region, reduce the area of ​​the first doping region and the second doping region, that is, reduce the area of ​​the emitter, so that the electrostatic discharge protection device is in a high-resistance state, thereby increasing the operating voltage of the electrostatic discharge protection device, improving the performance of the electrostatic discharge protection device, and reducing the area of ​​the electrostatic discharge protection device, thereby improving the integration of the electrostatic discharge protection device. In addition, the electrostatic discharge protection device provided by the technical solution of the present invention can be formed on different substrates, thereby improving the uniformity and stability of the manufacturing process.

[0041] Furthermore, the number of the first doping region and the second doping region in the technical solution of the present invention can be adjusted, thereby controlling the area of ​​the first doping region and the second doping region, that is, controlling the area of ​​the emitter, so that the working voltage of the electrostatic discharge protection device changes with the area of ​​the first doping region and the second doping region, thereby realizing the controllability of the working voltage of the electrostatic discharge protection device and improving the performance of the electrostatic discharge protection device.

[0042] Furthermore, in the technical solution of the present invention, the fifth doping region located between several mutually discrete first doping regions and the sixth doping region located between several mutually discrete second doping regions increase the body contact area between the first doping regions and the second doping regions, thereby improving the conductivity of the electrostatic discharge protection device.

[0043] Furthermore, in the technical solution of the present invention, the barrier layers on the top surface of the first region, the top surface of the first well region, the top surface of the second region, the top surface of the third region, the second well region and the top surface of the fourth region achieve precise alignment of the second contact layer formed subsequently, avoiding the risk of gate oxide breakdown of the electrostatic discharge protection device during high voltage and high power applications, and simplifies the process steps. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] Figure 1 to Figure 2 It is a structural schematic diagram of an electrostatic discharge protection device;

[0045] Figures 3 to 12 is a structural schematic diagram of a formation process of an electrostatic discharge protection device in one embodiment of the present invention;

[0046] Figures 13 to 20 is a structural schematic diagram of a formation process of an electrostatic discharge protection device in another embodiment of the present invention;

[0047] Fig.21 Schematic diagram of the circuit structure of the electrostatic discharge protection device in an embodiment of the present invention. DETAILED DESCRIPTION

[0048] It should be noted that the terms “surface” and “on” in this specification are used to describe relative positional relationships in space and are not limited to direct contact.

[0049] As described in the background art, it is necessary to increase the working voltage of the electrostatic discharge protection device. Now, an analysis and explanation will be given in conjunction with a specific embodiment.

[0050] Figure 1 to Figure 2 It is a structural schematic diagram of an electrostatic discharge protection device.

[0051] Please refer to Figure 1 as well as Figure 2 , Figure 2 This is a top view of the structure. Figure 1 yes Figure 2 In the cross-sectional schematic diagram along line AA1, the electrostatic discharge protection device comprises: a substrate, the substrate comprises a first semiconductor layer 100, an insulating layer 101 located on the surface of the first semiconductor layer 100, and a second semiconductor layer (not shown in the figure) located on the insulating layer 101, the second semiconductor layer (not shown in the figure) comprises a first well region I and a second well region II adjacently arranged along a first direction X parallel to the surface of the substrate, the first well region I and the second well region II have different conductivity types; a first doped region 102 located in the first well region I, the first doped region 102 is arranged along a second direction Y parallel to the surface of the substrate, the second direction Y is perpendicular to the first direction X, and the doping type of the first doped region 102 is different from that of the first well region I; a second doped region 103 located in the second well region II, the second doped region 103 is arranged along a second direction Y parallel to the surface of the substrate, and the doping type of the second doped region 103 is different from that of the second well region II.

[0052] In this embodiment, the electrostatic discharge protection device also includes: a third doping region 104 located in the first well region I, the doping type of the third doping region 104 is the same as that of the first well region I, and the doping concentration of the third doping region 104 is greater than the doping concentration of the first well region I.

[0053] In this embodiment, the electrostatic discharge protection device also includes: a fourth doping region 105 located in the second well region II, the doping type of the fourth doping region 105 is the same as that of the second well region II, and the doping concentration of the fourth doping region 105 is greater than the doping concentration of the second well region II.

[0054] In this embodiment, the electrostatic discharge protection device further includes an isolation structure 106 located in the substrate, and the isolation structure 106 surrounds the first well region I and the second well region II.

[0055] In the triode, the area of ​​the first doped region 102 and the second doped region 103 is the area of ​​the emitter, and the area of ​​the first well region I and the second well region II is the area of ​​the base. There is a relationship between the areas of the emitter and the base and the impedance of the triode, that is, the smaller the area of ​​the emitter or the larger the area of ​​the base, the higher the impedance of the triode, and thus the higher the operating voltage of the triode. Therefore, increasing the operating voltage of the electrostatic discharge protection device needs to be achieved by reducing the emitter area or increasing the base area.

[0056] The areas of the first doped region 102 and the second doped region 103 in the above scheme are the same as those of the third doped region 104 and the fourth doped region 105. In order to increase the working voltage of the electrostatic discharge protection device, it is necessary to increase the width of the first well region I and the second well region II along the first direction X, thereby increasing the area of ​​the first well region I and the second well region II (i.e., the area of ​​the base). However, the increase in the width of the first well region I and the second well region II also increases the lateral area of ​​the electrostatic discharge protection device, which is not conducive to the integration of the electrostatic discharge protection device.

[0057] In order to solve the above technical problems, the technical solution of the present invention provides a method for forming an electrostatic discharge protection device, by forming a plurality of mutually separate first doping regions in the first well region, and forming a plurality of mutually separate second doping regions in the second well region, the areas of the first doping region and the second doping region are reduced, that is, the area of ​​the emitter is reduced, so that the electrostatic discharge protection device is in a high-resistance state, thereby increasing the operating voltage of the electrostatic discharge protection device, improving the performance of the electrostatic discharge protection device, and reducing the area of ​​the electrostatic discharge protection device, thereby improving the integration of the electrostatic discharge protection device. In addition, the electrostatic discharge protection device provided by the technical solution of the present invention can be formed on different substrates, thereby improving the uniformity and stability of the manufacturing process.

[0058] In order to make the above-mentioned objects, features and beneficial effects of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0059] Figures 3 to 12 It is a structural schematic diagram of the formation process of an electrostatic discharge protection device in one embodiment of the present invention.

[0060] Please refer to Figure 3 as well as Figure 4 , Figure 3 This is a top view of the structure. Figure 4 yes Figure 3 In the cross-sectional schematic diagram along line AA1, a substrate is provided, the substrate includes a first well region I and a second well region II in contact, the first well region I and the second well region II are arranged along a first direction X parallel to the surface of the substrate, and the first well region I and the second well region II have different conductivity types.

[0061] In this embodiment, the substrate includes a first semiconductor layer 200, an insulating layer 201 located on the surface of the first semiconductor layer 200, and a second semiconductor layer (not shown in the figure) located on the insulating layer 201, and the bottom of the first well region I and the second well region II are in contact with the top surface of the insulating layer 201.

[0062] The second semiconductor layer (not shown in the figure) is used to provide a holding space for the first doping region 204 to the sixth doping region 209 to be formed subsequently.

[0063] The second semiconductor layer (not shown in the figure) has one or more layers. The material of the second semiconductor layer (not shown in the figure) includes: single crystal silicon, silicon germanium or germanium.

[0064] In this embodiment, the material of the second semiconductor layer (not shown in the figure) is single crystal silicon.

[0065] The substrate material also includes silicon carbide, silicon germanium, and a multi-component semiconductor material composed of group III-V elements. Among them, the multi-component semiconductor material composed of group III-V elements includes InP, GaAs, GaP, InAs, InSb, InGaAs, or InGaAsP.

[0066] The method for forming the first well region I includes: performing a first ion implantation process on the substrate to form the first well region I.

[0067] The method for forming the second well region II includes: performing a second ion implantation process on the substrate to form the second well region II.

[0068] In this embodiment, the conductivity types of the first well region I and the second well region II are opposite, the ion implantation energy of the first ion implantation process and the second ion implantation process is 10KeV to 100KeV, and the ion implantation dose of the first ion implantation process and the second ion implantation process is 1.0×10 12 atom / cm 2 to 1.0×10 13 atom / cm 2 .

[0069] In this embodiment, the doping ions in the first well region I are P-type doping ions, and the doping ions in the second well region II are N-type doping ions.

[0070] In this embodiment, the depths of the first well region I and the second well region II range from 50 nanometers to 200 nanometers.

[0071] In this embodiment, the width of the first well region I in the first direction X ranges from 1.5 micrometers to 26 micrometers, and the width of the second well region II in the first direction X ranges from 1.5 micrometers to 26 micrometers.

[0072] The method for forming the electrostatic discharge protection device also includes: after forming the first well region I and the second well region II, etching both sides of the first well region I and the second well region II until the insulating layer 201 is exposed to form a shallow trench (not shown in the figure); depositing an initial isolation structure (not shown in the figure) in the shallow trench (not shown in the figure); and planarizing the initial isolation structure (not shown in the figure) to form an isolation structure 202.

[0073] The shallow trench (not shown in the figure) is used to accommodate the isolation structure 202 formed subsequently.

[0074] The isolation structure 202 is used to avoid electrical crosstalk between adjacent electrostatic discharge protection devices.

[0075] The method of forming the isolation structure 202 includes one or more of chemical vapor deposition, physical deposition, atomic layer deposition, and jet vapor deposition, and the reaction temperature ranges from 400 degrees Celsius to 800 degrees Celsius.

[0076] In this embodiment, the isolation structure 202 is formed by chemical vapor deposition.

[0077] Planarization methods include mechanical polishing, chemical polishing, fluid polishing, and chemical mechanical polishing.

[0078] In this embodiment, the planarization process is performed by mechanical polishing.

[0079] In this embodiment, the material of the isolation structure 202 includes silicon oxide.

[0080] Please refer to Figure 5 as well as Figure 6 , Figure 5 This is a top view of the structure. Figure 6 yes Figure 5 In the cross-sectional schematic diagram along line AA1, after forming the first well region I and the second well region II, a gate layer 203 is deposited on the top surface of the first well region I and the second well region II, and the gate layer 203 exposes part of the surface of the first well region I and the second well region II.

[0081] In this embodiment, the material of the gate layer 203 includes polysilicon.

[0082] The method for forming the gate layer 203 includes: depositing an initial gate layer (not shown in the figure) on the top surface of the first well region I and the second well region II, forming a first mask layer on the surface of the initial gate layer (not shown in the figure), the first mask layer (not shown in the figure) exposing a portion of the surface of the initial gate layer (not shown in the figure); using the first mask layer as a mask, etching the initial gate layer (not shown in the figure) to form a plurality of discrete gate layers 203.

[0083] The process of etching the initial gate layer includes wet etching or dry etching. Wet etching is a technique of etching by immersing the etching material in an etching solution. It is a pure chemical etching with excellent selectivity. Wet etching is isotropic. Dry etching includes isotropic radial etching, reactive ion etching, sputtering etching, ion milling, ion beam assisted etching, reactive ion beam etching, etc. Dry etching is anisotropic.

[0084] In this embodiment, the process of etching the initial gate layer is wet etching.

[0085] The gate layer 203 is formed by one or more of chemical vapor deposition, physical deposition, atomic layer deposition, and jet vapor deposition. The deposition gas includes hydrogen and monosilane. The reaction temperature ranges from 400 degrees Celsius to 800 degrees Celsius.

[0086] Please refer to Figure 7 as well as Figure 8 , Figure 7 This is a top view of the structure. Figure 8 yes Figure 7 In the cross-sectional schematic diagram along line AA1, a plurality of mutually independent first doping regions 204 are formed in the first well region I, and the plurality of first doping regions 204 are arranged along a second direction Y parallel to the substrate surface, the second direction Y is perpendicular to the first direction X, and the doping type of the first doping region 204 is different from that of the first well region I; a plurality of mutually independent second doping regions 205 are formed in the second well region II, and the plurality of second doping regions 205 are arranged along a second direction Y parallel to the substrate surface, and the doping type of the second doping region 205 is different from that of the second well region II.

[0087] The method for forming the first doping region 204 and the second doping region 205 includes: performing a third ion implantation process on the first well region I to form the first doping region 204 ; performing a fourth ion implantation process on the second well region II to form the second doping region 205 .

[0088] In this embodiment, the conductivity types of the first doping region 204 and the second doping region 205 are opposite, the ion implantation energy of the third ion implantation process and the fourth ion implantation process is 5KeV to 80KeV, and the ion implantation dose of the third ion implantation process and the fourth ion implantation process is 1.0×10 15 atom / cm 2 Up to 9×10 15 atom / cm 2 .

[0089] In this embodiment, the doping ions in the first doping region 204 are N-type doping ions, and the doping ions in the second doping region 205 are P-type doping ions.

[0090] In this embodiment, the depths of the first doping region 204 and the second doping region 205 range from 25 nanometers to 100 nanometers or from 50 nanometers to 200 nanometers; the width of the first doping region 204 along the first direction X ranges from 0.5 micrometers to 8 micrometers.

[0091] The number of the first doping regions 204 and the second doping regions 205 is related to the emitter area of ​​the electrostatic discharge protection device. By changing the number of the first doping regions 204 and the second doping regions 205, the emitter area is changed, thereby adjusting the operating voltage of the electrostatic discharge protection device.

[0092] The number of the first doping regions 204 and the second doping regions 205 ranges from 1 to 16.

[0093] In this embodiment, the number of the first doping regions 204 and the number of the second doping regions 205 are both four.

[0094] In the above scheme, when the number of the first doping region 204 and the second doping region 205 is the same, and the number of the fifth doping region 208 and the sixth doping region 209 is the same, the operating voltage of the electrostatic discharge protection device is the highest, that is, the electrostatic discharge protection device has the strongest high voltage resistance and protection capability.

[0095] The method for forming the electrostatic discharge protection device further includes: after forming the first doping region 204 and the second doping region 205 , performing a fifth ion implantation process on the first well region I to form a third doping region 206 ; performing a sixth ion implantation process on the second well region II to form a fourth doping region 207 .

[0096] In this embodiment, the conductivity types of the third doping region 206 and the fourth doping region 207 are opposite, the ion implantation energy of the fifth ion implantation process and the sixth ion implantation process is 5KeV to 100KeV, and the ion implantation dose of the fifth ion implantation process and the sixth ion implantation process is 1.0×1012 atom / cm 2 to 1.0×10 13 atom / cm 2 .

[0097] In this embodiment, the doping ions in the third doping region 206 are P-type doping ions, and the doping ions in the fourth doping region 207 are N-type doping ions.

[0098] In this embodiment, the depth of the third doping region 206 and the fourth doping region 207 ranges from 50 nanometers to 200 nanometers; the width of the third doping region 206 and the fourth doping region 207 along the first direction X ranges from 0.5 micrometers to 8 micrometers.

[0099] In this embodiment, the distance between the first doping region 204 and the third doping region 206 in the first direction X ranges from 0 micrometers to 2 micrometers, and the distance between the second doping region 205 and the fourth doping region 207 in the first direction X ranges from 0 micrometers to 2 micrometers.

[0100] In this embodiment, the distance between the first doping region 204 and the second doping region 205 in the first direction X ranges from 1 micrometer to 16 micrometers.

[0101] Please refer to Fig. 9 as well as Fig.10 , Fig. 9 This is a top view of the structure. Fig.10 yes Fig. 9 In the cross-sectional diagram along line AA1, after forming the first doping region 204 and the second doping region 205, the first well region I is subjected to the seventh ion implantation treatment to form the fifth doping region 208; the second well region II is subjected to the eighth ion implantation treatment to form the sixth doping region 209.

[0102] In this embodiment, the conductivity types of the fifth doping region 208 and the sixth doping region 209 are opposite, the ion implantation energy of the seventh ion implantation process and the eighth ion implantation process is 5KeV to 80KeV, and the ion implantation dose of the seventh ion implantation process and the eighth ion implantation process is 1×10 15 atom / cm 2 Up to 9×10 15 atom / cm 2 .

[0103] In this embodiment, the doping ions in the fifth doping region 208 are P-type doping ions, and the doping ions in the sixth doping region 209 are N-type doping ions.

[0104] In this embodiment, the depth of the fifth doping region 208 and the sixth doping region 209 ranges from 25 nanometers to 100 nanometers or from 50 nanometers to 200 nanometers; the width of the third doping region 206 and the fourth doping region 207 along the first direction X ranges from 0.5 micrometers to 8 micrometers.

[0105] In this embodiment, the number of the fifth doping regions 208 and the sixth doping regions 209 is the same as the number of the first doping regions 204 and the second doping regions 205 .

[0106] Please refer to Fig.11 as well as Fig.12 , Fig.11 This is a top view of the structure. Fig.12 yes Fig.11 In the cross-sectional diagram along line AA1, a first contact layer 210 is deposited on the top surfaces of the first doping region 204 , the second doping region 205 , the third doping region 206 , the fourth doping region 207 , the fifth doping region 208 and the sixth doping region 209 .

[0107] In this embodiment, the material of the first contact layer 210 is metal silicide, which can be titanium silicide, cobalt silicide, silicon platinum nickel and the like.

[0108] In other examples not shown in the figures, the method for forming the electrostatic discharge protection device also includes: after forming the first contact layer, forming a conductive structure on the surface of the contact layer at the top of the first doping region and the second doping region, and the conductive structure is electrically connected to the first doping region and the second doping region.

[0109] Please continue to refer to Fig. 9 The technical solution of the present invention also provides an electrostatic discharge protection device, comprising: a substrate, the substrate comprising a first well region I and a second well region II in contact with each other, the first well region I and the second well region II are arranged along a first direction X parallel to the substrate surface, and the first well region I and the second well region II have different conductivity types; a plurality of mutually independent first doping regions 204 located in the first well region I, the plurality of first doping regions 204 are arranged along a second direction Y parallel to the substrate surface, the second direction Y is perpendicular to the first direction X, and the doping type of the first doping region 204 is different from that of the first well region I; a plurality of mutually independent second doping regions 205 located in the second well region II, the plurality of second doping regions 205 are arranged along a second direction Y parallel to the substrate surface, and the doping type of the second doping region 205 is different from that of the second well region II.

[0110] In this embodiment, the electrostatic discharge protection device also includes: a third doping region 206 located in the first well region I, the doping type of the third doping region 206 is the same as that of the first well region I, and the doping concentration of the third doping region 206 is greater than the doping concentration of the first well region I.

[0111] In this embodiment, the electrostatic discharge protection device also includes: a fourth doping region 207 located in the second well region II, the doping type of the fourth doping region 207 is the same as that of the second well region II, and the doping concentration of the fourth doping region 207 is greater than the doping concentration of the second well region II.

[0112] In this embodiment, the electrostatic discharge protection device also includes: a fifth doping region 208 located in the first well region I, the fifth doping region 208 is located between adjacent first doping regions 204, the doping type of the fifth doping region 208 is the same as that of the first well region I, and the doping concentration of the fifth doping region 208 is greater than the doping concentration of the first well region I.

[0113] In this embodiment, the electrostatic discharge protection device also includes: a sixth doping region 209 located in the second well region II, the sixth doping region 209 is located between adjacent second doping regions 205, the doping type of the sixth doping region 209 is the same as that of the second well region II, and the doping concentration of the sixth doping region 209 is greater than the doping concentration of the second well region II.

[0114] In this embodiment, the substrate includes a first semiconductor layer 200, an insulating layer 201 located on the surface of the first semiconductor layer 200, and a second semiconductor layer (not shown in the figure) located on the insulating layer 201; the bottom of the first well region I and the second well region II are in contact with the top surface of the insulating layer 201.

[0115] In this embodiment, the second semiconductor layer (not shown in the figure) has one or more layers, and the material of the second semiconductor layer (not shown in the figure) includes: single crystal silicon, silicon germanium or germanium.

[0116] In this embodiment, the electrostatic discharge protection device further includes: an isolation structure 202 located in the substrate, and the isolation structure 202 surrounds the first well region I and the second well region II.

[0117] In this embodiment, the electrostatic discharge protection device further includes: a gate layer 203 located on the top surface of the first well region I and the surface of the second well region II.

[0118] Please refer to Fig.12In this embodiment, the electrostatic discharge protection device also includes: a first contact layer 210 located on the top surface of the first doping region 204, the second doping region 205, the third doping region 206 and the fourth doping region 207.

[0119] In this embodiment, the width of the first doping region 204 in the first direction X is in a range of 0.5 micrometers to 8 micrometers, and the width of the second doping region 205 in the first direction X is in a range of 0.5 micrometers to 8 micrometers.

[0120] In this embodiment, the number of the first doping regions 204 and the second doping regions 205 is the same, and the number of the fifth doping regions 208 and the sixth doping regions 209 is the same.

[0121] In this embodiment, the number of the first doping region 204 , the second doping region 205 , the fifth doping region 208 , and the sixth doping region 209 ranges from 1 to 16.

[0122] In this embodiment, the ion doping concentration of the first doping region 204 is 1.0×10 15 atom / cm 3 Up to 9×10 15 atom / cm 3 The ion doping concentration of the second doping region 205 is 1.0×10 15 atom / cm 3 Up to 9×10 15 atom / cm 3 The ion doping concentration of the third doping region 206 is 1.0×10 12 atom / cm 3 to 1.0×10 13 atom / cm 3 The ion doping concentration of the fourth doping region 207 is 1.0×10 12 atom / cm 3 to 1.0×10 13 atom / cm 3 The doping concentration of the fifth doping region 208 is 1.0×10 15 atom / cm 3 Up to 9×10 15 atom / cm 3 The ion doping concentration of the sixth doping region 209 is 1.0×10 15 atom / cm 3 Up to 9×10 15 atom / cm 3 .

[0123] Figures 13 to 20 It is a structural schematic diagram of the formation process of an electrostatic discharge protection device in another embodiment of the present invention.

[0124] exist Figure 3 to Figure 4 Based on Fig.13 and 14, Fig.13 This is a top view of the structure. Fig.14 yes Fig.13 In the cross-sectional schematic diagram along line AA1, after forming the first well region I and the second well region II, a barrier layer 301 is formed on the top surface of the first well region I and the second well region II, and the barrier layer 301 exposes part of the surface of the first well region I and the second well region II.

[0125] The barrier layer 301 is used for accurate alignment of the second contact layer 308 formed subsequently, avoiding the risk of breakdown of the gate oxide layer of the electrostatic discharge protection device in high voltage and high power applications. Figure 5 as well as Figure 6 The formation of the gate layer 203 in the embodiment reduces one photomask and simplifies the process steps.

[0126] Please refer to Fig.15 and 16, Fig.15 This is a top view of the structure. Fig.16 yes Fig.15 In the cross-sectional diagram along line AA1, the substrate is subjected to a second ion implantation treatment to form a second well region II; the first well region I is subjected to a third ion implantation treatment to form a first doped region 302; and the second well region II is subjected to a fourth ion implantation treatment to form a second doped region 303.

[0127] In this embodiment, the conductivity types of the first doping region 302 and the second doping region 303 are opposite, the ion implantation energy of the third ion implantation process and the fourth ion implantation process is 5KeV to 80KeV, and the ion implantation dose of the third ion implantation process and the fourth ion implantation process is 1.0×10 15 atom / cm 2 Up to 9×10 15 atom / cm 2 .

[0128] In this embodiment, the doping ions in the first doping region 302 are N-type doping ions, and the doping ions in the second doping region 303 are P-type doping ions.

[0129] In this embodiment, the depths of the first doping region 302 and the second doping region 303 range from 25 nanometers to 100 nanometers or from 50 nanometers to 200 nanometers; the width of the first doping region 302 along the first direction X ranges from 0.5 micrometers to 8 micrometers.

[0130] The number of the first doping regions 302 and the second doping regions 303 is related to the emitter area of ​​the electrostatic discharge protection device. By changing the number of the first doping regions 302 and the second doping regions 303, the emitter area is changed, thereby adjusting the operating voltage of the electrostatic discharge protection device.

[0131] In this embodiment, the number of the first doping regions 302 and the second doping regions 303 ranges from 1 to 16.

[0132] The number of the first doping regions 302 and the number of the second doping regions 303 are both four.

[0133] In the above scheme, when the number of the first doping region 302 is the same as the number of the second doping region 303, and the number of the fifth doping region 306 is the same as the number of the sixth doping region 307, the operating voltage of the electrostatic discharge protection device is the highest, that is, the electrostatic discharge protection device has the strongest high voltage resistance and protection capability.

[0134] The method for forming the electrostatic discharge protection device further includes: after forming the first doping region 302 and the second doping region 303 , performing a fifth ion implantation process on the first well region I to form a third doping region 304 ; performing a sixth ion implantation process on the second well region II to form a fourth doping region 305 .

[0135] In this embodiment, the conductivity types of the third doping region 304 and the fourth doping region 305 are opposite, the ion implantation energy of the fifth ion implantation process and the sixth ion implantation process is 5KeV to 100KeV, and the ion implantation dose of the fifth ion implantation process and the sixth ion implantation process is 1.0×10 12 atom / cm 2 to 1.0×10 13 atom / cm 2 .

[0136] In this embodiment, the doping ions in the third doping region 304 are P-type doping ions, and the doping ions in the fourth doping region 305 are N-type doping ions.

[0137] In this embodiment, the depth of the third doping region 304 and the fourth doping region 305 ranges from 50 nanometers to 200 nanometers; the width of the third doping region 304 and the fourth doping region 305 along the first direction X ranges from 0.5 micrometers to 8 micrometers.

[0138] In this embodiment, the distance between the first doping region 302 and the third doping region 304 in the first direction X ranges from 0 micrometers to 2 micrometers, and the distance between the second doping region 303 and the fourth doping region 305 in the first direction X ranges from 0 micrometers to 2 micrometers.

[0139] In this embodiment, the distance between the first doping region 302 and the second doping region 303 in the first direction X ranges from 1 micrometer to 16 micrometers.

[0140] The first well region I and the second well region II serve as the base or collector of the electrostatic discharge protection device respectively. Therefore, by increasing the distance between the well regions of the first doped region 302 and the second doped region 303 in the first direction X, that is, increasing the base or collector area of ​​the electrostatic discharge protection device, the operating voltage of the electrostatic discharge protection device is further improved.

[0141] In this embodiment, when the widths of the first well region I and the second well region II in the first direction X are equal, the operating voltage of the electrostatic discharge protection device is the highest.

[0142] Please refer to Fig.17 as well as Fig.18 , Fig.17 This is a top view of the structure. Fig.18 yes Fig.17 In the cross-sectional diagram along line AA1, after forming the first doping region 302 and the second doping region 303, the first well region I is subjected to a fifth ion implantation treatment to form a fifth doping region 306; the second well region II is subjected to a sixth ion implantation treatment to form a sixth doping region 307.

[0143] In this embodiment, the conductivity types of the fifth doping region 306 and the sixth doping region 307 are opposite, the ion implantation energy of the seventh ion implantation process and the eighth ion implantation process is 5KeV to 80KeV, and the ion implantation dose of the seventh ion implantation process and the eighth ion implantation process is 1×10 15 atom / cm 2 Up to 9×10 15 atom / cm 2 .

[0144] In this embodiment, the doping ions in the fifth doping region 306 are P-type doping ions, and the doping ions in the sixth doping region 307 are N-type doping ions.

[0145] In this embodiment, the first doped region 302 , the first well region I and the second well region II constitute an NPN transistor; the second doped region 303 , the second well region II and the first well region I constitute a PNP transistor.

[0146] In this embodiment, the depth of the fifth doping region 306 and the sixth doping region 307 ranges from 25 nanometers to 100 nanometers or from 50 nanometers to 200 nanometers; the width of the third doping region 304 and the fourth doping region 305 along the first direction X ranges from 0.5 micrometers to 8 micrometers.

[0147] In this embodiment, the number of the fifth doping regions 306 and the sixth doping regions 307 is the same as the number of the first doping regions 302 and the second doping regions 303 .

[0148] Please refer to Fig.19 as well as Fig. 20 , Fig.19 This is a top view of the structure. Fig. 20 yes Fig.19 In the cross-sectional diagram along line AA1, after forming the barrier layer 301, a second contact layer 308 is deposited on the top surfaces of the first doping region 302, the second doping region 303, the third doping region 304, the fourth doping region 305, the fifth doping region 306 and the sixth doping region 307.

[0149] In this embodiment, the material of the second contact layer 308 is metal silicide, which can be titanium silicide, cobalt silicide, silicon platinum nickel and other materials.

[0150] In other examples not shown in the figures, the method for forming the electrostatic discharge protection device also includes: after forming the second contact layer, forming a conductive structure on the surface of the second contact layer on the top of the first doping region and the second doping region, and the conductive structure is electrically connected to the first doping region and the second doping region.

[0151] Please continue to refer to Fig.17 The technical solution of the present invention also provides an electrostatic discharge protection device, comprising: a substrate, the substrate comprising a first well region I and a second well region II in contact with each other, the first well region I and the second well region II are arranged along a first direction X parallel to the substrate surface, and the first well region I and the second well region II have different conductivity types; a plurality of mutually separate first doping regions 302 located in the first well region I, the plurality of first doping regions 302 are arranged along a second direction Y parallel to the substrate surface, the second direction Y is perpendicular to the first direction X, and the doping type of the first doping region 302 is different from that of the first well region I; a plurality of mutually separate second doping regions 303 located in the second well region II, the plurality of second doping regions 303 are arranged along a second direction Y parallel to the substrate surface, and the doping type of the second doping region 303 is different from that of the second well region II.

[0152] In this embodiment, the electrostatic discharge protection device also includes: a third doping region 304 located in the first well region I, the doping type of the third doping region 304 is the same as that of the first well region I, and the doping concentration of the third doping region 304 is greater than the doping concentration of the first well region I.

[0153] In this embodiment, the electrostatic discharge protection device also includes: a fourth doping region 305 located in the second well region II, the doping type of the fourth doping region 305 is the same as that of the second well region II, and the doping concentration of the fourth doping region 305 is greater than the doping concentration of the second well region II.

[0154] In this embodiment, the electrostatic discharge protection device also includes: a fifth doping region 306 located in the first well region I, the fifth doping region 306 is located between adjacent first doping regions 302, the doping type of the fifth doping region 306 is the same as that of the first well region I, and the doping concentration of the fifth doping region 306 is greater than the doping concentration of the first well region I.

[0155] In this embodiment, the electrostatic discharge protection device also includes: a sixth doping region 307 located in the second well region II, the sixth doping region 307 is located between adjacent second doping regions 303, the doping type of the sixth doping region 307 is the same as that of the second well region II, and the doping concentration of the sixth doping region 307 is greater than the doping concentration of the second well region II.

[0156] In this embodiment, the substrate includes a first semiconductor layer 200, an insulating layer 201 located on the surface of the first semiconductor layer 200, and a second semiconductor layer (not shown in the figure) located on the insulating layer 201; the bottom of the first well region I and the second well region II are in contact with the top surface of the insulating layer 201.

[0157] In this embodiment, the second semiconductor layer (not shown in the figure) has one or more layers, and the material of the second semiconductor layer (not shown in the figure) includes: single crystal silicon, silicon germanium or germanium.

[0158] In this embodiment, the electrostatic discharge protection device further includes: an isolation structure 202 located in the substrate, and the isolation structure 202 surrounds the first well region I and the second well region II.

[0159] In this embodiment, the electrostatic discharge protection device further includes: a gate layer located on the top surface of the first well region I and the surface of the second well region II.

[0160] Please refer to Fig. 20In this embodiment, the electrostatic discharge protection device also includes: after forming the blocking layer 301, depositing a second contact layer 308 on the top surface of the first doping region 302, the second doping region 303, the third doping region 304, the fourth doping region 305, the fifth doping region 306 and the sixth doping region 307.

[0161] In this embodiment, the width of the first doping region 302 in the first direction X is in a range of 0.5 micrometers to 8 micrometers, and the width of the second doping region 303 in the first direction X is in a range of 0.5 micrometers to 8 micrometers.

[0162] In this embodiment, the number of the first doping regions 302 is the same as the number of the second doping regions 303 , and the number of the fifth doping regions 306 is the same as the number of the sixth doping regions 307 .

[0163] In this embodiment, the number of the first doping region 302 , the second doping region 303 , the fifth doping region 306 208 and the sixth doping region 307 ranges from 1 to 16.

[0164] In this embodiment, the ion doping concentration of the first doping region 302 is 1.0×10 15 atom / cm 3 Up to 9×10 15 atom / cm 3 The ion doping concentration of the second doping region 303 is 1.0×10 15 atom / cm 3 Up to 9×10 15 atom / cm 3 The ion doping concentration of the third doping region 304 is 1.0×10 12 atom / cm 3 to 1.0×10 13 atom / cm 3 The ion doping concentration of the fourth doping region 305 is 1.0×10 12 atom / cm 3 to 1.0×10 13 atom / cm 3 The doping concentration of the fifth doping region 306 is 1.0×10 15 atom / cm 3 Up to 9×10 15 atom / cm 3 The ion doping concentration of the sixth doping region 307 is 1.0×10 15 atom / cm 3 Up to 9×10 15 atom / cm 3 .

[0165] Please refer to Fig.21 , Fig.21 for Fig.17 The circuit structure schematic diagram of the electrostatic discharge protection device shown in the figure includes: a first transistor BJT1, a second transistor BJT2, a first resistor R1 and a second resistor R2, the emitter of the first transistor BJT1 is connected to the first end of the first resistor R1, the base of the first transistor BJT1 is connected to the second end of the first resistor R1 and the collector of the second transistor BJT2, the collector of the first transistor BJT1 is connected to the base of the second transistor BJT2 and the second end of the second resistor R2, and the first end of the second resistor R2 is connected to the emitter of the second transistor BJT2.

[0166] Please Fig. 20 Based on reference Fig.21 The first doped region 302 is the emitter of the first transistor BJT1, the first well region I is the base of the first transistor BJT1, the second well region II is the collector of the first transistor BJT1, the second doped region 303 is the emitter of the second transistor BJT2, the second well region II is the base of the second transistor BJT2, and the first well region I is the collector of the second transistor BJT2.

[0167] Fig.12 Between the electrostatic discharge protection devices in Fig.21 The circuit structure correspondence of the electrostatic discharge protection device in the above scheme Fig. 20 The same is not repeated here.

[0168] In this embodiment, the first transistor BJT1 is an NPN transistor; the second transistor BJT2 is a PNP transistor.

[0169] In the above scheme, by reducing the area of ​​the emitter, the ESD protection device is put into a high-resistance state, thereby increasing the operating voltage of the ESD protection device, improving the performance of the ESD protection device, reducing the area of ​​the ESD protection device, and improving the integration of the ESD protection device.

[0170] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. An electrostatic discharge protection device, characterized in that: include: A substrate, the substrate comprising a first well region and a second well region in contact with each other, the first well region and the second well region are arranged along a first direction parallel to a surface of the substrate, and the first well region and the second well region have different conductivity types; A plurality of mutually separate first doping regions located in the first well region, wherein the plurality of first doping regions are arranged along a second direction parallel to the surface of the substrate, the second direction is perpendicular to the first direction, and the doping type of the first doping regions is different from that of the first well region; A plurality of mutually independent second doping regions are located in the second well region, the plurality of second doping regions are arranged along a second direction parallel to the substrate surface, and the doping type of the second doping regions is different from that of the second well region.

2. The electrostatic discharge protection device according to claim 1, characterized in that: Also includes: A third doping region is located in the first well region, wherein the doping type of the third doping region is the same as that of the first well region, and the doping concentration of the third doping region is greater than the doping concentration of the first well region.

3. The electrostatic discharge protection device according to claim 2, characterized in that: Also includes: A fourth doping region is located in the second well region, wherein the doping type of the fourth doping region is the same as that of the second well region, and the doping concentration of the fourth doping region is greater than the doping concentration of the second well region.

4. The electrostatic discharge protection device according to claim 3, characterized in that: Also includes: A fifth doping region is located in the first well region, the fifth doping region is located between adjacent first doping regions, the doping type of the fifth doping region is the same as that of the first well region, and the doping concentration of the fifth doping region is greater than the doping concentration of the first well region.

5. The electrostatic discharge protection device according to claim 4, characterized in that: Also includes: A sixth doping region is located in the second well region, the sixth doping region is located between adjacent second doping regions, the doping type of the sixth doping region is the same as that of the second well region, and the doping concentration of the sixth doping region is greater than the doping concentration of the second well region.

6. The electrostatic discharge protection device according to claim 5, characterized in that: The substrate comprises a first semiconductor layer, an insulating layer located on the surface of the first semiconductor layer and a second semiconductor layer located on the insulating layer; the bottoms of the first well region and the second well region are in contact with the top surface of the insulating layer.

7. The electrostatic discharge protection device according to claim 6, characterized in that: The second semiconductor layer has one or more layers, and the material of the second semiconductor layer includes: single crystal silicon, silicon germanium or germanium.

8. The electrostatic discharge protection device according to claim 7, characterized in that: Also includes: An isolation structure is located in the substrate, and the isolation structure surrounds the first well region and the second well region.

9. The electrostatic discharge protection device according to claim 8, characterized in that: The invention also includes a gate layer located on the top surface of the first well region and the surface of the second well region.

10. The electrostatic discharge protection device according to claim 9, characterized in that: It also includes a first contact layer located on the top surface of the first doping region, the top surface of the second doping region, the top surface of the third doping region, and the top surface of the fourth doping region.

11. The electrostatic discharge protection device according to claim 10, characterized in that: The width of the first doping region in the first direction ranges from 0.5 micrometers to 8 micrometers, and the width of the second doping region in the first direction ranges from 0.5 micrometers to 8 micrometers.

12. The electrostatic discharge protection device according to claim 11, characterized in that: The number of the first doping regions is the same as that of the second doping regions, and the number of the fifth doping regions is the same as that of the sixth doping regions.

13. The electrostatic discharge protection device according to claim 12, characterized in that: The number of the first doping region, the second doping region, the fifth doping region and the sixth doping region ranges from 1 to 16.

14. The electrostatic discharge protection device according to claim 13, characterized in that: The ion doping concentration of the first doping region is 1.0×10 15 atom / cm 3 Up to 9×10 15 atom / cm 3 The ion doping concentration of the second doping region is 1.0×10 15 atom / cm 3 Up to 9×10 15 atom / cm 3 The ion doping concentration of the third doping region is 1.0×10 12 atom / cm 3 to 1.0×10 13 atom / cm 3 The ion doping concentration of the fourth doping region is 1.0×10 12 atom / cm 3 to 1.0×10 13 atom / cm 3 The doping concentration of the fifth doping region is 1.0×10 15 atom / cm 3 Up to 9×10 15 atom / cm 3 The ion doping concentration of the sixth doping region is 1.0×10 15 atom / cm 3 Up to 9×10 15 atom / cm 3 .

15. A method for forming an electrostatic discharge protection device, characterized in that: include: Providing a substrate, the substrate comprising a first well region and a second well region in contact with each other, the first well region and the second well region being arranged along a first direction parallel to a surface of the substrate, and the first well region and the second well region having different conductivity types; forming a plurality of mutually separate first doping regions in the first well region, wherein the plurality of first doping regions are arranged along a second direction parallel to the surface of the substrate, the second direction is perpendicular to the first direction, and the doping type of the first doping regions is different from that of the first well region; A plurality of mutually independent second doping regions are formed in the second well region. The plurality of second doping regions are arranged along a second direction parallel to the substrate surface. The doping type of the second doping regions is different from that of the second well region.

16. The method for forming an electrostatic discharge protection device according to claim 15, characterized in that: The method for forming the first doped region and the second doped region includes: performing a first ion implantation treatment on the substrate to form a first well region; performing a second ion implantation treatment on the substrate to form a second well region; performing a third ion implantation treatment on the first well region to form a first doped region; and performing a fourth ion implantation treatment on the second well region to form a second doped region.

17. The method for forming an electrostatic discharge protection device according to claim 16, wherein: Also includes: After forming the first doping region and the second doping region, performing a fifth ion implantation process on the first well region to form a third doping region; Performing a sixth ion implantation process on the second well region to form a fourth doped region; performing a seventh ion implantation process on the first well region to form a fifth doped region; An eighth ion implantation process is performed on the second well region to form a sixth doped region.

18. The method for forming an electrostatic discharge protection device according to claim 17, wherein: The first well region and the second well region have opposite conductivity types, the ion implantation energies of the first ion implantation process and the second ion implantation process are 10 KeV to 100 KeV, and the ion implantation doses of the first ion implantation process and the second ion implantation process are 1.0×10 12 atom / cm 2 to 1.0×10 13 atom / cm 2 The conductivity types of the first doping region and the second doping region are opposite, the ion implantation energy of the third ion implantation process and the fourth ion implantation process is 5KeV to 80KeV, and the ion implantation dose of the third ion implantation process and the fourth ion implantation process is 1.0×10 15 atom / cm 2 Up to 9×10 15 atom / cm 2 The conductivity types of the third doping region and the fourth doping region are opposite, the ion implantation energy of the fifth ion implantation process and the sixth ion implantation process is 5KeV to 100KeV, and the ion implantation dose of the fifth ion implantation process and the sixth ion implantation process is 1.0×10 12 atom / cm 2 to 1.0×10 13 atom / cm 2 The conductivity types of the fifth doping region and the sixth doping region are opposite, the ion implantation energy of the seventh ion implantation process and the eighth ion implantation process is 5KeV to 80KeV, and the ion implantation dose of the seventh ion implantation process and the eighth ion implantation process is 1×10 15 atom / cm 2 Up to 9×10 15 atom / cm 2 .

19. The method for forming an electrostatic discharge protection device according to claim 18, wherein: The substrate comprises a first semiconductor layer, an insulating layer located on the surface of the first semiconductor layer and a second semiconductor layer located on the insulating layer. The bottoms of the first well region and the second well region are in contact with the top surface of the insulating layer.

20. The method for forming an electrostatic discharge protection device according to claim 19, wherein: The second semiconductor layer has one or more layers, and the material of the second semiconductor layer includes: single crystal silicon, silicon germanium or germanium.

21. The method for forming an electrostatic discharge protection device according to claim 20, wherein: Also includes: After forming the first well region and the second well region, etching both sides of the first well region and the second well region until the insulating layer is exposed to form a shallow trench; An initial isolation structure is deposited in the shallow trench; and the initial isolation structure is planarized to form an isolation structure.

22. The method for forming an electrostatic discharge protection device according to claim 21, characterized in that: Also includes: After forming the first well region and the second well region, a gate layer is deposited on the top surfaces of the first well region and the second well region, wherein the gate layer exposes a portion of the surfaces of the first well region and the second well region.

23. The method for forming an electrostatic discharge protection device according to claim 22, wherein: Also includes: After forming the gate layer, a first contact layer is deposited on top surfaces of the first doping region, the second doping region, the third doping region, the fourth doping region, the fifth doping region and the sixth doping region.

24. The method for forming an electrostatic discharge protection device according to claim 21, wherein: Also includes: After forming the first well region and the second well region, a barrier layer is formed on the top surfaces of the first well region and the second well region, wherein the barrier layer exposes a portion of the surfaces of the first well region and the second well region.

25. The method for forming an electrostatic discharge protection device according to claim 24, characterized in that: Also includes: After forming the barrier layer, a second contact layer is deposited on top surfaces of the first doping region, the second doping region, the third doping region, the fourth doping region, the fifth doping region, and the sixth doping region.

26. The method for forming an electrostatic discharge protection device according to claim 23 or 25, characterized in that: Also includes: The width of the first doping region in the first direction ranges from 0.5 micrometers to 8 micrometers, and the width of the second doping region in the first direction ranges from 0.5 micrometers to 8 micrometers.

27. The method for forming an electrostatic discharge protection device according to claim 23 or 25, characterized in that: Also includes: The number of the first doping regions is the same as that of the second doping regions, and the number of the fifth doping regions is the same as that of the sixth doping regions.

28. The method for forming an electrostatic discharge protection device according to claim 27, characterized in that: Also includes: The number of the first doping region, the second doping region, the fifth doping region and the sixth doping region ranges from 1 to 16.

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