Processing method for plasma etching of cadmium telluride surface

Abstract

The invention discloses a cadmium telluride surface plasma etching processing method, and relates to the technical field of cadmium telluride processing, and the method comprises the following steps: S1, plating a light absorption layer on a TCO original sheet to obtain a coated chip; s2, cleaning the coated chip in water, and carrying out plasma surface treatment on the cleaned coated chip; and S3, coating, annealing and post-processing the coated chip treated in the step S2 in sequence. The plasma surface treatment adopted by the invention is a non-contact chemical processing method, subsurface damage is not introduced, parameters are controllable, a process window is controllable, and surface impurities and a surface oxide layer can be effectively removed; meanwhile, ultraviolet light pretreatment is combined, so that the problem of crack expansion during plasma processing is reduced, and high-quality processing is realized; according to the invention, the plasma etching stability is good, and the processed product is good in consistency and small in fluctuation.

Description

Technical Field

[0001] The invention relates to the technical field of cadmium telluride processing, and in particular to a processing method for plasma etching the surface of cadmium telluride. Background Art

[0002] Cadmium telluride is a common semiconductor material, often used in the manufacture of optoelectronic devices and laser devices. Surface treatment of cadmium telluride can improve its optoelectronic properties and stability.

[0003] In the prior art, it is usually not treated or treated by cleaning, but cleaning has the following defects: (1) It is difficult to remove surface dust and other impurities; (2) Cleaning cannot remove the surface oxide layer; (3) Cleaning cannot modify the surface; (4) It is easy to cause poor uniformity of subsequent roller coating and high interface contact resistance, which affects battery efficiency; (5) Poor cleaning effect will also affect the subsequent roller life. Therefore, improvement is needed. Summary of the invention

[0004] The purpose of the present invention is to solve at least one of the technical problems existing in the prior art and to provide a processing method for plasma etching the surface of cadmium telluride.

[0005] The technical solution of the present invention is as follows:

[0006] A processing method for plasma etching of cadmium telluride surface comprises the following steps:

[0007] S1: coating a light absorption layer on the TCO original wafer to obtain a coated chip;

[0008] S2: Cleaning the coated chip in water, and performing plasma surface treatment on the cleaned coated chip;

[0009] S3: The coated chip processed in S2 is coated, annealed, and then processed in sequence.

[0010] As a preferred embodiment of the present invention, in step S2, the specific parameters of the plasma surface treatment are as follows:

[0011] A medium frequency plasma power source of 18-50KHz is used; the power selection is 750-1000W; the plasma diameter is 100-200mm; the processing distance from the coated chip is 5-10mm; the processing speed is 5-10m / min; argon is used as the generating gas source, and the pressure is greater than 3Kg; gas flow: 1000-1500L / Min.

[0012] As a preferred embodiment of the present invention, in step S3, the coating uses cadmium chloride with a concentration of 400-600 g / L to form a cadmium chloride film layer with a thickness of 50-100 nanometers.

[0013] As a preferred embodiment of the present invention, in step S2, the cleaning water temperature is 40-50°C and the cleaning time is 50-60s.

[0014] As a preferred embodiment of the present invention, the annealing temperature in step S3 is 190-230°C.

[0015] As a preferred embodiment of the present invention, in step S1, the light absorption layer is a cadmium telluride and a cadmium selenide film layer, and the thicknesses are 2-4 microns and 50-120 nanometers respectively.

[0016] As a preferred solution of the present invention, ultraviolet light is used to irradiate the film-coated chip while the plasma surface treatment is being performed.

[0017] As a preferred embodiment of the present invention, the irradiation power is 40-50W / m 2 .

[0018] As a preferred solution of the present invention, before the plasma surface treatment, the coated chip is pretreated with vapor of bromine methanol solution with a volume concentration of 0.01-0.05%.

[0019] As a preferred solution of the present invention, the post-processing includes sequentially preparing a metal back electrode layer on the annealed coated chip.

[0020] The beneficial effects of the present invention are:

[0021] (1) The present invention uses plasma for surface treatment, which can be precisely controlled on a microscopic scale, and can achieve fine regulation of the surface morphology and structure of cadmium telluride; the parameters are controllable, and the process window is controllable;

[0022] (2) The present invention adopts plasma etching, which can effectively remove surface impurities and surface oxide layers and improve surface purity;

[0023] (3) The plasma etching of the present invention has good stability, and the product has good consistency and small fluctuation after processing;

[0024] (4) The plasma etching of the present invention can modify the surface to obtain a very thin high-tension coating surface;

[0025] (5) After the plasma surface treatment of the present invention, the active sites on the surface of cadmium telluride can be increased, which helps to improve the adhesion and stability of subsequent processing steps, and the subsequent coating effect is better and the efficiency is improved;

[0026] (6) The temperature of the present invention is low, close to room temperature, and is particularly suitable for polymer materials, with a longer storage time and higher surface tension;

[0027] (7) The plasma action process of the present invention is a gas-solid phase dry reaction, which does not consume water resources, does not require the addition of chemical agents, and is environmentally friendly.

[0028] (8) The plasma surface treatment adopted in the present invention is a non-contact chemical processing method that does not introduce sub-surface damage. Combined with ultraviolet light pretreatment, it activates the processed surface and can effectively reduce the problem of microcrack expansion during plasma processing, thereby achieving high-quality processing and allowing cadmium chloride to anneal at a lower temperature. DETAILED DESCRIPTION

[0029] The embodiments of the present invention are described in detail below. The embodiments described below are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention. If no specific techniques or conditions are specified in the embodiments, the techniques or conditions described in the literature in this area or the product specifications are used. The reagents or instruments used that do not specify the manufacturer are all conventional products that can be obtained commercially.

[0030] Example 1

[0031] A processing method for plasma etching of cadmium telluride surface comprises the following steps:

[0032] S1: coating a light absorption layer on the TCO original wafer to obtain a coated chip;

[0033] S2: Cleaning the coated chip in water, and performing plasma surface treatment on the cleaned coated chip;

[0034] S3: The coated chip processed in S2 is coated, annealed, and then processed in sequence.

[0035] In step S2, the specific parameters of the plasma surface treatment are as follows:

[0036] A medium frequency 18KHz plasma power source is used; the power selection is 750W; the plasma diameter is 100mm; the processing distance from the coated chip is 5mm; the processing speed is 5m / min; argon is used as the generating gas source, and the pressure is greater than 3Kg; the gas flow rate is 1200L / Min.

[0037] In step S3, the coating uses cadmium chloride with a concentration of 500 g / L to form a cadmium chloride film layer with a thickness of 600 nanometers.

[0038] In step S2, the cleaning water temperature is 45°C and the cleaning time is 55s.

[0039] The annealing temperature in step S3 is 200°C.

[0040] In step S1 , the light absorption layer is a cadmium telluride and a cadmium selenide film layer, and the thicknesses are 3 micrometers and 100 nanometers respectively.

[0041] While the plasma surface treatment is in progress, the chip is coated with ultraviolet light.

[0042] The irradiation power is 45W / m 2 .

[0043] The post-processing includes sequentially preparing a metal back electrode layer on the annealed coated chip.

[0044] Example 2

[0045] A processing method for plasma etching of cadmium telluride surface comprises the following steps:

[0046] S1: coating a light absorption layer on the TCO original wafer to obtain a coated chip;

[0047] S2: Cleaning the coated chip in water, and performing plasma surface treatment on the cleaned coated chip;

[0048] S3: The coated chip processed in S2 is coated, annealed, and then processed in sequence.

[0049] In step S2, the specific parameters of the plasma surface treatment are as follows:

[0050] A medium frequency plasma power supply of 20KHz is used; the power selection is 800W; the plasma diameter is 150mm; the processing distance from the coated chip is 7mm; the processing speed is 8m / min; argon is used as the generating gas source, and the pressure is greater than 3Kg; the gas flow rate is 1200L / Min.

[0051] In step S3, the coating uses cadmium chloride with a concentration of 500 g / L to form a cadmium chloride film layer with a thickness of 70 nanometers.

[0052] In step S2, the cleaning water temperature is 45°C and the cleaning time is 55s.

[0053] The annealing temperature in step S3 is 200°C.

[0054] In step S1 , the light absorption layer is a cadmium telluride and a cadmium selenide film layer, and the thicknesses are 3 micrometers and 100 nanometers respectively.

[0055] While the plasma surface treatment is in progress, the chip is coated with ultraviolet light.

[0056] The irradiation power is 45W / m 2 .

[0057] The post-processing includes sequentially preparing a metal back electrode layer on the annealed coated chip.

[0058] Example 3

[0059] A processing method for plasma etching of cadmium telluride surface comprises the following steps:

[0060] S1: coating a light absorption layer on the TCO original wafer to obtain a coated chip;

[0061] S2: Cleaning the coated chip in water, and performing plasma surface treatment on the cleaned coated chip;

[0062] S3: The coated chip processed in S2 is coated, annealed, and then processed in sequence.

[0063] In step S2, the specific parameters of the plasma surface treatment are as follows:

[0064] A medium frequency 40KHz plasma power source is used; the power selection is 900W; the plasma diameter is 180mm; the processing distance from the coated chip is 7mm; the processing speed is 7m / min; argon is used as the generating gas source, and the pressure is greater than 3Kg; the gas flow rate is 1200L / Min.

[0065] In step S3, the coating uses cadmium chloride with a concentration of 500 g / L to form a cadmium chloride film layer with a thickness of 80 nanometers.

[0066] In step S2, the cleaning water temperature is 45°C and the cleaning time is 55s.

[0067] The annealing temperature in step S3 is 200°C.

[0068] In step S1 , the light absorption layer is a cadmium telluride and a cadmium selenide film layer, and the thicknesses are 3 micrometers and 100 nanometers respectively.

[0069] While the plasma surface treatment is in progress, the chip is coated with ultraviolet light.

[0070] The irradiation power is 45W / m 2 .

[0071] The post-processing includes sequentially preparing a metal back electrode layer on the annealed coated chip.

[0072] Example 4

[0073] A processing method for plasma etching of cadmium telluride surface comprises the following steps:

[0074] S1: coating a light absorption layer on the TCO original wafer to obtain a coated chip;

[0075] S2: Cleaning the coated chip in water, and performing plasma surface treatment on the cleaned coated chip;

[0076] S3: The coated chip processed in S2 is coated, annealed, and then processed in sequence.

[0077] In step S2, the specific parameters of the plasma surface treatment are as follows:

[0078] A plasma power source with a medium frequency of 50KHz is used; the power selection is 1000W; the plasma diameter is 200mm; the processing distance from the coated chip is 10mm; the processing speed is 10m / min; argon gas is used as the generating gas source, and the pressure is greater than 3Kg; the gas flow rate is 1500L / Min.

[0079] In step S3, the coating uses cadmium chloride with a concentration of 500 g / L to form a cadmium chloride film layer with a thickness of 80 nanometers.

[0080] In step S2, the cleaning water temperature is 45°C and the cleaning time is 55s.

[0081] The annealing temperature in step S3 is 200°C.

[0082] In step S1 , the light absorption layer is a cadmium telluride and a cadmium selenide film layer, and the thicknesses are 3 micrometers and 80 nanometers respectively.

[0083] While the plasma surface treatment is in progress, the chip is coated with ultraviolet light.

[0084] The irradiation power is 50W / m 2 .

[0085] The post-processing includes sequentially preparing a metal back electrode layer on the annealed coated chip.

[0086] Example 5

[0087] A processing method for plasma etching of cadmium telluride surface comprises the following steps:

[0088] S1: coating a light absorption layer on the TCO original wafer to obtain a coated chip;

[0089] S2: Cleaning the coated chip in water, and performing plasma surface treatment on the cleaned coated chip;

[0090] S3: The coated chip processed in S2 is coated, annealed, and then processed in sequence.

[0091] In step S2, the specific parameters of the plasma surface treatment are as follows:

[0092] A medium frequency 45KHz plasma power source is used; the power selection is 800W; the plasma diameter is 180mm; the processing distance from the coated chip is 7mm; the processing speed is 8m / min; argon is used as the generating gas source, and the pressure is greater than 3Kg; the gas flow rate is 1000L / Min.

[0093] In step S3, the coating uses cadmium chloride with a concentration of 500 g / L to form a cadmium chloride film layer with a thickness of 70 nanometers.

[0094] In step S2, the cleaning water temperature is 50°C and the cleaning time is 60s.

[0095] The annealing temperature in step S3 is 200°C.

[0096] In step S1 , the light absorption layer is a cadmium telluride and a cadmium selenide film layer, and the thicknesses are 3 micrometers and 80 nanometers respectively.

[0097] While the plasma surface treatment is in progress, the chip is coated with ultraviolet light.

[0098] The irradiation power is 45W / m 2 .

[0099] The post-processing includes sequentially preparing a metal back electrode layer on the annealed coated chip.

[0100] Example 6

[0101] A processing method for plasma etching of cadmium telluride surface comprises the following steps:

[0102] S1: coating a light absorption layer on the TCO original wafer to obtain a coated chip;

[0103] S2: Cleaning the coated chip in water, and performing plasma surface treatment on the cleaned coated chip;

[0104] S3: The coated chip processed in S2 is coated, annealed, and then processed in sequence.

[0105] In step S2, the specific parameters of the plasma surface treatment are as follows:

[0106] A medium frequency plasma power supply of 20KHz is used; the power selection is 800W; the plasma diameter is 150mm; the processing distance from the coated chip is 7mm; the processing speed is 8m / min; argon is used as the generating gas source, and the pressure is greater than 3Kg; the gas flow rate is 1200L / Min.

[0107] In step S3, the coating uses cadmium chloride with a concentration of 500 g / L to form a cadmium chloride film layer with a thickness of 70 nanometers.

[0108] In step S2, the cleaning water temperature is 45°C and the cleaning time is 55s.

[0109] The annealing temperature in step S3 is 200°C.

[0110] In step S1 , the light absorption layer is a cadmium telluride and a cadmium selenide film layer, and the thicknesses are 3 micrometers and 100 nanometers respectively.

[0111] While the plasma surface treatment is in progress, the chip is coated with ultraviolet light.

[0112] The irradiation power is 45W / m 2 .

[0113] Before the plasma surface treatment, the coated chip was pretreated with the vapor of bromine methanol solution with a volume concentration of 0.035% for 30 min;

[0114] The post-processing includes sequentially preparing a metal back electrode layer on the annealed coated chip.

[0115] Comparative Example 1

[0116] The difference from Example 2 is that no plasma surface treatment is performed after cleaning.

[0117] Comparative Example 2

[0118] Different from Example 2, no ultraviolet irradiation was performed.

[0119] The cadmium telluride thin film batteries prepared in the above examples and comparative examples were subjected to performance tests, and the test results are shown in Table 1.

[0120] Table 1 Performance test results of embodiments and comparative examples

[0121] Sample Open circuit voltage VOC(mv) Short circuit current Isc(mA) Fill Factor FF Example 1 180.2 2.27 0.67 Example 2 180.9 2.27 0.67 Example 3 182.3 2.28 0.66 Example 4 180.4 2.27 0.68 Example 5 181.9 2.27 0.67 Example 6 182.1 2.26 0.69 Comparative Example 1 179.3 2.21 0.65 Comparative Example 2 181.1 2.23 0.64

[0122] The fill factor is defined as the actual maximum output power divided by the ideal target output power. Its value is always less than 1, and the closer it is to 1, the better the output capacity (characteristics) of the battery component.

[0123] As can be seen from the above table, the performance of the embodiment is better than that of the comparative example, mainly because the embodiment adopts plasma surface treatment and ultraviolet treatment, which reduces the problem of crack expansion during plasma processing, achieves high-quality processing, and can also make cadmium chloride annealing treatment at a lower temperature. In addition, embodiment 6 is better, mainly because there is a certain gradient of Cd / Te atomic ratio from the surface of the coated chip to the inside in combination with the steam corrosion surface, which makes the doping concentration gradually increase from the inside to the surface, and the resulting energy band bending is more conducive to the transmission of holes, thereby improving the performance of the sample.

[0124] In summary, plasma surface etching is an efficient, precise and controllable surface treatment technology that improves the surface quality, purity and activity of cadmium telluride materials, thereby improving their optoelectronic properties and stability.

[0125] Under the premise that no conflict occurs, those skilled in the art may freely combine and superimpose the above-mentioned additional technical features.

[0126] The above-mentioned embodiments only express the preferred implementation modes of the present invention, and the description thereof is relatively specific and detailed, but it cannot be understood as limiting the scope of the present invention. It should be pointed out that, for ordinary technicians in this field, various other corresponding changes and deformations can be made according to the technical solutions and concepts described above, and all these changes and deformations should fall within the scope of protection of the claims of the present invention.

Claims

1. A method for processing cadmium telluride surface plasma etching, characterized in that: The following steps are involved: S1: coating a light absorption layer on the TCO original wafer to obtain a coated chip; S2: Cleaning the coated chip in water, and performing plasma surface treatment on the cleaned coated chip; S3: The coated chip processed in S2 is coated, annealed, and then processed in sequence.

2. The method for plasma etching of cadmium telluride surface according to claim 1, characterized in that: In step S2, the specific parameters of the plasma surface treatment are as follows: A medium frequency plasma power source of 18-50KHz is used; the power selection is 750-1000W; the plasma diameter is 100-200mm; the processing distance from the coated chip is 5-10mm; the processing speed is 5-10m / min; argon is used as the generating gas source, and the pressure is greater than 3Kg; gas flow: 1000-1500L / Min.

3. The method for plasma etching of cadmium telluride surface according to claim 1, characterized in that: In step S3, the coating uses cadmium chloride with a concentration of 400-600 g / L to form a cadmium chloride film layer with a thickness of 50-100 nanometers.

4. The method for plasma etching of cadmium telluride surface according to claim 1, characterized in that: In step S2, the cleaning water temperature is 40-50°C and the cleaning time is 50-60s.

5. The method for plasma etching of cadmium telluride surface according to claim 1, characterized in that: The annealing temperature in step S3 is 190-230°C.

6. The method for plasma etching of cadmium telluride surface according to claim 1, characterized in that: In step S1, the light absorption layer is a cadmium telluride and a cadmium selenide film layer, and the thicknesses are 2-4 microns and 50-120 nanometers respectively.

7. The method for plasma etching the surface of cadmium telluride according to claim 1, characterized in that: While the plasma surface treatment is in progress, the chip is coated with ultraviolet light.

8. The method for plasma etching the surface of cadmium telluride according to claim 7, characterized in that: The irradiation power is 40-50W / m 2 .

9. The method for plasma etching the surface of cadmium telluride according to claim 7, characterized in that: Before the plasma surface treatment, the coated chip is pretreated with vapor of bromine methanol solution with a volume concentration of 0.01-0.05%.

10. The method for plasma etching of cadmium telluride surface according to claim 1, characterized in that: The post-processing includes sequentially preparing a metal back electrode layer on the annealed coated chip.