An LED epitaxial wafer for improving light efficiency attenuation and a preparation method thereof

Abstract

The present invention relates to the technical field of LEDs, and particularly relates to an LED epitaxial wafer for improving light efficiency attenuation and a preparation method thereof. The LED epitaxial wafer sequentially includes an N-type GaAs substrate, an N-type GaAs buffer layer, a DBR reflection layer, an N-type high-temperature diffusion-resistant layer, an N-type confinement layer, a first reverse doping layer, a multi-quantum well light-emitting layer, a second reverse doping layer, a P-type confinement layer, a P-type transition layer, and a P-type window layer from bottom to top. By inserting an AlGaInP structure between the DBR reflection layer and the N-type confinement layer, adopting a special growth method with a gradual change of PH3, and designing reverse doping layer structures on both the N-type side and the P-type side, the present invention can effectively suppress the problem of light efficiency attenuation caused by impurities in high-temperature and high-current environments. The obtained LED has excellent light attenuation resistance and anti-aging performance, and high luminous brightness and reliability.

Description

Technical Field

[0001] The present invention relates to the technical field of LEDs, and particularly relates to an LED epitaxial wafer for improving light efficiency attenuation and a preparation method thereof. Background Art

[0002] LEDs prepared from quaternary AlGaInP materials are widely used in fields such as display screens, scene lighting, stage backgrounds, and automotive systems. With the gradual increase in application scenarios and increasingly stringent usage conditions, high-brightness AlGaInP red LEDs need to maintain good brightness stability and reliability under extreme conditions of high temperature and high current. However, with the continuous reduction of chip size, conventional AlGaInP red LEDs in the industry cannot achieve good aging resistance to high temperature and high current. For example, the patent with patent number CN201610276669 proposes a method to improve the high-current aging resistance by adopting a segmented doped multi-spectrum DBR reflective layer and reducing the P-type semiconductor doped layer adjacent to the transition layer. However, when the chip size is reduced to less than 4.0 mil × 4.0 mil, the above solution will experience aging failure. The main reasons are the increase in the junction temperature of the LED itself and the aggravation of non-radiative recombination under a larger current density, and the negative impact brought by impurity defects begins to dominate in a high-temperature working environment, resulting in severe brightness attenuation.

[0003] Similarly, although the conventional AlGaInP LED epitaxial structure (as shown in Figure 1 ) includes an N-type GaAs substrate 1, an N-type GaAs buffer layer 2, a distributed Bragg reflector (DBR) 3, an N-type confinement layer 4, a multi-quantum well light-emitting layer 5, a P-type confinement layer 6, a P-type transition layer 7, and a P-type window layer 8 in sequence from bottom to top, due to the fact that the DBR material on the N-type doped layer side cannot provide good current spreading under a high-temperature working environment and a high current density, if the N-type doping therein is adjusted, it will lead to serious carrier leakage and impurity diffusion, and instead introduce more impurities into the multi-quantum well light-emitting layer, reducing the light-emitting efficiency and causing the light-emitting brightness of small-sized LED chips to continue to decay. At the same time, the P-type dopant in the P-type confinement layer is very easy to diffuse into the multi-quantum well light-emitting layer and the transition layer at high temperature, resulting in the capture of electron-hole pairs by deep energy levels and reducing the probability of radiative recombination, thus affecting the light-emitting efficiency.

[0004] Therefore, it is of great significance to develop an AlGaInP red LED epitaxial wafer that can improve light efficiency attenuation under high temperature and high current conditions. Summary of the Invention

[0005] Aiming at the deficiencies of the prior art, the present invention provides an LED epitaxial wafer for improving light efficiency attenuation and a preparation method thereof, which are used to improve the problem of light efficiency attenuation of LEDs in high-temperature and high-current working environments.

[0006] The first object of the present invention is to provide an LED epitaxial wafer for improving the light efficiency attenuation. The LED epitaxial wafer sequentially includes an N-type GaAs substrate, an N-type GaAs buffer layer, a DBR reflection layer, an N-type high-temperature diffusion-resistant layer, an N-type confinement layer, a first reverse doping layer, a multi-quantum well light-emitting layer, a second reverse doping layer, a P-type confinement layer, a P-type transition layer, and a P-type window layer from bottom to top;

[0007] The material of the N-type high-temperature diffusion-resistant layer is (Al x1 Ga 1-x1 ) 0.5 In 0.5 P, where the value range of x1 is 0.6 to 0.8.

[0008] The present invention adopts the design of an (Al x1 Ga 1-x1 ) 0.5 In 0.5 P insertion layer. By virtue of the characteristic that the electron mobility of the AlGaInP material is between that of the DBR reflection layer material and the N-type confinement layer AlInP, the current spreading ability of the LED chip is improved, and problems such as device heating and brightness attenuation caused by current crowding during high-current operation are avoided; at the same time, a reverse doping layer structure is designed between the N-type confinement layer and the undoped light-emitting layer, and between the P-type confinement layer and the light-emitting layer, which can effectively prevent carriers from diffusing into the multi-quantum well light-emitting layer during high-temperature and high-current operation, causing deep-level defects and offsetting the diffusion effect of impurity elements, thereby further improving the anti-light-attenuation performance of the LED under high temperature and high current.

[0009] Furthermore, the thickness of the N-type high-temperature diffusion-resistant layer is 200 nm to 250 nm, the dopant is SiH4, and the doping concentration is 0.5×10 18 cm -3 ~1×10 18 cm -3 .

[0010] Furthermore, the material of the first reverse doping layer is (Al x2 Ga 1-x2 ) 0.5 In 0.5 P, the thickness is 40 nm to 60 nm, where the value range of x2 is 0.7 to 0.8. This layer uses CCl4 as a P-type dopant to provide P-type carriers, and the doping concentration is 0.2×10 17 cm -3 ~0.5×10 17 cm -3 .

[0011] Furthermore, the material of the second reverse doping layer is (Alx3 Ga 1-x3 ) 0.5 In 0.5 P, with a thickness of 60 nm to 80 nm, where the value range of x3 is 0.7 to 0.8. This layer uses DETe as an N-type dopant to provide N-type carriers, and the doping concentration is 0.5×10 17 cm -3 ~1.0×10 17 cm -3 。

[0012] In this technical solution, opposite impurity doping is adopted on both the N-type side and the P-type side, which can cancel the original doping characteristics. That is, during the diffusion of electrons on the N-type side to the multi-quantum well light-emitting layer at high temperature in the LED chip, the holes in the first reverse doping layer will capture the electrons to cancel the electron diffusion; similarly, when the holes on the P-type side diffuse to the multi-quantum well light-emitting layer, the electrons in the second reverse doping layer will cancel and reduce the diffusion concentration of the holes, inhibiting the diffusion effect of impurity elements, thereby improving the anti-light decay performance of the LED at high temperature and high current.

[0013] Further, the DBR reflective layer is a periodic structure formed by the alternating growth of AlAs / Al 0.45 Ga 0.55 As materials. In each periodic structure, the thickness of AlAs is 44 nm to 48 nm, and the thickness of Al 0.45 Ga 0.55 As is 57 nm to 62 nm. The number of periodic cycles of the alternating growth of AlAs and Al 0.45 Ga 0.55 As is 15 to 20 pairs. Among them, the dopant in the AlAs material is SiH4, and the doping concentration is 1.0×10 18 cm -3 ~2.0×10 18 cm -3 ; the dopant in the Al 0.45 Ga 0.55 As material is SiH4, and the doping concentration is 2.0×10 18 cm -3 ~3.0×10 18 cm -3 。

[0014] Further, the material of the N-type confinement layer is Al 0.5 In 0.5 P, with a thickness of 300 nm to 500 nm. The dopant is SiH4, and the doping concentration is 1×10 18 cm -3 ~2×10 18 cm -3; The material of the P-type confinement layer is Al 0.5 In 0.5 P, with a thickness of 500 nm to 900 nm, the dopant is Cp2Mg, and the doping concentration is 0.7×10 18 cm -3 ~1×10 18 cm -3 。

[0015] The second object of the present invention is to provide a method for preparing an LED epitaxial wafer for improving light efficiency attenuation. Using an MOCVD device on an N-type GaAs substrate, an N-type GaAs buffer layer, a DBR reflective layer, an N-type high-temperature diffusion-resistant layer, an N-type confinement layer, a first reverse doping layer, a multi-quantum well light-emitting layer, a second reverse doping layer, a P-type confinement layer, a P-type transition layer, and a P-type window layer are sequentially grown;

[0016] The N-type high-temperature diffusion-resistant layer is grown by a gradual change method of a Group V source material PH3;

[0017] The first reverse doping layer is between the multi-quantum well light-emitting layer and the N-type confinement layer and is doped with a P-type dopant. The second reverse doping layer is between the multi-quantum well light-emitting layer and the P-type confinement layer and is doped with an N-type dopant.

[0018] The present invention uses a special gradual change method of PH3 to grow the N-type high-temperature diffusion-resistant layer to achieve the purpose of continuously changing the molar ratio of the Group V source to the Group III metal source of the layer material, adjusting the incorporation of the doping material in the lattice, thereby suppressing the light efficiency attenuation caused by the diffusion of impurities to the light-emitting layer in a high-temperature environment, improving the light efficiency attenuation while enhancing the high-temperature anti-aging performance of the LED chip. At the same time, by designing a reverse doping layer structure, capturing and offsetting the electrons diffused by N-type and the holes diffused by P-type, suppressing the diffusion effect of impurity elements, thereby further enhancing the high-temperature high-current anti-light decay performance of the LED.

[0019] Further, the growth steps of the N-type high-temperature diffusion-resistant layer are as follows: Set the reaction chamber temperature to 730 °C ± 10 °C. On the DBR reflective layer, introduce TMAl, TMGa, TMIn, and PH3 to grow a (Al x1 Ga 1-x1 ) 0.5 In 0.5 P material with a thickness of 200 nm to 250 nm, and use SiH4 as the N-type dopant with a doping concentration of 0.5×10 18 cm -3 ~1×10 18 cm -3, where the value range of x1 is 0.6 to 0.8, the initial PH3 flow rate for growth is 800 sccm, and then it gradually changes to 1300 sccm at a rate of 2.0 sccm / nm to 2.5 sccm / nm.

[0020] Further, the growth step of the first reverse doping layer is as follows: set the reaction chamber temperature to 700 °C ± 10 °C, introduce TMAl, TMGa, TMIn, and PH3 on the N-type confinement layer, and grow a (Al x2 Ga1 -x2 ) 0.5 In 0.5 P material with a thickness of 40 nm to 60 nm, and use CCl4 as a p-type dopant to provide p-type carriers with a doping concentration of 0.2×10 17 cm -3 ~0.5×10 17 cm -3 , where the value range of x2 is 0.7 to 0.8.

[0021] Further, the growth step of the second reverse doping layer is as follows: set the reaction chamber temperature to 730 °C ± 10 °C, introduce TMAl, TMGa, TMIn, and PH3 on the multi-quantum well light-emitting layer, and grow a (Al x3 Ga1 -x3 ) 0.5 In 0.5 P material with a thickness of 60 nm to 80 nm, and use DETe as an n-type dopant to provide n-type carriers with a doping concentration of 0.5×10 17 cm -3 ~1.0×10 17 cm -3 , where the value range of x3 is 0.7 to 0.8.

[0022] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0023] 1. In the present invention, an n-type high-temperature diffusion-resistant layer is inserted between the DBR reflective layer and the n-type confinement layer. By virtue of the characteristic that the electron mobility of the AlGaInP material is between that of the DBR reflective material and the n-type confinement layer AlInP, the current spreading ability of the LED chip under high temperature and high current is improved. At the same time, a special PH3 gradient growth method is adopted, so that the molar ratio of the group V source to the group III source changes continuously, adjusting the incorporation of the doping material in the lattice, thereby suppressing the light efficiency attenuation caused by the diffusion of impurities to the light-emitting layer in a high-temperature environment. It can effectively avoid problems such as brightness attenuation caused by device heating due to current crowding under harsh working conditions.

[0024] 2. The present invention introduces a first reverse doping layer between the N-type confinement layer and the multi-quantum well light-emitting layer, and a second reverse doping layer between the P-type confinement layer and the multi-quantum well light-emitting layer. The two reverse doping layers adopt impurity doping types opposite to the corresponding space charge regions. The design of this reverse doping layer structure can effectively capture and cancel the electrons diffused from the N-type and the holes diffused from the P-type, and suppress the diffusion effect of impurity elements, thereby improving the anti-light decay performance of the LED under high temperature and high current. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 is a schematic structural diagram of a conventional AlGaInP-based LED epitaxial wafer;

[0026] Figure 2 is a schematic structural diagram of the LED epitaxial wafer of the present invention;

[0027] Figure 3 is a graph showing the variation of the relative brightness of the LED of the present invention and the conventional LED with current during lighting.

[0028] Description of the reference numerals in the schematic diagram:

[0029] 1. N-type GaAs substrate; 2. N-type GaAs buffer layer; 3. DBR reflective layer; 4. N-type confinement layer; 5. Multi-quantum well light-emitting layer; 6. P-type confinement layer; 7. P-type transition layer; 8. P-type window layer; 9. N-type high-temperature diffusion-resistant layer; 10. First reverse doping layer; 11. Second reverse doping layer. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0030] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Apparently, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. The description of at least one exemplary embodiment is actually only illustrative and in no way restrictive of the present application and its application or use. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present application without creative efforts shall fall within the protection scope of the present application.

[0031] In the description of the present application, it should be understood that the use of terms such as "first" and "second" to limit components is only for the convenience of distinguishing the corresponding components. Without further statement, the above terms have no special meanings and thus cannot be construed as limiting the protection scope of the present application.

[0032] In the description of the present application, it should be understood that the orientation or positional relationship indicated by orientation words such as "front, rear, upper, lower, left, right", "lateral, vertical, perpendicular, horizontal" and "top, bottom", etc. is usually based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing the present application and simplifying the description. Without contrary explanations, these orientation words do not indicate and imply that the devices or elements referred to must have a specific orientation or be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation on the protection scope of the present application; the orientation words "inside, outside" refer to the inside and outside relative to the outline of each component itself.

[0033] Please refer to Figures 1 to 3 , it should be noted that the diagrams provided in this embodiment only illustrate the basic concept of the present invention in a schematic manner. Therefore, only the components related to the present invention are shown in the diagrams, rather than being drawn according to the number, shape, and size of the components in actual implementation. The form, quantity, and proportion of each component in actual implementation can be arbitrarily changed, and the layout form of its components may also be more complex.

[0034] In an embodiment of the present invention, an LED epitaxial wafer for improving light efficiency attenuation is provided, and its structural schematic diagram is as Figure 2 shown. The LED epitaxial wafer sequentially includes an N-type GaAs substrate 1, an N-type GaAs buffer layer 2, a DBR reflective layer 3, an N-type high-temperature diffusion-resistant layer 9, an N-type confinement layer 4, a first reverse doping layer 10, a multi-quantum well light-emitting layer 5, a second reverse doping layer 11, a P-type confinement layer 6, a P-type transition layer 7, and a P-type window layer 8 from bottom to top.

[0035] In some embodiments, the thickness of the N-type GaAs buffer layer material is 100 nm to 200 nm, the dopant is SiH4, and the doping concentration is 3.0×10 18 cm -3 ~5.0×10 18 cm -3 .

[0036] In some embodiments, the DBR reflective layer is a periodic structure formed by alternating growth of AlAs / Al 0.45 Ga 0.55 As materials. In each periodic structure, the thickness of AlAs is 44 nm to 48 nm, and the thickness of Al 0.45 Ga 0.55 As is 57 nm to 62 nm. The number of cycles of alternating growth of the AlAs and Al 0.45 Ga 0.55 As is 15 to 20 pairs. Among them, the dopant in the AlAs material layer is SiH4, and the doping concentration is 1.0×10 18 cm -3 ~2.0×10 18 cm-3 , Al 0.45 Ga 0.55 The dopant in the As material layer is SiH4, and the doping concentration is 2.0×10 18 cm -3 ~3.0×10 18 cm -3 .

[0037] Furthermore, the material of the N-type high-temperature diffusion resistance layer is (Al x1 Ga 1-x1 ) 0.5 In 0.5 P, with a thickness of 200 nm to 250 nm. Among them, the value range of the component x1 of Al is 0.6 to 0.8, and the doping concentration is 0.5×10 18 cm -3 ~1×10 18 cm -3 , and the N-type dopant used in this layer is SiH4. By using the design of the (Al x1 Ga 1-x1 ) 0.5 In 0.5 P insertion layer, relying on the characteristic that the electron mobility of the AlGaInP material is between that of the DBR reflection layer material and the N-type confinement layer AlInP, the current spreading ability of the LED chip is improved, and the problem of device heating and thus brightness attenuation caused by current crowding during high-current operation can be avoided.

[0038] In some embodiments, the material of the N-type confinement layer is Al 0.5 In 0.5 P, with a thickness of 300 nm to 500 nm, the dopant is SiH4, and the doping concentration is 1×10 18 cm -3 ~2×10 18 cm -3 .

[0039] In some embodiments, the material of the first reverse doping layer is (Al x2 Ga 1-x2 ) 0.5 In 0.5 P, with a thickness of 40 nm to 60 nm, the value range of x2 is 0.7 to 0.8, and the doping concentration of this layer is 0.2×10 17 cm -3 ~0.5×10 17 cm -3, CCl4 is used as a P-type dopant to provide P-type carriers. The growth position of the first reverse doping layer is between the N-type confinement layer and the multi-quantum well light-emitting layer. That is, when the LED chip is at a high temperature, a P-type dopant is used below the multi-quantum well light-emitting layer. The holes provided by it can capture the electrons on the N-type side and diffuse towards the multi-quantum well light-emitting layer, effectively avoiding the formation of deep-level defects, thereby improving the anti-light decay performance.

[0040] In some embodiments, the multi-quantum well light-emitting layer is a quantum well / barrier structure of 15 to 20 pairs, and the materials of the quantum well layer / barrier layer are both AlGaInP; specifically, the material of the quantum well layer is (Al y1 Ga 1-y1 ) 0.5 In 0.5 P, the thickness of a single quantum well layer is 3 nm to 5 nm, and the value range of y1 is 0.05 to 0.07; the material of the quantum barrier layer is (Al y2 Ga 1-y2 ) 0.5 In 0.5 P, the thickness of a single quantum barrier layer is 6 nm to 8 nm, and the value range of y2 is 0.7 to 0.8. Both the quantum well and the barrier are undoped.

[0041] In some embodiments, the material of the second reverse doping layer is (Al x3 Ga 1-x3 ) 0.5 In 0.5 P, the thickness is 60 nm to 80 nm, the value range of x3 is 0.7 to 0.8, and the doping concentration of this layer is 0.5×10 17 cm -3 ~1.0×10 17 cm -3 . DETe is used as an N-type dopant to provide N-type carriers. The growth position of the second reverse doping layer is between the P-type confinement layer and the light-emitting layer. Similarly, an N-type dopant is used above the multi-quantum well light-emitting layer. The electrons provided by it can cancel out the holes on the P-type side and diffuse towards the multi-quantum well light-emitting layer, thereby improving the anti-light decay performance.

[0042] In some embodiments, the material of the P-type confinement layer is Al 0.5 In 0.5 P, the thickness is 500 nm to 900 nm, the dopant is Cp2Mg, and the doping concentration is 0.7×10 18 cm -3 ~1×10 18 cm -3 .

[0043] In some embodiments, the material of the P-type transition layer is (Al x4 Ga 1-x4 )0.5 In 0.5 P, with a thickness of 20 nm to 40 nm, the dopant is Cp2Mg, and the doping concentration is 2×10 18 cm -3 ~3×10 18 cm -3 , and the value range of x4 is 0.2 to 0.3.

[0044] In some embodiments, the material of the P-type window layer is GaP, with a thickness of 3000 nm to 4000 nm, the dopant is CP2Mg, and the doping concentration is 1×10 18 cm -3 ~5×10 18 cm -3 .

[0045] In yet another embodiment, the present invention also provides a method for preparing an LED epitaxial wafer for improving the light efficiency attenuation. Using an MOCVD device on an N-type GaAs substrate, an N-type GaAs buffer layer, a DBR reflective layer, an N-type high-temperature diffusion-resistant layer, an N-type confinement layer, a first reverse doping layer, a multi-quantum well light-emitting layer, a second reverse doping layer, a P-type confinement layer, a P-type transition layer, and a P-type window layer are sequentially grown. The specific steps are as follows:

[0046] (1) Pump the MOCVD to a low pressure of 50 mbar in a pure H2 atmosphere, set the reaction chamber temperature to 400 °C, then transfer the N-type GaAs substrate to the reaction chamber through the manipulator transfer chamber, and then quickly heat it to 700 °C and maintain it at a constant temperature of 700 °C for 5 min to 8 min;

[0047] (2) Grow the N-type GaAs buffer layer: Set the reaction chamber temperature to 700 °C ± 10 °C, introduce TMGa and AsH3, grow a GaAs buffer layer material with a thickness of 100 nm to 200 nm, and use SiH4 as the N-type dopant with a doping concentration of 3×10 18 cm -3 ~5×10 18 cm -3 ;

[0048] (3) Grow the DBR reflective layer: Set the reaction chamber temperature to 700 °C ± 10 °C, introduce TMAl and AsH3, introduce SiH4 as the N-type dopant, grow an AlAs material with a thickness of 44 nm to 48 nm, and the doping concentration is 1×10 18 cm -3 ~2×10 18 cm -3 . Then introduce TMGa and grow an Al 0.45 Ga 0.55As material, the dopant is SiH4, and the doping concentration is 2×10 18 cm -3 ~3×10 18 cm -3 。 The above AlAs and Al 0.45 Ga 0.55 As growth combination forms the first pair of DBR reflective layers, and then the combination structure of 14 to 19 pairs is repeated and cycled;

[0049] (4)Growing N-type high-temperature diffusion resistance: Set the reaction chamber temperature to 730°C ± 10°C, and introduce TMAl, TMGa, TMIn, and PH3 onto the DBR reflective layer to grow a (Al x1 Ga 1-x1 ) 0.5 In 0.5 P material with a thickness of 200 nm to 250 nm. The value range of component x1 is 0.6 to 0.8. The N-type dopant used in this layer is SiH4, and the doping concentration is 0.5×10 18 cm -3 ~1×10 18 cm -3 。 The initial PH3 flow rate for the growth of this layer is 800 sccm, and then it gradually changes to 1300 sccm. The rate of change of the PH3 flow rate is 2.0 sccm / nm to 2.5 sccm / nm;

[0050] (5)Growing N-type confinement layer: Set the reaction chamber temperature to 730°C ± 10°C, introduce TMAl, TMIn, and PH3, and grow an Al 0.5 In 0.5 P material with a thickness of 300 nm to 500 nm and a doping concentration of 1×10 18 cm -3 ~2×10 18 cm -3 , and the N-type dopant is SiH4;

[0051] (6)Growing the first reverse doping layer: Set the reaction chamber temperature to 700°C ± 10°C, introduce TMAl, TMGa, TMIn, and PH3 onto the N-type confinement layer, and grow a (Al x2 Ga 1-x2 ) 0.5 In 0.5 P material with the value range of component x2 being 0.7 to 0.8. This layer uses CCl4 as the P-type dopant to provide P-type carriers, and the doping concentration is 0.2×10 17 cm -3 ~0.5×10 17 cm -3 ;

[0052] (7) Growing a multi - quantum - well light - emitting layer: Set the temperature of the reaction chamber to 700 °C ± 20 °C, and introduce TMGa, TMAl, TMIn, and PH3 to grow quantum wells and quantum barriers made of materials of (Al y1 Ga 1-y1 ) 0.5 In 0.5 P and (Al y2 Ga 1-y2 ) 0.5 In 0.5 P. The thickness of a single - layer quantum - well layer is 3 nm - 5 nm, and the value range of y1 is 0.05 - 0.07. The thickness of a single - layer quantum - barrier layer is 6 nm - 8 nm, the value range of y2 is 0.7 - 0.8, the number of periods is 15 - 20 pairs, and the light - emitting region is undoped;

[0053] (8) Growing a second reverse - doping layer: Set the temperature of the reaction chamber to 730 °C ± 10 °C, and introduce TMAl, TMGa, TMIn, and PH3 on the light - emitting layer to grow a (Al x3 Ga 1-x3 ) 0.5 In 0.5 P material with a thickness of 60 nm - 80 nm. The component x3 has a value range of 0.7 - 0.8. DETe is used as an N - type dopant to provide N - type carriers, and the doping concentration is 0.5×10 17 cm -3 ~1.0×10 17 cm -3 ;

[0054] (9) Growing a P - type confinement layer: Set the temperature of the reaction chamber to 730 °C ± 10 °C, and introduce TMAl, TMIn, and PH3 to grow an Al 0.5 In 0.5 P material with a thickness of 500 nm - 900 nm. The dopant is Cp2Mg, and the doping concentration is 0.7×10 18 cm -3 ~1×10 18 cm -3 ;

[0055] (10) Growing a P - type transition layer: Set the temperature of the reaction chamber to 730 °C ± 20 °C, and introduce TMGa, TMAl, TMIn, and PH3 to grow a (Al x4 Ga 1-x4 ) 0.5 In 0.5 P material with a thickness of 20 nm - 40 nm. The dopant is Cp2Mg, and the doping concentration is 2×10 18 cm -3 ~3×10 18 cm-3 , the value range of x4 is 0.2 to 0.3;

[0056] (11) Growing a P-type window layer: Set the temperature of the reaction chamber to 690 °C ± 20 °C, introduce TMGa and PH3, grow a GaP material with a thickness of 3000 nm to 4000 nm, and use CP2Mg as a P-type dopant with a doping concentration of 1×10 18 cm -3 ~5×10 18 cm -3 ;

[0057] (12) Taking the wafer: After the growth is completed, lower the temperature of the MOCVD reaction chamber to 110 °C, then adjust the pressure to 1000 mbar, open the reaction chamber, and take out the epitaxial wafer.

[0058] In order to further illustrate the present invention, the present invention will be described in detail below with reference to specific embodiments.

[0059] Embodiment 1

[0060] A method for preparing an LED epitaxial wafer for improving light efficiency attenuation specifically includes the following steps:

[0061] (1) Pump the MOCVD to a low pressure of 50 mbar in a pure H2 atmosphere, set the temperature of the reaction chamber to 400 °C, then transfer the N-type GaAs substrate to the reaction chamber through the manipulator transfer chamber, and then quickly heat it up to 700 °C and maintain it at a constant temperature of 700 °C for 6 min;

[0062] (2) Growing an N-type GaAs buffer layer: Set the temperature of the reaction chamber to 700 °C, introduce TMGa and AsH3, grow a GaAs buffer layer material with a thickness of 200 nm, and use SiH4 as an N-type dopant with a doping concentration of 5×10 18 cm -3 ;

[0063] (3) Growing a DBR reflective layer: Set the temperature of the reaction chamber to 700 °C, introduce TMAl and AsH3, introduce SiH4 as an N-type dopant, grow an AlAs material with a thickness of 44 nm, and the doping concentration is 1×10 18 cm -3 . Then introduce TMGa and grow an Al 0.45 Ga 0.55 As material, the dopant is SiH4, and the doping concentration is 2×10 18 cm -3 . The above AlAs and Al 0.45 Ga 0.55 As growth combination forms the first pair of DBR reflective layers, and then repeat this combined structure 15 times;

[0064] (4) Growth of N-type high-temperature diffusion-resistant layer: Set the reaction chamber temperature to 730 °C. Introduce TMAl, TMGa, TMIn, and PH3 onto the DBR reflective layer to grow a (Al 0.6 Ga 0.4 ) 0.5 In 0.5 P material with a thickness of 200 nm. The N-type dopant used for this layer is SiH4, and the doping concentration is 1×10 18 cm -3 . The initial PH3 flow rate for the growth of this layer is 800 sccm, and then it gradually changes to 1300 sccm. The rate of change of the PH3 flow rate is 2.5 sccm / nm;

[0065] (5) Growth of N-type confinement layer: Set the reaction chamber temperature to 730 °C. Introduce TMAl, TMIn, and PH3 to grow an Al 0.5 In 0.5 P material with a thickness of 500 nm and a doping concentration of 1×10 18 cm -3 . The N-type dopant is SiH4;

[0066] (6) Growth of the first reverse doping layer: Set the reaction chamber temperature to 700 °C. Introduce TMAl, TMGa, TMIn, and PH3 onto the N-type confinement layer to grow a (Al 0.7 Ga 0.3 ) 0.5 In 0.5 P material with a thickness of 40 nm. CCl4 is used as the P-type dopant for this layer to provide P-type carriers, and the doping concentration is 0.5×10 17 cm -3 ;

[0067] (7) Growth of multi-quantum well light-emitting layer: Set the reaction chamber temperature to 700 °C. Introduce TMGa, TMAl, TMIn, and PH3 to grow quantum wells and quantum barriers of (Al 0.05 Ga 0.95 ) 0.5 In 0.5 P and (Al 0.7 Ga 0.3 ) 0.5 In 0.5 P materials. The thickness of a single quantum well layer is 4 nm, the thickness of a single quantum barrier layer is 6 nm, the number of periods is 15 pairs, and the light-emitting region is undoped;

[0068] (8) Growth of the second reverse doping layer: Set the reaction chamber temperature to 730 °C. Introduce TMAl, TMGa, TMIn, and PH3 onto the light-emitting layer to grow an (Al0.7 Ga 0.3 ) 0.5 In 0.5 P material. DETe is used as the N-type dopant in this layer to provide N-type carriers, and the doping concentration is 0.5×10 17 cm -3 ;

[0069] (9) Growing the P-type confinement layer: Set the temperature of the reaction chamber to 730 °C, introduce TMAl, TMIn, and PH3, and grow an Al 0.5 In 0.5 P material with a thickness of 600 nm. The dopant is Cp2Mg, and the doping concentration is 1×10 18 cm -3 ;

[0070] (10) Growing the P-type transition layer: Set the temperature of the reaction chamber to 730 °C, introduce TMGa, TMAl, TMIn, and PH3, and grow a (Al 0.3 Ga 0.7 ) 0.5 In 0.5 P material with a thickness of 40 nm. The dopant is Cp2Mg, and the doping concentration is 3×10 18 cm -3 ;

[0071] (11) Growing the P-type window layer: Set the temperature of the reaction chamber to 690 °C, introduce TMGa and PH3, and grow a GaP material with a thickness of 4000 nm. CP2Mg is used as the P-type dopant, and the doping concentration is 2×10 18 cm -3 ;

[0072] (12) Taking the wafer: After the growth is completed, lower the temperature of the MOCVD reaction chamber to 110 °C, then adjust the pressure to 1000 mbar, open the reaction chamber, and take out the epitaxial wafer.

[0073] Comparative Example 1

[0074] A conventional AlGaInP LED epitaxial wafer is prepared by a conventional method, and its structural schematic diagram is as Figure 1 shown.

[0075] Test Example

[0076] 1. The LEDs obtained in Example 1 and the LEDs obtained in Comparative Example 1 were subjected to chip aging lighting tests under high temperature (115 °C) and high current (40 mA) conditions. The chip sizes were both 3.8 mil × 3.8 mil, and the results are shown in Table 1. It can be seen from the results in Table 1 that for the conventional LEDs, after being lit for 48 h, the brightness attenuation reached 19.2%, and after 1000 h, the brightness attenuation was 42.8%; while for the LEDs of the present invention, after being lit for 1000 h, the brightness attenuation was only 3.7%.

[0077] Table 1 Results of high temperature and high current aging lighting tests

[0078]

[0079] 2. The LEDs obtained in Example 1 and the LEDs obtained in Comparative Example 1 were lit, and the brightness change curves with current were compared. The results are as Figure 3 shown. The results show that the LEDs prepared in the examples of the present invention have better anti-light efficiency attenuation performance than conventional LEDs under high current, and can still maintain good luminous brightness and reliability as the current increases. Compared with conventional LEDs, there are obvious improvements.

[0080] In summary, by taking advantage of the characteristic that the electron mobility of the AlGaInP material is between the DBR reflective layer material and the N-type confinement layer AlInP, the present invention inserts an AlGaInP structure between the two to improve the current spreading ability of the LED chip, and can effectively avoid problems such as current crowding during high current operation leading to device heating and thus brightness attenuation. By adopting a special PH3 gradient growth method, the incorporation of doping materials in the lattice is adjusted to inhibit the diffusion of impurities into the light-emitting layer at high temperature, resulting in light efficiency attenuation. At the same time, reverse doping layer structures are designed on the N-type side and the P-type side, which can effectively prevent carriers from diffusing into the multi-quantum well light-emitting layer during high temperature and high current operation, causing deep-level defects and offsetting the diffusion effect of impurity elements, thereby further improving the anti-light decay performance of the LED under high temperature and high current. The obtained LEDs have excellent anti-light decay performance and anti-aging performance, high luminous brightness and reliability, and are suitable for high temperature and high current working conditions.

[0081] Finally, it should be emphasized that the above are only the preferred embodiments of the present invention and are not used to limit the present invention. For those skilled in the art, the present invention can have various changes and modifications. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. An LED epitaxial wafer for improving light efficiency attenuation, characterized in that, The LED epitaxial wafer sequentially includes an N-type GaAs substrate, an N-type GaAs buffer layer, a DBR reflective layer, an N-type high-temperature diffusion-resistant layer, an N-type confinement layer, a first reverse doping layer, a multi-quantum well light-emitting layer, a second reverse doping layer, a P-type confinement layer, a P-type transition layer, and a P-type window layer from bottom to top; The material of the N-type high-temperature diffusion-resistant layer is (Al x1 Ga 1-x1 ) 0.5 In 0.5 P, where the value range of x1 is 0.6 to 0.8, and it is grown by the gradual change method of group V source material PH3. During growth, the initial PH3 flow rate for growth is 800 sccm, and then it is gradually changed to 1300 sccm. The rate of gradual change of the PH3 flow rate is 2.0 sccm / nm to 2.5 sccm / nm; the thickness of the N-type high-temperature diffusion-resistant layer is 200 nm to 250 nm, the dopant is SiH4, and the doping concentration is 0.5×10 18 cm -3 ~1×10 18 cm -3 ; The material of the first reverse doping layer is (Al x2 Ga 1-x2 ) 0.5 In 0.5 P, with a thickness of 40 nm to 60 nm, where the value range of x2 is 0.7 to 0.

8. CCl4 is used as a p-type dopant in this layer to provide p-type carriers, and the doping concentration is 0.2×10 17 cm -3 ~0.5×10 17 cm -3 ; The material of the second reverse doping layer is (Al x3 Ga 1-x3 ) 0.5 In 0.5 P, with a thickness of 60 nm to 80 nm, where the value range of x3 is 0.7 to 0.

8. DETe is used as an N-type dopant in this layer to provide N-type carriers, and the doping concentration is 0.5×10 17 cm -3 ~1.0×10 17 cm -3 .

2. The LED epitaxial wafer for improving light efficiency attenuation according to claim 1, characterized in that, The DBR reflective layer is composed of a periodic structure formed by the alternating growth of AlAs / Al 0.45 Ga 0.55 As materials. In each periodic structure, the thickness of AlAs is 44 nm to 48 nm, and the thickness of Al 0.45 Ga 0.55 As is 57 nm to 62 nm. The number of periodic cycles of the alternating growth of the AlAs and Al 0.45 Ga 0.55 As is 15 to 20 pairs. Among them, the dopant in the AlAs material is SiH4, and the doping concentration is 1.0×10 18 cm -3 ~2.0×10 18 cm -3 , and the dopant in the Al 0.45 Ga 0.55 As material is SiH4, and the doping concentration is 2.0×10 18 cm -3 ~3.0×10 18 cm -3 .

3. An LED epitaxial wafer for improving light efficiency attenuation according to claim 1, characterized in that, The material of the N-type confinement layer is Al 0.5 In 0.5 P, with a thickness of 300 nm to 500 nm, a dopant of SiH4, and a doping concentration of 1×10 18 cm -3 ~2×10 18 cm -3 ; The material of the P-type confinement layer is Al 0.5 In 0.5 P, with a thickness of 500 nm to 900 nm, a dopant of Cp2Mg, and a doping concentration of 0.7×10 18 cm -3 ~1×10 18 cm -3 。 4. A method for preparing an LED epitaxial wafer for improving light efficiency attenuation according to any one of claims 1-3, characterized in that An N-type GaAs buffer layer, a DBR reflective layer, an N-type high-temperature diffusion-resistant layer, an N-type confinement layer, a first reverse doping layer, a multi-quantum well light-emitting layer, a second reverse doping layer, a P-type confinement layer, a P-type transition layer, and a P-type window layer are sequentially grown on the N-type GaAs substrate by using an MOCVD device; The N-type high-temperature diffusion-resistant layer is grown by using a method of gradually changing the group-V source material PH3; The first reverse doping layer is between the multi-quantum well light-emitting layer and the N-type confinement layer and is doped with a P-type dopant, and the second reverse doping layer is between the multi-quantum well light-emitting layer and the P-type confinement layer and is doped with an N-type dopant.

5. The preparation method of an LED epitaxial wafer for improving light efficiency attenuation according to claim 4, characterized in that, The growth steps of the N-type high-temperature diffusion layer are as follows: Set the reaction chamber temperature to 730 °C ± 10 °C. Introduce TMAl, TMGa, TMIn, and PH3 onto the DBR reflective layer to grow a (Al x1 Ga 1-x1 ) 0.5 In 0.5 P material with a thickness of 200 nm to 250 nm, and use SiH4 as the N-type dopant with a doping concentration of 0.5×10 18 cm -3 ~1×10 18 cm -3 , where the value range of x1 is 0.6 to 0.

8. The initial PH3 flow rate for growth is 800 sccm, and then it gradually changes to 1300 sccm. The rate of change of the PH3 flow rate is 2.0 sccm / nm to 2.5 sccm / nm.

6. The preparation method of an LED epitaxial wafer for improving light efficiency attenuation according to claim 4, characterized in that, The growth step of the first reverse doping layer is as follows: set the reaction chamber temperature to 700°C ± 10°C, introduce TMAl, TMGa, TMIn, and PH3 on the N-type confinement layer to grow a (Al x2 Ga1 -x2 ) 0.5 In 0.5 P material with a thickness of 40 nm to 60 nm, and use CCl4 as a P-type dopant to provide P-type carriers with a doping concentration of 0.2×10 17 cm -3 ~0.5×10 17 cm -3 , where the value range of x2 is 0.7 to 0.

8.

7. The preparation method of an LED epitaxial wafer for improving light efficiency attenuation according to claim 4, characterized in that The growth step of the second reverse doping layer is as follows: set the reaction chamber temperature to 730°C ± 10°C, introduce TMAl, TMGa, TMIn, and PH3 on the multi-quantum well light-emitting layer, and grow an (Al x3 Ga1 -x3 ) 0.5 In 0.5 P material with a thickness of 60 nm to 80 nm, and use DETe as an N-type dopant to provide N-type carriers with a doping concentration of 0.5×10 17 cm -3 ~1.0×10 17 cm -3 , where the value range of x3 is 0.7 to 0.8.

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