Dielectric film surface recovery with reduction plasma

By forming a metal-rich layer on the substrate of the EUV hard mask and using reduced plasma treatment, the problem of spontaneous oxidation of the high Z metal surface is solved, and the repeatability and performance improvement of EUV lithography is achieved.

CN120019473APending Publication Date: 2025-05-16APPLIED MATERIALS INC
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Patent Information

Application Number
CN202380074082.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2022-10-26
Filing Date
2023-10-24
Publication Date
2025-05-16

AI Technical Summary

Technical Problem

The prior art is difficult to prevent spontaneous oxidation of high-Z metal hard mask surfaces, and the lack of effective recovery methods, resulting in difficulty in controlling the size of EUV exposure dose and predicting EUV lithography performance.

Method used

A metal surface of 10 Å to 50 Å is formed by forming a metal-rich layer on the substrate and forming a metal oxide layer on its surface, followed by a reduction plasma treatment to restore the metal surface.

Benefits of technology

Effectively prevent spontaneous oxidation of high Z metal surfaces, restore the rich metal surface, and improve the repeatability and performance of EUV lithography, including improving dose-to-size, key size and line width roughness.

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Abstract

A method of forming an EUV photoresist hardmask is provided. The method includes treating a metal-rich layer on a substrate with a reduction plasma to form a metal surface on the metal-rich layer, the metal-rich layer having a top portion including a metal oxide layer. The metal-rich layer includes one or more of tin (Sn), indium (In), gallium (Ga), zinc (Zn), tellurium (Te), antimony (Sb), nickel (Ni), titanium (Ti), aluminum (Al), tantalum (Ta), bismuth (Bi), and lead (Pb).
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Description

Technical Field

[0001] The present disclosure generally relates to methods of forming EUV hardmasks. In particular, the present disclosure relates to methods of forming EUV hardmasks containing high-Z metals. Background Art

[0002] Reliably producing submicron and smaller features is one of the key requirements for very large scale integration (VLSI) and ultra large scale integration (ULSI) of semiconductor devices. However, with the continued miniaturization of circuit technology, the size and spacing of circuit features (such as interconnects) have placed additional demands on processing capabilities. The multi-level interconnects at the heart of this technology require precise imaging and placement of high aspect ratio features. Reliable formation of these interconnects is needed to further increase device and interconnect density.

[0003] One process for forming various interconnects and other semiconductor features uses EUV (extreme ultraviolet) lithography. Conventional EUV patterning uses a multilayer stack in which a photoresist is patterned on top of a hard mask. Common hard mask materials are spin-on silicon anti-reflective coating (SiARC) and deposited silicon oxynitride (SiON). SiARC incorporates organic components into the silicon backbone, maintaining sufficient etch selectivity for the photoresist and the stack below. Reducing the thickness of the SiARC backbone can be challenging, and spin coating limits the minimum thickness that can be achieved without excessive defects. SiON hard masks use an organic adhesion layer (OAL) to improve resist adhesion. The OAL prevents poisoning by nitrogen and can be reworked.

[0004] Several metal and metal oxide materials, e.g., high-Z materials, have been tested as EUV hard masks (HMs). Due to their chemistry, high-Z films tend to react with oxygen and oxidize over time in air. Currently there is no effective way to prevent this spontaneous surface oxidation and no feasible way to restore the high-Z film surface. Due to this problem, it is difficult to control the dose-to-size for EUV exposure and predict the corresponding EUV lithography performance, such as critical dimension (CD) and line width roughness (LWR).

[0005] Therefore, there is a continuing need in the art for methods of restoring high-Z surfaces. Summary of the invention

[0006] One or more embodiments of the present disclosure relate to a method of forming an EUV photoresist hard mask. The method includes treating a metal-rich layer on a substrate with a reducing plasma to form a metal surface on the metal-rich layer, the metal-rich layer having a top portion including a metal oxide layer.

[0007] Additional embodiments of the present disclosure relate to methods of forming an EUV photoresist hard mask. In one or more embodiments, a method of forming an EUV photoresist hard mask includes: forming a metal-rich layer on a substrate, the metal-rich layer having a thickness in a range of 10 Å to 50 Å; the metal-rich layer having a top portion including a metal oxide layer, the metal oxide layer having a thickness in a range of 20 Å to 100 Å; and treating the metal-rich layer with a reducing plasma to form a metal surface on the metal-rich layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] In order to be able to understand the above-mentioned features of the present disclosure in detail, the present disclosure may be described in more detail with reference to the embodiments, some of which are illustrated in the accompanying drawings. However, it should be noted that the accompanying drawings only illustrate typical embodiments of the present disclosure and should not be considered as limiting the scope of the present disclosure, as the present disclosure may allow other equally effective embodiments. The embodiments as described herein are illustrated in the figures of the accompanying drawings by way of example and not limitation, wherein the same reference numerals indicate similar elements.

[0009] Figure 1 A process flow chart illustrating a method of depositing a film on a substrate according to one or more embodiments is shown;

[0010] Figure 2A depicts a cross-sectional view of a substrate according to one or more embodiments;

[0011] Figure 2B depicts a cross-sectional view of a substrate according to one or more embodiments;

[0012] Figure 2C depicts a cross-sectional view of a substrate according to one or more embodiments; and

[0013] Figure 2D A cross-sectional view of a substrate is shown according to one or more embodiments.

[0014] For ease of understanding, the same reference numerals have been used as much as possible to refer to the same elements common to the drawings. The drawings are not drawn to scale and may be simplified for clarity. Elements and features of one embodiment may be beneficially incorporated into other embodiments without further elaboration. DETAILED DESCRIPTION

[0015] Before describing several exemplary embodiments of the present invention, it should be understood that the present invention is not limited to the details of the architecture or process steps described in the following description. The present invention is capable of other embodiments and of being practiced or carried out in various ways.

[0016] As used herein, the term "about" means approximately or nearly, and in the context of a stated value or range, means a variation of ±15%, or less, of that value. For example, a difference of ±14%, ±10%, ±5%, ±2%, or ±1% in a value would satisfy the definition of about.

[0017] As used in this specification and the appended claims, the term "substrate" or "wafer" refers to a surface or portion of a surface on which a process is performed. Unless the context clearly indicates otherwise, those skilled in the art will also understand that reference to a substrate may refer to only a portion of a substrate. In addition, reference to a deposition on a substrate may refer to both a bare substrate and a substrate having one or more films or features deposited or formed thereon.

[0018] As used herein, "substrate" or "substrate surface" refers to any substrate or material surface formed on a substrate on which film processing is performed during a manufacturing process. For example, substrate surfaces on which processing may be performed include materials such as silicon, silicon oxide, strained silicon, silicon on insulator (SOI), carbon-doped silicon oxide, amorphous silicon, doped silicon, germanium, gallium arsenide, glass, sapphire, and any other material, such as metals, metal nitrides, metal alloys, and other conductive materials, depending on the application. Substrates include, without limitation, semiconductor wafers. The substrate may be exposed to a pretreatment process to polish, etch, reduce, oxidize, hydroxylate, anneal, UV cure, electron beam cure, and / or bake the substrate surface. In addition to film processing directly on the surface of the substrate itself, in the present invention, any of the disclosed film processing steps may also be performed on an underlying layer formed on the substrate, as described in more detail later, and the term "substrate surface" is intended to include such underlying layers as indicated by the context. Thus, for example, where a film / layer or portion of a film / layer has been deposited onto a substrate surface, the exposed surface of the newly deposited film / layer becomes the substrate surface.

[0019] The term "on" indicates that there is direct contact between elements. The term "directly on" indicates that there is direct contact between elements without intervening elements.

[0020] As used herein, "extreme UV," "EUV," or similar terms refer to radiation in the approximate range of 10 nm to 124 nm. In some embodiments, EUV radiation (also referred to as EUV light) is in the range of 10 nm to 15 nm. In one or more embodiments, EUV light at a wavelength of about 13.5 nm is utilized.

[0021] As used in this specification and the appended claims, the terms "precursor," "reactant," "reactant gas," and the like may be used interchangeably to refer to any gaseous species that may react with a substrate surface.

[0022] As used in this specification and the appended claims, the terms "reactive compound," "reactive gas," "reactive species," "precursor," "processing gas," and the like may be used interchangeably to refer to a substance with species capable of reacting with a substrate or material on the substrate in a surface reaction (e.g., chemisorption, oxidation, reduction, cycloaddition). The substrate or portion of the substrate is sequentially exposed to two or more reactive compounds introduced into a reaction zone of a processing chamber.

[0023] Several metal and metal oxide materials, for example, high-Z materials, have been tested as EUV dielectric film hard masks (HMs). As used herein, the term "dielectric" refers to an electrically insulating material that can be polarized by an applied electric field. Due to their chemistry, high-Z films tend to react with oxygen and oxidize in air over time. There is currently no effective method to prevent this spontaneous surface oxidation and no feasible method to restore the high-Z film surface. Due to this problem, it is difficult to control the dose-to-size for EUV exposure and predict the corresponding EUV lithography performance, such as critical dimension (CD) and line width roughness (LWR). High-Z materials below the metal oxide photoresist can reduce the dose-to-size (DtS) in the EUV process. More specifically, the second electrons from the high-Z film induced by EUV light can significantly reduce the actual EUV dose required for lithography and result in increased throughput.

[0024] One or more embodiments relate to methods for preventing spontaneous oxidation and recovering high-Z surfaces. By using a reducing plasma treatment, such as H* radicals in an advanced processing chamber (APC) chamber, metal-rich surfaces with dominant metallic states can be beneficially and efficiently recovered, resulting in predictable high-Z metal compositions, leading to more repeatable EUV lithography processes and addressing EUV performance shift concerns such as dose to size, target CD, and LWR. In one or more embodiments, the application of a reducing plasma to naturally oxidized high-Z films can beneficially recover metal-rich surfaces and result in repeatable EUV lithography performance.

[0025] Embodiments of the present disclosure are illustrated by the accompanying drawings, which depict devices (e.g., transistors) and processes for forming transistors according to one or more embodiments of the present disclosure. The processes shown are merely illustrative of possible uses for the disclosed processes, and those of ordinary skill will recognize that the disclosed processes are not limited to the illustrated applications.

[0026] One or more embodiments of the present disclosure are described with reference to the drawings. In one or more embodiments, a method of forming an EUV photoresist hard mask includes treating a metal-rich layer on a substrate with a reducing plasma to form a metal surface on the metal-rich layer, the metal-rich layer having a top portion including a metal oxide layer.

[0027] Reference Figure 1 and Figure 2A , method 10 begins at operation 12, where a substrate 102 is provided. As used herein and in the appended claims, the term "provided" means that the substrate 102 or a substrate surface is made available for processing (e.g., positioned in a processing chamber). The substrate 102 can be any substrate suitable for the formation of an EUV photoresist hard mask.

[0028] At operation 14, a metal-rich layer 104 is formed on the substrate 102. In some embodiments, the metal-rich layer comprises a high-Z metal. As used herein, the term "high-Z" refers to chemical elements, such as metals, with a high atomic number (Z) of protons in the nucleus. In some embodiments, the high-Z metal has an atomic number greater than 50.

[0029] In one or more embodiments, the metal-rich layer 104 includes one or more of tin (Sn), indium (In), gallium (Ga), zinc (Zn), tellurium (Te), antimony (Sb), nickel (Ni), titanium (Ti), aluminum (Al), tantalum (Ta), bismuth (Bi), and lead (Pb). In a more specific embodiment, the metal-rich layer includes tin (Sn).

[0030] The metal rich layer 104 may be formed by any suitable means known to those of ordinary skill in the art. In some embodiments, the metal rich layer 104 may be deposited by one or more of physical vapor deposition, chemical vapor deposition, or atomic layer deposition.

[0031] In one or more embodiments, the metal-rich layer 104 can have any suitable thickness. In some embodiments, the metal-rich layer 104 has a first thickness in a range of 10 Å to 100 Å.

[0032] Reference Figure 2B, the metal-rich layer 104 is oxidized in air and forms a metal oxide layer 106 on the top surface of the metal-rich layer 104. The metal oxide layer 106 includes an oxide of the metal-rich layer 104. Therefore, the metal oxide layer 106 includes a high-Z metal oxide. In one or more embodiments, the metal oxide layer 106 includes one or more of tin oxide (SnOx), indium oxide (InOx), gallium oxide (GaOx), zinc oxide (ZnOx), tellurium oxide (TeOx), antimony oxide (SbOx), nickel oxide (NiOx), titanium oxide (TiOx), aluminum oxide (AlOx), tantalum oxide (TaOx), bismuth oxide (BiOx), and lead oxide (PbOx). In a more specific embodiment, the metal oxide layer 106 includes tin oxide (SnOx).

[0033] In one or more embodiments, when the metal oxide layer 106 is formed on the metal rich layer 104, the thickness of the metal rich layer 104 is reduced to a range of 10 Å to 50 Å. In one or more embodiments, the metal oxide layer 106 has a thickness in a range of 20 Å to 100 Å.

[0034] Reference Figure 1 as well as Figure 2C and Figure 2D At operation 18, the metal rich layer 104 and the metal oxide layer 106 are treated with a reducing plasma 108. The treatment with the reducing plasma 108 restores the metal surface 110 on the metal rich layer 104.

[0035] In some embodiments, metal surface 110 is substantially richer in metal than metal rich layer 104. As used herein, the term "substantially richer" means having more than 1%, including more than 2%, more than 3%, more than 4%, and more than 5% of the metal in metal rich layer 104.

[0036] In one or more embodiments, when the metal surface 110 formed on the metal rich layer 104 has a thickness in the range of 10 Å to 50 Å. In one or more embodiments, treating the metal rich layer 104 with the reducing plasma 108 reduces the thickness of the metal oxide layer 106 by 10 Å to 50 Å. In one or more embodiments, after being treated with the reducing plasma 108, the metal oxide layer 106 and the metal surface 110 have a combined thickness in the range of 20 Å to 100 Å.

[0037] In some embodiments, the metal content of the metal surface is at least 40% seven days after treatment on the high-Z layer 104. The metal contact of the high-Z layer 104 is about 35% when not treated with the reducing plasma 108. Thus, treatment with the reducing plasma can restore the metal content of the high-Z layer with minimal changes in the thickness profile of the high-Z layer 104.

[0038] In some embodiments, the reducing plasma 108 comprises hydrogen (H 2 ) and helium (He). In one or more embodiments, the reducing plasma 108 comprises at least 1% hydrogen, or at least 2% hydrogen, or at least 3% hydrogen, or at least 4% hydrogen, or at least 5% hydrogen, or at least 6% hydrogen, or at least 7% hydrogen, or at least 8% hydrogen, or at least 9% hydrogen, or at least 10% hydrogen, or at least 11% hydrogen, or at least 12% hydrogen, or at least 13% hydrogen, or at least 14% hydrogen, or at least 15% hydrogen, or at least 16% hydrogen, or at least 17% hydrogen, or at least 18% hydrogen, or at least 19% hydrogen. In one or more embodiments, the reducing plasma 108 comprises hydrogen in the range of 1% to 20%. In one or more embodiments, helium (He) makes up the remainder of the plasma.

[0039] In one or more embodiments, the reducing plasma may have any suitable flow rate. In one or more embodiments, the reducing plasma has a flow rate in the range of 1 sccm to 1000 sccm, or in the range of 1 sccm to 500 sccm, or in the range of 1 sccm to 400 sccm, or in the range of 1 sccm to 300 sccm, or in the range of 1 sccm to 200 sccm, or in the range of 1 sccm to 150 sccm, or in the range of 1 sccm to 50 sccm, or in the range of 1 sccm to 40 sccm, or in the range of 1 sccm to 30 sccm, or in the range of 1 sccm to 20 sccm, or in the range of 1 sccm to 10 sccm.

[0040] In one or more embodiments, the plasma treatment may occur at any suitable pressure. In one or more embodiments, the apparatus 100 is plasma treated at a pressure in the range of 0.2 mTorr to less than 500 mTorr, or in the range of 0.2 mTorr to 400 mTorr, or in the range of 0.2 mTorr to 300 mTorr, or in the range of 0.2 mTorr to 250 mTorr, or in the range of 10 mTorr to 200 mTorr, or in the range of 10 mTorr to 100 mTorr. In some embodiments, the pressure is greater than 50 mTorr, or greater than 60 mTorr, or greater than 70 mTorr, or greater than 80 mTorr, or greater than 90 mTorr, or greater than 100 mTorr.

[0041] In one or more embodiments, the plasma treatment may occur for any suitable time period. In one or more embodiments, the apparatus 100 performs plasma treatment for a duration in the range of 2 seconds to 10 minutes, or in the range of 2 seconds to 5 minutes, or in the range of 2 seconds to 4.5 minutes, or in the range of 2 seconds to 3 minutes, or in the range of 2 seconds to 2 minutes, or in the range of 2 seconds to 1 minute.

[0042] In one or more embodiments, the plasma treatment may occur at any suitable temperature. In one or more embodiments, the plasma treatment occurs at a temperature in the range of 10 ° C to 400 ° C, including in the range of 20 ° C to 200 ° C. In other embodiments, the plasma treatment occurs at ambient temperature or at room temperature.

[0043] In some embodiments, the plasma gas is flowed into the processing chamber and then ignited to form a direct plasma. In some embodiments, the plasma is ignited outside the processing chamber to form a remote plasma.

[0044] In some embodiments, the plasma is an inductively coupled plasma (ICP). In some embodiments, the plasma is a capacitively coupled plasma (CCP). In some embodiments, the plasma is a microwave plasma. In some embodiments, the plasma is generated by passing a plasma gas over a hot wire.

[0045] In one or more embodiments, plasma treatment may occur at any suitable power. In one or more embodiments, the power is in the range of 10 W to 2000 W, or in the range of 100 W to 1500 W, or in the range of 100 W to 1000 W, or in the range of 100 W to 750 W.

[0046] Several well-known cluster tools that may be employed with the present disclosure are Olympia®, Continuum®, and Trillium®, all available from Applied Materials, Inc., Santa Clara, California. However, the exact arrangement and combination of chambers may be varied for performing specific steps of the processes as described herein. Other processing chambers that may be used include, but are not limited to, cyclic layer deposition (CLD), atomic layer deposition (ALD), chemical vapor deposition (CVD), physical vapor deposition (PVD), plasma treatment, etching, pre-cleaning, chemical cleaning, thermal treatment such as RTP, plasma nitridation, degassing, orientation, hydroxylation, and other substrate processes. By performing the processes in chambers on a cluster tool, surface contamination of the substrate with atmospheric impurities may be avoided without oxidation prior to deposition of subsequent films.

[0047] According to one or more embodiments, the substrate is continuously under vacuum or in a "load lock" state and is not exposed to ambient air when moving from one chamber to the next. The transfer chamber is therefore under vacuum and is "pumped back" under vacuum pressure. An inert gas may be present in the processing chamber or the transfer chamber. In some embodiments, an inert gas is used as a purge gas to remove some or all of the reactants (e.g., reactants). According to one or more embodiments, a purge gas is injected at the outlet of the deposition chamber to prevent reactants (e.g., reactants) from moving from the deposition chamber to the transfer chamber and / or additional processing chambers. Thus, the flow of the inert gas forms a curtain at the outlet of the chamber.

[0048] Substrates may be processed in a single substrate deposition chamber, where a single substrate is loaded, processed, and unloaded before another substrate is processed. Substrates may also be processed in a continuous manner, similar to a conveyor belt system, where multiple substrates are individually loaded into a first portion of a chamber, moved through the chamber, and unloaded from a second portion of the chamber. The shape of the chamber and associated conveyor belt system may form a straight path or a curved path. Additionally, the processing chamber may be a carousel, where multiple substrates are moved about a central axis and exposed to processes such as deposition, etching, annealing, cleaning, etc. throughout the carousel path.

[0049] During processing, the substrate may be heated or cooled. This heating or cooling may be accomplished by any suitable means, including but not limited to changing the temperature of the substrate support and flowing a heating or cooling gas to the substrate surface. In some embodiments, the substrate support includes a heater / cooler that can be controlled to change the substrate temperature conductively. In one or more embodiments, the gas used (reactive gas or inert gas) is heated or cooled to locally change the substrate temperature. In some embodiments, the heater / cooler is positioned within the chamber adjacent to the substrate surface to convectively change the substrate temperature.

[0050] The substrate may also be stationary or rotated during processing. A rotating substrate may be rotated continuously or intermittently (about a substrate axis). For example, the substrate may be rotated throughout the process, or the substrate may be rotated a small amount between exposures to different reactant or purge gases. Rotating the substrate (continuously or intermittently) during processing may help produce a more uniform deposition or etch by minimizing the effects of local variability in, for example, gas flow geometry.

[0051] The use of the terms "a" and "an" and "the" and similar designators in the context of describing the materials and methods discussed herein (particularly in the context of the claims that follow) is intended to be constructed to cover both the singular and the plural, unless otherwise specified herein or clearly contradicted by the context. The numerical ranges mentioned herein are intended only as a shorthand method of individually referring to each individual value falling within this range, unless otherwise specified herein, each individual value is incorporated into this specification as if it were individually mentioned herein. All methods described herein may be performed in any suitable order, unless otherwise specified herein or clearly contradicted by the context. The use of any and all examples or exemplary language (e.g., "such as") provided herein is intended only to preferably illustrate the materials and methods, and does not impose limitations on the scope, unless otherwise stated. No language in this specification should be interpreted as indicating that any non-declared element is essential to the implementation of the disclosed materials and methods.

[0052] Reference throughout this specification to "one embodiment," "some embodiments," "one or more embodiments," or "an embodiment" means that a particular feature, structure, material, or characteristic described with respect to that embodiment is included in at least one embodiment of the present disclosure. Thus, phrases such as "in one or more embodiments," "in some embodiments," "in one embodiment," or "in an embodiment" appearing in various places throughout this specification do not necessarily refer to the same embodiment of the present disclosure. Furthermore, in one or more embodiments, the particular features, structures, materials, or characteristics may be combined in any suitable manner.

[0053] Although the present disclosure has been described herein with reference to specific embodiments, it will be understood that these embodiments are merely illustrative of the principles and applications of the present disclosure. Various modifications and variations may be made to the methods and apparatus of the present disclosure without departing from the spirit and scope of the present disclosure, as will be apparent to those skilled in the art. Therefore, the present disclosure is intended to include modifications and variations that fall within the scope of the appended claims and their equivalents.

Claims

1. A method for forming an EUV photoresist hard mask, the method comprising: A metal rich layer on a substrate is treated with a reducing plasma to form a metal surface on the metal rich layer, the metal rich layer having a top portion including a metal oxide layer.

2. The method of claim 1, wherein the metal-rich layer comprises one or more of tin (Sn), indium (In), gallium (Ga), zinc (Zn), tellurium (Te), antimony (Sb), nickel (Ni), titanium (Ti), aluminum (Al), tantalum (Ta), bismuth (Bi) and lead (Pb).

3. The method of claim 1, wherein the metal oxide layer comprises one or more of tin oxide (SnOx), indium oxide (InOx), gallium oxide (GaOx), zinc oxide (ZnOx), tellurium oxide (TeOx), antimony oxide (SbOx), nickel oxide (NiOx), titanium oxide (TiOx), aluminum oxide (AlOx), tantalum oxide (TaOx), bismuth oxide (BiOx), and lead oxide (PbOx).

4. The method of claim 1, wherein the metal surface is substantially free of metal oxides. 5 . The method of claim 1 , wherein the metal-rich layer comprises tin (Sn) and the metal oxide layer comprises tin oxide (SnOx).

6. The method of claim 1, wherein the metal rich layer has a thickness in the range of 10 Å to 50 Å.

7. The method of claim 1, wherein the metal oxide layer has a thickness in the range of 20 Å to 100 Å.

8. The method of claim 7, wherein treating the metal-rich layer with the reducing plasma reduces the thickness of the metal oxide layer by 10 Å to 50 Å.

9. The method of claim 8, wherein after treatment with the reducing plasma, the metal oxide layer and the metal surface have a combined thickness in the range of 20 Å to 100 Å.

10. The method of claim 1, wherein the metal surface has a metal content of at least 40% after seven days.

11. The method of claim 1 , wherein the reducing plasma comprises 1% to 20% hydrogen.

12. The method of claim 11, wherein the reducing plasma comprises at least 1% hydrogen and helium.

13. A method for forming an EUV photoresist hard mask, the method comprising: forming a metal-rich layer on a substrate, the metal-rich layer having a thickness in a range of 10 Å to 50 Å; The metal rich layer has a top portion, the top portion comprising a metal oxide layer, the metal oxide layer having a thickness in a range of 20 Å to 100 Å; and The metal rich layer is treated with a reducing plasma to form a metal surface on the metal rich layer.

14. The method of claim 13, wherein the metal-rich layer comprises one or more of tin (Sn), indium (In), gallium (Ga), zinc (Zn), tellurium (Te), antimony (Sb), nickel (Ni), titanium (Ti), aluminum (Al), tantalum (Ta), bismuth (Bi) and lead (Pb).

15. The method of claim 13, wherein the metal oxide layer comprises one or more of tin oxide (SnOx), indium oxide (InOx), gallium oxide (GaOx), zinc oxide (ZnOx), tellurium oxide (TeOx), antimony oxide (SbOx), nickel oxide (NiOx), titanium oxide (TiOx), aluminum oxide (AlOx), tantalum oxide (TaOx), bismuth oxide (BiOx), and lead oxide (PbOx).

16. The method of claim 13, wherein the metal surface is substantially free of metal oxides. 17 . The method of claim 13 , wherein the metal-rich layer comprises tin (Sn) and the metal oxide layer comprises tin oxide (SnOx).

18. The method of claim 13, wherein treating the metal-rich layer with the reducing plasma reduces the thickness of the metal oxide layer by 10 Å to 50 Å.

19. The method of claim 18, wherein after treatment with the reducing plasma, the metal oxide layer and the metal surface have a combined thickness in the range of 20 Å to 100 Å.

20. The method of claim 1, wherein the reducing plasma comprises 1% to 20% hydrogen.