Data fault tolerance method, equipment, device and storage medium

Abstract

The embodiment of the invention relates to a data fault tolerance method, equipment and device and a storage medium, and relates to the technical field of computers. The method comprises the following steps: acquiring a preset number of first initial flag heads in a first storage area; performing multi-modular redundancy processing on each first initial mark head, and determining a first target mark head; the first target mark head at least comprises a first head effective value, a first data effective value, a first head cyclic redundancy check code and a first data length; if it is determined that both the first header effective value and the first data effective value are correct, performing cyclic redundancy check on the first target flag header based on a first header cyclic redundancy check code; and if the cyclic redundancy check of the first target flag head is successful, determining first target data from the first storage area based on the first data length. In this way, the validity and correctness of the data are determined more quickly and rigorously with a smaller data processing amount, and the data stability is improved.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a data fault-tolerant method, device, apparatus and storage medium. Background Art

[0002] As the functions of applications change, the data related to the applications (such as program code, running data, etc.) will increase. Due to the influence of many factors such as network environment, external radiation, hardware stability, etc., data errors and data loss are prone to occur, resulting in unstable operation of the application. For this reason, solutions such as data backup and data verification for the data transmission process have emerged in the prior art to improve the stability of related data. However, the scope of action of simple data backup and data verification solutions during transmission is limited, and it cannot adapt well to the situation of increasing data under the 5G communication protocol, and it still cannot improve the stability of the data. Summary of the invention

[0003] In order to solve the above technical problems, the embodiments of the present application provide a data fault-tolerant method, device, apparatus and storage medium to utilize odd storage areas to back up application-related data, while constructing a header for storing metadata information therefor, and verifying the correctness of the application-related data stored in the storage area through multiple data checks on multiple headers, thereby improving the stability of applications with larger data volumes.

[0004] In a first aspect, an embodiment of the present application provides a data fault tolerance method, the method comprising:

[0005] Obtaining a preset number of first initial marker headers in the first storage area; wherein the preset number is an odd number greater than 1;

[0006] Performing multi-mode redundancy processing on each of the first initial marker headers to determine a first target marker header; wherein the first target marker header at least includes a first header valid value, a first data valid value, a first header cyclic redundancy check code and a first data length;

[0007] If it is determined that both the first header valid value and the first data valid value are correct, performing a cyclic redundancy check on the first target flag header based on the first header cyclic redundancy check code;

[0008] If the cyclic redundancy check of the first target header succeeds, first target data is determined from the first storage area based on the first data length.

[0009] In some embodiments, the first target marker header further includes a first data cyclic redundancy check code;

[0010] Accordingly, determining the first target data from the first storage area based on the first data length includes:

[0011] Based on the first data length, obtaining first initial data from each of the first storage areas;

[0012] Performing multi-mode redundancy processing on each of the first initial data to determine first candidate data;

[0013] Based on the first data cyclic redundancy check code, performing a cyclic redundancy check on the first candidate data;

[0014] If the cyclic redundancy check of the first candidate data succeeds, the first candidate data is determined as the first target data.

[0015] In some embodiments, the data fault tolerance method further includes:

[0016] If it is determined that the first header valid value or the first data valid value is wrong, or if the cyclic redundancy check of the first target flag header fails, the second target data is determined from the preset number of second storage areas; wherein different versions of data are stored in the first storage area and the second storage area respectively.

[0017] In some embodiments, the data fault tolerance method further includes:

[0018] If the cyclic redundancy check of the first candidate data fails, second target data is determined from the preset number of second storage areas; wherein the first storage area and the second storage area respectively store different versions of data.

[0019] In some embodiments, the first storage area and the corresponding second storage area are set in the same memory, and the first storage area is used to store upgraded version data, and the second storage area is used to store original version data.

[0020] In some embodiments, determining the second target data from the preset number of second storage areas includes:

[0021] Acquire the second initial header in each of the second storage areas;

[0022] Performing multi-mode redundancy processing on each of the second initial marker headers to determine a second target marker header; wherein the second target marker header at least includes a second header valid value, a second data valid value, a second header cyclic redundancy check code, and a second data length;

[0023] If it is determined that both the second header valid value and the second data valid value are correct, performing a cyclic redundancy check on the second target flag header based on the second header cyclic redundancy check code;

[0024] If the cyclic redundancy check of the second target header succeeds, the second target data is determined from the second storage area based on the second data length.

[0025] In some embodiments, the second target marker header further includes a second data cyclic redundancy check code;

[0026] Accordingly, determining the second target data from the second storage area based on the second data length includes:

[0027] Based on the second data length, obtaining second initial data from each of the second storage areas;

[0028] Performing multi-mode redundancy processing on each of the second initial data to determine second candidate data;

[0029] Based on the second data cyclic redundancy check code, performing a cyclic redundancy check on the second candidate data;

[0030] If the cyclic redundancy check of the second candidate data is successful, the second candidate data is determined as the second target data.

[0031] In some embodiments, the data stored in each storage area includes data obtained by compression processing based on a preset compression method.

[0032] In some embodiments, the data fault tolerance method further includes:

[0033] A target processing operation is performed on the first target data or the second target data.

[0034] Further, for the application data, executing the target processing operation includes:

[0035] The application data is decompressed based on a decompression method corresponding to a preset compression method, and the application is run based on the decompression result.

[0036] In some embodiments, the first target header also includes at least one of a board type, a data creation time, an operating system type, a CPU architecture type, a preset data compression method, a mirror data type, and a mirror data identifier.

[0037] In a second aspect, an embodiment of the present application further provides a data fault-tolerant device, the device comprising a memory, a transceiver, and a processor:

[0038] A memory for storing a computer program; a transceiver for transmitting and receiving data under the control of the processor; and a processor for reading the computer program in the memory and performing the following operations:

[0039] Obtaining a preset number of first initial marker headers in the first storage area; wherein the preset number is an odd number greater than 1;

[0040] Performing multi-mode redundancy processing on each of the first initial marker headers to determine a first target marker header; wherein the first target marker header at least includes a first header valid value, a first data valid value, a first header cyclic redundancy check code and a first data length;

[0041] If it is determined that both the first header valid value and the first data valid value are correct, performing a cyclic redundancy check on the first target flag header based on the first header cyclic redundancy check code;

[0042] If the cyclic redundancy check of the first target header succeeds, first target data is determined from the first storage area based on the first data length.

[0043] In some embodiments, the first target marker header further includes a first data cyclic redundancy check code;

[0044] The determining, based on the first data length, first target data from the first storage area comprises:

[0045] Based on the first data length, obtaining first initial data from each of the first storage areas;

[0046] Performing multi-mode redundancy processing on each of the first initial data to determine first candidate data;

[0047] Based on the first data cyclic redundancy check code, performing a cyclic redundancy check on the first candidate data;

[0048] If the cyclic redundancy check of the first candidate data succeeds, the first candidate data is determined as the first target data.

[0049] In some embodiments, the processor further performs the following operations:

[0050] If it is determined that the first header valid value or the first data valid value is wrong, or if the cyclic redundancy check of the first target flag header fails, the second target data is determined from the preset number of second storage areas; wherein different versions of data are stored in the first storage area and the second storage area respectively.

[0051] In some embodiments, the processor further performs the following operations:

[0052] If the cyclic redundancy check of the first candidate data fails, second target data is determined from the preset number of second storage areas; wherein the first storage area and the second storage area respectively store different versions of data.

[0053] In some embodiments, the first storage area and the corresponding second storage area are set in the same memory, and the first storage area is used to store upgraded version data, and the second storage area is used to store original version data.

[0054] In some embodiments, determining the second target data from the preset number of second storage areas includes:

[0055] Acquire the second initial header in each of the second storage areas;

[0056] Performing multi-mode redundancy processing on each of the second initial marker headers to determine a second target marker header; wherein the second target marker header at least includes a second header valid value, a second data valid value, a second header cyclic redundancy check code, and a second data length;

[0057] If it is determined that both the second header valid value and the second data valid value are correct, performing a cyclic redundancy check on the second target flag header based on the second header cyclic redundancy check code;

[0058] If the cyclic redundancy check of the second target header succeeds, the second target data is determined from the second storage area based on the second data length.

[0059] In some embodiments, the second target marker header further includes a second data cyclic redundancy check code;

[0060] Accordingly, determining the second target data from the second storage area based on the second data length includes:

[0061] Based on the second data length, obtaining second initial data from each of the second storage areas;

[0062] Performing multi-mode redundancy processing on each of the second initial data to determine second candidate data;

[0063] Based on the second data cyclic redundancy check code, performing a cyclic redundancy check on the second candidate data;

[0064] If the cyclic redundancy check of the second candidate data is successful, the second candidate data is determined as the second target data.

[0065] In some embodiments, the data stored in each storage area includes data obtained by compression processing based on a preset compression method.

[0066] In some embodiments, the processor further performs the following operations:

[0067] A target processing operation is performed on the first target data or the second target data.

[0068] Further, for the application data, executing the target processing operation includes:

[0069] The application data is decompressed based on a decompression method corresponding to a preset compression method, and the application is run based on the decompression result.

[0070] In some embodiments, the first target header also includes at least one of a board type, a data creation time, an operating system type, a CPU architecture type, a preset data compression method, a mirror data type, and a mirror data identifier.

[0071] In a third aspect, an embodiment of the present application further provides a data fault-tolerant device, the data fault-tolerant device comprising:

[0072] A first initial marker header acquisition unit, used to acquire a preset number of first initial marker headers in the first storage area; wherein the preset number is an odd number greater than 1;

[0073] A first target header determination unit, configured to perform multi-mode redundancy processing on each of the first initial headers to determine a first target header; wherein the first target header at least includes a first header valid value, a first data valid value, a first header cyclic redundancy check code, and a first data length;

[0074] A first flag header cyclic redundancy check unit, configured to perform a cyclic redundancy check on the first target flag header based on the first header cyclic redundancy check code if it is determined that the first header valid value and the first data valid value are both correct;

[0075] The first target data determining unit is configured to determine the first target data from the first storage area based on the first data length if the cyclic redundancy check of the first target header succeeds.

[0076] In some embodiments, the first target marker header further includes a first data cyclic redundancy check code;

[0077] Accordingly, the first target data determination unit is specifically used for:

[0078] Based on the first data length, obtaining first initial data from each first storage area;

[0079] Performing multi-mode redundancy processing on each first initial data to determine first candidate data;

[0080] Based on the first data cyclic redundancy check code, performing a cyclic redundancy check on the first candidate data;

[0081] If the cyclic redundancy check of the first candidate data succeeds, the first candidate data is determined as the first target data.

[0082] In some embodiments, the data fault tolerance device further includes a second target data determination unit, configured to:

[0083] If it is determined that the first header valid value or the first data valid value is wrong, or if the cyclic redundancy check of the first target flag header fails, the second target data is determined from a preset number of second storage areas; wherein different versions of data are stored in the first storage area and the second storage area respectively.

[0084] In some embodiments, the second target data determination unit is further configured to:

[0085] If the cyclic redundancy check of the first candidate data fails, the second target data is determined from a preset number of second storage areas; wherein different versions of data are stored in the first storage area and the second storage area respectively.

[0086] In some embodiments, the first storage area and the corresponding second storage area are set in the same memory, and the first storage area is used to store the data of the upgraded version, and the second storage area is used to store the data of the original version.

[0087] In some embodiments, the second target data determining unit includes:

[0088] A second initial marker header acquisition subunit, used for acquiring the second initial marker header in each second storage area;

[0089] A second target header determination subunit is used to perform multi-mode redundancy processing on each second initial header to determine a second target header; wherein the second target header at least includes a second header valid value, a second data valid value, a second header cyclic redundancy check code and a second data length;

[0090] A second flag header cyclic redundancy check subunit is used to perform a cyclic redundancy check on the second target flag header based on the second header cyclic redundancy check code if it is determined that the second header valid value and the second data valid value are both correct;

[0091] The second target data determination subunit is used to determine the second target data from the second storage area based on the second data length if the cyclic redundancy check of the second target header succeeds.

[0092] Furthermore, the second target marker header also includes a second data cyclic redundancy check code;

[0093] Accordingly, the second target data determination subunit is specifically used for:

[0094] Based on the second data length, obtaining second initial data from each second storage area;

[0095] Performing multi-mode redundancy processing on each second initial data to determine second candidate data;

[0096] Based on the second data cyclic redundancy check code, performing a cyclic redundancy check on the second candidate data;

[0097] If the cyclic redundancy check of the second candidate data succeeds, the second candidate data is determined as the second target data.

[0098] In some embodiments, the data stored in each storage area includes data obtained by compression processing based on a preset compression method.

[0099] In some embodiments, the data fault tolerance device further includes a data processing unit, which is used to:

[0100] A target processing operation is performed on the first target data or the second target data.

[0101] Furthermore, the data processing unit is specifically used to perform the following target processing operations on the application data:

[0102] The application data is decompressed based on a decompression method corresponding to a preset compression method, and the application is run based on the decompression result.

[0103] In some embodiments, the first target header also includes at least one of a board type, a data creation time, an operating system type, a CPU architecture type, a preset data compression method, a mirror data type, and a mirror data identifier.

[0104] In a fourth aspect, an embodiment of the present application further provides a processor-readable storage medium, wherein the processor-readable storage medium stores a program, and the program is used to enable the processor to execute the data fault-tolerance method described in any embodiment of the present application.

[0105] In a fifth aspect, an embodiment of the present application further provides a computer program product, which is used to execute the data fault tolerance method described in any embodiment of the present application.

[0106] The data fault-tolerant method, device, apparatus, and storage medium of the embodiment of the present application can obtain the first initial marker header in the first storage area of ​​an odd number greater than 1, and perform multi-mode redundancy processing on each of the first initial marker headers to determine the first target marker header, thereby improving the correctness and stability of the marker header of the data; then perform a correctness check on the first header valid value and the first data valid value contained in the first target marker header to determine whether the marker header and its corresponding data are valid, and when it is determined that the first header valid value and the first data valid value are both correct, perform a cyclic redundancy check (Cyclic Redundancy Check) on the first header contained in the first target marker header. The method further comprises the following steps: first, performing a CRC check on the first target header to further determine the correctness of the header, and determining the correct first target data from the first storage area based on the first data length when the CRC check succeeds; on the one hand, by adding a header to the data and performing various checks on it to determine the correctness of the data, rather than directly checking the data, the amount of data processing is reduced, the efficiency of judging the correctness of the data is improved, and thus the stability processing of related data of applications with increasing data volumes under the 5G communication protocol is more suitable; on the other hand, by performing multiple checks such as multi-mode redundancy processing, header valid value check, data valid value check, and header CRC code check on odd-numbered headers, the validity and correctness of the data can be determined more rigorously, thereby improving the stability of the data and its corresponding application operations. BRIEF DESCRIPTION OF THE DRAWINGS

[0107] The above and other features, advantages and aspects of the embodiments of the present application will become more apparent with reference to the following detailed description in conjunction with the accompanying drawings. Throughout the accompanying drawings, the same or similar reference numerals represent the same or similar elements. It should be understood that the drawings are schematic and that components and elements are not necessarily drawn to scale.

[0108] Figure 1 A flowchart of a data fault tolerance method provided in an embodiment of the present application;

[0109] Figure 2a A schematic diagram of a data structure of a flag header corresponding to a first storage area provided in an embodiment of the present application;

[0110] Figure 2b A schematic diagram of a data structure of a flag header corresponding to a first storage area and a second storage area provided in an embodiment of the present application;

[0111] Figure 3 A schematic diagram of the structure of a memory including a first storage area and a second storage area provided in an embodiment of the present application;

[0112] Figure 4A flowchart of another data fault tolerance method provided in an embodiment of the present application;

[0113] Figure 5 A schematic diagram of the structure of a data fault-tolerant device provided in an embodiment of the present application;

[0114] Figure 6 A schematic diagram of the structure of a data fault-tolerant device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0115] In the embodiments of the present application, the term "and / or" describes the association relationship of the associated objects, indicating that there may be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the objects associated with each other are in an "or" relationship. The term "multiple" refers to two or more, and other quantifiers are similar. The concepts of terms such as "first" and "second" are only used to distinguish different devices, modules or units, and are not used to limit the order or interdependence of the functions performed by these devices, modules or units. The term "including" and its variations are open inclusions, that is, "including but not limited to". The term "based on" is "based at least in part on". The term "some embodiments" means "at least some embodiments"; the term "other embodiments" means "at least some other embodiments"; the term "an example" means "at least one example"; the term "another example" means "at least one other example". The relevant definitions of other terms will be given in the following description.

[0116] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. The various steps recorded in the method implementation mode of the present application can be performed in different orders and / or in parallel. In addition, the method implementation mode may include additional steps and / or omit the steps shown in the execution, etc. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0117] The names of the messages or information exchanged between multiple devices in the embodiments of the present application are only used for illustrative purposes and are not used to limit the scope of these messages or information.

[0118] Due to various reasons such as the network environment, external radiation, hardware stability, etc., the application-related data may have data errors, data loss, and other data jump problems, causing the application or its upgrade process to be unable to run stably.

[0119] Exemplarily, a spacecraft operating in a space environment contains many application programs to ensure the normal operation of the spacecraft and the processing of related tasks. However, space radiation in the space environment can affect the hardware devices of the spacecraft, causing data jumps. One reason is that high-energy particles (such as protons, neutrons, heavy ions, etc.) and electromagnetic radiation (such as X-rays, gamma rays, etc.) in the space environment have characteristics such as high energy, high penetration power, and strong radiation. They may change the charge state in the hardware, resulting in errors in the hardware logic state, thus affecting program jumps. For example, radiation may change the charge state in the memory, causing data errors; or change the charge state in the logic circuit, resulting in errors in the circuit function. Another reason is that high-energy particles and electromagnetic radiation may cause instability in the hardware state, thus triggering abnormal behaviors of the program. For example, radiation may cause errors in the values in the status register of the Central Processing Unit (CPU), resulting in abnormal program execution; or affect the operation of the Memory Management Unit (MMU), resulting in abnormal program access addresses. Another reason is that high-energy particles may also generate transient currents in the chip, causing changes in the circuit state, and further affecting program jumps.

[0120] The jump of the program / data will cause the program to change its original function, resulting in equipment malfunction, failure, etc. Similarly, due to the influence of space radiation, when some device programs in the spacecraft are upgraded and uploaded, the new program is in a state with low reliability.

[0121] Therefore, in related technologies, solutions for data verification such as data backup, parity check for the data transmission process, CRC check, etc. have been proposed to minimize data jumps. For example, in the space environment, there are mainly the following methods to solve the influence of space radiation on program jumps: One is to use radiation-resistant chips to reduce the influence of space radiation on the hardware; or use materials such as metal shielding and protective layers to reduce the influence of radiation on the program; another is to design fault-tolerant algorithms to detect and correct errors in data / programs during the data transmission process to ensure the correctness of the program; or use backup systems, recovery mechanisms, etc. to ensure the normal operation of the program; another is to adopt multi-redundancy technologies, such as using multiple hardware devices such as processors and memories to back up the data and running states of the program, or using multiple software modules to increase the reliability of the system. Even if a part of the system fails, the entire system can still operate normally.

[0122] However, the above solutions can only reduce the impact of data jumps on applications to a certain extent in some aspects. For example, the fault-tolerant algorithm only detects and processes the data transmission process, but does not process the data storage aspect, and cannot solve the problem of data errors in the memory; for another example, the amount of data related to applications under the G5 communication protocol has increased dramatically, and data backup and redundancy technologies will not only increase hardware and time costs, but also increase the difficulty of fault-tolerant detection, fault detection and recovery, and reduce processing efficiency. These will affect the validity and correctness of the data, and then affect the stability of the data.

[0123] Based on the above situation, an embodiment of the present application provides a data fault-tolerant solution, which utilizes an odd number of first storage areas greater than 1 to perform data backup while constructing a first initial header for storing metadata information for the data in the storage area; in this way, there is no need to directly verify and recover multiple copies of data with a large amount of data, but instead multiple checks of multiple first initial headers are performed to determine whether the data in the storage area is valid and correct, thereby reducing the data processing volume of data fault-tolerant verification, thereby improving the efficiency of data detection and recovery, and making it more adaptable to the stability processing process of related data of applications with a sharp increase in data volume under the 5G communication protocol, ensuring the stable operation of the application, and thereby improving the stability and success rate of application upgrades.

[0124] The data fault-tolerant method provided in the embodiment of the present application can be applied to the management scenario of the relevant data of the application. For example, it can be applied to the data management in the case where the relevant data of the application jumps due to the influence of space radiation in the aerospace environment, so as to update the application more reliably and ensure the accuracy of the application more reliably, which plays a great stabilizing role in the software program of the equipment in the aerospace environment. The method can be performed by a data fault-tolerant device, which can be implemented by software and / or hardware, and the device can be integrated in a data fault-tolerant device storing the relevant data of the application. For example, the data fault-tolerant device may include a laptop or desktop computer, a server, a processor in aerospace equipment, etc. that is communicatively connected to multiple memories.

[0125] Figure 1 FIG. 1 is a flow chart of a data fault tolerance method provided by an embodiment of the present application. Figure 1 As shown, the data fault tolerance method may include the following steps:

[0126] S110, obtaining a preset number of first initial marker headers in the first storage area.

[0127] Among them, the preset number is the number value of the storage area set in advance. In order to ensure that the data in the storage area can be detected and restored through multi-mode redundant processing in the future to improve the anti-interference and reliability of the data in the storage area, the preset number can be set to an odd number greater than 1, such as 3, 5, 7, etc., and the specific value can be set according to business needs. For example, if the hardware cost and time cost permit, the more storage areas, the more data backups, the lower the probability of problems with the same piece of data, and the higher the stability and reliability of the data. The first storage area is a storage space for storing data in the memory. The first initial header is an original header constructed based on the data stored in the first storage area, which is used to store metadata information describing the data stored in the storage area. The first initial header can be used for data verification and recovery in the embodiment of the present application, and can also be used for data parsing in subsequent storage areas.

[0128] In order to improve data stability, a preset number of first storage areas are set in the embodiment of the present application, which are used to back up and store data to be processed, such as at least one of the code of the application, the necessary data on which the application depends, and the result data generated by the application. Considering that the amount of data of these data may be large, the resources and time consumed by directly verifying and restoring multiple copies of data are relatively large. In the embodiment of the present application, a first initial flag header is set for each first storage area. In this way, when starting data verification, each first initial flag header can be directly read from each first storage area, so that the correctness of the data can be detected by verifying and restoring multiple first initial flag headers later.

[0129] See also Figure 2a , a first initial header is added at the front end of the first storage area. The first initial header includes at least a header validity value, a data validity value, a header cyclic redundancy check code and a data length. The header validity value here is a value that characterizes the validity of the header, which can be preset. The data validity is data that characterizes the validity of the data stored in the storage area, which can also be preset. The header cyclic redundancy check code is the CRC code of the header, which uses a preset hash function to generate a short fixed-bit check code according to the header, which is used to detect or check possible errors in the header. The data length is the data size that characterizes the storage space occupied by the data in the storage area, which can be determined according to the data content and storage method. Therefore, the header validity value, the data validity value and the header cyclic redundancy check code in the first initial header can be used to judge the validity and correctness of the data before reading the data, and to perform error recovery and retransmission when errors occur.

[0130] In some embodiments, in order to further improve the accuracy of data stability judgment, a data CRC code (ie, data cyclic redundancy check code) may be added to the first initial header, such as Figure 2a / Figure 2b The data CRC code can use a preset hash function to generate a short fixed-bit check code based on the data, which is used to detect or check possible errors in the data.

[0131] In some embodiments, Figure 2a / Figure 2b As shown, the first initial header also includes at least one of the board type of the hardware device, the creation time of the data, the type of the operating system running the data, the CPU architecture type, the preset compression method of the data, the image data type, and the image data identifier (such as the name or number of the image data). Such information can represent the software information and hardware information corresponding to the data, so as to further verify whether the data is correct and complete, and can further improve the accuracy and efficiency of the data stability check.

[0132] It should be noted that the data volume of the flag header and the data volume of each field in the flag header can be set according to business requirements. Figure 2a / Figure 2b In the example, the flag header is set to 64 bytes, the operating system type, CPU architecture type, preset compression method and image data type are all set to 1 byte, the image data identifier is set to 32 bytes, and the other fields are all set to 4 bytes.

[0133] S120, performing multi-mode redundancy processing on each first initial marker header to determine a first target marker header; the first target marker header at least includes a first header valid value, a first data valid value, a first header cyclic redundancy check code and a first data length.

[0134] Among them, multi-mode redundancy refers to multiple (such as n) modules performing the same operation at the same time, with the majority of the same outputs as the correct output of the voting system. As long as the majority (such as [n / 2], [] represents the rounding symbol) of the same errors do not occur at the same time in the n modules, the errors of the faulty modules can be masked to ensure the correct output of the system. Since the multiple modules are independent of each other, it is an extremely low probability event that the majority of modules have errors at the same time, so the credibility can be greatly improved. For example, when n is 3, it is triple-mode redundancy. As long as two identical errors do not occur at the same time, the errors of the faulty modules can be masked and the correct results can be retained. The first target header is a correct header determined from each first initial header. The first header valid value, the first data valid value, the first header cyclic redundancy check code and the first data length are the header valid value, the data valid value, the header CRC code and the data length in the first target header. Exemplarily, the first target header also includes at least one of the board type, the creation time of the data, the operating system type, the CPU architecture type, the preset compression method of the data, the mirror data type and the mirror data identifier.

[0135] According to the above description, the first initial headers stored in multiple first storage areas may be damaged or lost due to various reasons. Therefore, in the embodiment of the present application, each first initial header can be subjected to multi-module redundancy processing. For example, for the example in which the preset number is 3, three first initial headers can be subjected to triple-module redundancy processing. That is, the values ​​of the binary digits of the three first initial headers are compared. For each binary digit, if the three values ​​are the same, the value is retained; if two values ​​are the same and one value is different, the same value is retained, and the different values ​​are modified to the same value to complete data recovery.

[0136] If the result of the multi-mode redundancy processing is that the values ​​of most first initial markers are consistent, the consistent first initial markers are determined as the first target markers. Meanwhile, the inconsistent few first initial markers can be replaced with the first target marker to repair the abnormal first initial markers.

[0137] S130: If it is determined that both the first header valid value and the first data valid value are correct, a cyclic redundancy check is performed on the first target flag header based on the first header cyclic redundancy check code.

[0138] After the first target flag header is determined, the first header valid value and the first data valid value can be read, and the correctness of the header valid value and the data valid value obtained in advance can be checked, such as comparing the first header valid value and the header valid value obtained in advance to see if they are consistent. If they are consistent, it is determined to be correct. If both the first header valid value and the first data valid value are correct, it means that the first target flag header and the data stored in the first storage area are valid.

[0139] Then, the first header CRC code in the first target marker header is read. At the same time, the header CRC code generated by the same hash function when generating the mirror data in the first storage area is obtained. The read first header CRC code is compared with the generated header CRC code to perform a cyclic redundancy check on the first target marker header. If the two header CRC codes are consistent, it means that the cyclic redundancy check of the first target marker header is successful; otherwise, when the two header CRC codes are inconsistent, it means that the cyclic redundancy check of the first target marker header has failed.

[0140] S140: If the cyclic redundancy check of the first target header is successful, determine the first target data from the first storage area based on the first data length.

[0141] The first target data is correct data in the first storage area.

[0142] When the cyclic redundancy check of the first target header is successful, it means that the first target header has no error during transmission or storage, and the data stored in the first storage area can be considered valid and correct. At this time, data of a corresponding length can be read from the first storage area according to the first data length as the first target data.

[0143] In some embodiments, after determining the first target data, the data fault tolerance method further includes: performing a target processing operation on the first target data. The target processing operation here is a processing operation pre-set in the business requirements and performed on the first target data, for example, it can be loading the first target data and running the corresponding application, or it can be performing certain calculation processing on the first target data. Therefore, the target processing operation can be performed on the first target data according to the business requirements.

[0144] In some embodiments, the data stored in each storage area includes data obtained by compression processing based on a preset compression method. The preset compression method here is a pre-defined data compression method. The data stored in each storage area can be data obtained by compression according to the preset compression method. In this way, the amount of data can be reduced, thereby reducing the probability of data errors in the data transmission and storage process, and the confidentiality of the data can be improved.

[0145] In some embodiments, executing a target processing operation on application data includes: decompressing the application data based on a decompression method corresponding to a preset compression method, and running the application based on a result of the decompression.

[0146] If the first target data is compressed application data, then when executing the target processing operation, it can first be decompressed using the decompression method corresponding to the preset compression method, and then the decompressed data is loaded to complete the application loading and run the application.

[0147] The data fault-tolerant method provided in the embodiment of the present application can obtain the first initial marker header in the first storage area of ​​an odd number greater than 1, and perform multi-mode redundancy processing on each first initial marker header to determine the first target marker header, thereby improving the correctness and stability of the marker header of the data; then perform a correctness check on the first header valid value and the first data valid value contained in the first target marker header to determine whether the marker header and its corresponding data are valid, and when it is determined that the first header valid value and the first data valid value are both correct, perform a cyclic redundancy check (Cyclic Redundancy Check) on the first header contained in the first target marker header. The invention adopts a CRC check (CRC) code to perform a CRC check on the first target header to further determine the correctness of the header, and when the CRC check is successful, determine the correct first target data from the first storage area based on the first data length; on the one hand, by adding a header to the data and performing various checks on it to determine the correctness of the data, rather than directly checking the data, the data processing volume is reduced, the efficiency of data correctness judgment is improved, and it is more suitable for the stability processing of related data of applications with increasing data volume under the 5G communication protocol; on the other hand, by performing multiple checks such as multi-mode redundancy processing, header valid value check, data valid value check, header CRC code check and other multiple checks on the odd-numbered header, the validity and correctness of the data can be determined more rigorously, and the stability of the data and its corresponding application operation can be improved.

[0148] In some embodiments, in order to further improve the accuracy of data correctness verification and thus further ensure data stability, after completing the header verification, the data stored in the storage area may also be verified. Thus, in S140, "determining the first target data from the first storage area based on the first data length" includes the following steps A to D:

[0149] Step A: based on the first data length, obtaining first initial data from each first storage area.

[0150] For the additional check of the data part, reference may be made to the above-mentioned check of the first initial marker header, that is, multi-mode redundancy processing and CRC check are also performed on the data.

[0151] In order to perform data verification and erroneous data repair, the data fault tolerance device can read data of corresponding data size from each first storage area according to the first data length to obtain each first initial data.

[0152] Step B: performing multi-mode redundancy processing on each first initial data to determine the first candidate data.

[0153] Perform multi-mode redundancy processing on each first initial data, that is, compare the consistency between each data. If most of the first initial data are consistent, the consistent first initial data are determined as the possibly correct first candidate data. If there are a few inconsistent first initial data, these first initial data are replaced with the first candidate data to complete the repair of the erroneous data.

[0154] Step C: performing a cyclic redundancy check on the first candidate data based on the first data cyclic redundancy check code.

[0155] The first data CRC code in the first target header is read. At the same time, a data CRC code generated by using the same hash function when generating the mirror data in the first storage area is obtained. The read first data CRC code is compared with the generated data CRC code to perform a cyclic redundancy check on the first candidate data. If the two data CRC codes are consistent, it means that the cyclic redundancy check of the first candidate data is successful; otherwise, if the two data CRC codes are inconsistent, it means that the cyclic redundancy check of the first candidate data has failed.

[0156] Step D: If the cyclic redundancy check of the first candidate data succeeds, the first candidate data is determined as the first target data.

[0157] When the cyclic redundancy check of the first candidate data is successful, it indicates that no error occurs in the first candidate data during transmission or storage, and thus, the first candidate data can be determined as the first target data.

[0158] In some embodiments, in order to ensure the correctness and stability of data upgrade, a second storage area may be further added on the basis of adding a flag header, and different versions of data may be stored in the first storage area and the second storage area respectively.

[0159] On the basis of the above, in the above embodiments, when it is determined that the first header valid value or the first data valid value is wrong, or when it is determined that the cyclic redundancy check of the first target marker header fails, or when it is determined that the cyclic redundancy check of the first candidate data fails, the second target data can be determined from a preset number of second storage areas.

[0160] If it is determined that the valid value of the first header or the valid value of the first data is wrong, it means that the data in the first target header or the first storage area is invalid. If it is determined that the cyclic redundancy check of the first target header fails, it means that an error has occurred in the first target header during data transmission or storage, and the data in the corresponding first storage area may also be erroneous. If it is determined that the cyclic redundancy check of the first candidate data fails, it means that the data in the first storage area is incorrect. In these cases, there is a high probability that the data in the first storage area is invalid or incorrect, that is, the data of the version corresponding to the first storage area is incorrect. In this way, the target processing operation cannot be performed directly on it. At this time, another version of the correct data (that is, the second target data) can be obtained from a preset number of second storage areas. The process of obtaining the second target data can refer to the above-mentioned process of obtaining the first target data.

[0161] In some embodiments, after determining the second target data, the data fault tolerance method further includes: performing a target processing operation on the second target data. Similarly, the target processing operation can be performed on the second target data according to business requirements. In this way, although different versions of data are used to perform the target processing operation, at least the normal operation of the corresponding program function can be ensured.

[0162] In some embodiments, the first storage area and the corresponding second storage area are set in the same memory, and the first storage area is used to store the data of the upgraded version, and the second storage area is used to store the data of the original version.

[0163] Among them, the upgraded version refers to a version that is closer to the current time and has improved functions. The original version refers to a version with higher stability, such as the first version or the version with the least errors during operation.

[0164] A memory is divided into at least two storage areas, corresponding to the first storage area and the second storage area. Figure 3 , a preset number of memories (three in the example) can be divided into a first storage area and a second storage area, and a corresponding initial flag header is added to each storage area. This can reduce the hardware investment cost and the degree of change to the existing system architecture to a certain extent.

[0165] At the same time, the upgraded version data is stored in the first storage area, and the original version data is stored in the second storage area, instead of the implementation method of using the upgraded version data to update / replace the original version data in the related art. In this way, the original version can be retained in different storage areas during the data version upgrade process, providing a backup version data for the stable operation of the application. In addition, in combination with the above description, the first storage area is run first, and when an error occurs, the second storage area is run. When the first storage area runs correctly, the second storage area is not started, and the upgraded version data can be used to run the application first. Combined with a preset number of original version backup data, the stability of the application can be further ensured and the risk of upgrade failure can be reduced.

[0166] In some embodiments, Figure 4 The flowchart of another data fault tolerance method provided by the embodiment of the present application is shown, which combines the first storage area and the second storage area to perform complete data fault tolerance processing to ensure the validity and correctness of the application data to a greater extent, thereby further ensuring the running stability of the application and reducing the risk of application upgrade failure. The explanation of the same or similar terms and steps as those in the above embodiments can be found in the description of the above embodiments, and will not be repeated here. Figure 4 , the data fault tolerance method includes:

[0167] S401, obtaining a preset number of first initial marker headers in the first storage area.

[0168] S402, perform multi-mode redundancy processing on each first initial marker header to determine whether each first initial marker header is consistent. If consistent, execute S403; if inconsistent, execute S404.

[0169] S403: Determine the first target marker.

[0170] S404: Determine a first target marker header, and repair the inconsistent first initial marker header.

[0171] S405: Determine whether the first header valid value and the first data valid value are correct. If yes, execute S406; if no, execute S411.

[0172] S406: Perform a cyclic redundancy check on the first target flag header based on the first header cyclic redundancy check code. If the check succeeds, execute S407; if the check fails, execute S411.

[0173] S407: Based on the first data length, obtain first initial data from each first storage area.

[0174] S408: Perform multi-mode redundancy processing on each first initial data to determine first candidate data.

[0175] S409: Perform a cyclic redundancy check on the first candidate data based on the first data cyclic redundancy check code. If the check succeeds, execute S410; if the check fails, execute S411.

[0176] S410: Determine the first candidate data as the first target data, and perform a target processing operation on the first target data.

[0177] S411, obtaining the second initial header in each second storage area.

[0178] Likewise, see Figure 3 , a header (ie, a second initial header) representing metadata information of the data in the second storage area is also newly added in the second storage area. Then, the second initial header can be read from each second storage area.

[0179] like Figure 2b As shown, a header is set before the first storage area and the second storage area in the same memory, and the data structure of the first initial header and the second initial header is the same.

[0180] S412: Perform multi-mode redundancy processing on each second initial marker header to determine a second target marker header.

[0181] The second target header is a correct header determined from each second initial header. The second target header at least includes a header valid value (i.e., a second header valid value), a data valid value (i.e., a second data valid value), a header CRC code (i.e., a second header cyclic redundancy check code) and a data length (i.e., a second data length). These data are also preset.

[0182] Similarly, in the process of performing multi-mode redundancy processing on each second initial marker header, repair processing of inconsistent second initial marker headers may also be performed.

[0183] S413: Determine whether the second header valid value and the second data valid value are correct. If yes, execute S414; if no, execute S419.

[0184] For this step, please refer to the relevant description in S130.

[0185] S414: Perform a cyclic redundancy check on the second target marker header based on the second header cyclic redundancy check code.

[0186] For this step, please refer to the relevant description in S130. If the verification is successful, then S415 is executed; if the verification fails, then S419 is executed.

[0187] S415: Based on the second data length, obtain second initial data from each second storage area. This step can refer to the relevant description in step A. The second initial data is data read from the second storage area, which corresponds to the first initial data in step A.

[0188] S416, perform multi-mode redundancy processing on each second initial data to determine second candidate data. This step can refer to the relevant description in step B. The second candidate data is the possibly correct data determined from each second initial data, which corresponds to the first candidate data in step B.

[0189] S417: Perform a cyclic redundancy check on the second candidate data based on the second data cyclic redundancy check code.

[0190] For this step, please refer to the relevant description in step C. If the verification succeeds, execute S418; if the verification fails, execute S419.

[0191] S418: Determine the second candidate data as the second target data, perform a target processing operation on the second target data, and resend the data upgrade request to regain the upgraded version of the data.

[0192] The second target data is the data in the original version, based on which the application can be run to execute the corresponding functions of the original version. In order to run the corresponding functions of the upgraded version faster, after the program runs stably, a data upgrade request can be resent to the operation and maintenance end to request to re-acquire the data of the upgraded version. The operation and maintenance end here can be the device end that maintains / develops the data of the upgraded version.

[0193] S419, waiting for the upgraded version of data to perform data upgrade processing.

[0194] Wait for the operation and maintenance end to feedback the upgraded version of data in response to the data upgrade request, and store it in the first storage area in each memory to overwrite the original data in the first storage area.

[0195] When the data fault-tolerant methods provided in the above-mentioned embodiments are applied to the application upgrade process in the aerospace environment, the upgraded version data can be stored in the first storage area, the original version data can be stored in the second storage area, and the data in the first storage area can be run preferentially, so as to provide a backup version of data for the aerospace program upgrade, thereby greatly reducing the risk of program upgrade failure; the reliability and correctness of the application data can be increased by performing multiple checks such as multi-mode redundancy processing on the first storage area and the second storage area, header validity check, data validity check, header CRC check, and data CRC check; and the data decompression process can further reduce the impact of data jumps, ensure the reliability of the application data, thereby reducing the impact of space radiation on the application in the spacecraft, and ensuring the running stability of the aerospace program.

[0196] In order to implement the above data fault tolerance method, the embodiment of the present application also provides a data fault tolerance device, such as Figure 5 The structural diagram of a data fault-tolerant device shown includes a memory 500, a transceiver 510, and a processor 520. Among them:

[0197] The memory 500 is used to store computer programs; the transceiver 510 is used to send and receive data under the control of the processor; the processor 520 is used to read the computer program in the memory and perform the following operations:

[0198] Obtaining a preset number of first initial marker headers in the first storage area; wherein the preset number is an odd number greater than 1;

[0199] Performing multi-mode redundancy processing on each first initial marker header to determine a first target marker header; wherein the first target marker header at least includes a first header valid value, a first data valid value, a first header cyclic redundancy check code and a first data length;

[0200] If it is determined that the first header valid value and the first data valid value are both correct, a cyclic redundancy check is performed on the first target flag header based on the first header cyclic redundancy check code;

[0201] If the cyclic redundancy check of the first target header succeeds, first target data is determined from the first storage area based on the first data length, and a target processing operation is performed on the first target data.

[0202] Among them, Figure 5In the embodiment, the bus architecture may include any number of interconnected buses and bridges, specifically one or more processors 520 represented by processor 520 and various circuits of memory 500 represented by memory 500 are linked together. The bus architecture may also link together various other circuits such as peripherals, voltage regulators, and power management circuits, which are well known in the art and are therefore not further described herein. The bus interface provides an interface. The transceiver 510 may be a plurality of components, namely, a transmitter and a receiver, providing a unit for communicating with various other devices on a transmission medium, which transmission medium may include a wireless channel, a wired channel, an optical cable, and other transmission media. The processor 520 is responsible for managing the bus architecture and general processing, and the memory 500 may store data used by the processor 520 when performing operations.

[0203] The processor 520 may be a central processing unit (CPU), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or a complex programmable logic device (CPLD). The processor 520 may also adopt a multi-core architecture.

[0204] In some embodiments, the first target marker header further includes a first data cyclic redundancy check code;

[0205] Determining first target data from a first storage area based on the first data length includes:

[0206] Based on the first data length, obtaining first initial data from each first storage area;

[0207] Performing multi-mode redundancy processing on each first initial data to determine first candidate data;

[0208] Based on the first data cyclic redundancy check code, performing a cyclic redundancy check on the first candidate data;

[0209] If the cyclic redundancy check of the first candidate data succeeds, the first candidate data is determined as the first target data.

[0210] In some embodiments, the processor further performs the following operations:

[0211] If it is determined that the first header valid value or the first data valid value is wrong, or if the cyclic redundancy check of the first target flag header fails, the second target data is determined from a preset number of second storage areas; wherein different versions of data are stored in the first storage area and the second storage area respectively.

[0212] In some embodiments, the processor further performs the following operations:

[0213] If the cyclic redundancy check of the first candidate data fails, the second target data is determined from a preset number of second storage areas; wherein different versions of data are stored in the first storage area and the second storage area respectively.

[0214] In some embodiments, the first storage area and the corresponding second storage area are set in the same memory, and the first storage area is used to store the data of the upgraded version, and the second storage area is used to store the data of the original version.

[0215] In some embodiments, determining the second target data from a preset number of second storage areas includes:

[0216] Obtaining the second initial marker header in each second storage area;

[0217] Performing multi-mode redundancy processing on each second initial marker header to determine a second target marker header; wherein the second target marker header at least includes a second header valid value, a second data valid value, a second header cyclic redundancy check code, and a second data length;

[0218] If it is determined that the second header valid value and the second data valid value are both correct, a cyclic redundancy check is performed on the second target flag header based on the second header cyclic redundancy check code;

[0219] If the cyclic redundancy check of the second target header succeeds, the second target data is determined from the second storage area based on the second data length.

[0220] In some embodiments, the second target marker header further includes a second data cyclic redundancy check code;

[0221] Accordingly, based on the second data length, determining the second target data from the second storage area includes:

[0222] Based on the second data length, obtaining second initial data from each second storage area;

[0223] Performing multi-mode redundancy processing on each second initial data to determine second candidate data;

[0224] Based on the second data cyclic redundancy check code, performing a cyclic redundancy check on the second candidate data;

[0225] If the cyclic redundancy check of the second candidate data succeeds, the second candidate data is determined as the second target data.

[0226] In some embodiments, the data stored in each storage area includes data obtained by compression processing based on a preset compression method.

[0227] In some embodiments, the processor further performs the following operations:

[0228] A target processing operation is performed on the first target data or the second target data.

[0229] Furthermore, for the application data, performing the target processing operation includes:

[0230] The application data is decompressed based on a decompression method corresponding to a preset compression method, and the application is run based on the decompression result.

[0231] In some embodiments, the first target header also includes at least one of a board type, a data creation time, an operating system type, a CPU architecture type, a preset data compression method, a mirror data type, and a mirror data identifier.

[0232] It should be noted here that the above-mentioned device provided in the embodiment of the present invention can implement all the method steps implemented in the above-mentioned method embodiment, and can achieve the same technical effect. The parts and beneficial effects that are the same as the method embodiment in this embodiment will not be described in detail here.

[0233] In order to implement the above data fault tolerance method, the present application embodiment also provides a data fault tolerance device, see Figure 6 The structural diagram of a data fault tolerance device 600 shown in FIG. 6 includes:

[0234] A first initial marker header acquisition unit 610 is used to acquire a preset number of first initial marker headers in the first storage area; wherein the preset number is an odd number greater than 1;

[0235] The first target header determination unit 620 is used to perform multi-mode redundancy processing on each first initial header to determine a first target header; wherein the first target header at least includes a first header valid value, a first data valid value, a first header cyclic redundancy check code and a first data length;

[0236] A first header cyclic redundancy check unit 630 is configured to perform a cyclic redundancy check on the first target header based on the first header cyclic redundancy check code if it is determined that the first header valid value and the first data valid value are both correct;

[0237] The first target data determining unit 640 is configured to determine the first target data from the first storage area based on the first data length if the cyclic redundancy check of the first target header succeeds.

[0238] In some embodiments, the first target marker header further includes a first data cyclic redundancy check code;

[0239] Accordingly, the first target data determining unit 640 is specifically configured to:

[0240] Based on the first data length, obtaining first initial data from each first storage area;

[0241] Performing multi-mode redundancy processing on each first initial data to determine first candidate data;

[0242] Based on the first data cyclic redundancy check code, performing a cyclic redundancy check on the first candidate data;

[0243] If the cyclic redundancy check of the first candidate data succeeds, the first candidate data is determined as the first target data.

[0244] In some embodiments, the data fault tolerance device 600 further includes a second target data determination unit, configured to:

[0245] If it is determined that the first header valid value or the first data valid value is wrong, or if the cyclic redundancy check of the first target flag header fails, the second target data is determined from a preset number of second storage areas; wherein different versions of data are stored in the first storage area and the second storage area respectively.

[0246] In some embodiments, the second target data determination unit is further configured to:

[0247] If the cyclic redundancy check of the first candidate data fails, the second target data is determined from a preset number of second storage areas; wherein different versions of data are stored in the first storage area and the second storage area respectively.

[0248] In some embodiments, the first storage area and the corresponding second storage area are set in the same memory, and the first storage area is used to store the data of the upgraded version, and the second storage area is used to store the data of the original version.

[0249] In some embodiments, the second target data determining unit includes:

[0250] A second initial marker header acquisition subunit, used for acquiring the second initial marker header in each second storage area;

[0251] A second target header determination subunit is used to perform multi-mode redundancy processing on each second initial header to determine a second target header; wherein the second target header at least includes a second header valid value, a second data valid value, a second header cyclic redundancy check code and a second data length;

[0252] A second flag header cyclic redundancy check subunit is used to perform a cyclic redundancy check on the second target flag header based on the second header cyclic redundancy check code if it is determined that the second header valid value and the second data valid value are both correct;

[0253] The second target data determination subunit is used to determine the second target data from the second storage area based on the second data length if the cyclic redundancy check of the second target header succeeds.

[0254] Furthermore, the second target marker header also includes a second data cyclic redundancy check code;

[0255] Accordingly, the second target data determination subunit is specifically used for:

[0256] Based on the second data length, obtaining second initial data from each second storage area;

[0257] Performing multi-mode redundancy processing on each second initial data to determine second candidate data;

[0258] Based on the second data cyclic redundancy check code, performing a cyclic redundancy check on the second candidate data;

[0259] If the cyclic redundancy check of the second candidate data succeeds, the second candidate data is determined as the second target data.

[0260] In some embodiments, the data stored in each storage area includes data obtained by compression processing based on a preset compression method.

[0261] In some embodiments, the data fault tolerance device further includes a data processing unit, which is used to:

[0262] A target processing operation is performed on the first target data or the second target data.

[0263] Furthermore, the data processing unit is specifically used to perform the following target processing operations on the application data:

[0264] The application data is decompressed based on a decompression method corresponding to a preset compression method, and the application is run based on the decompression result.

[0265] In some embodiments, the first target header also includes at least one of a board type, a data creation time, an operating system type, a CPU architecture type, a preset data compression method, a mirror data type, and a mirror data identifier.

[0266] It should be noted that the division of units / subunits in the embodiments of the present application is schematic and is only a logical function division. There may be other division methods in actual implementation. In addition, each functional unit / subunit in each embodiment of the present application may be integrated into a processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of a software functional unit.

[0267] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a processor-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) or a processor (processor) to perform all or part of the steps of the method described in each embodiment of the present application.

[0268] It should be noted here that the above-mentioned device provided in the embodiment of the present invention can implement all the method steps implemented in the above-mentioned method embodiment, and can achieve the same technical effect. The parts and beneficial effects that are the same as the method embodiment in this embodiment will not be described in detail here.

[0269] The embodiment of the present application also provides a processor-readable storage medium, the processor-readable storage medium stores a program, and the program is used to enable the processor to execute the aforementioned data fault tolerance method. The processor-readable storage medium can be any available medium or data storage device that the processor can access, including but not limited to magnetic storage (such as floppy disk, hard disk, magnetic tape, magneto-optical disk (MO), etc.), optical storage (such as CD, DVD, BD, HVD, etc.), and semiconductor storage (such as ROM, EPROM, EEPROM, non-volatile memory (NAND FLASH), solid-state drive (SSD)), etc.

[0270] The embodiment of the present application also provides a computer program product, which includes a computer program carried on a non-transitory computer readable medium, and the computer program includes a program code for executing the data fault tolerance method provided by any embodiment of the present application. In such an embodiment, the computer program can be downloaded and installed from a network through a communication device, or installed from a storage device, or installed from a ROM.

[0271] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application may adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage and optical storage, etc.) that contain computer-usable program code.

[0272] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer executable instructions. These computer executable instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0273] These computer executable instructions may also be stored in a processor readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the processor readable memory produce an article of manufacture including an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0274] Obviously, those skilled in the art can make various changes and modifications to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is also intended to include these modifications and variations.

Claims

1. A data fault tolerance method, It is characterized in that include: Obtaining a preset number of first initial marker headers in the first storage area; wherein the preset number is an odd number greater than 1; Performing multi-mode redundancy processing on each of the first initial marker headers to determine a first target marker header; wherein the first target marker header at least includes a first header valid value, a first data valid value, a first header cyclic redundancy check code and a first data length; If it is determined that both the first header valid value and the first data valid value are correct, performing a cyclic redundancy check on the first target flag header based on the first header cyclic redundancy check code; If the cyclic redundancy check of the first target header succeeds, first target data is determined from the first storage area based on the first data length.

2. The method according to claim 1, It is characterized in that The first target marker header also includes a first data cyclic redundancy check code; The determining, based on the first data length, first target data from the first storage area comprises: Based on the first data length, obtaining first initial data from each of the first storage areas; Performing multi-mode redundancy processing on each of the first initial data to determine first candidate data; Based on the first data cyclic redundancy check code, performing a cyclic redundancy check on the first candidate data; If the cyclic redundancy check of the first candidate data succeeds, the first candidate data is determined as the first target data.

3. The method according to claim 1, It is characterized in that The method further comprises: If it is determined that the first header valid value or the first data valid value is wrong, or if the cyclic redundancy check of the first target flag header fails, the second target data is determined from the preset number of second storage areas; wherein different versions of data are stored in the first storage area and the second storage area respectively.

4. The method according to claim 2, It is characterized in that The method further comprises: If the cyclic redundancy check of the first candidate data fails, second target data is determined from the preset number of second storage areas; wherein the first storage area and the second storage area respectively store different versions of data.

5. The method according to claim 3 or 4, It is characterized in that The first storage area and the corresponding second storage area are set in the same memory, and the first storage area is used to store the data of the upgraded version, and the second storage area is used to store the data of the original version.

6. The method according to claim 3 or 4, It is characterized in that The determining the second target data from the preset number of second storage areas comprises: Acquire the second initial header in each of the second storage areas; Performing multi-mode redundancy processing on each of the second initial marker headers to determine a second target marker header; wherein the second target marker header at least includes a second header valid value, a second data valid value, a second header cyclic redundancy check code, and a second data length; If it is determined that both the second header valid value and the second data valid value are correct, performing a cyclic redundancy check on the second target flag header based on the second header cyclic redundancy check code; If the cyclic redundancy check of the second target header succeeds, the second target data is determined from the second storage area based on the second data length.

7. The method according to claim 6, It is characterized in that The second target marker header also includes a second data cyclic redundancy check code; The determining the second target data from the second storage area based on the second data length includes: Based on the second data length, obtaining second initial data from each of the second storage areas; Performing multi-mode redundancy processing on each of the second initial data to determine second candidate data; Based on the second data cyclic redundancy check code, performing a cyclic redundancy check on the second candidate data; If the cyclic redundancy check of the second candidate data is successful, the second candidate data is determined as the second target data.

8. The method according to any one of claims 1 to 4, It is characterized in that The data stored in each storage area includes data obtained by compression processing based on a preset compression method.

9. The method according to any one of claims 1 to 4, It is characterized in that The method further comprises: A target processing operation is performed on the first target data or the second target data.

10. The method according to claim 9, It is characterized in that Executing the target processing operation on the application data includes: The application data is decompressed based on a decompression method corresponding to a preset compression method, and the application is run based on the decompression result.

11. The method according to any one of claims 1 to 4, It is characterized in that The first target header also includes at least one of a board type, a data creation time, an operating system type, a CPU architecture type, a preset data compression method, a mirror data type, and a mirror data identifier.

12. A data fault-tolerant device, It is characterized in that Including memory, transceiver, processor: A memory for storing a computer program; a transceiver for transmitting and receiving data under the control of the processor; and a processor for reading the computer program in the memory and performing the following operations: Obtaining a preset number of first initial marker headers in the first storage area; wherein the preset number is an odd number greater than 1; Performing multi-mode redundancy processing on each of the first initial marker headers to determine a first target marker header; wherein the first target marker header at least includes a first header valid value, a first data valid value, a first header cyclic redundancy check code and a first data length; If it is determined that both the first header valid value and the first data valid value are correct, performing a cyclic redundancy check on the first target flag header based on the first header cyclic redundancy check code; If the cyclic redundancy check of the first target header succeeds, first target data is determined from the first storage area based on the first data length.

13. The device according to claim 12, It is characterized in that The first target marker header also includes a first data cyclic redundancy check code; The determining, based on the first data length, first target data from the first storage area comprises: Based on the first data length, obtaining first initial data from each of the first storage areas; Performing multi-mode redundancy processing on each of the first initial data to determine first candidate data; Based on the first data cyclic redundancy check code, performing a cyclic redundancy check on the first candidate data; If the cyclic redundancy check of the first candidate data succeeds, the first candidate data is determined as the first target data.

14. The device according to claim 12, It is characterized in that The processor also performs the following operations: If it is determined that the first header valid value or the first data valid value is wrong, or if the cyclic redundancy check of the first target flag header fails, the second target data is determined from the preset number of second storage areas; wherein different versions of data are stored in the first storage area and the second storage area respectively.

15. The device according to claim 13, It is characterized in that The processor also performs the following operations: If the cyclic redundancy check of the first candidate data fails, second target data is determined from the preset number of second storage areas; wherein the first storage area and the second storage area respectively store different versions of data.

16. The device according to claim 14 or 15, It is characterized in that The first storage area and the corresponding second storage area are set in the same memory, and the first storage area is used to store the data of the upgraded version, and the second storage area is used to store the data of the original version.

17. The device according to claim 14 or 15, It is characterized in that The determining the second target data from the preset number of second storage areas comprises: Acquire the second initial header in each of the second storage areas; Performing multi-mode redundancy processing on each of the second initial marker headers to determine a second target marker header; wherein the second target marker header at least includes a second header valid value, a second data valid value, a second header cyclic redundancy check code, and a second data length; If it is determined that both the second header valid value and the second data valid value are correct, performing a cyclic redundancy check on the second target flag header based on the second header cyclic redundancy check code; If the cyclic redundancy check of the second target header succeeds, the second target data is determined from the second storage area based on the second data length.

18. The device according to claim 17, It is characterized in that The second target marker header also includes a second data cyclic redundancy check code; The determining the second target data from the second storage area based on the second data length includes: Based on the second data length, obtaining second initial data from each of the second storage areas; Performing multi-mode redundancy processing on each of the second initial data to determine second candidate data; Based on the second data cyclic redundancy check code, performing a cyclic redundancy check on the second candidate data; If the cyclic redundancy check of the second candidate data is successful, the second candidate data is determined as the second target data.

19. The device according to any one of claims 12 to 15, It is characterized in that The data stored in each storage area includes data obtained by compression processing based on a preset compression method.

20. The device according to any one of claims 12 to 15, It is characterized in that The processor also performs the following operations: A target processing operation is performed on the first target data or the second target data.

21. The device according to claim 20, It is characterized in that Executing the target processing operation on the application data includes: The application data is decompressed based on a decompression method corresponding to a preset compression method, and the application is run based on the decompression result.

22. The apparatus according to claim 12, It is characterized in that The first target header also includes at least one of a board type, a data creation time, an operating system type, a CPU architecture type, a preset data compression method, a mirror data type, and a mirror data identifier.

23. A data fault-tolerant device, It is characterized in that include: A first initial marker header acquisition unit, used to acquire a preset number of first initial marker headers in the first storage area; wherein the preset number is an odd number greater than 1; A first target header determination unit, configured to perform multi-mode redundancy processing on each of the first initial headers to determine a first target header; wherein the first target header at least includes a first header valid value, a first data valid value, a first header cyclic redundancy check code, and a first data length; A first flag header cyclic redundancy check unit, configured to perform a cyclic redundancy check on the first target flag header based on the first header cyclic redundancy check code if it is determined that the first header valid value and the first data valid value are both correct; The first target data determining unit is configured to determine the first target data from the first storage area based on the first data length if the cyclic redundancy check of the first target header succeeds.

24. A processor-readable storage medium, It is characterized in that The processor-readable storage medium stores a program, and the program is used to enable the processor to execute the method according to any one of claims 1 to 11.

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