Memory error detection method, processor, storage medium and electronic equipment

Abstract

The invention discloses a memory error detection method, a processor, a storage medium and an electronic device.The memory error detection method is used for a bootstrap loader stage and comprises the steps that in the bootstrap loader stage, a memory error detection tool under a bootstrap loader is started; in response to the memory access check instruction, shadow memories corresponding to the accessed actual available memories are obtained, and the shadow memories are used for marking access states of the actual available memories when the boot loader runs; obtaining a shadow memory mark state in a shadow memory corresponding to the accessed actual available memory; and determining the legitimacy of the memory access corresponding to the accessed actual available memory according to the shadow memory mark state. By means of the memory error detection method, real-time monitoring and checking of memory access in the boot loader stage are achieved, the problem that fast positioning and repairing are difficult when memory trampling occurs is solved, and therefore the stability and safety of a system are improved.

Claims

1. A memory error detection method, It is characterized in that For the bootloader stage, including: At the bootloader stage, start the memory error detection tool under the bootloader; In response to the memory access check instruction, obtaining a shadow memory corresponding to the accessed actual available memory, wherein the shadow memory is used to mark the access status of each actual available memory when the boot loader is running; Obtaining a shadow memory mark state in the shadow memory corresponding to the accessed actual available memory; The legality of the memory access corresponding to the accessed actual available memory is determined according to the shadow memory mark state.

2. The memory error detection method according to claim 1, It is characterized in that The accessed actual available memory includes the accessed actual available memory address; A corresponding shadow memory address is obtained according to the accessed actual available memory address, and the shadow memory corresponding to the shadow memory address is configured with the shadow memory mark state.

3. The memory error detection method according to claim 2, It is characterized in that The accessed actual available memory address and the shadow memory address satisfy the following relationship: The shadow memory address=(the accessed actual available memory address / 8)+shadow memory offset; The shadow memory offset is calculated by the script according to the system available memory parameters obtained during compilation.

4. The memory error detection method according to claim 3, It is characterized in that The shadow memory is located at the end of the actual available memory in the running stage after the boot loader is relocated.

5. The memory error detection method according to claim 4, It is characterized in that The memory layout of the boot loader in the running stage after relocation is that a plurality of memory segments are sequentially distributed from the beginning of the memory space to the end of the memory space, and the shadow memory is located at the end of the plurality of memory segments.

6. The memory error detection method according to claim 5, It is characterized in that The multiple memory segments distributed in sequence starting from the memory space include an MMU table memory segment, a code memory segment, a malloc buffer memory segment, a board information memory segment, a global data memory segment and a stack memory segment, and the shadow memory is located at the tail of the stack memory segment.

7. The memory error detection method according to claim 3, It is characterized in that The shadow memory size is 32MB, and the shadow memory offset satisfies the following formula: The shadow memory offset=((system available memory size×7)>>3-256)<20.

8. The memory error detection method according to claim 5, It is characterized in that A first red zone is set between at least two memory segments among the multiple memory segments, and the first red zone is used for cross-memory segment cross-boundary checking.

9. The memory error detection method according to claim 8, It is characterized in that A second red zone is provided between the shadow memory and the actually available memory being accessed, and the marking states corresponding to the first red zone and the second red zone in the shadow memory are both illegal memory accesses.

10. The memory error detection method according to claim 1, It is characterized in that The memory error detection tool is configured with a basic check hook function; The basic check hook function includes at least one of the following: Calculation function for address conversion between shadow memory and actual available memory; A function for filling different status tags into the shadow memory; Functions used to obtain memory error types and collate printed error reports based on the shadow memory tag state.

11. The memory error detection method according to claim 1, It is characterized in that The accessed actual available memory includes a stack memory segment; Determining the legitimacy of the memory access corresponding to the accessed actual available memory according to the shadow memory mark state includes: Start checking the stack memory segment; The shadow memory mark state corresponding to the stack memory segment includes at least one of the following: Mark the stack memory as legal to access; Mark the stack memory as illegal to access; Mark dynamically allocated stack memory as illegal to access; Mark dynamically allocated stack memory as legal for access.

12. The memory error detection method according to claim 11, It is characterized in that The starting of checking the stack memory segment includes: Enabling a first compilation option, wherein the first compilation option is used for out-of-bounds check of access to a stack memory segment; Enable the second compilation option, which is used to check that variables are still accessed outside of their scope; A third compile option is enabled, which is used for access checking of dynamic arrays in the stack.

13. The memory error detection method according to claim 1, It is characterized in that The accessed actual available memory includes global variable memory; The shadow memory corresponding to the global variable memory is created according to the global variable information through the initialization code.

14. The memory error detection method according to claim 1, It is characterized in that The accessed actual available memory includes dynamically allocated memory; The dynamically allocated memory includes a user pointer area, and red areas are set before and after the user pointer area; The shadow memory marking state corresponding to the dynamically allocated memory includes: Access to the dynamically allocated memory outside the red zone of the dynamically allocated memory is an illegal access; Access to the dynamically allocated memory within the red zone of the dynamically allocated memory is a legal access.

15. The memory error detection method according to any one of claims 1 to 14, It is characterized in that The one-byte shadow memory is used to mark the access status of eight bytes of actual available memory; The shadow memory mark state is represented as: Use 0 to indicate that eight consecutive bytes of memory starting from the current actual available memory address are legally accessible memory; N=1-7 indicates that N consecutive bytes of memory starting from the current actual available memory address are legally accessible memory, and the remaining bytes are illegal to access memory; Using a negative number indicates that the entire eight bytes of memory are illegal to access.

16. A processor, It is characterized in that The processor is configured with a boot loader and a memory error detection tool under the boot loader, and the memory error detection tool implements the memory error detection method according to any one of claims 1 to 15 through a compiler at the boot loader stage.

17. A non-volatile readable storage medium having a computer program stored thereon, It is characterized in that When the computer program is executed, the memory error detection method according to any one of claims 1 to 15 is implemented.

18. An electronic device, It is characterized in that Comprising the processor of claim 16.

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