Memory border crossing detection method and device, electronic equipment and storage medium

Abstract

The invention provides a memory border crossing detection method and device, electronic equipment and a storage medium, and relates to the technical field of computers. The method comprises the following steps: when a running memory is allocated to a target program, configuring a shadow memory corresponding to the running memory; determining all virtual memory pages mapped by the virtual address range of the running memory and an in-page access range of each virtual memory page; based on the in-page access range, respectively writing in-page access range data corresponding to each virtual memory page in the shadow memory; and before the memory access instruction in the target program is executed, performing border crossing judgment on an access address in the memory access instruction according to the in-page access range data. According to the scheme, the shadow memory can be configured for the program, the in-page access range data is written into the shadow memory, and border crossing judgment is performed based on the in-page access range data before the memory access instruction is executed, so that the detection precision of memory border crossing detection is improved.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of computer, and in particular, to a memory out-of-bound detection method and device, electronic equipment and storage medium. BACKGROUND

[0002] Memory out-of-bound can represent that a target program accesses an address region outside the allocated memory space during running. For memory out-of-bound detection of a graphics processing unit (GPU) program, related technologies usually use a memory management unit (MMU) to achieve the detection. The MMU determines whether the access address of the program is within the valid page table mapping range. If the access address is not mapped to a virtual page, it is determined as out-of-bound access.

[0003] However, the above memory out-of-bound detection method based on the MMU can only identify the out-of-bound behavior of the un-mapped virtual page, and cannot effectively detect the out-of-bound access in the mapped virtual page. Specifically, since the memory management is mapped in units of pages, if the memory applied by the target program does not occupy the entire virtual page, when the access address falls within the un-applied part of the mapped virtual page, the MMU cannot identify it as out-of-bound access. Therefore, there is still room for improvement in the detection accuracy of related memory out-of-bound detection technologies. SUMMARY

[0004] Embodiments of the present disclosure aim to provide a memory out-of-bound detection method, a memory out-of-bound detection device, electronic equipment and a computer readable storage medium, which can configure a shadow memory for a program, write in-page access range data in the shadow memory, and perform out-of-bound determination based on the in-page access range data before executing a memory access instruction, thereby improving the detection accuracy of memory out-of-bound detection.

[0005] Other characteristics and advantages of the present disclosure will become apparent from the following detailed description, or will be learned by practice of the present disclosure.

[0006] According to a first aspect of embodiments of the present disclosure, a memory out-of-bound detection method is provided, comprising:

[0007] In the process of allocating a running memory for a target program, a shadow memory corresponding to the running memory is configured; all virtual memory pages mapped by a virtual address range of the running memory and an intra-page access range of each of the virtual memory pages are determined; based on the intra-page access range, intra-page access range data corresponding to each of the virtual memory pages is written into the shadow memory respectively, the intra-page access range data being used to indicate an address range accessible by the target program in each of the virtual memory pages; before executing a memory access instruction in the target program, a boundary crossing judgment is performed on an access address in the memory access instruction according to the intra-page access range data.

[0008] In some example embodiments of the present disclosure, based on the foregoing scheme, the running memory includes a plurality of memory blocks, and the shadow memory includes a plurality of shadow memory blocks; the configuration of the shadow memory corresponding to the running memory includes: the configuration of a corresponding shadow memory block for each of the running memory blocks respectively.

[0009] In some example embodiments of the present disclosure, based on the foregoing scheme, the boundary crossing judgment on the access address in the memory access instruction according to the intra-page access range data includes: the extraction of the access address from the memory access instruction, and the determination of a target running memory block in the plurality of running memory blocks pointed to by a pointer in the memory access instruction; the determination of a target shadow memory block corresponding to the target running memory block; and the boundary crossing judgment on the access address according to the intra-page access range data in the target shadow memory block.

[0010] In some example embodiments of the present disclosure, based on the foregoing scheme, the writing of the intra-page access range data corresponding to each of the virtual memory pages into the shadow memory respectively includes: the determination of a page length value of the virtual memory page and a page start address corresponding to each of the virtual memory pages; the determination of a corresponding mapping segment of each of the virtual memory pages in the shadow memory according to the page length value and the page start address; and the writing of the intra-page access range data of the virtual memory page corresponding to each of the mapping segments into each of the mapping segments.

[0011] In some example embodiments of the present disclosure, based on the foregoing scheme, the determination of the mapping segment of each of the virtual memory pages in the shadow memory according to the page length value and the page start address includes: the determination of a byte number of the mapping segment according to the page length value; the determination of a virtual page number of the corresponding virtual memory page according to the page length value and the page start address; the determination of a write start address of each of the mapping segments in the shadow memory based on the product of the virtual page number and the byte number; and the determination of the mapping segment of each of the virtual memory pages in the shadow memory according to the write start address and the byte number.

[0012] In some example embodiments of the present disclosure, based on the foregoing scheme, the determination of the write start address of each of the mapping segments in the shadow memory based on the product of the virtual page number and the byte number comprises: obtaining an offset address of each of the mapping segments based on the product of the virtual page number and the byte number; and adding the storage start address of the shadow memory to the offset address to obtain the write start address of each of the mapping segments in the shadow memory.

[0013] In some example embodiments of the present disclosure, based on the foregoing scheme, the writing of the in-page access range data of the corresponding virtual memory page in each of the mapping segments comprises: determining whether the virtual memory page is valid in its entirety; in response to yes, writing a full-page valid flag value in a preset flag bit field in the mapping segment corresponding to the virtual memory page; in response to no, writing a partial valid flag value in the preset flag bit field in the mapping segment corresponding to the virtual memory page, and writing an access boundary value corresponding to the virtual memory page in a field other than the preset flag bit field in the mapping segment.

[0014] In some example embodiments of the present disclosure, based on the foregoing scheme, the memory out-of-bound detection method further comprises: writing a preset out-of-bound flag value in a region other than the mapping segments in the shadow memory.

[0015] In some example embodiments of the present disclosure, based on the foregoing scheme, the out-of-bound determination of the access address in the memory access instruction according to the in-page access range data comprises: determining a target running memory corresponding to the target program, and a target shadow memory corresponding to the target running memory; determining a shadow address corresponding to the access address, and determining whether the shadow address falls within the address range of any of the mapping segments in the target shadow memory, the shadow address representing a corresponding address in the shadow memory converted from the access address; in response to no, determining that the access address is out-of-bound; and in response to yes, performing out-of-bound determination of the access address based on the in-page access range data recorded in the mapping segment corresponding to the shadow address.

[0016] In some example embodiments of the present disclosure, based on the foregoing scheme, the out-of-bound determination of the access address based on the in-page access range data recorded in the mapping segment corresponding to the shadow address comprises: determining whether the preset flag bit field in the mapping segment is a full-page valid flag value; in response to yes, determining that the access address is not out-of-bound; and in response to no, performing out-of-bound determination of the access address based on the access boundary value in the mapping segment.

[0017] In some example embodiments of the present disclosure, based on the foregoing scheme, the aforementioned out-of-bound determination of the access address based on the access boundary value in the mapping segment comprises: determining a page-in-offset value of the access address in the corresponding virtual memory page; in response to the page-in-offset value being greater than the access boundary value, determining that the access address is out-of-bound; and in response to the page-in-offset value being less than or equal to the access boundary value, determining that the access address is not out-of-bound.

[0018] In some example embodiments of the present disclosure, based on the foregoing scheme, the aforementioned memory out-of-bound detection method further comprises: configuring an out-of-bound record memory corresponding to the running memory; and in response to detecting that an access address is out-of-bound, writing an out-of-bound memory access instruction corresponding to the access address into the out-of-bound record memory for invocation.

[0019] According to a second aspect of the embodiments of the present disclosure, a memory out-of-bound detection apparatus is provided, comprising:

[0020] a shadow memory configuration module configured to, when allocating a running memory for a target program, configure a shadow memory corresponding to the running memory;

[0021] an access range determination module configured to determine all virtual memory pages mapped by a virtual address range of the running memory and a page-in access range of each of the virtual memory pages;

[0022] an access range writing module configured to, based on the page-in access range, write page-in access range data corresponding to each of the virtual memory pages into the shadow memory respectively, the page-in access range data being used to indicate an address range accessible by the target program in each of the virtual memory pages;

[0023] an access out-of-bound determination module configured to, before executing a memory access instruction in the target program, determine whether an access address in the memory access instruction is out-of-bound according to the page-in access range data.

[0024] According to a third aspect of the embodiments of the present disclosure, an electronic device is provided, comprising: a processor; and a memory having computer readable instructions stored thereon, the computer readable instructions being executed by the processor to implement the memory out-of-bound detection method in the first aspect.

[0025] According to a fourth aspect of the embodiments of the present disclosure, a computer readable storage medium is provided, having a computer program stored thereon, the computer program being executed by a processor to implement the memory out-of-bound detection method in the first aspect.

[0026] The technical solutions provided by the embodiments of the present disclosure can have the following beneficial effects:

[0027] The memory out-of-bound detection method in the example embodiments of the present disclosure, on one hand, configures a shadow memory when allocating a running memory for a target program, and writes the in-page access range data of each virtual memory page in the shadow memory, which can realize the independent storage of the in-page access range of each virtual memory page, and provide data support for the in-page out-of-bound detection, thereby avoiding the problem of being unable to identify the in-page out-of-bound access, and improving the precision of the memory out-of-bound detection. On the other hand, the out-of-bound judgment operation of the access address is completed before the execution of the memory access instruction, so that the out-of-bound access can be intercepted before it occurs, thereby improving the system stability. On the other hand, compared with the out-of-bound detection mode relying on hardware, the present method can be adapted to multiple types of processing platforms and program running environments, and has wider application adaptability and deployment flexibility.

[0028] It should be understood that the foregoing general description and the following detailed description are only exemplary and explanatory, and cannot limit the present disclosure. BRIEF DESCRIPTION OF DRAWINGS

[0029] The accompanying drawings, which are incorporated into and form part of the specification, illustrate embodiments consistent with the present disclosure and, together with the description, serve to explain the principles of the present disclosure. Obviously, the drawings in the following description are only some embodiments of the present disclosure, and other drawings can be obtained by those skilled in the art without creative labor on the basis of these drawings.

[0030] Figure 1 The flowchart of the memory out-of-bound detection method according to some embodiments of the present disclosure is schematically shown.

[0031] Figure 2 The flowchart of writing in-page access range data in the shadow memory according to some embodiments of the present disclosure is schematically shown.

[0032] Figure 3 The flowchart of determining the corresponding mapping segment of the virtual memory page in the shadow memory according to some embodiments of the present disclosure is schematically shown.

[0033] Figure 4 The corresponding relationship between the shadow memory and the virtual address page according to some embodiments of the present disclosure is schematically shown.

[0034] Figure 5 The process diagram of the instruction insertion of the memory access instruction according to some embodiments of the present disclosure is schematically shown.

[0035] Figure 6 The schematic diagram of the memory out-of-bound detection device according to some embodiments of the present disclosure is schematically shown.

[0036] Figure 7A structural diagram of a computer system of an electronic device according to some embodiments of the disclosure is schematically shown.

[0037] Figure 8 A schematic diagram of a computer-readable storage medium according to some embodiments of the disclosure is schematically shown.

[0038] In the drawings, like or corresponding elements shown throughout the figures are designated with like reference numerals. DETAILED DESCRIPTION

[0039] The exemplary embodiments are described herein with reference to the accompanying drawings, in which examples are shown. The description below concerns the drawings, where the same numbers on different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments are not meant to represent all implementations consistent with the present description. Rather, they are merely examples of apparatuses and methods consistent with some aspects of the present description as detailed in the appended claims.

[0040] The terminology used in this description is for the purpose of describing particular embodiments only and is not intended to limit the present description. As used in this description and the appended claims, the singular forms "a," "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will also be understood that the term "and / or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.

[0041] Example implementations will now be described more fully with reference to the accompanying drawings. Example implementations may, however, be implemented in many different forms and should not be construed as limited to the examples set forth herein; rather, these implementations are provided so that this disclosure will be thorough and complete, and will fully convey the scope of example implementations to those skilled in the art.

[0042] Moreover, the described features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided to give a thorough understanding of embodiments of the disclosure. One skilled in the relevant art will recognize, however, that the implementations of the disclosure can be practiced without one or more of the specific details, or with other methods, components, materials, and so forth. In other instances, well-known structures, devices, implementations, and operations have not been shown or described in detail to avoid obscuring aspects of the disclosure.

[0043] Furthermore, the accompanying drawings are only schematic and are non-limiting. Specifically, the embodiments will be described with reference to the accompanying drawings in which:

[0044] In the related art, to identify the memory out-of-bound behavior that may occur during the running of a GPU program, a memory management unit (MMU) is usually used for out-of-bound detection. This type of detection determines whether the access address of a program is within the valid page table mapping range. If the access address is not mapped to a page, it is determined that there is an out-of-bound access.

[0045] However, the above-mentioned MMU-based memory out-of-bound detection method can only identify the out-of-bound behavior of an unmapped virtual page, and cannot effectively detect the out-of-bound access within a mapped virtual page, and the detection accuracy is insufficient. On the one hand, since memory management is performed in units of pages, if the memory applied for by a target program does not occupy the entire page, when the access address falls within the unapplied part of the mapped virtual page, the MMU cannot identify it as an out-of-bound access. For example, under the configuration of a page size of 4 kilobytes (KB), if a program only applies for the memory of the first 1024 bytes of a virtual page, and subsequently accesses the addresses in the range of 1024 to 4095 bytes of the page, although it has exceeded the application range, since it is still within the same page, the MMU cannot effectively identify this out-of-bound behavior. On the other hand, when a program applies for multiple independent memory blocks and each memory block has completed page table mapping, even if there is an access instruction that incorrectly jumps from one memory block to another, since the target address is still within the valid mapping area, the MMU will still regard it as a valid access, and cannot accurately detect the cross-block access error.

[0046] Therefore, the MMU-based memory out-of-bound detection method can only identify the access behavior of an unmapped virtual page, and cannot effectively identify the out-of-bound access within the same virtual page in a GPU program or the out-of-bound access between multiple mapped memory blocks, and the detection accuracy is poor.

[0047] To solve all or part of the above technical problems in the related art, in the present example embodiment, a memory out-of-bound detection method is first provided, which can be applied to an electronic device having a memory access function, including but not limited to a memory controller, a general-purpose processor, a graphics processor, an embedded terminal device, and the like. Figure 1 A flowchart of a memory out-of-bound detection method according to some embodiments of the present disclosure is schematically shown. Referring to Figure 1 As shown, the memory out-of-bound detection method can include the following steps:

[0048] In step S110, when allocating running memory for the target program, a shadow memory corresponding to the running memory is configured.

[0049] In step S120, all virtual memory pages mapped by the virtual address range of the running memory and the in-page access range of each virtual memory page are determined.

[0050] In step S130, based on the in-page access range, the in-page access range data corresponding to each virtual memory page is written in the shadow memory respectively, and the in-page access range data is used to indicate the address range accessible by the target program in each virtual memory page.

[0051] In step S140, before executing the memory access instruction in the target program, the out-of-bound judgment of the access address in the memory access instruction is performed according to the in-page access range data.

[0052] According to the memory out-of-bound detection method in the example embodiment, on the one hand, when the running memory is allocated for the target program, the shadow memory is configured, and the in-page access range data of each virtual memory page is written in the shadow memory, which can realize the independent storage of the in-page access range of each virtual memory page, provide data support for in-page out-of-bound detection, and thus avoid the problem of being unable to identify in-page out-of-bound access, and improve the accuracy of memory out-of-bound detection. On the other hand, the out-of-bound judgment of the access address is completed before the execution of the memory access instruction, so that the out-of-bound access can be intercepted before it occurs, thereby improving the system stability. On the other hand, compared with the out-of-bound detection method relying on hardware, the method can be adapted to multiple types of processing platforms and program running environments, and has wider application adaptability and deployment flexibility.

[0053] Further, the memory out-of-bound detection method in the example embodiment is applicable to independent computing platforms such as graphic processing units (GPUs) or central processing units (CPUs), and can also be used in heterogeneous computing systems containing CPUs and GPUs, to realize unified out-of-bound detection capability across platforms. In addition, the memory out-of-bound detection method can be implemented through a preset memory detection tool, which can represent an out-of-bound detection software or detection module deployed on the host side or the device end.

[0054] In the following, the memory out-of-bound detection method in the example embodiment will be further described.

[0055] In step S110, when allocating running memory for the target program, a shadow memory corresponding to the running memory is configured.

[0056] The target program can represent a program running on a processor, which can include but is not limited to an application program, a system service program, a driver program, etc. The target program needs to access memory resources allocated by the system to complete corresponding function logic or system service operation during running. The running memory can represent a memory area allocated by the system for the target program to store code, data, stack or other running data during running of the target program. The memory area can be mapped to a virtual address space through a page table for read-write access by the target program during execution. The shadow memory can represent an auxiliary storage area corresponding to the running memory in an address mapping relationship, used to store access permissions, in-page access ranges and other data of each virtual memory page. The shadow memory itself does not participate in program logic execution and is only used for out-of-bound judgment of memory access behavior. The allocation of the running memory for the target program can be performed simultaneously with the configuration of the shadow memory corresponding to the running memory, or the running memory can be allocated for the target program first, and then the shadow memory corresponding to the running memory can be configured according to the running memory.

[0057] The shadow memory can be automatically configured through a preset memory detection tool. Specifically, before the target program runs, the memory detection tool is started in advance to monitor memory allocation instructions in real time. When a memory application request is detected from the target program, the memory detection tool can synchronize the configuration of the shadow memory corresponding to the running memory based on the running memory information allocated by the memory management unit in the system, thereby realizing dynamic association and management of the shadow memory.

[0058] Further, the running memory can include a plurality of running memory blocks, and the shadow memory can include a plurality of shadow memory blocks. The running memory can represent the overall memory space allocated for the target program during running, the running memory block can represent a plurality of independent memory areas constituting the running memory, and the shadow memory block can represent a mapping storage area in the shadow memory corresponding to each running memory block, used to record in-page access range data of the corresponding running memory block. When a plurality of running memory blocks are allocated for the target program, a corresponding shadow memory block can be configured for each running memory block. By configuring a corresponding shadow memory block for each running memory block, on the one hand, the access range of each running memory block can be independently mapped and recorded, avoiding confusion of access boundaries between the plurality of running memory blocks; on the other hand, when a memory access instruction is executed, the in-page access range data recorded in the shadow memory block corresponding to the running memory block involved in the instruction can be used for targeted out-of-bound checking, thereby effectively improving the accuracy of out-of-bound detection. This method is suitable for a running scenario where a plurality of memory blocks coexist, and enhances the recognition ability of cross-block out-of-bound behavior.

[0059] In step S120, all virtual memory pages mapped by the virtual address range of the running memory and the in-page access range of each virtual memory page are determined.

[0060] For example, all virtual memory pages mapped by the virtual address range of the running memory and the in-page access range of each virtual memory page can be determined according to the virtual address page table mapping relationship.

[0061] The virtual address page table mapping relationship can represent a mapping rule for converting a virtual address accessed by a program into a physical address, and the relationship is implemented by a page table. The page table records mapping items between a virtual page number and a corresponding physical page frame in a page as a basic unit, for a memory management unit (MMU) to use in a table lookup in an address conversion process, thereby supporting virtual memory management under a paging mechanism. The virtual address range can represent a continuous or discontinuous virtual address interval allocated by an operating system or a memory management unit for a target program, reflecting a range accessible by the target program in a virtual address space. The virtual memory page can represent a basic virtual memory allocation unit divided according to a fixed page size specified by an operating system, and each virtual memory page can be independently mapped to a physical memory page, and each page has a unique virtual page number. The in-page access range can represent an address interval actually applied for and allowed to be accessed by the target program in the corresponding virtual memory page, and the range is usually less than or equal to the page size, for limiting an effective access boundary of the program in the virtual memory page.

[0062] In an actual running process, all virtual memory pages mapped by the virtual address range of the running memory and the in-page access range of each virtual memory page can be determined by the following technical steps: first, the starting virtual address and the allocation length of the running memory allocated by the memory management unit for the target program are obtained, the starting virtual address is calculated for page boundary alignment according to the page size, and then the virtual address range completely covering the running memory is determined; then, the page table query operation is performed on the virtual address range in combination with the virtual address page table mapping relationship, to identify all virtual memory pages participating in the mapping; finally, the in-page access range of each virtual memory page is determined, for subsequent construction of the shadow memory.

[0063] In step S130, the in-page access range data corresponding to each virtual memory page is written into the shadow memory based on the in-page access range, and the in-page access range data is used to indicate an address range accessible by the target program in each virtual memory page.

[0064] The in-page access range data can indicate data for indicating an address interval allowed to be accessed in a virtual memory page, and is used to limit an address range accessible by the target program in the virtual memory page. In this step, by writing the in-page access range data corresponding to each virtual memory page in the shadow memory respectively, the effective access range of each virtual memory page can be stored and identified independently, thereby providing reliable out-of-bound judgment basis before the execution of the memory access instruction, and avoiding the problem of being unable to identify the in-page out-of-bound access.

[0065] In step S140, before the execution of the memory access instruction in the target program, the access address in the memory access instruction is judged for out-of-bound according to the in-page access range data.

[0066] The memory access instruction can indicate an instruction for performing a read operation or a write operation on the running memory of the target program, and usually carries target address information for identifying the position of the running memory to be accessed. The access address can indicate address information carried in the memory access instruction, which is used to indicate the position of the running memory to be accessed by the target program. The out-of-bound judgment can indicate a comparison between the access address and the in-page access range of the corresponding virtual memory page, to determine whether the access address exceeds the access boundary of the virtual memory page.

[0067] Further, for the target program allocated with multiple memory blocks, the access address in the memory access instruction of the target program can be judged for out-of-bound by the following technical steps: extracting the access address from the memory access instruction, and determining a target memory block in the multiple running memory blocks pointed by the pointer in the memory access instruction; determining a target shadow memory block corresponding to the target memory block; and judging the access address for out-of-bound according to the in-page access range data in the target shadow memory block.

[0068] The pointer can represent a variable used to identify the starting address of an allocated running memory block during the execution of the target program, and the value of the pointer can be generated by the compiler or dynamically allocated at runtime. The pointer is used as the basis for memory access instructions, and its value corresponds to the address reference of the target running memory block being accessed, which is used to determine whether the current access address belongs to the allocation range of the target running memory block. The target running memory block can represent one of the plurality of running memory blocks obtained by the target program through memory allocation operations during execution, and specifically, the corresponding running memory block pointed to and planned to be accessed by the current memory access instruction. The target shadow memory block can represent a shadow memory block having an address mapping relationship with the target memory block, and the shadow memory block is used to store the in-page access range data corresponding to each virtual memory page in the target memory block. In this embodiment, by extracting the access address and determining the target running memory block to which the access address belongs, and then combining the in-page access range data recorded in the shadow memory block corresponding to the target running memory block, the out-of-bound judgment can be performed, so as to accurately determine whether the access address exceeds the valid access range of the target running memory block pointed to by the current instruction. Even if the access address points to a running memory block of another mapped virtual memory page, it will not be incorrectly identified as a legal access, thereby overcoming the limitation that MMU cannot identify cross-block access errors, and further improving the accuracy of memory out-of-bound detection.

[0069] Next, the contents in steps S110 to S140 will be described in detail.

[0070] In some embodiments, with reference to Figure 2 As shown in the figure, the in-page access range data corresponding to each virtual memory page is written into the shadow memory respectively, and the technical steps include the following:

[0071] In step S210, the page length value of the virtual memory page and the page starting address corresponding to each virtual memory page are determined.

[0072] The page length value can represent the size of the continuous address space covered in each virtual memory page, and is used to identify the address span of a single virtual memory page. The value is usually preset by the operating system or hardware platform, and is fixed. For example, the page length value can be 4 kilobytes, that is, each virtual memory page covers a continuous address interval of 4096 bytes. In other embodiments, the page length value can also be 8 kilobytes, 16 kilobytes or a larger value. The page starting address can represent the starting position of the address range covered by a virtual memory page, that is, the first valid virtual address corresponding to the page, and the value is usually an integer multiple of the page length value.

[0073] In step S220, the mapping segment corresponding to each virtual memory page in the shadow memory is determined according to the page length value and the page starting address.

[0074] The mapping section can represent a storage area in the shadow memory corresponding to the virtual memory page one by one, which is divided according to the page start address and the page length value of the virtual memory page, and is used to store the in-page access range data corresponding to the virtual memory page. By constructing the mapping section, a structured mapping relationship between the running memory and the shadow memory is realized, which provides basic data support for subsequent out-of-bound judgment.

[0075] In step S230, the in-page access range data of the virtual memory page corresponding to each mapping section is written in each mapping section.

[0076] In this embodiment, on the one hand, by determining the page length value and the page start address of each virtual memory page, the boundary information of each virtual memory page in the virtual address space can be determined, which provides a basis for the generation of the mapping section in the shadow memory; on the other hand, according to the page length value and the page start address, the corresponding mapping section in the shadow memory is constructed, and the in-page access range data of each virtual memory page is written, which can realize the one-to-one correspondence between the virtual memory page and the mapping section, and then through the in-page access range data stored in the mapping section, the accurate identification of the out-of-bound behavior in the virtual memory page is realized.

[0077] In some embodiments, referring to FIG. 2, the determination of the mapping section corresponding to each virtual memory page in the shadow memory according to the page length value and the page start address in step S220 can be completed through the following technical steps, specifically including: Figure 3

[0078] In step S310, the number of bytes of the mapping section is determined according to the page length value.

[0079] The number of bytes can represent a unit quantity value for measuring the storage capacity of the mapping section. Specifically, the corresponding relationship between the number of bytes of the mapping section and the page length value can be expressed by the following formula:

[0080]

[0081] wherein S p represents the page length value, and the unit is byte; and S s represents the number of bytes. Therefore, for a virtual memory page with a size of 4 kilobytes, the size of the corresponding mapping section in the shadow memory is 2 bytes, that is, 16 bits (bit).

[0082] In step S320, the virtual page number of the corresponding virtual memory page is determined according to the page length value and the page start address.

[0083] ​The virtual page number can represent a number used to identify a page to which a virtual address belongs in a paging virtual memory management mechanism, which can be obtained by dividing the virtual address by a page length value, and is used to uniquely identify a virtual memory page to which the virtual address belongs. In this embodiment, the virtual page number of the virtual memory page corresponding to the page start address can be obtained by dividing the page start address by the page length value.

[0084] In step S330, a write start address of each mapping segment in the shadow memory is determined based on the product of the virtual page number and the byte number.

[0085] The write start address can represent a start position in the shadow memory used to store the in-page access range data corresponding to a virtual memory page, which is calculated based on the product of the virtual page number of the virtual memory page and the byte number of the corresponding mapping segment, and is used to ensure that the address spaces of the mapping segments in the shadow memory do not overlap with each other and correspond one-to-one to the original virtual page numbers, thereby supporting fast positioning and accessing the shadow memory region corresponding to the virtual page.

[0086] In step S340, a mapping segment corresponding to each virtual memory page in the shadow memory is determined according to the write start address and the byte number. Specifically, according to the write start address and the byte number, the address boundary of the mapping segment corresponding to each virtual memory page in the shadow memory can be further determined, thereby providing an accurate position basis for writing the in-page access range data in the mapping segment.

[0087] In some embodiments, the determination of the write start address of each mapping segment in the shadow memory based on the product of the virtual page number and the byte number in step S330 can be implemented by the following steps, specifically including: obtaining an offset address of each mapping segment based on the product of the virtual page number and the byte number; and adding the storage start address of the shadow memory to the offset address to obtain the write start address of each mapping segment in the shadow memory.

[0088] The offset address can represent a position offset of the current virtual memory page in the shadow memory relative to the storage start address of the shadow memory, which is determined based on the product of the virtual page number of the virtual memory page and the byte number of the mapping segment corresponding to each page, and can be used as a basis for calculating the write start address of the mapping segment, thereby ensuring that the mapping positions of the virtual memory pages in the shadow memory are not overlapped and are in sequence. The storage start address can represent a start write address of the first mapping segment in the shadow memory, which is used as a calculation reference for the write start addresses of the subsequent mapping segments.

[0089] In this embodiment, the offset address of the mapping segment in the shadow memory is quickly calculated by multiplying the virtual page number with the corresponding byte number, and the writing start address of the mapping segment is obtained by adding the storage start address of the shadow memory on this basis, so that the stable mapping relationship between the virtual memory page and the shadow memory can be realized, the accuracy of the mapping segment address positioning and the writing efficiency can be effectively improved, address conflicts and misplacement can be avoided, and the ordered management and fast access of the out-of-bound detection data can be ensured. In addition, each mapping segment is sequentially constructed from the storage start address of the shadow memory, and when the access address falls into the reserved area before the storage start address, it is quickly determined as an out-of-bound access.

[0090] Exemplarily, the corresponding relationship between the writing start address and the page start address of the virtual memory page can be expressed by the following formula:

[0091]

[0092] wherein, S write represents the writing start address of the mapping segment in the shadow memory, S base represents the storage start address, S f represents the page start address corresponding to the virtual memory page, S p represents the page length value, S s represents the byte number of the mapping segment.

[0093] Further, in some embodiments, based on the above content, the corresponding relationship between the shadow memory and the virtual address page can be as shown in Figure 4 . The running memory contains two virtual memory pages from address 0x2000 to 0x4000, which are page1 and page2 respectively, and each page size is 4 kilobytes. Exemplarily, the memory address allocated for the target program is 0x2000 to 0x3500, which contains the whole page of page1 and part of the page of page2, the in-page access range corresponding to page1 is the whole page of page1, and the in-page access range corresponding to page2 is address 0x3000 to 0x3500, at this time, page1 can be fully mapped, and page2 can be partially mapped, based on the in-page access range corresponding to each page, the in-page access range data corresponding to page1 and page2 is written in the shadow memory respectively. The shadow memory allocates a 16-bit mapping segment for each virtual memory page, and a preset area is reserved before and after the mapping segment and filled with 0, which is used for boundary out-of-bound detection. The virtual address is calculated by the formula base+((addr>>12)<<1), that is, the virtual address addr is right shifted by 12 bits to obtain its virtual page number, then left shifted by 1 bit to represent that each page corresponds to a 16-bit mapping segment, and finally the base address of the shadow memory, that is, the storage start address, is added, so that the mapping segment of the virtual address in the shadow memory is obtained, and the mapping between the virtual address page of the running memory and the shadow memory is realized.

[0094] In some embodiments, preset out-of-bound flag values can be written in the remaining regions of the shadow memory except the mapping segments. The out-of-bound flag values can represent specific numerical values such as 0, etc. written in the regions of the shadow memory except the mapping segments, which are used to identify invalid access regions. When the out-of-bound flag values are read at the storage locations located in the shadow memory according to the access addresses, it can be determined that the current access behavior is out-of-bound, thereby achieving fast identification of out-of-bound access. Figure 4 As shown in the middle, 0s can be filled before and after the mapping segments of the shadow memory.

[0095] In some embodiments, in each mapping segment, the in-page access range data of the corresponding virtual memory page is written, including the following technical steps: determining whether the virtual memory page is valid in whole page; in response to yes, writing a full-page valid flag value in the preset flag bit field in the mapping segment corresponding to the virtual memory page; in response to no, writing a partial valid flag value in the preset flag bit field in the mapping segment corresponding to the virtual memory page, and writing the access boundary value of the virtual memory page in other fields in the mapping segment except the preset flag bit field.

[0096] The valid in whole page can mean that all byte regions from the page start address to the page end address in the target virtual memory page are effectively used by the target program, i.e., the virtual memory page does not contain invalid or unallocated in-page space. The preset flag bit field can mean a storage region reserved in the mapping segment corresponding to each virtual memory page in the shadow memory for recording whether the current virtual memory page is valid in whole page. The full-page valid flag value can mean a preset numerical flag used to identify the virtual memory page in the valid in whole page state. Exemplarily, the full-page valid flag value can be 1. The partial valid flag value can mean a preset numerical flag used to identify that only part of the in-page space of the virtual memory page is effectively used. Exemplarily, the partial valid flag value can be 0. The access boundary value can mean a boundary parameter used to identify the maximum offset position in the in-page space of the virtual memory page that can be accessed, which is less than the page length value of the corresponding page, and is used to limit the access operation to be performed only in the in-page region before the boundary value.

[0097] Exemplarily, for a 16-bit mapping segment, the 15th bit can represent a preset flag bit field, used to record whether the current virtual memory page is in a whole-page valid state, where a value of 1 indicates a whole-page valid state and a value of 0 indicates a partial valid state. The 0th bit to the 11th bit can represent an access boundary value field, used to record the valid length of the partial valid page, that is, the number of bytes of the continuous valid access region corresponding to the page start address of the virtual memory page. In this embodiment, by setting the preset flag bit field and the access boundary value in the mapping segment of the shadow memory, it can be determined whether the virtual memory page is in a whole-page valid state, thereby targetedly judging the access range. For a virtual memory page in a whole-page valid state, the out-of-bound checking step can be directly skipped, thereby reducing the judgment overhead; for a partial valid page, the valid access region is limited by the access boundary value, thereby improving the granularity and accuracy of the out-of-bound detection.

[0098] In step S140, before executing the memory access instruction in the target program, the access address in the memory access instruction is determined for out-of-bound according to the in-page access range data. Specifically, when the memory access instruction in the target program is identified, the target program can be inserted with an instruction, that is, the memory access instruction in the target program is replaced, and the target program is switched to a preset out-of-bound detection program. When the out-of-bound detection passes, the original memory access instruction is returned.

[0099] For example, referring to Figure 5As shown, when the memory access instruction LD R2, R8 contained in the original code is identified, the original code can be instrumented by replacing the LD R2, R8 with the out-of-bound detection code through instruction replacement, and entering the memory out-of-bound detection logic, i.e., "Check memory out of bounds". Specifically, the original code includes MOVR1, C0, LD R2, R8 and ADD R2, R12, wherein the LD R2, R8 is the memory access instruction to be detected. In the instrumentation process, a jump instruction JMP L1 is inserted in the original instruction sequence to construct the instrumented code, so that the program execution flow jumps to the replacement code segment L1 to execute the preset out-of-bound detection logic before reaching the original memory access instruction and executing the original memory access instruction. In the instrumentation process, the original memory access instruction is replaced with the replacement code, which includes the following contents: at the label L1, first execute the call memory check instructions, i.e., call the out-of-bound detection instruction corresponding to the current memory access address to perform out-of-bound judgment on the access address represented by the register R8. If the detection passes, the step of calling the original instruction is executed, i.e., the memory access instruction LD R2, R8 in the original code is executed. After completing the loading operation, the step of jumping back is executed, i.e., jumping back to the original instruction flow to continue executing the next instruction ADD R2, R12 of the LD R2, R8 in the original code to ensure the continuous execution of the program.

[0100] In some embodiments, the out-of-bound determination of the access address in the memory access instruction according to the in-page access range data specifically includes the following technical steps: determining a target running memory corresponding to a target program, and a target shadow memory corresponding to the target running memory; determining a shadow address corresponding to the access address, and determining whether the shadow address falls within the address range of any mapping segment in the target shadow memory, the shadow address representing a corresponding address in the shadow memory converted from the access address; in response to no, determining that the access address is out-of-bound; and in response to yes, determining the out-of-bound of the access address based on the in-page access range data recorded in the mapping segment corresponding to the shadow address.

[0101] The target running memory can represent a memory pointed to by the memory access instruction during execution. The target shadow memory can represent a shadow memory having a mapping relationship with the target running memory, and the target shadow memory is provided with a mapping segment corresponding to each virtual memory page in the target running memory. The shadow address can represent a corresponding address in the shadow memory converted from the access address, which is used to access the mapping segment in the target shadow memory corresponding to the access address in the target running memory. In this embodiment, by judging whether the shadow address mapped from the access address falls outside the address range of any mapping segment in the shadow memory, it can be quickly determined whether the virtual memory page corresponding to the target access address has a valid mapping. If the shadow address does not correspond to any mapping segment, it can be directly determined that the access address is out of bounds, thereby significantly improving the efficiency of memory out-of-bounds detection.

[0102] In some embodiments, the shadow address corresponding to the access address can be determined by the following steps: first, the access address is right shifted by a number of bits corresponding to the page length value to obtain a virtual page number corresponding to the virtual memory page where the access address is located, wherein the number of bits N and the page length value S satisfy the relationship S p The relationship S p = 2 N is satisfied. Then, the virtual page number is multiplied by the number of bytes to obtain a shadow memory offset corresponding to the current access address, the shadow memory offset being used to indicate the offset distance of the access address from the storage start address in the shadow memory. Finally, the shadow address corresponding to the access address is obtained by adding the storage start address of the shadow memory to the shadow memory offset on the basis of the shadow memory offset, and the shadow address can be used to index the in-page access range data corresponding to the access address recorded in the shadow memory.

[0103] In some embodiments, based on the in-page access range data recorded in the mapping segment corresponding to the shadow address, the out-of-bounds determination of the access address is performed, specifically including the following technical steps: determining whether the preset flag field in the mapping segment is a full-page valid flag value; in response to yes, determining that the access address is not out of bounds; and in response to no, performing the out-of-bounds determination of the access address based on the access boundary value in the mapping segment.

[0104] By preferentially determining whether the preset flag field in the mapping segment is a full-page valid flag value, it can be quickly determined whether the current virtual memory page is fully accessible, and if it is a full-page valid flag value, it can be directly determined that the access address is not out of bounds, thereby avoiding unnecessary boundary value comparison operations and improving the out-of-bounds detection efficiency; if the preset flag field is a partial valid flag value, the out-of-bounds determination of the access address is further performed based on the access boundary value.

[0105] In some embodiments, the out-of-bound determination on the access address based on the access boundary value in the mapping segment comprises: determining a page-in-offset value of the access address in the corresponding virtual memory page; in response to the page-in-offset value being greater than the access boundary value, determining that the access address is out-of-bound; and in response to the page-in-offset value being less than or equal to the access boundary value, determining that the access address is not out-of-bound.

[0106] The page-in-offset value can represent an offset distance of the access address relative to a page start address of the virtual memory page to which the access address belongs, and is used to indicate a specific offset position of the current access position in the page. The value of the page-in-offset value is less than the page length value corresponding to the virtual memory page. In this embodiment, by comparing the page-in-offset value with the access boundary value, the out-of-bound identification of the access behavior in the partially valid virtual memory page can be realized, and the accuracy and robustness of the out-of-bound detection can be significantly improved.

[0107] In some embodiments, the memory out-of-bound detection method of the present disclosure further comprises the following steps: configuring an out-of-bound record memory corresponding to the running memory; and in the case where it is detected that the access address is out-of-bound, writing the out-of-bound memory access instruction corresponding to the access address into the out-of-bound record memory for calling.

[0108] The out-of-bound record memory can represent a specific memory area for storing information related to the memory access behavior determined to be out-of-bound during the running of the target program. The out-of-bound record memory can record information such as the access address corresponding to the out-of-bound access, the memory access instruction, or the triggering time. Specifically, when it is detected that the access address is out-of-bound, the abnormal information related to the out-of-bound behavior is directly written into the out-of-bound record memory. This writing process can be completed without relying on hardware interruption or a debugging interface. If the current program is executed on the GPU side, after the program execution is completed, the CPU side can access the out-of-bound record memory, determine whether there is an out-of-bound record, and if there is, output the abnormal information to the console or write it into a log file, thereby realizing the rapid recording and post-processing of the GPU memory out-of-bound behavior and improving the processing capability of the system for access abnormalities.

[0109] It should be noted that although the steps of the method in the present disclosure are described in a specific order in the accompanying drawings, this does not require or imply that the steps must be performed in this specific order, or that all the steps shown must be performed to achieve the desired results. Additionally or alternatively, some steps can be omitted, a plurality of steps can be combined into one step, and / or one step can be divided into a plurality of steps, etc.

[0110] In addition, in the present example embodiment, a memory out-of-bound detection device is also provided. As shown in Figure 7 The memory out-of-bound detection device 600 comprises a shadow memory configuration module 610, an access range determination module 620, an access range writing module 630, and an access out-of-bound determination module 640.

[0111] The shadow memory configuration module 610 can be configured to configure a shadow memory corresponding to a running memory allocated for a target program when the running memory is allocated for the target program.

[0112] The access range determination module 620 can be configured to determine all virtual memory pages mapped by a virtual address range of the running memory and an intra-page access range of each of the virtual memory pages.

[0113] The access range writing module 630 can be configured to write, in the shadow memory, intra-page access range data corresponding to each of the virtual memory pages based on the intra-page access range, the intra-page access range data being used to indicate an address range accessible by the target program in each of the virtual memory pages.

[0114] The access out-of-range determination module 640 can be configured to determine whether an access address in a memory access instruction in the target program is out of range according to the intra-page access range data before the memory access instruction is executed.

[0115] In some example embodiments of the present disclosure, based on the foregoing scheme, the running memory includes a plurality of memory blocks, and the shadow memory includes a plurality of shadow memory blocks; the shadow memory configuration module 610 can be further configured to respectively configure a corresponding shadow memory block for each of the running memory blocks.

[0116] In some example embodiments of the present disclosure, based on the foregoing scheme, the access out-of-range determination module 640 can be configured to extract the access address from the memory access instruction, determine a target running memory block pointed to by a pointer in the memory access instruction from the plurality of running memory blocks, determine a target shadow memory block corresponding to the target running memory block, and determine whether the access address is out of range according to the intra-page access range data in the target shadow memory block.

[0117] In some example embodiments of the present disclosure, based on the foregoing scheme, the access range determination module 620 can include a page start address determination unit configured to determine a page length value of the virtual memory page and a page start address corresponding to each of the virtual memory pages, a mapping segment determination unit configured to determine a mapping segment corresponding to each of the virtual memory pages in the shadow memory according to the page length value and the page start address, and a data writing unit configured to write the intra-page access range data of the virtual memory page corresponding to each of the mapping segments in each of the mapping segments.

[0118] In some example embodiments of the present disclosure, based on the foregoing scheme, the mapping segment determination unit can be configured to: determine the number of bytes of the mapping segment according to the page length value; determine the virtual page number of the corresponding virtual memory page according to the page length value and the page start address; determine the write start address of each mapping segment in the shadow memory based on the product of the virtual page number and the number of bytes; and determine the corresponding mapping segment of each virtual memory page in the shadow memory according to the write start address and the number of bytes.

[0119] In some example embodiments of the present disclosure, based on the foregoing scheme, the mapping segment determination unit can be further configured to: obtain the offset address of each mapping segment based on the product of the virtual page number and the number of bytes; and obtain the write start address of each mapping segment in the shadow memory by adding the storage start address of the shadow memory to the offset address.

[0120] In some example embodiments of the present disclosure, based on the foregoing scheme, the data writing unit can be configured to: determine whether the virtual memory page is valid in its entirety; write a full-page valid flag value in a preset flag bit field in the mapping segment corresponding to the virtual memory page in response to yes; write a partial valid flag value in the preset flag bit field in the mapping segment corresponding to the virtual memory page and write an access boundary value corresponding to the virtual memory page in other fields in the mapping segment except the preset flag bit field in response to no.

[0121] In some example embodiments of the present disclosure, based on the foregoing scheme, the access range determination module 620 further includes an out-of-bound flag writing unit configured to write a preset out-of-bound flag value in a region in the shadow memory other than the mapping segment.

[0122] In some example embodiments of the present disclosure, based on the foregoing scheme, the access out-of-bound determination module 640 can be configured to: determine a target running memory corresponding to the target program and a target shadow memory corresponding to the target running memory; determine a shadow address corresponding to the access address, the shadow address representing a corresponding address in the shadow memory converted from the access address; determine whether the shadow address falls within the address range of any mapping segment in the target shadow memory; determine that the access address is out-of-bound in response to no; and determine whether the access address is out-of-bound based on the in-page access range data recorded in the mapping segment corresponding to the shadow address in response to yes.

[0123] In some example embodiments of the present disclosure, based on the foregoing scheme, the out-of-bound determination on the access address based on the in-page access range data recorded in the mapping segment corresponding to the shadow address comprises: determining whether the preset flag field in the mapping segment is a full-page valid flag value; in response to yes, determining that the access address is not out-of-bound; and in response to no, determining the out-of-bound of the access address based on the access boundary value in the mapping segment.

[0124] In some example embodiments of the present disclosure, based on the foregoing scheme, the out-of-bound determination on the access address based on the access boundary value in the mapping segment comprises: determining an in-page offset value of the access address in the corresponding virtual memory page; in response to the in-page offset value being greater than the access boundary value, determining that the access address is out-of-bound; and in response to the in-page offset value being less than or equal to the access boundary value, determining that the access address is not out-of-bound.

[0125] In some example embodiments of the present disclosure, based on the foregoing scheme, the memory out-of-bound detection apparatus 600 can further comprise an out-of-bound recording module configured to configure an out-of-bound recording memory corresponding to the running memory; and in the case that it is detected that the access address is out-of-bound, write the out-of-bound memory access instruction corresponding to the access address into the out-of-bound recording memory for calling.

[0126] The specific details of the above memory out-of-bound detection apparatus modules have been described in detail in the corresponding memory out-of-bound detection method, and thus will not be described here again.

[0127] It should be noted that although several modules or units of the memory out-of-bound detection apparatus are mentioned in the foregoing detailed description, such division is not mandatory. In fact, according to the embodiments of the present disclosure, the features and functions of two or more modules or units described above can be embodied in one module or unit. Conversely, the features and functions of one module or unit described above can be further divided into multiple modules or units for embodiment.

[0128] In addition, in the example embodiments of the present disclosure, an electronic device capable of implementing the above memory out-of-bound detection method is also provided.

[0129] Those skilled in the art can understand that each aspect of the present disclosure can be implemented as a system, a method or a program product. Therefore, each aspect of the present disclosure can be embodied as a complete hardware embodiment, a complete software embodiment (including firmware, microcode, etc.), or an embodiment combining hardware and software aspects, which can be collectively referred to as "circuitry", "module" or "system" here.

[0130] The following refers to the accompanying drawings, which are incorporated in the present disclosure and used for purposes of explanation. Figure 7The electronic device 700 according to such an embodiment of the present disclosure will be described. Figure 7 The electronic device 700 shown is merely one example and should not be taken as limiting the scope of the present disclosure embodiments.

[0131] As shown in Figure 7 The electronic device 700 is shown in the form of a general computing device. The components of the electronic device 700 can include, but are not limited to, the at least one processing unit 710 described above, the at least one storage unit 720 described above, a bus 730 that connects the different system components including the storage unit 720 and the processing unit 710, and a display unit 740.

[0132] The storage unit stores program code that can be executed by the processing unit 710, so that the processing unit 710 performs the steps described in the "Exemplary Method" section above according to various exemplary embodiments of the present disclosure. For example, the processing unit 710 can perform the steps shown in Figure 1 S110, configuring a shadow memory corresponding to the running memory when allocating a running memory for a target program; S120, determining all virtual memory pages mapped by a virtual address range of the running memory and an intra-page access range of each virtual memory page; S130, based on the intra-page access range, writing the intra-page access range data corresponding to each virtual memory page in the shadow memory respectively, the intra-page access range data being used to indicate an address range accessible by the target program in each virtual memory page; and S140, performing an out-of-bound judgment on an access address in a memory access instruction according to the intra-page access range data before executing the memory access instruction in the target program.

[0133] The storage unit 720 can include a readable medium in the form of volatile storage such as a random access memory (RAM) 721 and / or cache memory 722, and can further include a read-only memory (ROM) 723.

[0134] The storage unit 720 can further include program / utility 724 having a set of at least one program modules 725, including but not limited to, an operating system, one or more application programs, other program modules, and program data, each of which or a combination can include implementation of a network environment.

[0135] The bus 730 can be representative of one or more of several types of bus structures, including a storage unit bus or storage unit controller, a peripheral bus, a graphics acceleration port, a processing unit, or a local bus using any of a variety of bus structures.

[0136] The electronic device 700 can also communicate with one or more external devices 770 such as a keyboard or pointing device, a Bluetooth device, or a database, and / or one or more devices that enable a user to interact with the electronic device 700 and / or one or more devices (e.g., routers, modems, or the like) that enable the electronic device 700 to communicate with one or more other computing devices. Such communication can occur via Input / Output (I / O) interface 750. Still yet, the electronic device 700 can communicate with one or more networks, such as a local area network (LAN), a wide area network (WAN), and / or the Internet through network adapter 760. As depicted, network adapter 760 communicates with the other components of the electronic device 700 via bus 730. It should be appreciated that although not shown, other hardware and / or software modules could be used in connection with the electronic device 700. Such modules include, but are not limited to, microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data archival storage systems, etc.

[0137] From the above description of the embodiments, it is easy for those skilled in the art to understand that the example embodiments described herein can be implemented by software, or by software in combination with necessary hardware. Therefore, the technical solutions according to the embodiments of the present disclosure can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (which can be a CD-ROM, a USB flash disk, a mobile hard disk, or the like) or a network, and includes a number of instructions to enable a computing device (which can be a personal computer, a server, a terminal device, or a network device, etc.) to perform the methods according to the embodiments of the present disclosure.

[0138] In the example embodiments of the present disclosure, a computer-readable storage medium having a program product stored thereon capable of implementing the above-mentioned method of the present disclosure is also provided. In some possible embodiments, various aspects of the present disclosure can also be implemented in the form of a program product, which includes program codes for causing a terminal device to perform the steps according to various example embodiments of the present disclosure described in the above-mentioned “example method” section of the present specification when the program product is run on the terminal device.

[0139] Reference Figure 8 As shown, a program product 800 for implementing the above-mentioned memory out-of-bound detection method according to the embodiments of the present disclosure is described, which can adopt a portable compact disc read-only memory (CD-ROM) and include program codes, and can be run on a terminal device, such as a personal computer. However, the program product of the present disclosure is not limited to this, and in the present document, the readable storage medium can be any tangible medium containing or storing a program, which can be used or combined with an instruction execution system, device, or apparatus.

[0140] The program product can employ any combination of one or more computer-readable media. The computer-readable media can be a computer-readable storage medium or a computer-readable signal medium. The computer-readable storage medium can be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples (a non-exhaustive list) of the computer-readable storage medium include the following: an electrical connection having one or more wires, a portable disc, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0141] The computer-readable signal medium can include a computer-readable storage medium that is propagated as a carrier wave. The computer-readable signal medium can further be any computer-readable medium that is not a storage medium. The computer-readable signal medium can be a computer-readable storage medium that is a propagated signal on a computer-readable storage medium.

[0142] The program code embodied on the computer-readable media can be transmitted using any appropriate medium, including but not limited to wireless, wired, optical fiber cable, RF, etc., or any suitable combination of the foregoing.

[0143] The program code can be executed by one or more programmable processors, which can be implemented in one or more computer systems. In this context, a computer system generally includes a plurality of these programmable processors, which work in concert to perform a task. Additionally, the program code can be downloaded from an external source, including the internet, through a computer network, or through a wireless channel.

[0144] In addition, the above-described flowcharts are merely illustrative of the processes included in the method according to the exemplary embodiments of the present disclosure, and are not intended to limit the purpose. It is readily understood that the processes shown in the above-described flowcharts do not indicate or limit the time sequence of the processes. In addition, it is readily understood that the processes can be executed synchronously or asynchronously, for example, in a plurality of modules.

[0145] Those skilled in the art can easily understand, through the above description of the embodiments, that the example embodiments described herein can be implemented by software, or by software in combination with necessary hardware. Therefore, the technical solutions according to the embodiments of the present disclosure can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (which can be a CD-ROM, a U disk, a mobile hard disk, etc.) or a network, and includes a number of instructions to enable a computing device (which can be a personal computer, a server, a touch terminal, or a network device, etc.) to perform the methods according to the embodiments of the present disclosure.

[0146] Other embodiments of the present disclosure will be apparent to those skilled in the art with the disclosure herein. The present application is intended to cover any variations, uses, or adaptations of the present disclosure, which follow the general principles of the present disclosure and include known or customary practice in the art of the present disclosure. The specification and examples are to be regarded as illustrative only, and the true scope and spirit of the present disclosure are indicated by the claims.

[0147] It should be understood that the present disclosure is not limited to the precise structures as already described and shown in the drawings, and that various modifications and changes can be made without departing from its scope. The scope of the present disclosure is limited only by the claims appended hereto.

Claims

1. A memory out-of-bounds detection method, comprising: The method comprises: allocating a running memory for a target program, and configuring a shadow memory corresponding to the running memory; determining all virtual memory pages mapped by a virtual address range of the running memory and a page-in-access range of each of the virtual memory pages; writing, in the shadow memory, page-in-access range data corresponding to each of the virtual memory pages respectively based on the page-in-access range, the page-in-access range data being used to indicate an address range accessible by the target program in each of the virtual memory pages; performing an out-of-bound judgment on an access address in a memory access instruction in the target program according to the page-in-access range data before executing the memory access instruction.

2. The memory out-of-bounds detection method of claim 1, wherein, The running memory comprises a plurality of running memory blocks, and the shadow memory comprises a plurality of shadow memory blocks; The method of configuring the shadow memory corresponding to the running memory comprises: configuring the shadow memory block corresponding to each of the running memory blocks respectively.

3. The memory out-of-bounds detection method of claim 2, wherein, The method of performing the out-of-bound judgment on the access address in the memory access instruction according to the page-in-access range data comprises: extracting the access address from the memory access instruction, and determining a target running memory block pointed by a pointer in the memory access instruction among the plurality of running memory blocks; determining a target shadow memory block corresponding to the target running memory block; performing the out-of-bound judgment on the access address according to the page-in-access range data in the target shadow memory block.

4. The memory out-of-bounds detection method of claim 1, wherein, The method of writing, in the shadow memory, the page-in-access range data corresponding to each of the virtual memory pages comprises: determining a page length value of the virtual memory page and a page start address corresponding to each of the virtual memory pages; determining a mapping segment corresponding to each of the virtual memory pages in the shadow memory according to the page length value and the page start address; writing, in each of the mapping segments, the page-in-access range data of the virtual memory page corresponding to the mapping segment.

5. The memory out-of-bounds detection method of claim 4, wherein, The method of determining the mapping segment corresponding to each of the virtual memory pages in the shadow memory according to the page length value and the page start address comprises: determining a byte number of the mapping segment according to the page length value; determining a virtual page number of the corresponding virtual memory page according to the page length value and the page start address; determining a write start address of each of the mapping segments in the shadow memory based on a product of the virtual page number and the byte number; determining the mapping segment corresponding to each of the virtual memory pages in the shadow memory according to the write start address and the byte number.

6. The memory out-of-bounds detection method of claim 5, wherein, The method of determining the write start address of each of the mapping segments in the shadow memory based on the product of the virtual page number and the byte number comprises: obtaining an offset address of each of the mapping segments based on the product of the virtual page number and the byte number; obtaining the write start address of each of the mapping segments in the shadow memory by adding a storage start address of the shadow memory to the offset address.

7. The memory out-of-bound detection method of claim 4, wherein, The method of writing, in each of the mapping segments, the page-in-access range data of the virtual memory page corresponding to the mapping segment comprises: determining whether the virtual memory page is valid in whole page; in response to no, writing a partial valid flag value into the preset flag bit field in the mapping segment corresponding to the virtual memory page, and writing an access boundary value corresponding to the virtual memory page into a field other than the preset flag bit field in the mapping segment. in response to no, writing a partial valid flag value into the preset flag bit field in the mapping segment corresponding to the virtual memory page, and writing an access boundary value corresponding to the virtual memory page into a field other than the preset flag bit field in the mapping segment.

8. The memory out-of-bound detection method of claim 4, wherein, Further comprising: writing a preset out-of-bound flag value into a region other than the mapping segment in the shadow memory.

9. The memory out-of-bound detection method of claim 7, wherein, The out-of-bound determination on the access address in the memory access instruction based on the in-page access range data comprises: determining a target running memory corresponding to the target program, and a target shadow memory corresponding to the target running memory; determining a shadow address corresponding to the access address, and determining whether the shadow address falls within an address range of any of the mapping segments in the target shadow memory, the shadow address representing a corresponding address in the shadow memory converted from the access address; in response to no, determining that the access address is out-of-bound; in response to yes, determining the out-of-bound of the access address based on in-page access range data recorded in the mapping segment corresponding to the shadow address.

10. The memory out-of-bounds detection method of claim 9, wherein, The out-of-bound determination on the access address based on the in-page access range data recorded in the mapping segment corresponding to the shadow address comprises: determining whether the preset flag bit field in the mapping segment is a full-page valid flag value; in response to yes, determining that the access address is not out-of-bound; in response to no, determining the out-of-bound of the access address based on the access boundary value in the mapping segment.

11. The memory out-of-bound detection method of claim 10, wherein, The out-of-bound determination on the access address based on the access boundary value in the mapping segment comprises: determining an in-page offset value of the access address in the corresponding virtual memory page; in response to the in-page offset value being greater than the access boundary value, determining that the access address is out-of-bound; in response to the in-page offset value being less than or equal to the access boundary value, determining that the access address is not out-of-bound.

12. The memory out-of-bounds detection method of claim 1, wherein, Further comprising: configuring an out-of-bound record memory corresponding to the running memory; in a case where it is detected that an access address is out-of-bound, writing an out-of-bound memory access instruction corresponding to the access address into the out-of-bound record memory for invocation.

13. An out-of-memory detection apparatus, comprising: Comprising: a shadow memory configuration module, configured to, when allocating a running memory for a target program, configure a shadow memory corresponding to the running memory; an access range determination module, configured to determine all virtual memory pages mapped by a virtual address range of the running memory and an in-page access range of each of the virtual memory pages; an access range writing module, configured to write in-page access range data corresponding to each of the virtual memory pages into the shadow memory based on the in-page access range, the in-page access range data being used to indicate an address range accessible by the target program in each of the virtual memory pages; an access out-of-bound determination module, configured to, before executing a memory access instruction in the target program, determine the out-of-bound of an access address in the memory access instruction based on the in-page access range data.

14. An electronic device, comprising: Comprising: a processor; and a memory for storing executable instructions of the processor; wherein the processor is configured to perform the memory out-of-bound detection method of any one of claims 1-12 by executing the executable instructions.

15. A computer readable storage medium having stored thereon a computer object program, characterized in that, The computer object program, when executed by a processor, implements the memory out-of-bound detection method of any one of claims 1-12.

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