Chip screening method and device, electronic equipment and storage medium

Abstract

The embodiment of the invention provides a chip screening method and device, equipment and a storage medium, and the method comprises the steps: determining an input vector corresponding to a to-be-detected chip according to the test information and position information of other chips; inputting the input vector corresponding to the chip to be detected into the chip detection model to obtain a detection result; determining whether the to-be-detected chip is a defective product or not according to a detection result, outputting warning information when the to-be-detected chip is the defective product, and obtaining an input vector corresponding to the to-be-detected chip by firstly determining test information and position information of the to-be-detected chip in the wafer and other chips in a preset window around the to-be-detected chip; the chip detection method comprises the following steps of: detecting a chip to be detected, inputting the detected chip into a chip detection model to obtain a detection result, judging whether the chip to be detected is a defective product according to the result, and outputting warning information if the chip to be detected is the defective product, so that the defective product can be found in time and warning can be given, thereby ensuring the chip quality and improving the accuracy and efficiency of chip screening.

Description

Technical Field

[0001] The present invention relates to the field of chip technology, and in particular to a chip screening method, device, electronic equipment and storage medium. Background Art

[0002] With the development of science and technology, it is inevitable that certain defective products will be produced during the chip manufacturing process due to factors such as environmental influences, process fluctuations, material defects, and surface scratches. In order to reduce the potential defective chips in the tested chips, the existing technology will test each chip after manufacturing. However, since the spatial aggregation shapes of defective products are different, the judgment accuracy is limited. Summary of the invention

[0003] In view of the above problems, embodiments of the present invention are proposed to provide a chip screening method, device, electronic device and storage medium that overcome the above problems or at least partially solve the above problems.

[0004] In order to solve the above problems, an embodiment of the present invention discloses a chip screening method, including determining test information and position information of a chip to be detected in a wafer and other chips within a preset window around the chip to be detected;

[0005] Determine the input vector corresponding to the chip to be tested according to the test information and position information of the other chips;

[0006] Inputting the input vector corresponding to the chip to be detected into the chip detection model to obtain a detection result;

[0007] According to the detection result, determining whether the chip to be detected is a defective product;

[0008] When the chip to be detected is a defective product, a warning message is output.

[0009] Optionally, the chip detection model is trained in the following manner:

[0010] Acquire sample data, wherein the sample data includes input vectors of a plurality of sample chips in a sample wafer and risk expectation values ​​corresponding to the input vectors of the plurality of sample chips;

[0011] Using the input vectors of the plurality of sample chips as inputs of an encoder of the chip detection model, extracting hidden features of the input vectors through the encoder, and predicting output results based on the hidden features of the input vectors through an output layer of the encoder;

[0012] Determining a prediction error according to an output result of the encoder and the risk expectation value;

[0013] The detection model is adjusted according to the prediction error, and the training of the chip detection model is completed when the prediction error meets a preset condition.

[0014] Optionally, the test result includes a risk expectation value, and determining whether the chip to be tested is a defective product according to the test result includes:

[0015] Determine whether the risk expectation value is greater than a preset threshold;

[0016] If the expected risk value is greater than the preset threshold, the chip to be tested is determined to be a defective product.

[0017] Optionally, the method further comprises:

[0018] If the expected risk value of the defective chip is within the first interval, the defective chip is determined to be at a low risk level, and the defective chip is stored in the first database;

[0019] If the expected risk value of the defective chip is in the second interval, the defective chip is determined to be of medium risk level, and the defective chip is stored in the second database;

[0020] If the expected risk value of the defective chip is in the third interval, the defective chip is determined to be at a high risk level, and the defective chip is stored in the third database.

[0021] Optionally, the determining the test information of other chips within a preset window around the chip to be tested includes:

[0022] Performing weighted calculation on the number of defective products within a preset distance from any chip among the other chips to obtain a weighted value of the any chip;

[0023] Determine a detection value of any chip according to the weighted value of any chip; the detection value includes a value corresponding to a good chip and a value corresponding to a bad chip;

[0024] According to the detection value of any one chip, the detection values ​​of other chips within a preset window around the chip to be detected are determined.

[0025] Optionally, the acquiring test information of other chips within a preset window around the chip to be detected includes:

[0026] Obtaining a first detection result of a chip in a preset window around the chip to be detected, wherein the first detection result is obtained by performing electrical detection on the chip in the preset window around the chip to be detected;

[0027] Obtaining a second detection result of the chip in the preset window around the chip to be detected, wherein the second detection result is obtained by optically detecting the chip in the preset window around the chip to be detected;

[0028] Obtaining a third detection result of the chip in the preset window around the chip to be detected, wherein the third detection result is obtained by performing a physical structure detection on the chip in the preset window around the chip to be detected;

[0029] The test information of the other chips is determined according to the first test result, the second test result and the third test result.

[0030] Optionally, the determining the corresponding input vector of the chip to be detected according to the test information and position information of the other chips includes:

[0031] Determine a first vector according to the test information of the other chips;

[0032] Determine a second vector according to the position information of the other chips;

[0033] An input vector corresponding to the chip to be detected is determined according to the first vector and the second vector.

[0034] The present invention also discloses a chip screening device, comprising:

[0035] A first determination module is used to determine the test information and position information of the chip to be detected in the wafer and other chips in a preset window around the chip to be detected;

[0036] A second determination module, used to determine the input vector corresponding to the chip to be detected according to the test information and position information of the other chips;

[0037] An input module, used to input the input vector corresponding to the chip to be detected into the chip detection model to obtain a detection result;

[0038] A third determination module is used to determine whether the chip to be detected is a defective product according to the detection result;

[0039] The output module is used to output a warning message when the chip to be detected is a defective product.

[0040] Optionally, the chip detection model is trained in the following manner:

[0041] Acquire sample data, wherein the sample data includes input vectors of a plurality of sample chips in a sample wafer and risk expectation values ​​corresponding to the input vectors of the plurality of sample chips;

[0042] Using the input vectors of the plurality of sample chips as inputs of an encoder of the chip detection model, extracting hidden features of the input vectors through the encoder, and predicting output results based on the hidden features of the input vectors through an output layer of the encoder;

[0043] Determining a prediction error according to an output result of the encoder and the risk expectation value;

[0044] The detection model is adjusted according to the prediction error, and the training of the chip detection model is completed when the prediction error meets a preset condition.

[0045] Optionally, the detection result includes a risk expectation value, and the third determination module includes:

[0046] A judgment submodule is used to judge whether the risk expectation value is greater than a preset threshold;

[0047] The first determination submodule is used to determine that the chip to be detected is a defective product if the expected risk value is greater than the preset threshold.

[0048] Optionally, it also includes:

[0049] A first storage module, configured to determine that the defective chip is at a low risk level if the expected risk value of the defective chip is within a first interval, and store the defective chip in a first database;

[0050] A second storage module, configured to determine that the defective chip is of a medium risk level if the expected risk value of the defective chip is within a second interval, and store the defective chip in a second database;

[0051] The third storage module is used to determine that the defective chip is at a high risk level if the expected risk value of the defective chip is in a third interval, and store the defective chip in a third database.

[0052] Optionally, the first determining module includes:

[0053] A calculation submodule, configured to perform weighted calculation on the number of defective products within a preset distance from any chip among the other chips to obtain a weighted value of the any chip;

[0054] A second determination submodule is used to determine the detection value of any chip according to the weighted value of any chip; the detection value includes a value corresponding to a good chip and a value corresponding to a defective chip;

[0055] The third determination submodule is used to determine the detection values ​​of other chips within a preset window around the chip to be detected according to the detection value of any one chip.

[0056] Optionally, the first determining module includes:

[0057] A first acquisition submodule is used to acquire a first detection result of a chip in a preset window around the chip to be detected, wherein the first detection result is obtained by performing electrical detection on the chip in the preset window around the chip to be detected;

[0058] A second acquisition submodule is used to acquire a second detection result of the chip in the preset window around the chip to be detected, where the second detection result is obtained by optically detecting the chip in the preset window around the chip to be detected;

[0059] A third acquisition submodule is used to acquire a third detection result of the chip in the preset window around the chip to be detected, wherein the third detection result is obtained by performing a physical structure detection on the chip in the preset window around the chip to be detected;

[0060] The fourth determination submodule is used to determine the test information of the other chips according to the first detection result, the second detection result and the third detection result.

[0061] Optionally, the second determining module includes:

[0062] A sixth determination submodule, configured to determine a first vector according to the test information of the other chips;

[0063] A seventh determination submodule, configured to determine a second vector according to the position information of the other chips;

[0064] An eighth determination submodule is used to determine an input vector corresponding to the chip to be detected according to the first vector and the second vector.

[0065] The present invention also discloses an electrical device, comprising: a processor, a memory, and a computer program stored in the memory and capable of running on the processor, wherein the computer program implements the steps of the chip screening method as described above when executed by the processor.

[0066] The present invention also discloses a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the chip screening method as described above are implemented.

[0067] The present invention discloses a chip screening method, device, equipment and storage medium. The present invention can first determine the test information and position information of the chip to be detected in the wafer and other chips in a preset window around it, and then obtain the input vector corresponding to the chip to be detected, and then input it into the chip detection model to obtain the detection result, and then determine whether the chip to be detected is a defective product based on the result. If it is a defective product, a warning message is output. The present invention can effectively use the relevant information of the surrounding chips to assist in the accurate detection and screening of the chip to be detected, timely discover defective products and issue warnings, thereby ensuring the chip quality and improving the accuracy and efficiency of chip screening. BRIEF DESCRIPTION OF THE DRAWINGS

[0068] Figure 1 A flowchart of the steps of a chip screening method provided by an embodiment of the present invention is shown;

[0069] Figure 2 A flowchart showing another chip screening method provided by an embodiment of the present invention is shown;

[0070] Figure 3 A schematic diagram of a chip screening method provided by an embodiment of the present invention is shown;

[0071] Figure 4 A structural block diagram of a chip screening device provided by an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0072] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0073] One of the core concepts of the embodiments of the present invention is that the present invention can first determine the test information and position information of the chip to be detected in the wafer and other chips in a preset window around it, thereby deriving an input vector corresponding to the chip to be detected, and then input it into the chip detection model to obtain the detection result, and then determine whether the chip to be detected is a defective product based on the result. If it is a defective product, a warning message is output. The relevant information of the surrounding chips can be effectively used to assist in the accurate detection and screening of the chip to be detected, and defective products can be discovered in time and warnings can be issued, thereby ensuring chip quality and improving the accuracy and efficiency of chip screening.

[0074] like Figure 1 , shows a flow chart of the steps of a chip screening method provided by an embodiment of the present invention, the method may include the following steps:

[0075] Step 101 , determining the test information and position information of the chip to be tested in the wafer and other chips within a preset window around the chip to be tested.

[0076] In an embodiment of the present invention, the wafer is the basic material for manufacturing chips and contains many chips. To accurately screen out problematic chips, it is first necessary to clearly identify the target chip to be detected and pay attention to other chips in the preset window around it. The preset window here is a range set in advance. By determining the information of other chips within this range, in an example, the preset window is a 5*5 window, which includes 25 chips to be detected.

[0077] The test information refers to whether the other chips are defective. If the other chips are defective, it is 0, and if the other chips are good, it is 1. The position information refers to whether the other chips are within the preset range of the wafer. The preset range can be set according to user needs.

[0078] Step 102: Determine the input vector corresponding to the chip to be tested according to the test information and position information of other chips.

[0079] In an embodiment of the present invention, a specific algorithm or rule can be used to generate an input vector specifically for the chip to be detected based on the test information of other surrounding chips (such as performance indicator values, test results, etc.) and their relative position information (distance, orientation, etc.) to the chip to be detected. This input vector is essentially a digital data set that can represent the characteristics of the chip to be detected and its surrounding related conditions.

[0080] Step 103: input the input vector corresponding to the chip to be detected into the chip detection model to obtain the detection result.

[0081] In the embodiment of the present invention, the chip detection model is formed after a large amount of data training and optimization, and has the ability to analyze the input data and judge the chip quality status. The input vector corresponding to the chip to be detected generated in step 102 is input into the model. The model will process the input vector according to its internal algorithm architecture and the knowledge obtained by training, and finally output a detection result about the chip to be detected. This detection result may be a classification result (such as the category judgment of good or defective products), or it may be a judgment with a probability value (such as the probability of judging it as a defective product, etc.), or it may be a numerical value.

[0082] Step 104, determining whether the chip to be tested is defective according to the test result;

[0083] In the embodiments of the present invention, according to the detection result output from the chip detection model, if the result clearly indicates that the chip to be detected belongs to the defective product category, or the probability of judging it as a defective product reaches a preset threshold (for example, if the probability is greater than a certain percentage, it is determined as a defective product), then it can be determined that the chip to be detected is a defective product; conversely, if the result shows that it is a non-defective product or the probability of a defective product does not reach the threshold, it is considered that the chip to be detected is a non-defective product.

[0084] Step 105, when the chip to be detected is a defective product, output a warning message.

[0085] In the embodiments of the present invention, when it is determined that the chip to be detected is a defective product, a warning message can be output to the user terminal to remind the user that the chip to be detected is a defective product, so as to remind the user to perform corresponding processing on the chip to be detected. The warning message can be used to remind the user that the chip is a defective product. It should be noted that the warning message can include the following several methods: 1. Voice prompt: Through the built-in voice module, play a pre-recorded voice prompt to inform the specific warning message.

[0086] 2. Visual alarm: LED indicator: Use LED lights of different colors (such as red, yellow, green) to represent different alarm states. Display screen: Display specific alarm information on the display screen of the device, including current value, threshold, timestamp, etc. Flashlight: Install a flashlight outside or inside the device and attract attention by flashing.

[0087] 3. Text alarm: SMS notification: Send the alarm information to a preset mobile phone number through the SMS service. Email notification: Send the alarm information to a preset email address through email.

[0088] 4. Network alarm: Push notification: Push an alarm notification to the user through a mobile application or web platform. Remote monitoring system: Send the alarm information to a remote monitoring center for professional personnel to handle.

[0089] 5. Linkage alarm: Link to other devices: Link to other devices or systems, such as automatically shutting down the device, starting a standby system, etc. Link to an alarm system: Link to a security alarm system to trigger the alarm device.

[0090] There is no limitation on which specific method is used to output the warning message here.

[0091] The present invention discloses a chip screening method. The present invention can first determine the test information and position information of the chip to be detected in the wafer and other chips in a preset window around it, thereby deriving an input vector corresponding to the chip to be detected, and then inputting the input vector into a chip detection model to obtain a detection result, and then judging whether the chip to be detected is a defective product based on the result, and outputting a warning message if it is a defective product. The present invention can effectively use the relevant information of the surrounding chips to assist in the accurate detection and screening of the chip to be detected, timely discover the defective products and issue a warning, thereby ensuring the chip quality and improving the accuracy and efficiency of chip screening.

[0092] like Figure 2 , shows a flow chart of another chip screening method provided by an embodiment of the present invention, the method may include the following steps:

[0093] Step 201 : determining the test information and position information of the chip to be tested in the wafer and other chips within a preset window around the chip to be tested.

[0094] In an embodiment of the present invention, the wafer is the basic material for manufacturing chips and contains many chips. To accurately screen out problematic chips, it is first necessary to clearly identify the target chip to be detected and pay attention to other chips in the preset window around it. The preset window here is a range set in advance. By determining the information of other chips within this range, in an example, the preset window is a 5*5 window, which includes 25 chips to be detected.

[0095] The test information refers to whether other chips are defective. If other chips are defective, it is 0, and if other chips are good, it is 1. The position information refers to whether other chips are located within the preset range of the wafer. The preset range can be set according to user needs.

[0096] Step 202: Determine the corresponding input vector of the chip to be tested according to the test information and position information of other chips.

[0097] In the embodiment of the present invention, an input vector specifically for the chip to be detected is generated through a specific algorithm or rule based on the test information of other surrounding chips (such as performance indicator values, test results, etc.) and their relative position information (distance, orientation, etc.) to the chip to be detected. This input vector is essentially a digital data set that can represent the characteristics of the chip to be detected and its surrounding related conditions.

[0098] Step 203: input the input vector corresponding to the chip to be detected into the chip detection model to obtain the detection result.

[0099] In the embodiment of the present invention, the detection result is taken as an example to introduce the risk expectation value. The input vector corresponding to the chip to be detected is input into the chip detection model to obtain the corresponding risk expectation value.

[0100] Step 204, determining whether the risk expectation value is greater than a preset threshold.

[0101] In an embodiment of the present invention, after obtaining the expected risk value, it can be determined whether the expected risk value is greater than a preset threshold value. If the expected risk value is greater than the preset threshold value, it means that the chip to be tested is a defective product. If the expected risk value is less than the preset threshold value, it means that the chip to be tested is a good product.

[0102] Step 205: If the expected risk value is greater than a preset threshold, the chip to be inspected is determined to be a defective product.

[0103] Step 206: When the chip to be inspected is defective, a warning message is output.

[0104] In one example, the chip to be tested is chip 2. When the chip to be tested is a defective product, a voice warning message is output: Chip 2 is a defective product, please process it!

[0105] In one embodiment of the present invention, a chip detection model is trained in the following manner: sample data is obtained, the sample data including input vectors of multiple sample chips in a sample wafer and expected risk values ​​corresponding to the input vectors of the multiple sample chips; the input vectors of the multiple sample chips are used as inputs of an encoder of the chip detection model, hidden features of the input vectors are extracted by the encoder, and output results are predicted based on the hidden features of the input vectors by the output layer of the encoder; a prediction error is determined based on the output result of the encoder and the expected risk value; the detection model is adjusted based on the prediction error, and the training of the chip detection model is completed when the prediction error meets a preset condition.

[0106] In an embodiment of the present invention, the input vector is obtained after processing the chip and its surrounding conditions in a similar chip screening step, and can comprehensively reflect the digital representation of the characteristics of the sample chip itself and the surrounding related information; the risk expectation value corresponding to the input vectors of multiple sample chips clearly indicates the expected risk level of each sample chip based on known information.

[0107] The input vectors of multiple sample chips can be input into the encoder part of the chip detection model in sequence. The encoder is an important component module of the model, which has the ability to perform complex transformation and feature extraction on the input data.

[0108] After receiving the input vector, the encoder will perform a series of mathematical operations and processing on the input vector according to the algorithm and parameters set inside it, so as to extract the hidden features in the input vector. These hidden features are the relatively abstract feature representations of the input vector after the encoder's specific mapping and transformation, which can better reflect the essential characteristics of the sample chip. For example, it may fuse and refine the information about the chip position, surrounding chip test data and other aspects in the original input vector to obtain some feature combinations that can more accurately characterize the potential risks of the chip.

[0109] After extracting the hidden layer features, the output layer of the encoder will perform further calculations based on these hidden layer features to predict an output result about the sample chip. This output result is a preliminary judgment on the risk status of the sample chip and is presented in a numerical form.

[0110] The output result predicted by the encoder is compared with the expected risk value corresponding to the input vector of the sample chip obtained previously. The difference between the two is calculated through a specific error calculation method (such as mean square error, cross entropy error, etc., depending on the form of the output result and the setting of the model). This difference is the prediction error. The prediction error can intuitively reflect the accuracy of the model's encoder in predicting the risk status of the sample chip in the current state.

[0111] A condition on the prediction error can be set in advance, such as requiring that the average value of the prediction error be less than a certain specific value, or requiring that the prediction error be stable within a small range after several consecutive iterations, etc. After each calculation of the prediction error, it will be judged according to this preset condition. If the prediction error meets the preset condition, it means that the prediction ability of the model has met the expected requirements, and the training of the chip detection model can be considered completed at this time; conversely, if the prediction error does not meet the preset condition, it is necessary to continue to adjust the model, usually by adjusting the model parameters through back propagation algorithms and other methods, and then repeat the above steps of inputting sample data, extracting hidden layer features, predicting output results, and determining prediction errors until the prediction error meets the preset condition.

[0112] In one embodiment of the present invention, the method also includes: if the expected risk value of the defective chip is in the first interval, the defective chip is determined to be at a low risk level, and the defective chip is stored in the first database; if the expected risk value of the defective chip is in the second interval, the defective chip is determined to be at a medium risk level, and the defective chip is stored in the second database; if the expected risk value of the defective chip is in the third interval, the defective chip is determined to be at a high risk level, and the defective chip is stored in the third database.

[0113] In the embodiments of the present invention, the chip to be detected can be stored in different storage spaces according to the magnitude of its risk expected value, where the magnitude of the first interval value is greater than that of the second interval value, and the magnitude of the second interval value is greater than that of the third interval value.

[0114] In one example, the first interval is A1 < x < A2, the second interval is A2 < x < A3, and the third interval is x > A3, where x refers to the risk expected value of the chip to be detected. If the measured risk expected value is greater than A2 and less than A3, it can be stored in the second database. In the present invention, the defective product data of different risk levels are stored in different databases, which is convenient for traceability and analysis, thereby improving the resource utilization efficiency.

[0115] As Figure 3 , a schematic flowchart of a chip screening method provided by an embodiment of the present invention is shown. After determining the input vector of the chip to be detected, it can be input into the chip detection model, and then the risk value is obtained. Then, it is judged whether the risk value is greater than the threshold. If it is greater, the chip to be detected is determined to be a defective product; otherwise, it is a qualified product.

[0116] In an embodiment of the present invention, the test information of other chips within a preset window around the chip to be detected is determined, including: calculating the weighted value of any chip among other chips based on the number of defective products within a preset distance; determining the detection value of any chip according to the weighted value of any chip; the detection value includes the value corresponding to a qualified chip and the value corresponding to a defective chip; according to the detection value of any chip, the detection values of other chips within a preset window around the chip to be detected are determined.

[0117] In the embodiments of the present invention, the preset distance can be a circular area with a radius of a specific length (such as 5 millimeters) centered on the chip. The closer the defective product is to the chip, the higher the weight is given when calculating the weighted value. As the distance between the defective product and the chip increases, the weight gradually decreases.

[0118] After obtaining the weighted value of any chip, the detection value of the chip is determined according to the pre-set rules. The detection value is clearly divided into the values corresponding to two situations. One is the specific value set for a qualified chip, and the other is the specific value set for a defective chip. For example, it is set that when the weighted value is less than 0.3, the detection value of the chip is determined to be the value representing a qualified chip, such as 0; and when the weighted value is greater than or equal to 0.3, the detection value of the chip is determined to be the value representing a defective chip, such as 1. The specific threshold and the corresponding qualified and defective product values can be flexibly adjusted according to the actual situation and requirements.

[0119] For each other chip in the preset window, the above steps of first calculating the weighted value and then determining the detection value are followed in sequence. After completing this series of calculations for all other chips, the detection values ​​of these chips can be summarized and sorted to determine the overall detection value situation of other chips in the preset window around the chip to be detected.

[0120] In one embodiment of the present invention, the test information of other chips in a preset window around the chip to be detected is determined, including: obtaining a first detection result of the chip in the preset window around the chip to be detected, the first detection result is obtained by electrical detection of the chip in the preset window around the chip to be detected; obtaining a second detection result of the chip in the preset window around the chip to be detected, the second detection result is obtained by optical detection of the chip in the preset window around the chip to be detected; obtaining a third detection result of the chip in the preset window around the chip to be detected, the third detection result is obtained by physical structure detection of the chip in the preset window around the chip to be detected, and determining the test information of other chips based on the first detection result, the second detection result and the third detection result.

[0121] In an embodiment of the present invention, an electrical detection device (such as a probe station, a test instrument, etc.) can be used to perform an electrical test on the chip in a preset window around the chip to be detected to obtain a first test result, and the first test result includes the electrical characteristic data of the chip. An optical detection device (such as a microscope, an optical imaging system, etc.) can be used to perform an optical test on the chip in the preset window around the chip to be detected to obtain a second test result, and the second test result includes the surface image and optical characteristic data of the chip; a physical structure detection device (such as a scanning electron microscope, an X-ray diffractometer, etc.) can be used to perform a physical structure test on the chip in the preset window around the chip to be detected to obtain a third test result, and the third test result includes the physical size, shape and material characteristic data of the chip.

[0122] Finally, data fusion technology (such as weighted averaging, principal component analysis, etc.) can be used to fuse different types of detection results into a comprehensive detection information. The present invention obtains the electrical detection results, optical detection results and physical structure detection results of the chips in the preset window around the chip to be detected, and determines the comprehensive test information of other chips based on these results. The system can fully understand the status and characteristics of these chips.

[0123] In one embodiment of the present invention, the detection model is one of a multi-layer perceptron, a convolutional neural network, and an autoencoder.

[0124] In the embodiment of the present invention, the multilayer perceptron is a feedforward neural network, which is composed of an input layer, a plurality of hidden layers and an output layer. The input layer receives external data, the hidden layer performs multiple nonlinear transformations on the data, and the output layer gives the final prediction result or classification result.

[0125] CNN is mainly composed of convolutional layers, pooling layers, and fully connected layers. The convolutional layer performs convolution operations by sliding the convolution kernel on the data (such as image data) to automatically extract local features in the data; the pooling layer is used to compress the features, reducing the amount of data while retaining the key features; the fully connected layer is usually used at the end to integrate the previously extracted features and make the final judgment, such as classification or regression results.

[0126] An autoencoder usually consists of two parts: an encoder and a decoder. The encoder compresses the input data, extracts its key features, and obtains a low-dimensional representation, namely the hidden layer representation; the decoder restores the hidden layer representation to output data similar to the original input data. Its goal is to make the output as close to the input as possible, which is achieved by continuously adjusting the parameters of the encoder and decoder.

[0127] In one embodiment of the present invention, the corresponding input vector of the chip to be detected is determined based on the test information and position information of other chips, including: determining a first vector based on the test information of other chips; determining a second vector based on the position information of other chips; and determining the input vector corresponding to the chip to be detected based on the first vector and the second vector.

[0128] In an embodiment of the present invention, the test information of other chips covers various performance indicators, functional characteristics, and test responses under different conditions, etc. Key features related to the input can be extracted from the complex test information, and the extracted key features can be sorted and quantified and expressed in the form of a vector. The dimension and value of the vector depend on the specific chip type and key features. For example, for a simple audio processing chip, if the key features are the frequency, amplitude, and phase of the input audio signal, then the first vector can be expressed as [frequency value, amplitude value, phase value]. This first vector represents a general input feature pattern summarized based on the test information of other chips.

[0129] The position information of other chips on the circuit board relative to the chip to be tested can be obtained, including physical distance, location, and connection lines. For example, through the layout diagram and schematic diagram of the circuit board, it is possible to determine which chips are directly connected to the chip to be tested, which are in the same functional module, and which are far apart but may have indirect connections.

[0130] The second vector can be constructed based on the positional relationship between each other chip and the chip to be detected. For example, if there are three chips connected to the chip to be detected and the bandwidths of the connected signal lines are different, the second vector can be expressed as [bandwidth weight of connected chip 1, bandwidth weight of connected chip 2, bandwidth weight of connected chip 3] to reflect the potential impact of different connections on the input.

[0131] Finally, the first vector and the second vector are fused, taking into account the general input feature pattern based on the test information and the input influencing factors based on the position information. The fusion method can be weighted summation, matrix operation or logical combination according to the specific situation. For example, if the first vector represents the basic parameters of the input signal and the second vector represents the weights of different signal sources, then the final input vector can be obtained by weighted summation. Assume that the first vector is [a1, a2, a3] and the second vector is [w1, w2, w3], the final input vector is [a1w1, a2w2, a3*w3].

[0132] The present invention discloses a chip screening method. The present invention can first determine the test information and position information of the chip to be detected in the wafer and other chips in a preset window around it, thereby deriving an input vector corresponding to the chip to be detected, and then inputting the input vector into a chip detection model to obtain a detection result, and then judging whether the chip to be detected is a defective product based on the result, and outputting a warning message if it is a defective product. The present invention can effectively use the relevant information of the surrounding chips to assist in the accurate detection and screening of the chip to be detected, timely discover the defective products and issue a warning, thereby ensuring the chip quality and improving the accuracy and efficiency of chip screening.

[0133] It should be noted that, for the sake of simplicity, the method embodiments are described as a series of action combinations, but those skilled in the art should be aware that the embodiments of the present invention are not limited by the order of the actions described, because according to the embodiments of the present invention, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions involved are not necessarily required by the embodiments of the present invention.

[0134] like Figure 4 , shows a structural block diagram of a chip screening device provided by an embodiment of the present invention, including:

[0135] The first determination module 301 is used to determine the test information and position information of the chip to be detected in the wafer and other chips within a preset window around the chip to be detected;

[0136] A second determination module 302, configured to determine an input vector corresponding to the chip to be detected according to the test information and position information of the other chips;

[0137] An input module 303 is used to input the input vector corresponding to the chip to be detected into the chip detection model to obtain a detection result;

[0138] A third determination module 304 is used to determine whether the chip to be detected is a defective product according to the detection result;

[0139] The output module 305 is used to output a warning message when the chip to be inspected is a defective product.

[0140] The present invention discloses a chip screening device. The present invention can first determine the test information and position information of the chip to be detected in the wafer and other chips in a preset window around it, thereby deriving an input vector corresponding to the chip to be detected, and then inputting the input vector into a chip detection model to obtain a detection result, and then judging whether the chip to be detected is a defective product based on the result, and outputting a warning message if it is a defective product. The present invention can effectively use the relevant information of the surrounding chips to assist in the accurate detection and screening of the chip to be detected, timely discover defective products and issue a warning, thereby ensuring the chip quality and improving the accuracy and efficiency of chip screening.

[0141] In one embodiment of the present invention, the chip detection model is trained in the following manner:

[0142] Acquire sample data, where the sample data includes input vectors of multiple sample chips in a sample wafer and risk expectation values ​​corresponding to the input vectors of the multiple sample chips;

[0143] The input vectors of the multiple sample chips are used as the input of the encoder of the chip detection model, the hidden features of the input vectors are extracted by the encoder, and the output result is predicted based on the hidden features of the input vectors by the output layer of the encoder;

[0144] Determine the prediction error based on the output of the encoder and the risk expectation value;

[0145] The detection model is adjusted according to the prediction error, and the training of the chip detection model is completed when the prediction error meets the preset conditions.

[0146] In an embodiment of the present invention, the detection result includes a risk expectation value, and the third determination module includes:

[0147] A judgment submodule is used to judge whether the expected risk value is greater than a preset threshold;

[0148] The first determination submodule is used to determine that the chip to be detected is a defective product if the expected risk value is greater than a preset threshold.

[0149] In one embodiment of the present invention, it also includes:

[0150] A first storage module, configured to determine that the defective chip is at a low risk level if the expected risk value of the defective chip is within a first interval, and store the defective chip in a first database;

[0151] A second storage module is used to determine that the defective chip is of medium risk level if the expected risk value of the defective chip is within the second interval, and store the defective chip in the second database;

[0152] The third storage module is used to determine that the defective chip is at a high risk level if the expected risk value of the defective chip is within a third interval, and store the defective chip in a third database.

[0153] In one embodiment of the present invention, the first determining module includes:

[0154] A calculation submodule, used for performing weighted calculation on the number of defective products within a preset distance from any chip among other chips to obtain a weighted value of any chip;

[0155] A second determination submodule is used to determine the detection value of any chip according to the weighted value of any chip; the detection value includes a value corresponding to a good chip and a value corresponding to a bad chip;

[0156] The third determination submodule is used to determine the detection values ​​of other chips within a preset window around the chip to be detected according to the detection value of any chip.

[0157] In one embodiment of the present invention, the first determining module includes:

[0158] A first acquisition submodule is used to acquire a first detection result of a chip in a preset window around the chip to be detected, where the first detection result is obtained by performing electrical detection on the chip in the preset window around the chip to be detected;

[0159] A second acquisition submodule is used to acquire a second detection result of the chip in the preset window around the chip to be detected, where the second detection result is obtained by optically detecting the chip in the preset window around the chip to be detected;

[0160] A third acquisition submodule is used to acquire a third detection result of the chip in the preset window around the chip to be detected, where the third detection result is obtained by performing a physical structure detection on the chip in the preset window around the chip to be detected;

[0161] The fourth determination submodule is used to determine the detection information of other chips according to the first detection result, the second detection result and the third detection result.

[0162] In one embodiment of the present invention, the detection model is one of a multi-layer perceptron, a convolutional neural network, and an autoencoder.

[0163] The second determining module includes:

[0164] A sixth determination submodule, configured to determine a first vector according to the test information of the other chips;

[0165] A seventh determination submodule, configured to determine a second vector according to the position information of the other chips;

[0166] An eighth determination submodule is used to determine an input vector corresponding to the chip to be detected according to the first vector and the second vector.

[0167] The present invention discloses a chip screening device. The present invention can first determine the test information and position information of the chip to be detected in the wafer and other chips in a preset window around it, thereby deriving an input vector corresponding to the chip to be detected, and then inputting the input vector into a chip detection model to obtain a detection result, and then judging whether the chip to be detected is a defective product based on the result, and outputting a warning message if it is a defective product. The present invention can effectively use the relevant information of the surrounding chips to assist in the accurate detection and screening of the chip to be detected, timely discover defective products and issue a warning, thereby ensuring the chip quality and improving the accuracy and efficiency of chip screening.

[0168] As for the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0169] The embodiment of the present invention further provides an electrical device, including:

[0170] It includes a processor, a memory, and a computer program stored in the memory and capable of running on the processor. When the computer program is executed by the processor, the various processes of the above-mentioned chip screening method embodiment are implemented, and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.

[0171] An embodiment of the present invention further provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the various processes of the above-mentioned chip screening method embodiment are implemented, and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.

[0172] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0173] It will be appreciated by those skilled in the art that the embodiments of the present invention may be provided as methods, devices, or computer program products. Therefore, the embodiments of the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the embodiments of the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program codes.

[0174] The embodiments of the present invention are described with reference to the flowcharts and / or block diagrams of the methods, terminal devices (systems), and computer program products according to the embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of the processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing terminal device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing terminal device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0175] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing terminal device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce a manufactured product including an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0176] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal device so that a series of operating steps are executed on the computer or other programmable terminal device to produce a computer-implemented process, thereby providing instructions for executing on the computer or other programmable terminal device to implement the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0177] Although the preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present invention.

[0178] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprises" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or terminal device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or terminal device. In the absence of further restrictions, the elements defined by the sentence "including one..." do not exclude the existence of other identical elements in the process, method, article or terminal device including the elements.

[0179] The above is a detailed introduction to a chip screening method, device, electronic device and storage medium provided by the present invention. Specific examples are used in this article to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea; at the same time, for general technical personnel in this field, according to the idea of ​​the present invention, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.

Claims

1. A chip screening method, characterized in that: include: Determine the test information and position information of the chip to be tested in the wafer and other chips within a preset window around the chip to be tested; Determine the input vector corresponding to the chip to be tested according to the test information and position information of the other chips; Inputting the input vector corresponding to the chip to be detected into the chip detection model to obtain a detection result; According to the detection result, determining whether the chip to be detected is a defective product; When the chip to be detected is a defective product, a warning message is output.

2. The method according to claim 1, characterized in that The chip detection model is trained in the following way: Acquire sample data, wherein the sample data includes input vectors of a plurality of sample chips in a sample wafer and risk expectation values ​​corresponding to the input vectors of the plurality of sample chips; Using the input vectors of the plurality of sample chips as inputs of an encoder of the chip detection model, extracting hidden features of the input vectors through the encoder, and predicting output results based on the hidden features of the input vectors through an output layer of the encoder; Determining a prediction error according to an output result of the encoder and the risk expectation value; The detection model is adjusted according to the prediction error, and the training of the chip detection model is completed when the prediction error meets a preset condition.

3. The method according to claim 1, characterized in that The test result includes a risk expectation value, and determining whether the chip to be tested is a defective product according to the test result includes: Determining whether the risk expectation value is greater than a preset threshold; If the expected risk value is greater than the preset threshold, the chip to be tested is determined to be a defective product.

4. The method according to claim 3, characterized in that The method further comprises: If the expected risk value of the defective chip is within the first interval, the defective chip is determined to be at a low risk level, and the defective chip is stored in the first database; If the expected risk value of the defective chip is within the second interval, the defective chip is determined to be of medium risk level, and the defective chip is stored in the second database; If the expected risk value of the defective chip is in the third interval, the defective chip is determined to be at a high risk level, and the defective chip is stored in the third database.

5. The method according to claim 1, characterized in that The step of determining the test information of other chips within a preset window around the chip to be tested includes: Performing weighted calculation on the number of defective products within a preset distance from any chip among the other chips to obtain a weighted value of the any chip; Determine a detection value of any chip according to the weighted value of any chip; the detection value includes a value corresponding to a good chip and a value corresponding to a bad chip; According to the detection value of any one chip, the detection values ​​of other chips within a preset window around the chip to be detected are determined.

6. The method according to claim 1, characterized in that The step of determining the test information of other chips within a preset window around the chip to be tested includes: Obtaining a first detection result of a chip in a preset window around the chip to be detected, wherein the first detection result is obtained by performing electrical detection on the chip in the preset window around the chip to be detected; Obtaining a second detection result of the chip in the preset window around the chip to be detected, wherein the second detection result is obtained by optically detecting the chip in the preset window around the chip to be detected; Obtaining a third detection result of the chip in the preset window around the chip to be detected, wherein the third detection result is obtained by performing a physical structure detection on the chip in the preset window around the chip to be detected; The test information of the other chips is determined according to the first test result, the second test result and the third test result.

7. The method according to claim 1, characterized in that The step of determining the corresponding input vector of the chip to be detected according to the test information and position information of the other chips includes: Determine a first vector according to the test information of the other chips; Determine a second vector according to the position information of the other chips; An input vector corresponding to the chip to be detected is determined according to the first vector and the second vector.

8. A chip screening device, characterized in that: include: A first determination module is used to determine the test information and position information of the chip to be detected in the wafer and other chips in a preset window around the chip to be detected; A second determination module, used to determine the input vector corresponding to the chip to be detected according to the test information and position information of the other chips; An input module, used to input the input vector corresponding to the chip to be detected into the chip detection model to obtain a detection result; A third determination module is used to determine whether the chip to be detected is a defective product according to the detection result; The output module is used to output a warning message when the chip to be detected is a defective product.

9. An electronic device, characterized in that: It is characterized in that it includes: a processor, a memory, and a computer program stored in the memory and capable of running on the processor, and when the computer program is executed by the processor, the steps of the chip screening method as described in any one of claims 1 to 7 are implemented.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the chip screening method according to any one of claims 1 to 7 are implemented.

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