Packaging module and manufacturing method thereof, power supply module and electronic equipment
By adopting a combined design of the substrate layer, wiring layer and magnetic energy storage layer in the packaging module, the problem of difficult to miniaturize the size of the packaging module and poor heat dissipation effect in the prior art is solved, and the effect of high-density miniaturization, high efficiency and strong heat dissipation ability is achieved.
Patent Information
- Application Number
- CN202311579641.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-11-22
- Publication Date
- 2025-05-23
Smart Images

Figure CN120033159A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of chip packaging technology, and specifically to a packaging module and a manufacturing method thereof, a power supply module, and an electronic device. Background Art
[0002] Semiconductor devices are widely used in electronic devices such as mobile phones and smart watches, and are the main electronic components of electronic devices. With the continuous advancement of technology, the size of electronic devices is getting smaller and smaller, and the size of the packaging module has become the main factor restricting the miniaturization of electronic devices.
[0003] In the chip packaging process, the size of semiconductor devices is getting smaller and smaller, and the density of electronic components inside semiconductor devices is getting higher and higher. The size of the packaging module is usually reduced by component integration, which has led to the development of a system-in-package (SiP) module that packages multiple devices as a whole. The existing system-in-package module integrates multiple devices and chips on a substrate, which can achieve a high-density distribution of semiconductor devices and effectively reduce the size of the module. However, due to the large number of chips required in electronic devices and the large number of packaging modules, the number of substrates carrying chips is large, and further miniaturization cannot be achieved. Moreover, the high-density distribution of devices will cause the thermal density of the module to increase exponentially, resulting in poor heat dissipation of the module, which is difficult to meet the needs. Summary of the invention
[0004] In view of this, the present application provides a packaging module and a manufacturing method thereof, a power module, and an electronic device, which can improve the size of the packaging module and enhance the heat dissipation effect and efficiency of the packaging module.
[0005] In a first aspect, an embodiment of the present application provides a packaging module, including:
[0006] A substrate layer, the substrate layer is made of a semiconductor material, the substrate layer has a hole structure, and the substrate layer includes a first surface and a second surface arranged opposite to each other,
[0007] a wiring layer, the wiring layer being located on the second surface of the substrate layer and electrically connected to the substrate layer;
[0008] A magnetic energy storage layer has an inductance function and comprises a metal wrapping layer and a connector. The metal wrapping layer is located on the first surface of the substrate layer, and the connector is embedded in the hole structure and electrically connected to the wiring layer.
[0009] In the above solution, the encapsulation module of the present application includes a substrate layer, a wiring layer, and a magnetic energy storage layer. The magnetic energy storage layer is used to implement the inductance function, and the substrate layer made of semiconductor material is used to implement the chip function. Among them, the magnetic energy storage layer includes a metal wrapping layer and a connector. The metal wrapping layer is located on the first surface of the substrate layer. Due to the small thermal resistance of the metal material, the metal wrapping layer has excellent heat conduction ability, enabling the heat generated by the substrate layer to be quickly dissipated through the metal wrapping layer, improving the heat dissipation performance of the encapsulation module. The substrate layer and the connector are electrically connected through the wiring layer to realize the connection between the inductor and the chip, and the connection between the substrate layer and the wiring layer is used to realize the signal connection between the substrate layer and the outside. The magnetic energy storage layer and the substrate layer of the present application are in direct contact, and there are no other components between the magnetic energy storage layer and the substrate layer, which can effectively shorten the wiring path of the module, thereby reducing the power path of the module, reducing the line loss of the module, and improving the use efficiency of the module. In addition, the encapsulation module of the present application does not require a traditional substrate for carrying the chip. While directly realizing the chip function through the substrate layer itself, it realizes the functions of carrying, arranging circuits, and electrical connection between the substrate layer and other components in the encapsulation module, which can maximize the volume ratio of the electronic device in the module and is beneficial to the miniaturization of the encapsulation module.
[0010] In some possible implementation manners, a magnetic material is disposed inside the metal wrapping layer.
[0011] In the above solution, disposing a magnetic material inside the metal wrapping layer can strengthen the magnetic induction intensity of the magnetic energy storage layer, strengthen the inductance value, and improve the quality of the inductor.
[0012] In some possible implementation manners, the metal wrapping layer and the connector are of an integrally formed structure.
[0013] In the above solution, the metal wrapping layer and the connector are integrally formed, which is beneficial to improving the current-carrying capacity of the magnetic energy storage layer, enabling the module to continuously work for a long time in a high-current environment and having a low power. Moreover, the integrally formed structure has the characteristics of small volume and high strength, can effectively save the module space, and is beneficial to the miniaturization of the module.
[0014] In some possible implementation manners, the metal wrapping layer is a closed cavity structure.
[0015] In the above solution, a magnetic material is disposed inside the metal coating layer of the present application, that is, the magnetic material is disposed inside the closed cavity structure, so that the cross-sectional area of the metal coating layer is relatively large, and the area of the current flowing through the metal coating layer is relatively large, thereby reducing the circuit impedance of the magnetic energy storage layer and reducing the loss of the magnetic energy storage layer.
[0016] In some possible implementation manners, the morphology of the metal wrapping layer includes at least one of a columnar shape, a conical shape, a spherical shape, and a frustum shape.
[0017] In the above scheme, the cross-sectional area of the metal wrapping layer of the above morphology is relatively large, which is beneficial to reduce the circuit impedance of the magnetic energy storage layer and reduce the loss of the magnetic energy storage layer.
[0018] In some possible implementations, the pore size of the pore structure is greater than or equal to 0.02 mm.
[0019] In the above scheme, the pore size of the hole structure can be 0.02mm, 0.05mm, 0.08mm, 0.1mm, 0.15mm, 0.2mm, 0.3mm, 0.4mm or 0.5mm, etc. The hole structure of the present application is used to connect the magnetic energy storage layer and the wiring layer. A hole structure with a smaller pore size can be set, which can achieve electrical connection between the connector and the wiring layer while minimizing the impact of the hole structure on the substrate layer.
[0020] In some possible implementations, the semiconductor material includes at least one of silicon, silicon dioxide, silicon nitride and silicon carbide.
[0021] In the above scheme, the semiconductor material is stable in nature, easy to purify, and has huge energy storage capacity. It can be used to make a substrate layer, and circuits can be made on the surface of the material and inside it to embed electronic components (such as transistors, capacitors, logic gates, etc.) to realize the various functions of the chip.
[0022] In some possible implementations, the material of the metal encapsulation layer includes at least one of copper, gold, and aluminum.
[0023] In the above scheme, the electrical conductivity and thermal conductivity of the material are good, which can not only improve the inductance of the magnetic energy storage layer as an inductor, but also quickly conduct away the heat generated by the substrate layer.
[0024] In some possible implementations, the thickness of the metal wrapping layer is greater than or equal to 0.02 mm.
[0025] In the above scheme, the thickness of the metal coating layer can specifically be 0.02mm, 0.05mm, 0.08mm, 0.1mm, 0.15mm, 0.2mm, 0.3mm, 0.4mm or 0.5mm, etc. The thickness of the metal coating layer of the present application can be adjusted in a large range and can achieve a smaller thickness. Compared with the chip in the prior art, the thickness of the metal coating layer of the present application is smaller, which is conducive to the miniaturization of the packaging module. The thickness of the metal coating layer of the present application can be set according to the requirement of sensitivity.
[0026] In some possible implementations, the thickness of the substrate layer is greater than or equal to 0.05 mm.
[0027] In the above scheme, the thickness of the substrate layer can specifically be 0.05mm, 0.08mm, 0.1mm, 0.15mm, 0.2mm, 0.3mm, 0.4mm or 0.5mm, etc. The thickness adjustment range of the substrate layer of the present application is larger, and a smaller thickness can be achieved. Compared with the chip in the prior art, the thickness of the substrate layer of the present application is smaller, which is conducive to the miniaturization of the packaging module. The thickness of the substrate layer of the present application can be set according to the actual chip function requirements.
[0028] In some possible embodiments, the connector includes a first sub-connector and a second sub-connector, the first sub-connector has a positive port, the second sub-connector has a negative port, the hole structure includes a first through hole and a second through hole, the first sub-connector is embedded in the first through hole and electrically connected to the wiring layer, and the second sub-connector is embedded in the second through hole and electrically connected to the wiring layer.
[0029] In the above scheme, the present application connects the substrate layer and the magnetic energy storage layer according to circuit rules by setting a first sub-connector, a second sub-connector, a first through hole and a second through hole, thereby realizing the filtering, noise reduction, and current and voltage stabilization effects of the magnetic energy storage layer on the chip.
[0030] In some possible implementations, a circuit layer is provided inside the substrate layer.
[0031] In the above scheme, a circuit layer is set inside the substrate layer. The circuit layer is the circuit component layer inside the substrate layer, which mainly includes transistors (transistors), storage units, diodes, resistors, wires, pins, etc., which are used to realize chip functions.
[0032] In a second aspect, an embodiment of the present application provides a method for manufacturing a packaging module, comprising the following steps:
[0033] Manufacturing a substrate layer, and opening a hole structure in the substrate layer, wherein the substrate layer includes a first surface and a second surface arranged opposite to each other;
[0034] Manufacturing a substrate layer, wherein the substrate layer is made of a semiconductor material, a hole structure is opened on the substrate layer, and the substrate layer includes a first surface and a second surface that are oppositely arranged;
[0035] A magnetic energy storage layer is fabricated on the first surface of the substrate layer, wherein the magnetic energy storage layer has an inductance function and comprises a connected metal wrapping layer and a connector, wherein the metal wrapping layer is located on the first surface of the substrate layer, and the connector is embedded in the hole structure;
[0036] A wiring layer is manufactured on the second surface of the substrate layer, and the wiring layer is electrically connected to the connecting body.
[0037] In the above scheme, the present application directly manufactures a magnetic energy storage layer on the substrate layer, and the magnetic energy storage layer includes a connected metal wrapping layer and a connector. The metal wrapping layer has excellent thermal conductivity, so that the heat generated by the substrate layer can be quickly extracted through the metal wrapping layer, thereby improving the heat dissipation effect of the package module. The connector is embedded in the hole structure and electrically connected to the wiring layer, which can effectively shorten the wiring path of the module and reduce the power path of the module, thereby reducing the line loss of the module and improving the use efficiency of the module. In addition, the magnetic energy storage layer and the substrate layer of the present application are directly connected as the main structure of the module, which can maximize the volume share of electronic devices in the module and realize the miniaturization of the package module.
[0038] In some feasible implementations, the method for making the magnetic energy storage layer includes:
[0039] Filling the hole structure with a first metal material to form a connector, and forming a cavity with an opening on the first surface of the substrate layer;
[0040] Filling the cavity with magnetic material;
[0041] The cavity is sealed with a second metal material.
[0042] In the above scheme, the present application prepares the magnetic energy storage layer through a segmented preparation process, first preparing a cavity with an opening, then filling the cavity with magnetic material, and finally closing the cavity to form an inductor. The closed cavity can fully wrap the magnetic material, which can enhance the magnetic induction strength of the magnetic core, enhance the inductance, and improve the quality of the inductor.
[0043] In some feasible implementations, the magnetic material includes magnetic fluid and / or magnetic powder.
[0044] In the above scheme, the magnetic fluid is a stable colloidal liquid mixed with magnetic solid particles with a diameter of nanometers (less than 10 nanometers), a base carrier liquid and a surfactant. It has both the fluidity of a liquid and the magnetism of a solid magnetic material. It has no magnetic attraction in the crystalline state, but exhibits magnetism when an external magnetic field is applied. This is conducive to the filling of magnetic materials in the cavity, ensuring full contact between the magnetic fluid and the cavity, and ensuring the magnetism required by the inductor in the working state. Magnetic powder is a powdered material. Commonly used magnetic powders include at least one of iron powder core, Permalloy powder and Sendust powder. Magnetic powder has low magnetic permeability and constant magnetic permeability characteristics, and the powder size is small, and the skin phenomenon basically does not occur. The change of magnetic permeability with frequency is relatively stable, which is conducive to improving the stability of the inductance of the magnetic energy storage layer.
[0045] In a third aspect, an embodiment of the present application further provides a power supply module, including:
[0046] A circuit board layer, wherein the circuit board layer has a third through hole and a fourth through hole, and the circuit board layer includes a first surface and a second surface that are oppositely arranged;
[0047] A power supply, a power chip and a packaging module are arranged on the circuit board layer, the packaging module is electrically connected to the power supply through the third through hole, and the packaging module is electrically connected to the power chip through the fourth through hole;
[0048] A first heat sink, the first heat sink is arranged on a side of the chip away from the circuit board layer;
[0049] A second heat sink, the second heat sink is arranged on a side of the packaging module away from the circuit board layer;
[0050] The packaging module includes the packaging module described in the first aspect or the packaging module manufactured by the manufacturing method described in the second aspect.
[0051] In the above scheme, since the main part of the packaging module of the present application only includes the magnetic energy storage layer and the substrate layer, the volume of the packaging module on the circuit board layer is relatively small, the layout of the power module can be optimized, so that the first heat sink and the second heat sink can be set in the power module of the present application. The first heat sink and the second heat sink are used for two-way heat dissipation of the packaging module and the chip, thereby greatly improving the heat dissipation effect of the power module.
[0052] In a fourth aspect, an embodiment of the present application provides an electronic device, which includes the packaging module described in the first aspect, or the packaging module manufactured by the manufacturing method described in the second aspect, or the power supply module described in the third aspect.
[0053] By adopting the solution provided by the embodiment of the present application, the traditional use of a substrate made of resin or ceramic or other materials is avoided in the packaging module, and the substrate layer and the magnetic energy storage layer are directly stacked and electrically connected through the wiring layer. In this way, the substrate layer is used to realize the chip function and at the same time as a bearing platform of the packaging module, which can increase the volume share of electronic devices in the packaging module, and is conducive to the high integration and miniaturization of the packaging module; and the magnetic energy storage layer, as an excellent conductor, can quickly transfer the heat generated by the substrate layer, thereby improving the heat dissipation performance of the packaging module. At the same time, the magnetic energy storage layer and the substrate layer are electrically connected through the hole structure inside the substrate layer, which can effectively shorten the power path of the module and reduce line loss. The packaging module of the present application can simultaneously realize high-density miniaturization, high efficiency and strong heat dissipation capability of the module, and has good application prospects. BRIEF DESCRIPTION OF THE DRAWINGS
[0054] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.
[0055] Figure 1 A schematic cross-sectional structure diagram of a first packaging module of prior art 1 provided in an embodiment of the present application;
[0056] Figure 2 A schematic cross-sectional structure diagram of a second packaging module of prior art 2 provided in an embodiment of the present application;
[0057] Figure 3 A schematic diagram of the cross-sectional structure of a packaging module provided in an embodiment of the present application;
[0058] Figure 4 A schematic diagram of the cross-sectional structure of the substrate layer and the hole structure provided in the embodiment of the present application;
[0059] Figure 5 A schematic diagram of the cross-sectional structure of a magnetic energy storage layer provided in an embodiment of the present application;
[0060] Figure 6 A preparation flow chart of a packaging module is provided for an embodiment of the present application;
[0061] Figure 7 A schematic diagram of a cross-sectional structure of preparing a first conductive bump on the second surface of a substrate layer in an embodiment of the present application is provided;
[0062] Figure 8 To provide a flow chart for preparing a magnetic energy storage layer in an embodiment of the present application;
[0063] Fig. 9 A schematic diagram of a cross-sectional structure of a cavity with an opening provided in an embodiment of the present application;
[0064] Fig.10 A schematic diagram of a cross-sectional structure in which a magnetic material is filled in a cavity with an opening provided in an embodiment of the present application;
[0065] Fig.11 A schematic diagram of a cross-sectional structure after a cavity with an opening is closed provided in an embodiment of the present application;
[0066] Fig.12 A schematic diagram of the cross-sectional structure of an insulating layer covering the surface of a magnetic material provided in an embodiment of the present application;
[0067] Fig.13 A schematic diagram of the cross-sectional structure of a packaging module with an insulating layer provided in an embodiment of the present application;
[0068] Fig.14 A schematic diagram of the structure of a power supply module provided in an embodiment of the present application;
[0069] Fig.15 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application.
[0070] In the attached figure:
[0071] 100-a first packaging module;
[0072] 101- a first substrate;
[0073] 102-first chip;
[0074] 103- first inductor;
[0075] 104- a first capacitor;
[0076] 105- a first resistor;
[0077] 200- second packaging module;
[0078] 201- second substrate;
[0079] 202- second chip;
[0080] 203- second inductor;
[0081] 204- a second capacitor;
[0082] 10-Packaging module;
[0083] 1- substrate layer;
[0084] 2-Magnetic energy storage layer;
[0085] 21-Metallic sheath;
[0086] 211- cavity;
[0087] 2111-side 1;
[0088] 21111-1st paragraph;
[0089] 21112-Second paragraph;
[0090] 2112-side 2;
[0091] 2113-side 3;
[0092] 212-cover plate;
[0093] 22-connector;
[0094] 221-first connector;
[0095] 222-second connector;
[0096] 23- Magnetic materials;
[0097] 24- insulation layer;
[0098] 3-pore structure;
[0099] 31-first through hole;
[0100] 32- second through hole;
[0101] 4-wiring layer;
[0102] 5-first conductive bump;
[0103] 6- second conductive bump;
[0104] 20-circuit board layer;
[0105] 201-third through hole;
[0106] 202- fourth through hole;
[0107] 30- Power supply;
[0108] 40-power chip;
[0109] 50- a first radiator;
[0110] 60- second radiator;
[0111] 70- third capacitor;
[0112] 1000-Electronic equipment;
[0113] 1001-Shell
[0114] 1002-Motherboard. DETAILED DESCRIPTION
[0115] In order to better understand the technical solution of the present application, the embodiments of the present application are described in detail below with reference to the accompanying drawings.
[0116] It should be clear that the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.
[0117] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application. The singular forms "a", "said" and "the" used in the embodiments of the present application and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings.
[0118] It should be understood that the term "and / or" used in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.
[0119] In the related art, the layout of the package module generally uses a resin or ceramic substrate to load the chip and other passive components (capacitors, inductors and resistors, etc.). The module can be formed by burying the chip in the substrate or attaching the chip to the surface of the substrate, such as Figure 1 As shown, it is a schematic diagram of the cross-sectional structure of a first packaging module 100 provided by the prior art, wherein the first packaging module 100 includes a first substrate 101, a first chip 102 and a first capacitor 104 are buried in the first substrate 101, a first inductor 103 and a first resistor 105 are attached to the surface of the first substrate 101, and the first chip 102 and the first inductor 103 are arranged relative to each other to obtain the packaging module 100. In the above-mentioned packaging module, since the first chip 102 is arranged inside the first substrate 101, the volume proportion of the first chip 102 / first packaging module 100 is not high, which reduces the utilization rate of the first chip 102, resulting in a larger size of the module, which is not conducive to the development of module miniaturization. In addition, since the first chip 102 needs to dissipate heat toward the first substrate 101 and the first inductor 103, on the one hand, the first inductor 103 blocks the upward heat dissipation of the first chip 102, resulting in a significant decrease in the heat dissipation capacity of the module; on the other hand, since the first chip 102 is inside the first substrate 101, the temperature of the first substrate 101 is relatively high, affecting the selection of other devices on the first substrate 101. Moreover, this manufacturing process is complex and costly. Figure 2As shown, it is a schematic diagram of the cross-sectional structure of a second packaging module 200 provided by another prior art, wherein the second packaging module 200 includes a second substrate 201, a second inductor 203 is buried in the second substrate 201, a second capacitor 204 and a second chip 202 are arranged on the surface of the second substrate 201, and the second chip 202 and the second inductor 203 are arranged correspondingly to obtain the second packaging module 200. In the above packaging module, since the second inductor 203 is arranged inside the second substrate 201, on the one hand, the volume ratio of the second inductor 203 / the second packaging module 200 is not high, which reduces the utilization rate of the second inductor 203 and causes the performance of the second inductor 203 to be poor; on the other hand, the second inductor 203 needs to be placed inside the second substrate 201, and the precision requirement for the second inductor 203 is high. It is also necessary to additionally arrange auxiliary materials between the second inductor 203 and the second substrate 201 to prevent the second inductor 203 and the second substrate 201 from being delaminated, which greatly increases the difficulty of the manufacturing process. In addition, the power path between the second inductor 203 and the second chip 202 is relatively far, which greatly reduces the efficiency of the module.
[0120] In response to the above problems, an embodiment of the present application provides a packaging module 10 and a manufacturing method thereof, a power module, and an electronic device. The packaging module 10 includes: a substrate layer 1, the material of the substrate layer 1 is a semiconductor material, the substrate layer 1 has a hole structure 3, the substrate layer 1 includes a first surface a and a second surface a' arranged opposite to each other, a wiring layer 4, the wiring layer 4 is located on the second surface a' of the substrate layer 1, and the wiring layer 4 is electrically connected to the substrate layer 1; a magnetic energy storage layer 2, the magnetic energy storage layer 2 has an inductance function, the magnetic energy storage layer 2 includes a metal wrapping layer 21 and a connector 22, the metal wrapping layer 21 is located on the first surface a of the substrate layer 1, and the connector 22 is embedded in the hole structure 3 and electrically connected to the wiring layer 4. In the packaging module 10 of the present application, the magnetic energy storage layer 2 is used to realize the inductance function, and the substrate layer 1 is used to realize the chip function, wherein the magnetic energy storage layer 2 includes a metal wrapping layer 21 and a connector 22, and the metal wrapping layer 21 is located on the first surface a of the substrate layer 1, that is, the metal wrapping layer 21 is in direct contact with the substrate layer 1. Due to the low thermal resistance of the metal material, the metal wrapping layer 21 has excellent thermal conductivity, so that the heat generated by the substrate layer 1 can be quickly dissipated through the metal wrapping layer 21, thereby improving the heat dissipation performance of the packaging module 10. Moreover, there are no other components between the magnetic energy storage layer 2 and the substrate layer 1 of the present application, which can effectively shorten the wiring path of the module, thereby reducing the power path of the module, thereby reducing the line loss of the module, and improving the use efficiency of the module. In addition, the packaging module 10 of the present application does not require a substrate made of traditional resin or ceramic materials, and directly realizes the function of carrying, arranging circuits in the packaging module 10 and the electrical connection between the substrate layer 1 and other components through the substrate layer 1, which can maximize the volume proportion of electronic devices in the module, which is conducive to the miniaturization of the packaging module 10.
[0121] The packaging module 10 provided in the embodiment of the present application is applied to electronic devices, such as common terminals such as mobile phones, smart watches, and laptop computers.
[0122] The packaging module 10 provided in the embodiment of the present application is described in detail below with reference to specific drawings.
[0123] See also Figure 3 , is a schematic diagram of the structure of the packaging module 10 provided in an embodiment of the present application, including a substrate layer 1 and a magnetic energy storage layer 2, the magnetic energy storage layer 2 has an inductance function, that is, the magnetic energy storage layer 2 of the present application can be used as an inductor, the material of the substrate layer is a semiconductor material, that is, the substrate layer can be used to realize the chip function, the substrate layer 1 and the magnetic energy storage layer 2 are stacked in a vertical direction, the substrate layer 1 includes a first surface a and a second surface a' arranged oppositely, the magnetic energy storage layer 2 is arranged on the first surface a of the substrate layer 1, and the packaging module 10 of the present application does not have a traditional resin or ceramic material The substrate, the substrate layer 1 realizes the chip function and serves as a bearing platform for the packaging module 10, so that the length and width of the packaging module 10 are determined by the length and width of the substrate layer 1, and the thickness of the packaging module 10 is determined by the substrate layer 1 and the magnetic energy storage layer 2. Generally, the thickness of the substrate layer 1 is thin, at the nanometer level, so the thickness of the module is mainly determined by the thickness of the magnetic energy storage layer 2. The present application can customize the thickness of the magnetic energy storage layer 2 according to the sensitivity requirements of the packaging module 10, thereby determining the thickness of the packaging module 10, and can realize the miniaturization design of the packaging module 10 to the greatest extent. Among them, the vertical direction of the packaging module 10 is also the thickness direction of the packaging module 10, which can also refer to the thickness direction of the substrate layer 1.
[0124] The substrate layer 1 has a hole structure 3, see Figure 4 , Figure 4 It is a schematic diagram of a cross-sectional structure having a hole structure 3 on a substrate layer 1; the hole structure 3 can be a via (also called a metallized hole), and can further be a through hole. The hole structure 3 penetrates the substrate layer 1 in the thickness direction of the substrate layer 1, thereby providing a connection site for coupling the magnetic energy storage layer 2 and the substrate layer 1.
[0125] Optionally, the number of the hole structure 3 is at least one, and specifically may be one, two, three, etc., which is not limited in the present application. Figure 4 , is a schematic diagram of the structure of the package module 10 in which the hole structure 3 includes two hole structures, that is, the hole structure 3 includes a first through hole 31 and a second through hole 32, and the first through hole 31 and the second through hole 32 extend along the thickness direction of the substrate layer 1. It can be understood that during the preparation process of the package module 10, the hole structure 3 is filled with the connector 22, so that Figure 3 The hole structure 3 cannot be observed in the cross-sectional view of the packaging module 10 shown.
[0126] For some possible implementations, please continue to refer to Figure 3 A wiring layer 4 is provided on the second surface a' of the substrate layer 1, that is, the wiring layer 4 is provided on the side of the substrate layer 1 away from the magnetic energy storage layer 2, the wiring layer 4 is electrically connected to the substrate layer 1, and the wiring layer 4 is electrically connected to the magnetic energy storage layer 2, that is, the wiring layer 4 serves as the input and output port of the substrate layer 1 signal and the connecting link between the substrate layer 1 and the magnetic energy storage layer 2, and plays the role of electrical extension and interconnection.
[0127] In the present application, the substrate layer 1 includes a first surface a and a second surface a' arranged opposite to each other, the magnetic energy storage layer 2 is arranged on the first surface a of the substrate layer 1, and the wiring layer 4 is arranged on the second surface a' of the substrate layer 1. The present application does not limit the first surface a and the second surface a', but only indicates that the magnetic energy storage layer 2 and the wiring layer 4 are located on two different and opposite surfaces of the substrate layer 1.
[0128] Optional, please continue to Figure 3 The wiring layer 4 includes metal wires, which are electrically connected to the magnetic energy storage layer 2. The wiring layer 4 can be a redistribution layer (RDL), an inline redistribution layer (IRDL), etc. The material of the metal wires includes at least one of aluminum and copper. The metal wires in the wiring layer 4 can connect the physical signals of the substrate layer 1 with the magnetic energy storage layer 2 and the external circuit.
[0129] For some possible implementations, please continue to refer to Figure 3 , the substrate layer 1 has a first conductive bump 5 on one side facing the wiring layer 4, and the first conductive bump 5 is electrically connected to the wiring layer 4. The first conductive bump 5 serves as the signal output and input port of the substrate layer 1, and is connected to the magnetic energy storage layer 2 through the wiring layer 4. The first conductive bump 5 is small in size and has excellent electrical conductivity and thermal conductivity. It can provide a low inductance and low resistance signal for the interconnection between the substrate layer 1 and the magnetic energy storage layer 2, which can not only reduce the size of the module, but also has a short connection path, which is conducive to shortening the layout and wiring path, so that the components in the module can be highly integrated and have high efficiency. Optionally, the material of the first conductive bump 5 includes Pb / Sn alloy.
[0130] Optionally, there may be a plurality of first conductive bumps 5 , wherein a portion of the first conductive bumps 5 are signal input ports, and another portion of the first conductive bumps 5 are signal output ports.
[0131] Optional, please continue to Figure 3The wiring layer 4 has a patterned structure, that is, the wiring layer 4 includes a plurality of spaced metal wires, the number of the metal wires is the same as the number of the first conductive bumps 5, the positions of the metal wires correspond one-to-one to the positions of the first conductive bumps 5, and the metal wires close to the hole structure 3 are electrically connected to the connector 22 in the hole structure 3 to achieve electrical connection between the wiring layer 4 and the magnetic energy storage layer 2.
[0132] The packaging module 10 of the present application can be manufactured by using the substrate layer 1 as the base to form the wiring layer 4 by using a film forming process, so that the metal wire and the first conductive bump 5 are metallized and connected, and the wiring layer 4 is manufactured with high precision, which can ensure the accuracy of the alignment and binding of the substrate layer 1 to the wiring layer 4. Further optionally, the metal wire can be manufactured by one metal layer, two metal layers or multiple metal layers.
[0133] In some possible implementations, a circuit layer is disposed inside the substrate layer 1 (the circuit layer is not Figure 3 As shown in the figure, the circuit layer is formed on the substrate layer 1 through a photolithography process to form a circuit pattern, thereby realizing the chip function.
[0134] For some possible implementations, please continue to refer to Figure 3 , a second conductive bump 6 is arranged on the side of the wiring layer 4 away from the first conductive bump 5, and the number of the second conductive bump 6 is arranged in plurality, and the plurality of second conductive bumps 6 are electrically connected to the wiring layer 4, that is, the first conductive bump 5 and the second conductive bump 6 are arranged on both sides of the wiring layer 4, respectively, and the positions of the first conductive bump 5 and the second conductive bump 6 correspond one to one. The physical signal of the substrate layer 1 can be connected to the metal wire through the first conductive bump 5, and then connected to the second conductive bump 6 through the metal wire. In the application of the module, the packaging module 10 is connected to the external circuit through the second conductive bump 6, so as to realize the interconnection between the packaging module 10 and the external signal. Optionally, the material of the second conductive bump 6 includes Pb / Sn alloy. The second conductive bump 6 is small in size and has excellent electrical conductivity and thermal conductivity. It can provide a low inductance and low resistance signal for the interconnection between the chip-module-external circuit, and better improve the power supply performance. The packaging module 10 is electrically connected to the external circuit through the second conductive bump 6, so as to realize the communication between the chip and the external circuit.
[0135] In some possible embodiments, the semiconductor material includes at least one of silicon, silicon dioxide, silicon nitride and silicon carbide, that is, the substrate layer 1 of the present application is essentially a wafer, which can also be called a silicon chip. The above-mentioned silicon semiconductor material has stable properties, is easy to purify, and has huge energy storage capacity. It can be used to make the substrate layer 1, and to make circuits and embed electronic components (such as transistors, capacitors, logic gates, etc.) on the substrate to ultimately realize the chip function.
[0136] In some possible embodiments, the thickness of the substrate layer 1 is greater than or equal to 0.05 mm, and can specifically be 0.05 mm, 0.08 mm, 0.1 mm, 0.15 mm, 0.2 mm, 0.3 mm, 0.4 mm or 0.5 mm, etc. The thickness adjustment range of the substrate layer of the present application is larger, and a smaller thickness can be achieved. Compared with the chip in the prior art, the thickness of the substrate layer of the present application is smaller, which is conducive to the miniaturization of the packaging module. The thickness of the substrate layer of the present application can be set according to the actual chip function requirements.
[0137] For some possible implementations, see Figure 3 and Figure 5 The magnetic energy storage layer 2 includes a metal wrapping layer 21 and a connector 22, wherein a magnetic material 23 is arranged inside the metal wrapping layer 21, and the metal wrapping layer 21 wrapping the magnetic material 23 can realize an inductance function, and the connector 22 is arranged on a side of the metal wrapping layer 21 close to the substrate layer 1, and the connector 22 is embedded in the hole structure 3 and connected to the wiring layer 4, thereby realizing electrical connection with the substrate layer 1. In this application, the connector 22 is embedded in the substrate layer 1 and electrically connected to the wiring layer 4 at the bottom of the substrate layer 1, that is, a part of the magnetic energy storage layer 2 is arranged on the surface of the substrate layer 1, and a part is arranged in the hole structure 3 of the substrate layer 1, the metal wrapping layer 21 and the magnetic material 23 located on the surface of the substrate layer 1 realize the inductance function, and the connector 22 located in the hole structure 3 realizes the electrical coupling connection between the magnetic energy storage layer 2 and the substrate layer 1, so that the volume of the packaging module can be greatly reduced, and the power path of the module can be shortened at the same time.
[0138] Optionally, the metal wrapping layer 21 and the connector 22 are an integrally formed structure. During the manufacturing process of the packaging module 10 of the present application, the connector 22 can be formed in the hole structure 3 of the substrate layer 1 by electroplating, chemical plating, etc., and the plating process is continued to form the metal wrapping layer 21 on the first surface of the substrate layer 1. It can be understood that since the magnetic material 23 needs to be set inside the metal wrapping layer 21, a cavity 211 structure with an opening is first formed in the above-mentioned plating process, and the magnetic material 23 is injected into the cavity 211, and finally the cavity 211 is closed to obtain the metal wrapping layer 21.
[0139] Optional, please continue to Figure 5 The connector 22 includes a first sub-connector 221 and a second sub-connector 222. The first sub-connector 221 and the second sub-connector 222 are located on the same side surface of the metal wrapping layer 21. The first sub-connector 221 has a positive terminal, and the second sub-connector 222 has a negative terminal, so as to achieve current conduction. Please continue to refer to Figure 4 and Figure 5, the first sub-connector 221 is embedded in the first through hole 31, and the second sub-connector 222 is embedded in the second through hole 32. The first sub-connector 221 and the second sub-connector 222 of the present application act as connecting wires between the magnetic energy storage layer 2 and the substrate layer 1, and are arranged inside the substrate layer 1, which not only shortens the power path of the module and reduces the line loss, but also saves the space for additionally setting the connecting wires and reduces the size of the module. Moreover, since the connector 22 is embedded in the hole structure 3, the thickness of the metal wrapping layer 21 determines the thickness of the magnetic energy storage layer 2, that is, the thickness of the inductor, and further determines the thickness of the module. Those skilled in the art can customize the thickness of the metal wrapping layer 21 according to the inductance requirements of the module.
[0140] Optionally, the number of the first connectors 22 and the second connectors 22 can be one, or two, three, or four, etc. Correspondingly, the number of the first through holes 31 and the second through holes 32 can be one, or two, three, or four, etc. Optionally, the number of the first connectors 22 is the same as the number of the first through holes 31, and the number of the second connectors 22 is the same as the number of the second through holes 32. For example, when designing the number of the first connectors 22 and the second connectors 22, it can be set based on the aperture of the preset hole structure 3, and the number and position of the first through holes 31 can be further determined according to the number and position of the first connectors 22.
[0141] Optionally, the magnetic material 23 includes magnetic fluid and magnetic powder, both of which are magnetic. When power is supplied, a magnetic field can be generated around the metal wrapping layer 21, so that the magnetic fluid or magnetic powder is magnetized and stores magnetic energy.
[0142] In some possible implementations, the morphology of the metal wrapping layer 21 includes at least one of a columnar shape, a cone shape, a sphere shape, and a table shape. For example, Figure 3 As shown, the metal wrapping layer 21 has a rectangular shape, which can wrap the magnetic material 23 therein, and can ensure the realization of the inductance function of the magnetic energy storage layer 2. At the same time, the metal wrapping layer 21 with the above-mentioned morphology has a large cross-sectional area, which is beneficial to reduce the circuit impedance of the magnetic energy storage layer 2 and reduce the loss of the magnetic energy storage layer 2. Of course, the morphology of the metal wrapping layer 21 of the present application is not limited to this, and can also be other shapes with a wrapping effect, and the present application does not limit it here.
[0143] In some possible embodiments, the pore size of the hole structure 3 is greater than or equal to 0.02 mm, and the pore size of the hole structure can be 0.02 mm, 0.05 mm, 0.08 mm, 0.1 mm, 0.15 mm, 0.2 mm, 0.3 mm, 0.4 mm or 0.5 mm, etc. The hole structure of the present application is used to connect the magnetic energy storage layer and the wiring layer, and a hole structure with a smaller pore size can be set, which can achieve electrical connection between the connector and the wiring layer while minimizing the impact of the hole structure on the substrate layer.
[0144] In some possible implementations, the material of the metal wrapping layer 21 includes at least one of copper, gold and aluminum. The above materials have good electrical conductivity and thermal conductivity, which can not only improve the inductance of the magnetic energy storage layer 2 as an inductor, but also quickly conduct away the heat generated by the substrate layer 1.
[0145] In some possible embodiments, the thickness of the metal wrapping layer 21 is greater than or equal to 0.02 mm. The thickness of the metal wrapping layer can specifically be 0.02 mm, 0.05 mm, 0.08 mm, 0.1 mm, 0.15 mm, 0.2 mm, 0.3 mm, 0.4 mm or 0.5 mm, etc. The thickness of the metal wrapping layer of the present application can be adjusted in a large range and can achieve a smaller thickness. Compared with the chip in the prior art, the thickness of the metal wrapping layer of the present application is smaller, which is conducive to the miniaturization of the packaging module. The thickness of the metal wrapping layer of the present application can be set according to the requirement of the sensitivity.
[0146] The present application embodiment provides a method for manufacturing a packaging module 10. Figure 6 , including the following steps:
[0147] A substrate layer 1 is manufactured. The substrate layer 1 is made of a semiconductor material. A hole structure 3 is formed in the substrate layer 1. The substrate layer 1 includes a first surface and a second surface that are oppositely disposed.
[0148] Fabricate a wiring layer 4 on the second surface of the substrate layer 1;
[0149] A magnetic energy storage layer 2 is made on the first surface of the substrate layer 1. The magnetic energy storage layer 2 has an inductance function. The magnetic energy storage layer 2 includes a metal wrapping layer 21 and a connector 22. The metal wrapping layer 21 is located on the first surface of the substrate layer 1. The connector 22 is embedded in the hole structure 3 and electrically connected to the wiring layer 4.
[0150] In the above scheme, the present application directly manufactures the magnetic energy storage layer 2 on the substrate layer 1. The magnetic energy storage layer 2 has excellent thermal conductivity, so that the heat generated by the substrate layer 1 can be quickly discharged through the magnetic energy storage layer 2, thereby improving the heat dissipation effect of the packaging module 10. Moreover, the connector 22 is embedded in the hole structure 3 and electrically connected to the wiring layer 4, which can effectively shorten the wiring path of the module, thereby reducing the power path of the module, thereby reducing the line loss of the module and improving the use efficiency of the module. In addition, the magnetic energy storage layer 2 and the substrate layer 1 of the present application are directly connected as the main structure of the module, which can maximize the volume ratio of the chip or inductor in the module and realize the miniaturization of the packaging module 10.
[0151] The following is a detailed introduction to the method for manufacturing the packaging module 10 of the present application.
[0152] Step S100, please continue to refer to Figure 4 , a substrate layer 1 is manufactured. The substrate layer 1 is made of a semiconductor material, and a hole structure 3 is opened on the substrate layer 1. The substrate layer 1 includes a first surface a and a second surface a' that are oppositely arranged.
[0153] As a possible implementation method, the material of the substrate layer 1 includes at least one of silicon, silicon dioxide, silicon nitride and silicon carbide. Taking silicon as an example, silicon can be purified and dissolved into a liquid, from which a columnar silicon crystal column can be pulled out, and the transistor can be placed on the silicon lattice. The quality of the silicon crystal column is affected by controlling parameters such as the speed and temperature of pulling up the silicon crystal column. The larger the size of the silicon crystal column, the higher the technical difficulty. After completion, a diamond knife is used to cut the entire silicon crystal column into thin slices, which become wafers after polishing, which is the substrate layer 1 of the present application. The thickness of the substrate layer 1 can be controlled by the step of cutting the silicon crystal column into thin slices. Of course, commercially available wafers can also be directly purchased as the substrate layer 1.
[0154] Optionally, after obtaining the substrate layer 1 , it is necessary to perform wet cleaning, photolithography, ion implantation, etching, plasma washing, heat treatment, deposition of various substances on the wafer surface, etc. on the substrate layer 1 in order to realize the chip function.
[0155] As a possible implementation method, the present application manufactures the hole structure 3 through a through silicon via (TSV) process, specifically mainly through deep reactive ion etching (DRIE). The through silicon via process has good electrical performance, low energy consumption and small size, and can effectively improve the accuracy of the hole structure 3. The present application does not limit the process for forming the hole structure 3, and those skilled in the art can select process parameters according to actual needs.
[0156] As a possible implementation, the manufacturing method of the present application further includes: forming a circuit layer inside the substrate layer 1 (the circuit layer is Figure 4(not shown), a pattern composed of semiconductor material or medium is formed inside the substrate layer 1, namely, a circuit layer. The circuit layer includes but is not limited to circuit components such as transistors (triodes), storage units, diodes, resistors, wiring, pins, etc. The circuit layer and the substrate layer 1 structure are used together to realize the bare chip function.
[0157] As a possible implementation method, the manufacturing method of the present application also includes: performing oxidation treatment on the surface of the substrate layer 1 to form an oxide layer, which is used to protect the substrate layer 1, so that the substrate layer 1 is not affected by chemical impurities, avoid leakage current entering the circuit, prevent diffusion during ion implantation, and prevent the substrate layer 1 from slipping during etching.
[0158] As a possible implementation method, the manufacturing method of the present application further includes: preparing a first conductive bump 5 on the second surface of the substrate layer 1, and the obtained cross-sectional structure schematic diagram is as shown in FIG. Figure 7 As shown, the signal of the substrate layer 1 is input or output through the first conductive bump 5. The first solder can be welded to the second surface of the substrate layer 1 by evaporation, template printing, sputtering, electroplating and other processes. The first solder is usually composed of at least one metal or alloy of nickel, copper, tin and lead. The present application does not limit the process sequence of making the first conductive bump 5. The first conductive bump 5 is made before the hole structure 3 is formed on the substrate layer 1 or after the hole structure 3 is formed on the substrate layer 1.
[0159] Step S200, a magnetic energy storage layer 2 is made on the first surface a' of the substrate layer 1, the magnetic energy storage layer 2 has an inductance function, and the magnetic energy storage layer 2 includes a metal wrapping layer 21 and a connector 22, the metal wrapping layer 21 is located on the first surface of the substrate layer 1, the connector 22 is embedded in the hole structure 3 and electrically connected to the wiring layer 4.
[0160] As a possible implementation method, the present application adopts a segmented preparation process to prepare the magnetic energy storage layer 2. For details, please refer to Figure 8 , the method for making the magnetic energy storage layer 2 comprises:
[0161] Step S201: Use a first plating process to fill the first metal material into the hole structure 3 to form a connector 22, and form a cavity 211 with an opening on the first surface of the substrate layer 1. The obtained cross-sectional structure schematic diagram is shown in FIG. Fig. 9 As shown, the cavity 211 has an opening, and the opening is reserved to facilitate the subsequent filling of the magnetic material 23. The first plating process includes at least one of an electroplating process and a chemical vapor deposition process. Those skilled in the art can adjust the specific parameters of the first plating process according to the aperture of the hole structure 3 to form a connector 22 and a cavity 211 of a specific thickness (diameter) in the hole structure 3.
[0162] Optionally, when the hole structure 3 includes a first through hole 31 and a second through hole 32, in the first plating process, the order of filling the first through hole 31 and the second through hole 32 is not limited, and they can be performed simultaneously, or the first through hole 31 can be filled first, and then the second through hole 32 can be filled. Of course, the second through hole 32 can also be filled first, and then the first through hole 31 can be filled.
[0163] For further information, see Fig. 9 The cavity 211 with an opening includes a first surface 2111 horizontally arranged on the first surface a of the substrate layer 1, and a second surface 2112 and a third surface 2113 respectively perpendicular to the first surface a, the second surface 2112 and the third surface 2113 are parallel to each other and have corresponding positions, and the first surface 2111, the second surface 2112 and the third surface 2113 together form a cavity 211 structure with an opening on the top. It should be understood that the first surface 2111 includes a first section 21111 and a second section 21112, the first section 21111 is connected to the first sub-connector 221, the second section 21112 is connected to the second connector 22, and there is a gap between the first section 21111 and the second section 21112, and the width of the gap is related to the positions of the first through hole 31 and the second through hole 32.
[0164] As a possible implementation, the first metal material includes at least one of copper and aluminum. Preferably, the first metal material is copper. The metal cladding layer formed by copper has good thermal conductivity, which can quickly conduct heat generated by the substrate layer 1 and improve the heat dissipation capacity of the packaging module 10.
[0165] Step S202: Fill the cavity 211 with an opening with a magnetic material 23, and obtain a cross-sectional structure schematic diagram as shown in FIG. Fig.10 shown.
[0166] As a possible implementation, the magnetic material 23 includes at least one of a magnetic fluid and / or magnetic powder. It is understandable that the magnetic material 23 can be a magnetic fluid, a magnetic powder, or a mixture of a magnetic fluid and a magnetic powder. Optionally, the magnetic powder includes materials such as iron silicon, iron silicon aluminum, iron silicon chromium, and iron silicon aluminum nickel.
[0167] Magnetic fluid is also called magnetic liquid, ferromagnetic fluid or magnetic fluid. Magnetic fluid is composed of nano magnetic particles, base liquid and surfactant. Generally, Fe, Ni, Co, etc. are commonly used as magnetic particles, water, organic solvents, oil, etc. are used as base liquid, and oleic acid, etc. are used as activators to prevent agglomeration. Magnetic fluid has both the fluidity of liquid and the magnetism of solid magnetic material. Liquid magnetic fluid is poured into cavity 211, and cavity 211 can be fully filled to ensure the uniformity of magnetism in cavity 211. Moreover, the pouring process is simple and easy to realize. After pouring, magnetic fluid still presents the state of liquid and solidifies to form a magnetic core. Such arrangement can not only make magnetic material 23 become an integral structure, but also can fully fill magnetic material 23 into cavity 211 to strengthen the overall structure of inductance.
[0168] Step S203: Use a second coating process to seal the cavity 211 with a second metal material. The resulting cross-sectional structure is shown in FIG. Fig.11 shown.
[0169] In this step, continue to Fig.11 A cover plate 212 is formed at the opening of the cavity 211 using a second plating process to obtain a complete metal wrapping layer 21 .
[0170] Optionally, the second metal material includes at least one of copper and aluminum. It is understandable that the first metal material and the second metal material can be the same or different, as long as the formed metal wrapping layer 21 can be conductive.
[0171] Optionally, the second coating process includes at least one of electroplating and chemical vapor deposition processes. The first coating process and the second coating process may be the same or different, and those skilled in the art may select the process adaptively as needed.
[0172] It can be understood that the size and thickness of the metal wrapping layer 21 and the filling amount of the magnetic material 23 of the present application can be adjusted and designed according to needs.
[0173] Optionally, when the magnetic material 23 is magnetic powder, since the magnetic powder is a powdery substance, after filling the magnetic powder, an insulating layer 24 needs to be made on the surface of the magnetic powder. The obtained cross-sectional structure schematic diagram is as follows: Fig.12 As shown, step S203 is then performed to seal the cavity to prevent leakage of magnetic powder, wherein the material of the insulating layer includes any one of polyimide (PI), polyester, and fluorinated ethylene propylene.
[0174] Step S300 , manufacturing a wiring layer 4 on the second surface of the substrate layer 1 .
[0175] In this step, the wiring layer 4 can be made by magnetron sputtering, electroplating process, mask process and photolithography process, and the wiring layer 4 can include at least one layer of metal wires. Exemplarily, specifically, the method for making the wiring layer 4 includes: 1) making a seed layer on one side of the second surface a' of the substrate layer 1, and the material of the seed layer is, for example, copper; 2) locally coating the seed layer with photoresist; 3) according to the shape of the wiring layer 4, performing an exposure-development process on the photoresist so that the photoresist forms an opening, the opening exposes the seed layer, and the shape of the photoresist opening is the same as the shape of the wiring layer 4; 4) electroplating copper in the opening; 5) removing the photoresist; 6) removing the excess seed layer by wet etching to obtain a single-layer metal wire, and the above steps 1) to 6) are repeated to obtain a multi-layer metal wire. It can be understood that the wiring layer 4 is a patterned structure.
[0176] As a possible implementation, after making the wiring layer 4, it also includes: making a second conductive bump 6, wherein the second conductive bump 6 is arranged on the side of the metal wire away from the first conductive bump 5, and the second conductive bump 6 can be made by the same or different preparation process as the first conductive bump 5, and the second solder can be welded on the side of the wiring layer 4 away from the substrate layer 1 by evaporation, template printing, sputtering and electroplating, and the second solder includes at least one metal or alloy of nickel, copper, tin and lead. It can be understood that the positions of the first conductive bump 5, the wiring layer 4 and the second conductive bump 6 correspond to each other, and the first conductive bump 5 is first made on the second surface of the substrate layer 1, and then the entire wiring layer 4 is made on the side of the first conductive bump 5 away from the substrate layer 1, and the entire wiring layer 4 is patterned so that the wiring layer 4 corresponds to the first conductive bump 5, and finally the second conductive bump 6 is made on the side of the wiring layer 4 away from the first conductive bump 5.
[0177] The step S200 and the step S300 of the present application can be replaced, that is, after the substrate layer 1 is manufactured, the wiring layer 4 can be manufactured first, and then the magnetic energy storage layer 2 can be manufactured.
[0178] As a possible implementation method, after the magnetic energy storage layer 2 and the wiring layer 4 are manufactured, the connector 22 and the metal wire at a position close to the connector 22 are welded and connected by a third solder. For example, the third solder can be melted between the connector 22 to be connected and the metal wire by heating to realize the electrical connection between the wiring layer 4 and the magnetic energy storage layer 2. The third solder can be made of the same material as the metal wire or the same material as the connector 22. Exemplarily, the third solder includes at least one of copper, aluminum and tin. The schematic diagram of the cross-sectional structure obtained by welding the connector 22 and the metal wire at a position close to the connector 22 is shown in FIG. Figure 3 As shown, it can be understood that when the magnetic material 23 is magnetic powder, the obtained cross-sectional structure diagram is Fig.13 shown.
[0179] See also Fig.14 The present application also provides a power module, which includes a circuit board layer 20 and a power supply 30, a power chip 40 and a packaging module 10 arranged on the circuit board layer 20. The circuit board layer 20 has a first through hole 31 and a second through hole 32. The power supply 30 and the packaging module 10 are electrically connected through a third through hole 201, and the power chip 40 and the packaging module 10 are electrically connected through a fourth through hole 202. Such a configuration makes the connection path between the packaging module 10 and the power supply 30 and the power chip 40 shorter, which can reduce the line loss of the power module and improve the efficiency of the power module. A second heat sink 60 is arranged on the side of the power chip 40 away from the circuit board layer 20, and a first heat sink 50 is arranged on the side of the packaging module 10 away from the circuit board layer 20. Since the packaging module 10 of the present application has a small volume, the volume of the packaging module 10 on the circuit board layer 20 is small, which is conducive to the power chip 40 to dissipate heat upward through the second heat sink 60 and dissipate heat downward through the first heat sink 50, thereby achieving a two-way heat dissipation effect.
[0180] As a possible implementation method, the circuit board layer 20 includes a printed circuit board (PCB) or a flexible circuit board (FPC). Specifically, the circuit board layer 20 includes a substrate and circuit traces formed on the substrate using a film forming process. The substrate can be a glass substrate, or a resin material substrate, or an aluminum substrate, etc.
[0181] Optionally, the circuit board layer 20 includes a first surface and a second surface that are arranged opposite to each other. The first surface and the second surface are different. In some embodiments, the first surface and the second surface are two adjacent surfaces. In other embodiments, the first surface and the second surface are two opposite surfaces. In some embodiments, please continue to refer to Fig.14 The power supply 30 and the power chip 40 are mounted on the circuit board layer 20, that is, the power supply 30 and the power chip 40 are arranged on the first surface of the circuit board layer 20, and the packaging module 10 is arranged on the second surface of the circuit board layer 20. In other embodiments, the power supply 30 and the power chip 40 can also be flipped on the circuit board layer 20 and soldered on the circuit board layer 20 through conductive bump solder balls, that is, the power supply 30 and the power chip 40 are arranged on the second surface of the circuit board layer 20, and the packaging module 10 is arranged on the first surface of the circuit board layer 20. The power supply 30 and the power chip 40 are electrically connected to the packaging module 10 by wire bonding, respectively.
[0182] As a possible implementation, the power supply 30 converts the bus voltage into direct current required by the load, which can meet the requirements of different voltages in the power supply module.
[0183] As a possible implementation method, the packaging module 10 is electrically connected to the circuit board layer 20 through the second conductive bump 6. By connecting the packaging module 10 with the circuit board layer 20, the circuit board can provide input signals to the substrate layer 1 in the packaging module 10 and receive output signals fed back by the substrate layer 1.
[0184] As a possible implementation method, the power chip 40 is fixed on the circuit board layer 20 through pins and is electrically connected to the circuit board layer 20. In this way, the substrate layer 1 in the packaging module 10 is electrically connected to the circuit board layer 20 through the second conductive bump 6, and the power chip 40 is electrically connected to the circuit board layer 20 through the pins to realize the transmission of physical information.
[0185] As a possible implementation method, the first heat sink 50 and the second heat sink 60 are respectively arranged on both sides of the circuit board layer 20. The heat generated by the power chip 40 can be dissipated through the second heat sink 60 adjacent to it, and the heat generated by the power chip 40 can also be dissipated through the circuit board layer 20 and the first heat sink 50, thereby improving the heat dissipation effect of the power chip 40. The heat dissipation of the substrate layer 1 in the packaging module 10 can also be dissipated through the first heat sink 50.
[0186] Optionally, the first heat sink 50 is a heat sink, and the second heat sink 60 is a heat sink, which is exemplarily an aluminum alloy heat sink. The aluminum alloy has good heat dissipation and conductivity, which improves the heat dissipation effect of the heat sink. In addition, the shape of the heat sink can be set in a groove shape to increase the contact area between the heat sink and the air. Of course, the present application can also use other forms of heat sinks to dissipate heat for the power module, such as using air cooling to dissipate heat.
[0187] As a possible implementation, please continue to see Fig.14 A third capacitor 70 is also disposed on the second surface of the circuit board layer 20 , and the third capacitor 70 is electrically connected to the power chip 40 by wire bonding.
[0188] The embodiment of the present application provides an electronic device 1000, which can be a common terminal such as a mobile phone, a tablet, a laptop computer, etc. in the prior art, including a packaging module or a power module in any of the above embodiments. Since the packaging module of the present application directly uses the substrate layer 1 and the magnetic energy storage layer 2 as the main structure, the packaging module 10 has the characteristics of miniaturization, strong heat dissipation capacity and high efficiency. Therefore, the layout of the electronic device can be optimized, and the efficiency and heat dissipation performance of the electronic device can be improved. Fig.15As shown, it is a structural schematic diagram of the packaging module 10 of the present application applied to an electronic device 1000. The electronic device 1000 includes a shell 1001 and a main board 1002 arranged inside the shell 1001. The packaging module 10 is fixed on the main board 10021 and electrically connected to the main board 1002.
[0189] In this specification, the same or similar parts between the various embodiments can be referred to each other. In particular, for the device embodiment and the terminal embodiment, since they are basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the description in the method embodiment.
Claims
1. A packaging module, It is characterized in that include: A substrate layer, the substrate layer is made of a semiconductor material, the substrate layer has a hole structure, and the substrate layer includes a first surface and a second surface that are oppositely arranged; a wiring layer, the wiring layer being located on the second surface of the substrate layer and electrically connected to the substrate layer; A magnetic energy storage layer has an inductance function and comprises a connected metal wrapping layer and a connector, wherein the metal wrapping layer is located on the first surface of the substrate layer, and the connector is embedded in the hole structure and electrically connected to the wiring layer.
2. The packaging module according to claim 1, It is characterized in that Magnetic material is arranged in the metal wrapping layer.
3. The packaging module according to claim 1 or 2, It is characterized in that The metal wrapping layer and the connector are an integrally formed structure.
4. The packaging module according to any one of claims 1 to 3, It is characterized in that The metal wrapping layer is a closed cavity structure.
5. The packaging module according to any one of claims 1 to 4, It is characterized in that The morphology of the metal wrapping layer includes at least one of a columnar shape, a cone shape, a sphere shape and a terrace shape.
6. The packaging module according to any one of claims 1 to 5, It is characterized in that The pore diameter of the pore structure is greater than or equal to 0.02 mm.
7. The packaging module according to any one of claims 1 to 6, It is characterized in that The semiconductor material includes at least one of silicon, silicon dioxide, silicon nitride and silicon carbide.
8. The packaging module according to any one of claims 1 to 7, It is characterized in that The material of the metal wrapping layer includes at least one of copper, gold and aluminum.
9. The packaging module according to any one of claims 1 to 8, It is characterized in that The thickness of the metal wrapping layer is greater than or equal to 0.02 mm.
10. The packaging module according to any one of claims 1 to 9, It is characterized in that The thickness of the substrate layer is greater than or equal to 0.05 mm.
11. The packaging module according to any one of claims 1 to 10, It is characterized in that The connector includes a first sub-connector and a second sub-connector, the first sub-connector has a positive port, the second sub-connector has a negative port, the hole structure includes a first through hole and a second through hole, the first sub-connector is embedded in the first through hole and electrically connected to the wiring layer, and the second sub-connector is embedded in the second through hole and electrically connected to the wiring layer.
12. The packaging module according to any one of claims 1 to 11, It is characterized in that The substrate layer has a circuit layer inside.
13. A method for manufacturing a packaging module, It is characterized in that The steps include: Manufacturing a substrate layer, wherein the substrate layer is made of a semiconductor material, a hole structure is opened on the substrate layer, and the substrate layer includes a first surface and a second surface that are oppositely arranged; A magnetic energy storage layer is fabricated on the first surface of the substrate layer, wherein the magnetic energy storage layer has an inductance function and comprises a connected metal wrapping layer and a connector, wherein the metal wrapping layer is located on the first surface of the substrate layer, and the connector is embedded in the hole structure; A wiring layer is manufactured on the second surface of the substrate layer, and the wiring layer is electrically connected to the connecting body.
14. The method according to claim 13, It is characterized in that The method for making the magnetic energy storage layer comprises: Filling the hole structure with a first metal material to form a connector, and forming a cavity with an opening on the first surface of the substrate layer; Filling the cavity with magnetic material; The cavity is sealed with a second metal material.
15. The method according to claim 14, It is characterized in that The magnetic material includes magnetic fluid and / or magnetic powder.
16. A power module, It is characterized in that include: A circuit board layer, wherein the circuit board layer has a third through hole and a fourth through hole; A power supply, a power chip and a packaging module are arranged on the circuit board layer, the packaging module is electrically connected to the power supply through the third through hole, and the packaging module is electrically connected to the power chip through the fourth through hole; A first heat sink, the first heat sink is arranged on a side of the power chip away from the circuit board layer; A second heat sink, the second heat sink is arranged on a side of the packaging module away from the circuit board layer; The packaging module includes the packaging module described in any one of claims 1 to 12 or the packaging module manufactured by the manufacturing method described in any one of claims 13 to 15.
17. An electronic device, It is characterized in that The electronic device comprises the packaging module according to any one of claims 1 to 12, or the packaging module manufactured by the manufacturing method according to any one of claims 13 to 15, or the power supply module according to claim 16.