High-reliability bump structure and preparation method thereof

Abstract

The invention provides a high-reliability bump structure and a preparation method, and relates to the technical field of semiconductors, the bump structure comprises a bump structure body, the bump structure body comprises a metal seed layer, a metal column and a solder layer which are sequentially arranged from bottom to top, an insulating ring is arranged outside the metal column, and the cross section of the insulating ring is of an annular structure. A first vertical distance from one side of the insulating ring close to the solder layer to a plane where the lower surface of the solder layer is located is greater than 0. According to the bump structure, the solder extending along the metal column can be blocked through the insulating ring, the problem of pseudo soldering or electrical short circuit caused by the fact that the solder extends to the surface of the chip is avoided, the reliability of the bump structure is improved, and the yield of chip packaging is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor chip bump manufacturing and semiconductor packaging, and in particular to a high-reliability bump structure and a preparation method thereof. Background Art

[0002] Traditional chips use leads to achieve electrical connection between the chip and the frame, while advanced packaging uses bumps instead of leads for connection, which has the advantages of shortening the electrical conduction path, improving performance, providing heat dissipation paths, and reducing the size of the package, thus becoming a packaging trend. The bump structure is a tiny metalized protrusion structure located on the surface of the chip. These bump structures are usually only tens to hundreds of microns in size and are key components for achieving electrical connection and signal transmission in semiconductor packaging.

[0003] The Chinese patent with the authorization announcement number CN109979903B provides a semiconductor device with a bump structure and a method for manufacturing the semiconductor device, wherein the semiconductor device includes a substrate and at least one bump structure disposed above the substrate. The at least one bump structure includes a column formed of a metal disposed above the substrate, the metal having a lower solderability than copper or a copper alloy than solder. The solder alloy is formed just above the upper surface of the metal having a lower solderability than copper or a copper alloy and contacts the upper surface of the metal.

[0004] However, during the reflow soldering process of a semiconductor device with a bump structure through a flip-chip process, the melted solder will crawl along the metal pillars to the chip surface, causing electrical problems such as cold solder joints and short circuits, affecting the reliability of the bump structure connection. Summary of the invention

[0005] The present invention provides a high-reliability bump structure and a preparation method thereof, which are used to solve the technical problem that during the reflow process of the current flip-chip soldering process, the melted solder will crawl along the metal column to the chip surface, thus causing cold soldering and short circuit.

[0006] In order to solve the above technical problems, the present invention discloses a high-reliability bump structure, including: a bump structure body, the bump structure body includes a metal seed layer, a metal column and a solder layer arranged in sequence from bottom to top, an insulating ring is arranged outside the metal column, the cross-section of the insulating ring is a ring-shaped structure, and the first vertical distance from the side of the insulating ring close to the solder layer to the plane where the lower surface of the solder layer is located is greater than 0.

[0007] Preferably, the material of the metal seed layer includes but is not limited to titanium or copper.

[0008] Preferably, the material of the metal column includes but is not limited to copper.

[0009] Preferably, the material of the solder layer includes but is not limited to tin.

[0010] Preferably, the insulating ring material includes polyimide.

[0011] Preferably, the metal column has a stepped columnar structure, and the diameter of the upper end of the metal column is greater than the diameter of the lower end of the metal column.

[0012] Preferably, a connecting section is provided at the lower end of the metal column, the lower end of the connecting section is connected to the upper end of the metal seed layer, and the diameter of the connecting section is smaller than the diameter of the upper end of the metal seed layer.

[0013] Preferably, the insulating ring is located outside the connecting section.

[0014] The present invention also provides a method for preparing a high-reliability bump structure, which is used to prepare the above-mentioned high-reliability bump structure, comprising:

[0015] An insulating ring is prepared on the surface of the metal seed layer, and a column hole is opened in the center of the insulating ring;

[0016] Coating photoresist on the insulating ring to obtain a third photoresist layer, and exposing and developing the photoresist to retain the electroplating area;

[0017] The metal pillar and the solder layer are sequentially prepared in the electroplating area by using an electroplating process;

[0018] The photoresist is removed, and the metal seed layer is removed by etching to obtain a bump structure body.

[0019] Preferably, the electroplating area includes a post hole and an electroplating hole connected to an upper end of the post hole, and the electroplating hole is located in the third photoresist layer.

[0020] The technical solution of the present invention has the following advantages: the present invention provides a high-reliability bump structure and a preparation method, which relates to the field of semiconductor technology, wherein the bump structure comprises a bump structure body, the bump structure body comprises a metal seed layer, a metal column and a solder layer arranged in sequence from bottom to top, an insulating ring is arranged outside the metal column, the cross section of the insulating ring is a ring-shaped structure, and the first vertical distance from the side of the insulating ring close to the solder layer to the plane where the lower surface of the solder layer is located is greater than 0. In the present invention, the solder extending along the metal column can be blocked by the insulating ring, so as to avoid the problem of cold soldering or electrical short circuit caused by the solder extending to the chip surface, thereby improving the reliability of the bump structure and the yield rate of chip packaging.

[0021] Other features and advantages of the present invention will be described in the following description, and partly become apparent from the description, or understood by practicing the present invention. The purpose and other advantages of the present invention can be realized and obtained by the devices particularly pointed out in the written description and the drawings of the description.

[0022] The technical solution of the present invention is further described in detail below through the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation of the present invention. In the accompanying drawings:

[0024] Figure 1 It is the existing package welding diagram;

[0025] Figure 2 This is a schematic diagram of the normal connection of the tin material layer in the bump structure;

[0026] Figure 3 This is a schematic diagram of abnormal tin connection in bump structure;

[0027] Figure 4 A schematic diagram of an insulating ring of a bump structure in the present invention;

[0028] Figure 5 is another structural schematic diagram of the insulating ring in the present invention;

[0029] Figure 6 A schematic diagram of wafer material in a method for preparing a high-reliability bump structure of the present invention;

[0030] Figure 7 This is a schematic diagram of the first covering of the PI layer in a method for preparing a high-reliability bump structure of the present invention;

[0031] Figure 8 A schematic diagram of the first sputtering in a method for preparing a high-reliability bump structure according to the present invention;

[0032] Fig. 9 It is a schematic diagram of coating photoresist for the first time in a method for preparing a high-reliability bump structure of the present invention;

[0033] Fig.10 A schematic diagram of electroplating growth in the first electroplating area in a method for preparing a high-reliability bump structure according to the present invention;

[0034] Fig.11 A schematic diagram of removing a first photoresist layer in a method for preparing a high-reliability bump structure according to the present invention;

[0035] Fig.12 A schematic diagram of the second covering PI layer in a method for preparing a high-reliability bump structure of the present invention;

[0036] Fig.13 A schematic diagram of the second sputtering in a method for preparing a high-reliability bump structure according to the present invention;

[0037] Fig.14 A schematic diagram of applying photoresist for the second time in a method for preparing a high-reliability bump structure according to the present invention;

[0038] Fig.15 A schematic diagram of electroplating growth in the second electroplating area in a method for preparing a high-reliability bump structure of the present invention;

[0039] Fig.16 A schematic diagram of the third covering PI layer in a method for preparing a high-reliability bump structure of the present invention;

[0040] Fig.17 A schematic diagram of coating photoresist for the third time in a method for preparing a high-reliability bump structure according to the present invention;

[0041] Fig.18 A schematic diagram of electroplating growth in an electroplating area in a method for preparing a high-reliability bump structure according to the present invention;

[0042] Fig.19 A schematic diagram of removing the third photoresist layer in a method for preparing a high-reliability bump structure according to the present invention;

[0043] Fig. 20 The figure is a schematic diagram of a reflow soldering process in a method for preparing a high-reliability bump structure of the present invention.

[0044] In the figure: 1. bump structure body; 2. metal seed layer; 3. metal column; 4. solder layer; 5. insulating ring; 6. chip; 7. lead frame; 8. third photoresist layer; 9. wafer; 10. passivation layer; 11. pad; 12. first insulating layer; 13. first sputtered layer; 14. first photoresist layer; 15. metal conductive layer; 16. second insulating layer; 17. second sputtered layer; 18. second photoresist layer. DETAILED DESCRIPTION

[0045] The preferred embodiments of the present invention are described below in conjunction with the accompanying drawings. It should be understood that the preferred embodiments described herein are only used to illustrate and explain the present invention, and are not used to limit the present invention.

[0046] In addition, in the present invention, the descriptions of "first", "second", etc. are only used for descriptive purposes, and do not specifically refer to the order or sequence, nor are they used to limit the present invention. They are only used to distinguish components or operations described with the same technical terms, and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In addition, the technical solutions and technical features between the various embodiments can be combined with each other, but they must be based on the ability of ordinary technicians in the field to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0047] The embodiment of the present invention provides a high reliability bump structure, such as Figure 4 , Figure 5 , Fig. 20 As shown, it comprises: a bump structure body 1, the bump structure body 1 comprises a metal seed layer 2, a metal column 3 and a solder layer 4 arranged in sequence from bottom to top, an insulating ring 5 is arranged outside the metal column 3, the cross section of the insulating ring 5 is a ring-shaped structure, and a first vertical distance from a side of the insulating ring 5 close to the solder layer 4 to a plane where the lower surface of the solder layer 4 is located is greater than 0;

[0048] The material of the metal seed layer 2 includes but is not limited to titanium or copper;

[0049] The material of the metal pillar 3 includes but is not limited to copper;

[0050] The material of the solder layer 4 includes but is not limited to tin;

[0051] The insulating ring 5 is made of polyimide;

[0052] The metal column 3 has a stepped columnar structure, and the diameter of the upper end of the metal column 3 is greater than the diameter of the lower end of the metal column 3;

[0053] A connecting section is provided at the lower end of the metal column 3, the lower end of the connecting section is connected to the upper end of the metal seed layer 2, and the diameter of the connecting section is smaller than the diameter of the upper end of the metal seed layer 2;

[0054] The insulating ring 5 is located outside the connecting section.

[0055] The working principle and beneficial effects of the above technical solution are as follows: Figure 1 As shown, it is the existing package welding diagram and the cross-sectional diagram at AA. Figure 2-Figure 4 for Figure 1 Schematic diagram of different connection conditions of the bump structure at B in the middle, Figure 2 Schematic diagram of the normal connection of the tin layer in the bump structure. In the figure, the bump structure body 1 is arranged on the chip 6, the upper end of the metal column 3 is provided with a solder layer 4, and the upper end of the solder layer 4 is connected to the lead frame 7. Figure 3 This is a schematic diagram of abnormal tin connection in bump structure. Figure 3 It can be seen that during the reflow process, the melted solder will climb along the metal pillar 3 to the surface of the chip 6, and then electrical problems such as cold soldering and short circuit will occur, and the reliability is poor. In order to solve the above problems, the present application sets an insulating ring 5 outside the metal pillar 3, and the insulating ring 5 is concentrically arranged with the metal pillar 3, thereby improving the structure of the bump structure body 1, such as Figure 4As shown, it is a schematic diagram of the insulating ring 5 of the bump structure of the present application. The insulating ring 5 can block the solder extending along the metal column 3 to prevent the extension of the solder, avoid the problem of cold solder joint or electrical short circuit caused by the solder extending to the chip surface, improve the reliability of the bump structure body 1, and improve the yield rate of the chip 6 package. Preferably, the insulating ring 5 is made of polyimide material, the metal column 3 can be made of copper column, and the solder layer 4 can be made of tin. During reflow soldering, the insulating ring 5 made of polyimide material has extremely high thermal stability and can withstand high temperature without causing The insulating ring 5 is not decomposed or deformed, so that the insulating ring 5 can effectively resist the melting and flow of tin during the welding process, thereby preventing the extension of tin, and the polyimide has excellent chemical stability to the tin in the solder, which helps to reduce the interaction between the solder and the polyimide. The solder is not easy to react with the polyimide, thereby avoiding the phenomenon of tin extending along the copper column due to chemical reaction. The insulating ring 5 made of polyimide also has excellent electrical insulation performance, which can effectively isolate the copper column and the solder, and prevent the solder from further extending along the copper column. Further, as Figure 5 As shown, it is another structural schematic diagram of the insulating ring 5. The insulating ring 5 protrudes radially outward along the metal column 3, thereby forming a step shape, which increases the blocking area of ​​the insulating ring 5 to the solder layer 4, further prevents the extension of the solder, and avoids the problem of cold soldering or electrical short circuit caused by the solder extending to the chip surface, thereby improving the reliability of the product. In addition, the first vertical distance from the side of the insulating ring 5 close to the solder layer 4 to the plane where the lower surface of the solder layer 4 is located is greater than 0. When the solder layer 4 melts and extends to the insulating ring 5, it stops. The insulating ring 5 controls the extension height of the solder after melting, and can ensure that there is still a section on the outer wall of the metal column 3 for the molten solder to extend, so that the solder is evenly wrapped around the outer wall of the metal column 3 between the insulating ring 5 and the solder layer 4, thereby increasing the reliability of the connection between the solder layer 4 and the metal column 3.

[0056] The present invention also provides a method for preparing a high-reliability bump structure, which is used to prepare the above-mentioned high-reliability bump structure, comprising:

[0057] An insulating ring 5 is prepared on the surface of the metal seed layer 2, and a column hole is opened in the center of the insulating ring 5;

[0058] A photoresist is coated on the insulating ring 5 to obtain a third photoresist layer 8, and the photoresist is exposed and developed to retain the electroplating area;

[0059] The metal pillar 3 and the solder layer 4 are sequentially prepared in the electroplating area by using an electroplating process;

[0060] The photoresist is removed, and the metal seed layer 2 is removed by etching to obtain the bump structure body 1 .

[0061] Preferably, the electroplating area includes a post hole and an electroplating hole connected to an upper end of the post hole, and the electroplating hole is located in the third photoresist layer 8 .

[0062] Take 2P2M packaging process as an example. Figure 6-Figure 20 As shown, the manufacturing process of the bump structure body 1 is as follows:

[0063] 1. Wafer 9 is provided, a passivation layer 10 is provided on the wafer 9, an opening is provided on the passivation layer 10, a pad 11 is provided in the opening, and the material of the pad 11 can be aluminum;

[0064] 2. A PI layer (Polyimide) is first covered on the surface of the passivation layer 10 to obtain a first insulating layer 12, leaving a window pattern for subsequent processing to protect the covered area;

[0065] 3. Sputter Ti / Cu on the surface of the first insulating layer 12 and the pad 11 for the first time to obtain a first sputtered layer 13, which is used as an electroplating conductor;

[0066] 4. coating the first sputtering layer 13 with photoresist for the first time to obtain a first photoresist layer 14, and exposing and developing the first photoresist layer 14 to retain the first electroplating area;

[0067] 5. Electroplating and growing copper in the first electroplating area to obtain a metal conductive layer 15;

[0068] 6. Remove the first photoresist layer 14 and etch away the outer first sputtering layer 13;

[0069] 7. Cover the metal conductive layer 15 and the first insulating layer 12 with a PI layer for the second time to obtain a second insulating layer 16, leaving a corresponding window pattern for subsequent processing to protect the covered area;

[0070] 8. Sputter Ti / Cu on the surface of the second insulating layer 16 and the metal conductive layer 15 for the second time to obtain a second sputtered layer 17 for use as an electroplating conductor;

[0071] 9. Coating a photoresist on the second sputtering layer 17 for the second time to obtain a second photoresist layer 18, and exposing and developing the second photoresist layer 18 to retain a second electroplating area;

[0072] 10. Electroplating and growing copper in the second electroplating area to obtain a metal seed layer 2;

[0073] 11. The second photoresist layer 18 and the metal seed layer 2 are covered with a PI layer for the third time to obtain an insulating ring 5. A column hole is set in the center of the insulating ring 5 to leave a pattern for subsequent blocking tin extension;

[0074] 12. Coating photoresist for the third time on the second photoresist layer 18 and the insulating ring 5 to obtain a third photoresist layer 8. The third photoresist layer 8 is exposed and developed to reserve the electroplating area for growing the metal column 3;

[0075] 13. Electroplating the metal pillar 3 and the solder layer 4 in the electroplating area in sequence;

[0076] 14. Remove the third photoresist layer 8, the second photoresist layer 18 and etch away the outer second sputtering layer 17;

[0077] 15. Reflow soldering makes the solder layer 4 melt and form a droplet shape by tension.

[0078] The working principle and beneficial effects of the above technical solution are as follows: through the above solution, an insulating ring 5 can be prepared outside the metal column 3, and the insulating ring 5 can block the solder extending along the metal column 3, prevent the extension of the solder, and avoid the problem of cold soldering or electrical short circuit caused by the solder extending to the chip surface, thereby improving the reliability of the bump structure body 1 and improving the yield rate of the chip 6 package. Preferably, the insulating ring 5 is made of polyimide material, the metal column 3 can be a copper column, and the solder layer 4 can be tin. During reflow soldering, the insulating ring 5 made of polyimide has extremely high thermal stability and can withstand high temperature without decomposition or deformation, so that the insulating ring 5 can effectively resist the melting and flow of tin during the welding process, thereby blocking the extension of tin, and polyimide has excellent chemical stability to tin in solder. , which helps to reduce the interaction between solder and polyimide. Solder is not easy to react with polyimide, thereby avoiding the phenomenon of tin extending along the copper column due to chemical reaction. The insulating ring 5 made of polyimide also has excellent electrical insulation performance, which can effectively isolate the copper column and solder and prevent the solder from further extending along the copper column; and the first vertical distance from the side of the insulating ring 5 prepared by the above scheme close to the solder layer 4 to the plane where the lower surface of the solder layer 4 is located is greater than 0. When the solder layer 4 melts and extends to the insulating ring 5, it stops. The insulating ring 5 controls the extension height of the solder after melting, and can ensure that there is still a section on the outer wall of the metal column 3 for the molten solder to extend, so that the solder is evenly wrapped on the outer wall of the metal column 3 between the insulating ring 5 and the solder layer 4, thereby increasing the reliability of the connection between the solder layer 4 and the metal column 3.

[0079] Based on an embodiment, in order to reduce the preparation cost of the metal column 3, the inner diameter of the insulating ring 5 is equal to the target inner diameter, and the target inner diameter is calculated by the following formula:

[0080]

[0081] Among them, r 1 is the target inner diameter, P is the rated power of chip 6, U is the minimum voltage of chip 6, H 1 is the preset height of the metal column 3, σ is the maximum current density of the material of the metal column 3, T 1 The maximum temperature allowed for chip 6 operation is preset, T 2 is the external environment temperature, π is the pi, and π is taken as 3.14.

[0082] The working principle and beneficial effects of the above technical scheme are as follows: when preparing the insulating ring 5, in order to enable the chip 6 to maintain stable power output, it is necessary to ensure that the metal column 3 has good current carrying capacity, and the inner diameter of the insulating ring 5 determines the thickness of the connecting section of the metal column 3. The target inner diameter of the insulating ring 5 can be accurately calculated through the above scheme. In the process of preparing the insulating ring 5, the inner diameter of the column hole of the insulating ring 5 is controlled based on the target inner diameter, so that the inner diameter of the column hole of the insulating ring 5 is equal to the target inner diameter, and then the radius of the connecting section of the prepared metal column 3 is equal to the inner diameter of the insulating ring 5. At this time, the metal column 3 has sufficient current carrying capacity, which can ensure the stability and reliability of the chip 6 during high-power operation, and can reduce the preparation cost of the metal column 3, avoiding the waste of preparation raw materials caused by the metal column 3 being too thick.

[0083] In the description of the present invention, it is to be understood that the terms “center”, “longitudinal”, “lateral”, “length”, “width”, “thickness”, “up”, “down”, “front”, “back”, “left”, “right”, “vertical”, “horizontal”, “top”, “bottom”, “inside”, “outside”, “clockwise”, “counterclockwise”, “axial”, “radial”, “circumferential”, etc., indicating orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0084] In the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral one; it can be a mechanical connection, an electrical connection, or communication with each other; it can be a direct connection, or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0085] Although the embodiments of the present invention have been disclosed as above, they are not limited to the applications listed in the specification and the implementation methods. They can be fully applied to various fields suitable for the present invention. For those familiar with the art, additional modifications can be easily implemented. Therefore, without departing from the general concept defined by the claims and the scope of equivalents, the present invention is not limited to the specific details and the illustrations shown and described herein.

Claims

1. A high reliability bump structure, characterized in that: include: A bump structure body (1) comprises a metal seed layer (2), a metal column (3) and a solder layer (4) arranged in sequence from bottom to top, an insulating ring (5) is arranged outside the metal column (3), the insulating ring (5) has a ring-shaped cross-section, and a first vertical distance from a side of the insulating ring (5) close to the solder layer (4) to a plane where a lower surface of the solder layer (4) is located is greater than 0.

2. A high reliability bump structure according to claim 1, characterized in that: The material of the metal seed layer (2) includes but is not limited to titanium or copper.

3. The high reliability bump structure according to claim 1, characterized in that: The material of the metal column (3) includes but is not limited to copper.

4. The high reliability bump structure according to claim 1, characterized in that: The material of the solder layer (4) includes but is not limited to tin.

5. The high reliability bump structure according to claim 1, characterized in that: The material of the insulating ring (5) includes but is not limited to polyimide.

6. The high reliability bump structure according to claim 1, characterized in that: The metal column (3) has a stepped columnar structure, and the diameter of the upper end of the metal column (3) is greater than the diameter of the lower end of the metal column (3).

7. The high reliability bump structure according to claim 1, characterized in that: A connecting section is provided at the lower end of the metal column (3), the lower end of the connecting section is connected to the upper end of the metal seed layer (2), and the diameter of the connecting section is smaller than the diameter of the upper end of the metal seed layer (2).

8. The high reliability bump structure according to claim 7, characterized in that: The insulating ring (5) is located outside the connecting section.

9. A method for preparing a high-reliability bump structure, used for preparing a high-reliability bump structure as claimed in any one of claims 1 to 8, characterized in that: include: An insulating ring (5) is prepared on the surface of the metal seed layer (2), and a column hole is opened in the center of the insulating ring (5); A photoresist is coated on the insulating ring (5) to obtain a third photoresist layer (8), and the photoresist is exposed and developed to retain the electroplating area; Using an electroplating process to sequentially prepare a metal column (3) and a solder layer (4) in an electroplating area; The photoresist is removed, and the metal seed layer (2) is removed by etching to obtain a bump structure body (1).

10. The method for preparing a high-reliability bump structure according to claim 9, characterized in that: The electroplating area includes a column hole and an electroplating hole connected to the upper end of the column hole, and the electroplating hole is located in the third photoresist layer (8).

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