Multi-chip module packaging structure and packaging method

By stacking integrated substrates and chips in a multi-chip packaging structure and applying protective layers on the surface of the chip, the problems of component damage and poor light propagation paths during the packaging process are solved, and high-quality electrical connections and effective light source propagation are achieved.

CN120033187APending Publication Date: 2025-05-23BEIJING SMARTCHIP MICROELECTRONICS TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202510401419.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-04-01
Publication Date
2025-05-23

AI Technical Summary

Technical Problem

The existing multi-chip packaging structures are prone to damage components during the packaging process, and the media inside the packaging cannot form an effective light propagation path, affecting the light source propagation of the LED chip.

Method used

A multi-chip assembly packaging structure is designed to improve solder quality and reduce assembly errors by stacking and integrating substrates, first chips and second chips, and applying protective layers, including dams and crystal coatings on the surfaces of the first chips, second chips and LED chips.

Benefits of technology

It improves the quality and stability of electrical connections between multiple chips, reduces assembly errors, saves space, improves production efficiency and accuracy, and forms a light propagation path through transparent crystal-covered glue to ensure that the light source of the LED chip can propagate effectively.

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Abstract

The invention relates to the technical field of chip packaging, and discloses a multi-chip assembly packaging structure and method, and the structure comprises a substrate which is provided with a first surface and a second surface; the first chip is arranged on the first surface of the substrate, and the first chip is electrically connected with the substrate; the second chip is arranged on the surface, far away from the substrate, of the first chip, and the second chip is electrically connected with the substrate; the plurality of LED chips are arranged on the first surface of the substrate, the plurality of LED chips are distributed on the two sides of the first chip, and the LED chips are electrically connected with the second chip; and the protective layer covers the surfaces of the first chip, the second chip and the plurality of LED chips. According to the invention, the layout is reasonable, the welding quality and stability are improved, the assembly error is reduced, the space is saved, the production efficiency and accuracy are improved, and the qualified mechanical strength and the neat appearance of a packaged device are ensured.
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Description

Technical Field

[0001] The present invention relates to the technical field of chip packaging, and in particular to a multi-chip component packaging structure and a packaging method. Background Art

[0002] Packaging refers to the use of precision processing technology to assemble the chips and other devices placed on the substrate into a complete packaging structure or electronic product through pasting, welding, plastic sealing, etc. The packaging structure is crucial to electronic packaging products. A qualified packaging structure has the function of sealing and protection, which can reduce the external environmental impact on the electronic devices inside the package, such as dust, moisture, impact load, etc., and relieve the stress caused by the external environment or the chip and the lead itself, so that it can maintain stable normal operation in a variety of external environments. In addition, the packaging structure also has the function of establishing electrical connections between the chip and the outside world. The input / output terminals and other electronic devices on the chip are connected to the substrate through leads, and the substrate is connected to the external pins of the package through its internal leads, realizing the connection of internal and external circuits and complete functions. Therefore, the packaging structure is crucial for the packaging of electronic devices.

[0003] The connection between multiple chips and substrates requires multiple leads, especially for chips with more input / output ports. This results in a large number of leads and a high arrangement density. The existing packaging structure of multiple chips is locally compact, which can easily cause damage to components during the packaging process. Secondly, the existing packaging structure of multiple chips usually uses black resin plastic sealing, and the medium inside the packaging body is black, which cannot form an effective light propagation path. Therefore, there is an urgent need for a reasonable multi-chip component packaging structure and packaging method. Summary of the invention

[0004] The object of the present invention is to provide a multi-chip module packaging structure and a packaging method, aiming to solve or improve at least one of the above-mentioned technical problems.

[0005] To achieve the above object, the present invention provides the following solution: The present invention provides a multi-chip module packaging structure, comprising:

[0006] a substrate having a first surface and a second surface;

[0007] A first chip is disposed on a first surface of the substrate, and the first chip is electrically connected to the substrate;

[0008] A second chip is disposed on a surface of the first chip away from the substrate, and the second chip is electrically connected to the substrate;

[0009] A plurality of LED chips are disposed on the first surface of the substrate, the plurality of LED chips are distributed on both sides of the first chip, and the LED chips are electrically connected to the second chip;

[0010] A protective layer covers the surfaces of the first chip, the second chip and the plurality of LED chips.

[0011] Optionally, also include:

[0012] A plurality of pins are disposed on the second surface of the substrate, and the pins are electrically connected to the substrate.

[0013] Optionally, the protective layer includes:

[0014] A dam is provided on the first surface of the substrate, and the dam covers the first chip, the second chip and the plurality of LED chips;

[0015] The flip chip adhesive is filled in the dam.

[0016] Optionally, a plastic packaging material is also included, covering the surface of the protective layer.

[0017] Optionally, a pair of pull-up resistors are further included, which are respectively located on two sides of the first chip, and the pull-up resistors are arranged on the first surface of the substrate through a pair of resistor pads.

[0018] Optionally, a plurality of substrate pads are disposed on the first surface of the substrate and are distributed on both sides of the first chip.

[0019] Optionally, a plurality of chip pads are distributed on the first chip and the second chip, and are distributed on both sides of the first chip and the second chip, and the chip pads are connected to the substrate pads via wires.

[0020] Optionally, a P-pole pin and an N-pole pin are respectively provided at the upper left corner and the lower right corner of the LED chip, and the P-pole pin and the N-pole pin are connected to the chip pad on the second chip through wires.

[0021] Optionally, a circuit is integrated in the substrate.

[0022] The present invention also provides a multi-chip assembly packaging method, comprising the following steps:

[0023] Disposing the first chip on the first surface of the substrate;

[0024] Disposing the second chip on a surface of the first chip away from the substrate;

[0025] Disposing a plurality of the LED chips on the first surface of the substrate and on both sides of the first chip;

[0026] Electrically connecting the first chip to the substrate, the second chip to the substrate, and the LED chip to the second chip;

[0027] The protection layer is covered on the first chip, the second chip and the plurality of LED chips.

[0028] The present invention discloses the following technical effects:

[0029] The substrate, the first chip and the second chip are stacked and integrated together, and multiple LED chips are arranged on both sides of the first chip, and then a protective layer is coated on the surface of the first chip, the second chip and the multiple LED chips, so that the layout of the multiple chips is reasonable, the welding quality and stability when the multiple chips and the substrate are electrically connected to each other are improved, assembly errors are reduced, space is saved, production efficiency and accuracy are improved, and the qualified mechanical strength and neat appearance of the packaged device are ensured.

[0030] By arranging flip chip adhesive on the first chip, the second chip and the plurality of LED chips, transparency between the plurality of chips and the upper surface of the packaging structure can be achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The drawings constituting a part of the present application are used to provide a further understanding of the present application. The illustrative embodiments and descriptions of the present application are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0032] Figure 1 It is a schematic diagram of the overall structure of the present invention;

[0033] Figure 2 It is a top view before damming of the present invention;

[0034] Figure 3 A bottom view of the substrate of the present invention;

[0035] Figure 4 It is a top view of the packaging structure before the crystal glue is poured in the present invention;

[0036] Figure 5 This is a three-dimensional diagram of the packaging structure before the crystal glue is poured in the present invention;

[0037] Figure 6 It is a three-dimensional diagram of the packaging structure after the crystal glue is poured in the present invention.

[0038] In the figure: 1. substrate; 2. pins; 3. first chip; 4. second chip; 5. leads; 6. LED chip; 7. pull-up resistor; 8. dam; 9. flip chip glue; 10. plastic packaging material; 11. chip pad; 12. substrate pad; 13. P-pole pin; 14. N-pole pin; 15. resistor pad. DETAILED DESCRIPTION

[0039] In semiconductor manufacturing, packaging refers to the process of fixing the chip on a substrate, connecting it to the external circuit through wire bonding or other means, and finally sealing it with protective materials. Common semiconductor packaging structures usually include:

[0040] ·Chip: The core part of a semiconductor device, usually made of materials such as silicon and gallium arsenide. ·Substrate: A platform used to fix the chip and support wire bonding. Common substrate materials include ceramics, plastics, and metals.

[0041] Lead Frame: A metal frame used to connect the chip to the external circuit.

[0042] Wire Bonding: Connecting the pads on the chip to the lead frame through thin gold or copper wires.

[0043] Molding Compound: A protective material used to seal chips and lead frames, usually epoxy resin.

[0044] Package: The overall structure after packaging, usually with one or more pins for connecting to external circuits.

[0045] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0046] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0047] Reference Figure 1-Figure 6 The present invention provides a multi-chip module packaging structure, comprising:

[0048] A substrate 1 having a first surface and a second surface;

[0049] A first chip 3 is disposed on a first surface of the substrate 1, and the first chip 3 is electrically connected to the substrate 1;

[0050] The second chip 4 is disposed on a surface of the first chip 3 away from the substrate 1, and the second chip 4 is electrically connected to the substrate 1;

[0051] A plurality of LED chips 6 are arranged on the first surface of the substrate 1. The plurality of LED chips 6 are distributed on both sides of the first chip 3, and the LED chips 6 are electrically connected to the second chip 4.

[0052] A protective layer covers the surfaces of the first chip 3, the second chip 4, and the plurality of LED chips 6.

[0053] By stacking and integrating the substrate 1, the first chip 3, and the second chip 4 together, arranging the plurality of LED chips 6 on both sides of the first chip 3, and then coating a protective layer on the surfaces of the first chip 3, the second chip 4, and the plurality of LED chips 6, the layout of the plurality of chips is reasonable, the welding quality and stability during the electrical connection between the plurality of chips and the substrate 1 are improved, assembly errors are reduced, space is saved, and production efficiency and accuracy are increased.

[0054] Furthermore, the first chip 3 is located at the central position of the first surface of the substrate 1, the second chip 4 is located at the central position of the upper surface of the first chip 3. Both the first chip 3 and the second chip 4 are in the shape of flat cuboids, saving space and making the packaging structure more compact.

[0055] In an embodiment of the present invention, it further includes:

[0056] A plurality of pins 2 are arranged on the second surface of the substrate 1, and the pins 2 are electrically connected to the substrate 1.

[0057] The pins 2 are also in the shape of flat cuboids. There are eight pins in total, divided into two groups, located at the upper and lower positions of the second surface of the substrate 1 respectively, and arranged in an equidistant array. The pins 2 achieve electrical connection with the first chip 3 and the second chip 4 through the internal circuit and leads of the substrate 1. The pins 2 provide electrical connection between the chip and the external circuit, becoming a window of the overall packaging structure, ensuring the coordinated operation of the chip and other systems.

[0058] The material of the pins 2 can be selected as:

[0059] Brass: Brass is one of the most commonly used materials for making the pins of plug-in resistors. It has good processing performance and corrosion resistance, and the price is relatively cheap.

[0060] Phosphor bronze: Phosphor bronze has good mechanical strength and high-temperature oxidation resistance, and is also very corrosion-resistant. These characteristics make phosphor bronze pins very popular in high-demand electronic products, ensuring the stability and durability of the devices.

[0061] Gold plating: Gold-plated pins have better texture and aesthetic expressiveness in appearance. The gold-plated layer can well prevent oxidation, thereby improving the corrosion resistance and service life of the pins.

[0062] Copper: Copper is one of the main materials for the pins of electronic components. Depending on the product requirements, copper may be plated with tin or nickel.

[0063] Iron: In some cases, the pins of electronic components are also made of iron material and the surface is plated with nickel.

[0064] Furthermore, since the existing packaging structure is packaged with opaque packaging materials, the light source of the LED chip inside some packaging structures cannot be transmitted, which will cause great difficulties for some chips that perform light sensing inside the package. In particular, some electronic packaging products that need to ensure uniform illumination of the LED chip, therefore, in one embodiment of the present invention, the protective layer includes:

[0065] A dam 8 is disposed on the first surface of the substrate, and the dam 8 covers the first chip 3, the second chip 4 and the plurality of LED chips 6;

[0066] The flip chip adhesive 9 is filled in the dam 8 .

[0067] The dam 8 is fixed on the first surface of the substrate 1 by drawing glue and building a wall, and is located around the first chip 3, the second chip 4, the lead 5, the LED chip 6, and the rectangular substrate pad 12. The dam 8 is a "convex" structure. Its beneficial effect is to prepare for the subsequent process of pouring crystal glue 9 and define the exact range of pouring glue. The dam 8 will cover part of the pull-up resistor 7 and part of the resistor pad 15, but because the material of the dam 8 is a glue material, and the process of drawing glue and building a wall is after the pull-up resistor 7 is welded, the dam 8 will not affect the structure of the pull-up resistor 7 and the resistor pad 15, and part of the pull-up resistor 7 and part of the resistor pad 15 will exist inside the dam 8.

[0068] The flip chip adhesive 9 is located on the inner side of the dam 8, surrounded and fixed by the dam 8, covering and wrapping the first chip 3, the second chip 4, the lead 5, the LED chip 6, the pull-up resistor 7, the chip pad 11, the substrate pad 12, the P-pole pin 13, the N-pole pin 14, and the resistor pad 15, and is in a transparent glue state. Since the flip chip adhesive 9 is a gel-like fluid when it is poured, it will not affect the shape and structure of the above structure. Therefore, after the flip chip adhesive 9 is baked and cured, the shape and structure of the above structure are still retained inside the flip chip adhesive 9. The flip chip adhesive 9 wraps and covers the lead 5. In the packaging structure with densely arranged leads, its beneficial effect lies in buffering and protection, and at the same time, it can make the transparency between multiple chips and the upper surface of the packaging structure.

[0069] The flip chip adhesive 9 has low thermal expansion coefficient, high bonding strength, good fluidity, fast curing, and heat and chemical resistance.

[0070] In one embodiment of the present invention, a plastic packaging material 10 is further included, covering the surface of the protective layer.

[0071] The plastic encapsulation material 10 covers and wraps the substrate 1, the dam 8, and the flip chip adhesive 9, and is located on the upper part of the substrate 1, the dam 8, and the flip chip adhesive 9 to form an overall packaging structure. Similarly, the plastic encapsulation material 10 wraps and covers the substrate 1, the dam 8, and the flip chip adhesive 9 by injecting epoxy resin, and will not affect the structural shape of the substrate 1, the dam 8, and the flip chip adhesive 9. The plastic encapsulation material 10 serves as a shell on the upper part of the overall packaging structure, and its beneficial effect is to protect the packaging structure.

[0072] In one embodiment of the present invention, a pair of pull-up resistors 7 are further included. The pull-up resistors 7 are rectangular and located on both sides of the first chip 3. The pull-up resistors 7 are arranged on the first surface of the substrate 1 through a pair of resistor pads 15. The resistor pads 15 are flat rectangular.

[0073] The function of the pull-up resistor 7 is that, on the wire connected to the pull-up resistor 7, if the external component is not enabled, the pull-up resistor 7 will "weakly" "pull up" the input voltage signal. When the external component is not connected, the external "appears" to be high impedance to the input terminal. At this time, the voltage at the input port can be pulled up to a high level through the pull-up resistor 7. If the external component is enabled, it will cancel the high level set by the pull-up resistor 7. In this way, the pull-up resistor 7 can enable pin 2 to maintain a certain logic level even when no external component is connected.

[0074] In one embodiment of the present invention, a plurality of substrate pads 12 are disposed on the first surface of the substrate 1 and distributed on both sides of the first chip 3 .

[0075] In one embodiment of the present invention, a plurality of chip pads 11 are distributed on the first chip 3 and the second chip 4 , distributed on both sides of the first chip 3 and the second chip 4 , and the chip pads 11 are connected to the substrate pads 12 through leads 5 .

[0076] The substrate 1 and the first chip 3 and the second chip 4 are connected by bonding multiple leads 5. The electrical connection between the first chip 3 and the second chip 4 and the substrate 1 is realized, and then the electrical connection between the first chip 3 and the second chip 4 and the pin 2 and the external circuit is realized, which is helpful for realizing the functions of the first chip 3 and the second chip 4.

[0077] In one embodiment of the present invention, a P-pole pin 13 and an N-pole pin 14 are respectively provided at the upper left corner and the lower right corner of the LED chip 6 , and the P-pole pin 13 and the N-pole pin 14 are connected to the chip pad 11 on the second chip 4 through the lead 5 .

[0078] There are two LED chips 6 in the form of rectangular prisms. The P-pole pin 13 and the N-pole pin 14 are both flat rectangular prisms. The P-pole pin 13 and the N-pole pin 14 are connected to the chip pad 11 on the second chip 4 by bonding multiple leads 5, providing an electrical connection between the LED chip 6 and the second chip 4, which helps to realize the function of the LED chip 6.

[0079] In one embodiment of the present invention, a circuit is integrated in the substrate 1 .

[0080] Furthermore, the second chip 4 is a light receiving sensor as a receiving end, which has the function of receiving light sources, and will start working when the metered dose of light reaches a certain level. The LED chip 6 is a light transmitter as a transmitting end, and light is transmitted between the LED chip 6 and the second chip 4 by diffuse reflection. The protective structure composed of the second chip 4 and the LED chip 6 is formed by the dam 8, the flip chip glue 9 and the plastic packaging material 10. During the light propagation process, the light emitted by the LED chip 6 will first pass through the flip chip glue 9 and be emitted to the top interface of the flip chip glue 9, that is, the bottom interface of the plastic packaging material 10. After being reflected by it, it will be transmitted to the surface of the second chip 4 through the flip chip glue 9 again and received. In this application, the light propagation path is formed by the flip chip glue 9 of transparent material, and the outside is composed of the plastic packaging material 10 of black material, thereby forming a reflective interface.

[0081] The present invention also provides a multi-chip assembly packaging method, comprising the following steps:

[0082] The first chip 3 is arranged on the first surface of the substrate 1, preferably by using a patch adhesive;

[0083] The second chip 4 is arranged on the surface of the first chip 3 away from the substrate 1, preferably by using a patch adhesive;

[0084] A plurality of LED chips 6 are disposed on the first surface of the substrate 1 and are located on both sides of the first chip 3;

[0085] The first chip 3 is electrically connected to the substrate 1, the second chip 4 is electrically connected to the substrate 1, and the LED chip 6 is electrically connected to the second chip 4;

[0086] The pull-up resistor 7 is fixed on the resistor pad 1 by welding, and the resistor pad 1 is fixedly connected to the substrate 1 .

[0087] A protective layer is covered on the first chip 3, the second chip 4 and the plurality of LED chips 6. Specifically, a dam 8 is fixed to the first surface of the substrate 1 by drawing glue to build a wall, and an exact glue filling range is defined. Then, a flip chip glue 9 is filled in the dam 8, so that the dam 8 and the flip chip glue 9 cover the first chip 3, the second chip 4, the lead 5, the LED chip 6, the pull-up resistor 7, the chip pad 11, the substrate pad 12, the P-pole pin 13, the N-pole pin 14, and the resistor pad 15.

[0088] The plastic encapsulation material 10 is wrapped around the cover substrate 1, the dam 8 and the flip chip adhesive 9 by injecting epoxy resin to form an overall packaging structure.

[0089] In the description of the present invention, it should be understood that the terms "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside" and "outside" etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present invention.

[0090] The embodiments described above are only descriptions of the preferred modes of the present invention, and are not intended to limit the scope of the present invention. Without departing from the design spirit of the present invention, various modifications and improvements made to the technical solutions of the present invention by ordinary technicians in this field should all fall within the protection scope determined by the claims of the present invention.

Claims

1. A multi-chip module packaging structure, characterized in that: include: A substrate (1) having a first surface and a second surface; A first chip (3) is arranged on a first surface of the substrate (1), and the first chip (3) is electrically connected to the substrate (1); A second chip (4) is arranged on a surface of the first chip (3) away from the substrate (1), and the second chip (4) is electrically connected to the substrate (1); A plurality of LED chips (6) are arranged on the first surface of the substrate (1), the plurality of LED chips (6) are distributed on both sides of the first chip (3), and the LED chips (6) are electrically connected to the second chip (4); A protective layer covers the surfaces of the first chip (3), the second chip (4) and the plurality of LED chips (6).

2. The multi-chip module packaging structure according to claim 1, characterized in that: Also includes: A plurality of pins (2) are arranged on the second surface of the substrate (1), and the pins (2) are electrically connected to the substrate (1).

3. The multi-chip module packaging structure according to claim 1, characterized in that: The protective layer comprises: A dam (8) is arranged on the first surface of the substrate, and the dam (8) covers the first chip (3), the second chip (4) and the plurality of LED chips (6); The chip-covering adhesive (9) is filled in the dam (8).

4. The multi-chip module packaging structure according to claim 1, characterized in that: It also includes a plastic packaging material (10) covering the surface of the protective layer.

5. The multi-chip module packaging structure according to claim 1, characterized in that: It also includes a pair of pull-up resistors (7), which are respectively located on two sides of the first chip (3); the pull-up resistors (7) are arranged on the first surface of the substrate (1) via a pair of resistor pads (15).

6. The multi-chip module packaging structure according to claim 1, characterized in that: A plurality of substrate pads (12) are provided on the first surface of the substrate (1) and are distributed on both sides of the first chip (3).

7. The multi-chip module packaging structure according to claim 6, characterized in that: A plurality of chip pads (11) are distributed on the first chip (3) and the second chip (4), and are distributed on both sides of the first chip (3) and the second chip (4); the chip pads (11) are connected to the substrate pads (12) via leads (5).

8. The multi-chip module packaging structure according to claim 7, characterized in that: A P-pole pin (13) and an N-pole pin (14) are respectively provided at the upper left corner and the lower right corner of the LED chip (6); the P-pole pin (13) and the N-pole pin (14) are connected to the chip pad (11) on the second chip (4) via a lead wire (5).

9. The multi-chip module packaging structure according to claim 1, characterized in that: The substrate (1) has a circuit integrated therein.

10. A multi-chip module packaging method, based on a multi-chip module packaging structure according to any one of claims 1 to 9, characterized in that: The following steps are involved: Arranging the first chip (3) on the first surface of the substrate (1); Arranging the second chip (4) on a surface of the first chip (3) away from the substrate (1); Arranging a plurality of the LED chips (6) on the first surface of the substrate (1) and located on both sides of the first chip (3); Electrically connecting the first chip (3) and the substrate (1), the second chip (4) and the substrate (1), and the LED chip (6) and the second chip (4); The protective layer is covered on the first chip (3), the second chip (4) and the plurality of LED chips (6).