Power supply protection circuit based on ideal diode controller and automobile circuit
By designing a power protection circuit based on an ideal diode controller, using the back-to-back connection of the field effect tube and the specific resistor and capacitance structure, the problem that the existing power protection circuit cannot effectively limit surges and blank short spurious current spikes is solved, and a more stable and reliable power protection effect is achieved.
Patent Information
- Application Number
- CN202510205328.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-24
- Publication Date
- 2025-05-23
AI Technical Summary
Existing power protection circuits based on MOSFETs and ideal diode controllers cannot effectively limit surges, slow down HGATE responses, and blank short spurious current spikes, resulting in false trigger short circuit faults and error resets.
A power protection circuit based on an ideal diode controller is designed. By connecting the field effect transistors Q1 and Q2 back to back and connected with the ideal diode controller, combining the series structure of capacitor CISCP and resistor RSET, short spurious current spikes are blanked, and oscillation is suppressed through a low-pass filter formed by resistor Rvs and capacitor Cvs, and inrush current is limited through resistor RG and capacitor CdVdT.
Effectively blank short spurious current spikes, suppress oscillation, limit inrush current, avoid false triggering short circuit faults and error resets, and improve the stability and reliability of power protection circuits.
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Figure CN120033641A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of automobile circuit technology, and in particular to a power protection circuit and an automobile circuit based on an ideal diode controller. Background Art
[0002] An automobile power system is provided in the automobile to supply power to various electrical components in the automobile.
[0003] Two P-channel MOSFETs and an ideal diode controller are often used in current automotive power systems to provide reverse input protection and voltage retention. Two P-channel MOSFETs are connected back-to-back and connected to an ideal diode controller. During normal battery operation, the body diode of the MOSFET will be forward biased and turned on for a short time until the gate voltage is pulled below the source, turning on the MOSFET. When the battery polarity is reversed, the gate-source voltage becomes a positive voltage and turns off the MOSFET, thereby protecting the downstream circuit from negative voltage.
[0004] However, the existing power protection circuit based on MOSFET and ideal diode controller cannot effectively limit surge to slow down the HGATE response of the ideal diode controller, cannot provide blanking for short stray current spikes, resulting in erroneous triggering of short circuit faults; and cannot suppress oscillation, resulting in erroneous reset. Summary of the invention
[0005] The present application provides a power protection circuit and an automotive circuit based on an ideal diode controller, which can blank any short stray current spikes, suppress oscillations and effectively limit surges.
[0006] According to the present application, a power protection circuit based on an ideal diode controller is provided, comprising an ideal diode controller, a field effect transistor Q1 and a field effect transistor Q2;
[0007] The drain of the field effect tube Q1 is connected to the drain of the field effect tube Q2; the source of the field effect tube Q1 is connected to the power input terminal; the source of the field effect tube Q2 is connected to the power output terminal; the gate of the field effect tube Q1 and the gate of the field effect tube Q2 are connected to the two field effect tube on / off signal output pins of the ideal diode controller in a one-to-one correspondence;
[0008] The high-level chip select pin CS+ of the ideal diode controller and the resistor R SET Connection, resistor R SET The other end is connected to the connection circuit between the drain of field effect transistor Q1 and the drain of field effect transistor Q2; the capacitor C is connected in series between the programming and debugging pin of the ideal diode controller and the high-level chip select pin ISCP .
[0009] In some possible implementations, the power input pin of the ideal diode controller is connected to the resistor Rvs, and the other end of the resistor Rvs is connected to the connection circuit between the drain of the field effect transistor Q1 and the drain of the field effect transistor Q2; the power input pin of the ideal diode controller is also connected to the capacitor Cvs, and the capacitor Cvs is grounded.
[0010] In some possible implementations, the power switch pin of the ideal diode controller is connected to a connection circuit between a power input terminal and a source of the field effect transistor Q1;
[0011] The output pin of the ideal diode controller is connected to the connection circuit between the power supply output terminal and the source of the field effect transistor Q2.
[0012] In some possible implementations, the capacitor pin of the ideal diode controller is connected to the capacitor C CAP Connection, capacitor C CAP The other end is connected to the connection circuit between the drain of the field effect transistor Q1 and the drain of the field effect transistor Q2.
[0013] In some possible implementations, the current detection pin of the ideal diode controller is connected to a connection circuit between the drain of the field effect transistor Q1 and the drain of the field effect transistor Q2.
[0014] In some possible implementations, a low-level chip select pin CS- of the ideal diode controller is connected to the drain of the field effect transistor Q2.
[0015] In some possible implementations, the switching pin of the ideal diode controller is connected in series with resistors R3 and R4 in sequence, and resistor R4 is grounded; the undervoltage lockout pin of the ideal diode controller is connected with resistors R1, R2 and capacitor Cuv, and the other end of resistor R1 is connected to the connection circuit between the switching pin of the ideal diode controller and resistor R3; resistor R2 and capacitor Cuv are both grounded; and the overvoltage protection pin of the ideal diode controller is connected to the connection circuit between resistors R3 and R4.
[0016] In some possible implementations, a resistor R is connected in series between the programming and debugging pin of the ideal diode controller and the source of the field effect transistor Q2. ISCP .
[0017] In some possible implementations, one of the field effect transistor on / off signal output pins of the ideal diode controller is connected to the resistor R G Connect one end of the resistor R G The other end of the capacitor C dVdT Connection, capacitor C dVdT Ground.
[0018] According to the present application, an automotive circuit is also provided, including a power protection circuit based on an ideal diode controller.
[0019] Compared with the prior art, the present invention has the following beneficial effects:
[0020] The present application provides a power protection circuit and an automotive circuit based on an ideal diode controller, which can blank any short stray current spikes and suppress oscillation. The power protection circuit connects two field effect transistors back to back and connects the two field effect transistors to an ideal diode controller to achieve the circuit's directional input protection and output voltage holding functions. By connecting the programming and debugging pin I SCP Connect capacitor C in series with high-level chip select pin CS+ ISCP , to blank any short stray current spikes, thereby avoiding erroneous triggering of short-circuit faults due to fast transients such as input micro-interruption (LV124, E-10), AC superposition (LV124, E-06) or ISO7637-2 pulse 2A in the car; the power protection circuit also connects the power input pin of the ideal diode controller to the resistor Rvs, the other end of the resistor Rvs is connected to the connection circuit of the drain of the field effect transistor Q1 and the drain of the field effect transistor Q2, the power input pin of the ideal diode controller is also connected to the capacitor Cvs, and the capacitor Cvs is grounded; a low-pass filter is formed by the resistor Rvs and the capacitor Cvs to suppress oscillation; the power protection circuit also connects the HGATE pin of the ideal diode controller to the resistor R G Connection, resistor R G With capacitor C dVdT Connection, capacitor C dVdT Ground; through resistor R G With capacitor C dVdT This can result in slower HGATE recovery when there is a positive line transient on the input line, causing the HGATE-OUT effective voltage to drop below the nominal value.
[0021] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS
[0022] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.
[0023] Figure 1 is a circuit diagram of a power protection circuit based on an ideal diode controller provided in an embodiment of the present application;
[0024] Figure 2 It is a common PMOS power protection circuit;
[0025] Figure 3 It is an existing power protection circuit;
[0026] Figure 4 It is the internal structure of the ideal diode controller;
[0027] Figure 5 It is the internal structure of the reverse battery protection function of the ideal diode controller;
[0028] Figure 6 It is the internal structure of the load switch control function of the ideal diode controller;
[0029] Figure 7 It is an inrush current limiting circuit structure;
[0030] Figure 8 It is the internal structure of the short-circuit protection function of the ideal diode controller;
[0031] Fig. 9 It is the internal structure of the low power mode control function of the ideal diode controller;
[0032] Fig.10 It is an ideal diode controller battery voltage detection structure;
[0033] Fig.11 It is the internal structure of the overvoltage protection function of the ideal diode controller. DETAILED DESCRIPTION
[0034] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.
[0035] It should be noted that the following detailed descriptions are illustrative and are intended to provide some possible implementations of the present application. Unless otherwise specified, all technical and scientific terms used herein have the same meanings as those commonly understood by those skilled in the art to which the present application belongs.
[0036] First, an application scenario of a power protection circuit based on an ideal diode controller provided in an embodiment of the present application is described.
[0037] The power systems of current vehicles traditionally use Schottky diodes to provide reverse polarity protection to prevent field power wiring errors and provide immunity to lightning and industrial surges. Schottky diodes are widely used in power system design to provide protection under various input power fault conditions and provide system redundancy by paralleling power supplies. Automotive power system designs often use power Schottky diodes at the input to provide protection under battery reverse and various automotive electrical transient conditions, as well as to provide system redundancy or increase power capacity by using ORing circuits for two or more power supplies. However, the forward voltage drop of Schottky diodes will produce significant power losses at high currents, which requires the use of heat sinks and larger PCB space for thermal management. Forward conduction losses and related thermal management will reduce efficiency and increase system cost and space. As system power levels increase and power density requirements increase, Schottky diodes are no longer the preferred choice for the design of new generation high-performance systems.
[0038] To reduce the forward voltage drop of the diode, the Schottky diode can be replaced with a P-channel MOSFET with its body diode in the same direction as the Schottky diode. Figure 2 As shown, during normal battery operation, the body diode of the MOSFET will be forward biased and conduct for a short time until the gate voltage is pulled below the source, turning the MOSFET on. When the battery polarity is reversed, the gate-source voltage becomes positive and turns the MOSFET off, protecting the downstream circuitry from negative voltages. However, since the P-channel MOSFET does not block reverse current, it does not rectify line disturbances, which in turn causes an increase in the RMS input current. Since the MOSFET remains on and the forward voltage drop is low, the power dissipation on the MOSFET may not be a major issue, but the RMS current in the output electrolytic capacitor will generate additional heat on the capacitor due to the ESR. To prevent the capacitor from being damaged by overheating, the required capacitance can be split into multiple parallel capacitors to reduce the ESR, which increases system cost and space. In addition, the P-channel MOSFET achieves self-biasing by a simple method of pulling its gate pin low, and the P-channel MOSFET exhibits poor cold-crank performance (operating at low input voltage). During severe cold-cranking with low battery voltage, the P-channel MOSFET series resistance increases dramatically, which results in a higher voltage drop across the P-channel MOSFET. In addition, due to the high gate-to-source voltage threshold (VT), turning off the P-channel MOSFET sometimes causes a system reset.
[0039] The automotive battery power line is prone to transients when running the system. In order to ensure that the battery can be properly powered under various conditions, the typical protection required by the circuit includes overvoltage, overload, reverse polarity, and jump start, etc. The ideal diode controller can drive an external N-channel MOSFET to emulate an ideal diode with ultra-low forward voltage drop and negligible reverse current. In this case, using an ideal diode controller can improve the efficiency and performance of battery input protection applications and power ORing applications.
[0040] The ideal diode controller includes DGATE pin, CAP pin, VS pin, C pin, CS+ pin, CS- pin, HGATE pin, Iscp pin, OUT pin, pin, EN pin, pin, GND pin, OV pin, UVLO pin, SW pin, and A pin.
[0041] Among them, the DGATE pin and the HGATE pin are both the on / off signal output pins of the field effect transistor (MOSFET); the DGATE pin is an important pin in the ideal diode and hot-swap controller, controlling the role of the MOSFET. Its main function is to receive the signal from the internal gate drive amplifier and control the on / off of the external N-channel MOSFET accordingly; when the gate drive amplifier detects the voltage difference between IN and OUT (or SENSE+ and SENSE-), it drives the DGATE pin to turn on the MOSFET, thereby realizing the function of the ideal diode; HGATE: is an important pin of the hot-swap controller, which is responsible for controlling the on / off of the hot-swap MOSFET; the function of the HGATE pin is to manage the connection and disconnection of the power supply by controlling the gate voltage of the MOSFET. When the voltage of the Hgate pin increases, it gradually turns on the MOSFET, allowing current to flow into the load. If a fault condition is detected, such as a short circuit in the input power supply or excessive reverse current, the Hgate pin will be pulled low, quickly turning off the MOSFET, thereby protecting the system from damage.
[0042] CAP pin is a capacitor pin; VS pin is a power input pin; C pin is a current detection pin; CS+ pin is a high-level chip select pin, CS- pin is a low-level chip select pin, CS+ pin and CS- pin are usually used to control the enable or disable of peripheral devices; Iscp pin is a programming and debugging pin; OUT pin is an output pin; The pins are used for fault indication, protection mechanism and status feedback; the EN pin is the enable pin; The pin is the pin for controlling or instructing the controller to enter sleep mode; the GND pin is the ground pin; the OV pin is the overvoltage protection pin; the UVLO pin is the undervoltage lockout pin; the SW pin is the switching pin; and the A pin is the power switch pin.
[0043] The ideal diode controller can use the LM74912-Q1 controller; the existing power protection circuit based on the ideal diode controller, such as Figure 3 As shown, it includes an ideal diode controller, field effect transistor Q1, field effect transistor Q2, resistor R 1 , resistor R 2 , resistor R 3 , resistor R SET , resistor R SCP , capacitor C IN , capacitor C OUT and a bidirectional trigger diode; the drain of the field effect transistor Q1 is connected to the drain of the field effect transistor Q2; the source of the field effect transistor Q1 is connected to the power input terminal VBATT; the source of the field effect transistor Q2 is connected to the power output terminal VOUT; the gate of the field effect transistor Q1 is connected to the DGATE pin of the ideal diode controller; the gate of the field effect transistor Q2 is connected to the HGATE pin of the ideal diode controller; a resistor R is connected between the SW pin and the UVLO pin of the ideal diode controller 1 , connect a resistor R between the UVLO pin and the OV pin 2 , the OV pin is also connected to the resistor R 3 Connection, resistor R 3 Ground; a capacitor is connected in series between the CAP pin and the drain of the field effect tube Q1; the VS pin and the C pin are both connected to the drain of the field effect tube Q2; a resistor R is connected between the CS+ pin and the drain of the field effect tube Q2 SET ; The CS- pin is directly connected to the drain of the field effect transistor Q2; A resistor RSCP is connected in series between the Iscp pin and the source of the field effect transistor Q2; The pin is directly connected to the source of the field effect transistor Q2, and the source of the field effect transistor Q2 is also connected to the capacitor C OUT Connection, capacitor C OUT Ground; the source of field effect tube Q1 and capacitor C IN Connected to bidirectional trigger diode; capacitor C IN and the bidirectional trigger diode are both grounded.
[0044] but Figure 3 The existing power protection circuit shown cannot effectively limit surges to slow down the HGATE response, cannot provide blanking for short stray current spikes, resulting in erroneous triggering of short circuit faults, and cannot suppress oscillation, resulting in erroneous resets.
[0045] In this application scenario, the embodiment of the present application provides a power protection circuit based on an ideal diode controller, which has important characteristics such as low operating quiescent current, ultra-low shutdown current, regulated forward voltage and fast reverse current response. It can simulate ideal diodes in various applications. After the power MOSFET is connected, it can ensure that its body diode will block the reverse current when the MOSFET is turned off. Since the MOSFET is turned on during forward conduction, the forward voltage drop and power dissipation will be significantly reduced. The reverse current passing through the MOSFET can be detected and the MOSFET can be turned off, thereby allowing the body diode to block the reverse current. It can also effectively limit surges to slow down the HGATE response, and cannot provide blanking for short stray current spikes, resulting in erroneous triggering of short circuit faults; it can also effectively limit surges to slow down the HGATE response, provide blanking for short stray current spikes, prevent erroneous triggering of short circuit faults, and suppress oscillation to prevent erroneous resets.
[0046] The embodiment of the present application provides a power protection circuit based on an ideal diode controller, such as Figure 1 As shown, it includes an ideal diode controller, a field effect transistor Q1 and a field effect transistor Q2;
[0047] The drain of the field effect tube Q1 is connected to the drain of the field effect tube Q2; the source of the field effect tube Q1 is connected to the power input terminal; the source of the field effect tube Q2 is connected to the power output terminal; the gate of the field effect tube Q1 and the gate of the field effect tube Q2 are connected to the two field effect tube on / off signal output pins of the ideal diode controller in a one-to-one correspondence;
[0048] The high-level chip select pin CS+ of the ideal diode controller and the resistor R SET Connection, resistor R SET The other end is connected to the connection circuit between the drain of field effect transistor Q1 and the drain of field effect transistor Q2; the programming and debugging pin of the ideal diode controller and the high level chip select pin CS+ are connected in series with the capacitor C ISCP .
[0049] Among them, the power switch pin (pin A) of the ideal diode controller is connected to the connection circuit between the power input terminal and the source of the field effect transistor Q1;
[0050] The output pin (OUT pin) of the ideal diode controller is connected to the connection circuit between the power supply output terminal and the source of the field effect transistor Q2.
[0051] The ideal diode controller capacitor pin and capacitor C CAP Connection, capacitor C CAP The other end is connected to the connection circuit between the drain of the field effect transistor Q1 and the drain of the field effect transistor Q2.
[0052] The current detection pin of the ideal diode controller is connected to the connection circuit between the drain of the field effect transistor Q1 and the drain of the field effect transistor Q2.
[0053] The low level chip select pin CS- of the ideal diode controller is connected to the drain of the field effect transistor Q2.
[0054] A series resistor R is connected between the programming and debugging pin of the ideal diode controller and the source of the field effect transistor Q2. ISCP .
[0055] The embodiment of the present application provides a power protection circuit based on an ideal diode controller, wherein the field effect tube adopts an N-channel MOSFET, wherein the ideal diode controller can drive and control an external back-to-back N-channel MOSFET, thereby realizing power path on / off control and overvoltage, undervoltage and output short circuit protection. The integrated ideal diode controller can drive the MOSFET to replace the Schottky diode to realize reverse input protection and output voltage maintenance.
[0056] The embodiment of the present application provides a power protection circuit based on an ideal diode controller, which allows the load to be switched on and off through a MOSFET in the event of overcurrent and overvoltage events. The device has an integrated current sense amplifier, which can provide short-circuit protection and adjustable current limit based on VDS detection of an external MOSFET. When a short circuit is detected at the output, the device latches the load to disconnect the MOSFET. The ideal diode controller has an adjustable overvoltage cutoff protection function. The device has a sleep mode that can achieve ultra-low quiescent current consumption, while providing refresh current for loads that are always on when the vehicle is parked.
[0057] The internal structure of the ideal diode controller is as follows: Figure 4 As shown, in the front-end power system design, the modules or subsystems that run directly from the battery power need to prevent the battery from being reversed, or prevent dynamic reverse polarity conditions during the period when the inductive load is disconnected from the battery. During automotive battery maintenance or vehicle jump starting, the battery will be reversed polarity connected during the reinstallation process, and will cause damage to the connected subsystems, circuits, and components. When this happens, a huge current will flow through the ESD diodes of the microcontroller, DC / DC converter, or other integrated circuits, causing serious damage to the battery-connected subsystems. The circuit in this design can effectively avoid this phenomenon.
[0058] Reverse battery protection involves two aspects of protection: commonly referred to as reverse polarity protection (RPP) and reverse current blocking (RCB). Reverse polarity protection, also known as reverse connection protection (RHP), prevents load damage when a negative voltage appears at the input during a reverse battery connection or when a dynamic reverse polarity condition occurs during a disconnection of an inductive load from the battery. Reverse polarity protection does not necessarily prevent reverse current from flowing from the load or downstream DC / DC converter into the battery. In many automotive subsystems, large-capacity hold-up capacitors are used to provide sufficient backup power during brief interruptions in the battery line or short circuits on the battery input, allowing the subsystem to continue operating or perform maintenance-type auxiliary control tasks such as memory dumps before shutdown. Reverse current blocking prevents reverse current from flowing from the load back to the battery and allows the hold-up capacitors to provide additional backup time for the subsystem to operate normally during various dynamic reverse battery conditions or brief interruptions, such as Figure 5 Figure 2 shows the internal structure of the reverse battery protection function of the ideal diode controller.
[0059] Ideal diode controllers, when used with external N-channel MOSFETs, provide low-loss protection against reverse input supply and reverse current flow from the output load back to the input. Ideal diode controllers are suitable for applications that require both input reverse polarity protection and reverse current blocking. Ideal diode controllers can drive back-to-back external N-channel MOSFETs to achieve low-loss power path protection as well as short-circuit, undervoltage, and overvoltage protection.
[0060] The charge pump provides the voltage required to drive the external N-channel MOSFET. Placing an external charge pump capacitor between the CAP pin and the VS pin of the ideal diode controller can provide energy to turn on the external MOSFET. In order for the charge pump to provide current to the external capacitor, the EN pin and The pin voltage must be above the specified input high threshold. When the charge pump is enabled, it can provide a typical charge current of 4mA. The pin is pulled low, the charge pump remains disabled. To ensure that the external MOSFET can be driven above its specified threshold voltage, the voltage from CAP to VS must be above the undervoltage lockout threshold before the internal gate driver is enabled. The initial gate driver enable delay can be calculated using the following equation.
[0061]
[0062] Among them C (CAP) is the charge pump capacitor connected between the VS and CAP pins, V (CAP_UVLOR) =6.6V(typical value).
[0063] To eliminate any jitter on the gate driver, approximately 1V of hysteresis can be added to VCAP Undervoltage lockout. The charge pump remains enabled until the voltage from the CAP pin to the VS pin reaches 13.2V, at which point the charge pump is normally disabled, reducing current consumption on the VS pin. The charge pump remains disabled until the voltage from the CAP pin to the VS pin is below 12.2V, at which point the charge pump is normally enabled. The voltage from the CAP pin to the VS pin continues to charge and discharge between 12.2V and 13.2V. By enabling and disabling the charge pump, the operating quiescent current can be reduced. When the charge pump is disabled, the sink current is 15μA.
[0064] The A, C, DGATE pins consist of an ideal diode stage connecting the source of the external MOSFET to the A pin, the drain to the C pin, and the gate to the DGATE pin.
[0065] Before enabling the DGATE driver, the following conditions must be met:
[0066] EN and The pin voltage must be greater than the specified input high voltage.
[0067] CAP to VS voltage must be greater than the undervoltage lockout voltage.
[0068] The voltage on the A pin must be greater than the VA POR rising threshold.
[0069] The voltage on the VS pin must be greater than the VS POR rising threshold.
[0070] If the above conditions are not met, the DGATE pin is internally connected to the A pin, ensuring that the external MOSFET is disabled.
[0071] The device continuously monitors the voltage drop across the MOSFET between the A and C pins and adjusts the DGATE to A voltage through a linear regulator amplifier as needed to stabilize the forward voltage drop at 10.5mV (typical). This closed-loop regulation scheme supports smooth MOSFET turn-off during reverse current events and ensures zero DC reverse current. This scheme ensures robust performance during slow input voltage ramp-down tests.
[0072] In the reverse battery protection function module, in addition to the integrated linear voltage regulator amplifier solution, a fast reverse voltage comparator is also integrated. When the voltage drop between the A pin and the C pin reaches V (AC_REV) When the voltage between the A and C pins reaches V within 0.8 μs (typical), DGATE goes low within 0.5 μs (typical). This fast reverse voltage comparator scheme ensures robust performance during fast input voltage ramp-down tests such as input micro shorts. (AC_FWD)When the threshold value is reached, the external MOSFET conducts again.
[0073] As Figure 6 shown, the integrated ideal diode controller uses a second MOSFET, i.e., field effect transistor Q2, in the power supply path. This device allows the load to be disconnected (on / off control) and provides overvoltage protection using HGATE control. HGATE and OUT consist of the load disconnect switch control stage. Connect the source of the external MOSFET to OUT and the gate to HGATE.
[0074] Before enabling the HGATE driver, the following conditions must be met:
[0075] EN and the pin voltage must be greater than the specified input high voltage.
[0076] · The voltage from CAP to VS must be greater than the undervoltage lockout voltage.
[0077] · The voltage on the VS pin must be greater than the VS POR rising threshold.
[0078] If the above conditions are not met, the HGATE pin is internally connected to the OUT pin, ensuring that the external MOSFET is disabled.
[0079] To limit the inrush current, one of the field effect transistor turn-on and turn-off signal output pins of the ideal diode controller is connected to one end of resistor R G , the other end of resistor R G is connected to capacitor C dVdT , and capacitor C dVdT is grounded. As Figure 7 shown, connect the HGATE pin of the ideal diode controller to resistor R G , connect resistor R G to capacitor C dVdT , and capacitor C dVdT is grounded.
[0080] Use capacitor C dVdT to slow down the HGATE voltage ramp-up during power-on. Calculate the value of capacitor C dVdT using the following formula.
[0081]
[0082] where I HATE_DRV is 55 μA (typical value), I INRUSH is the inrush current, C OUT is the output load capacitance. An additional resistor R dVdT in series with capacitor C G can shorten the turn-off time.
[0083] By connecting an additional C dVdT The capacitor is used to limit the inrush current, thus slowing down the HGATE response. This can cause HGATE to recover more slowly when there are positive line transients on the input line, which in turn causes the HGATE-OUT effective voltage to drop below the nominal value.
[0084] like Figure 8 As shown, the power protection circuit based on the ideal diode provided by the present application also has a short-circuit protection function and can quickly respond to output short-circuit events. A resistor R is connected in series between the programming and debugging pin of the ideal diode controller and the source of the field effect transistor Q2. ISCP .
[0085] When the HGATE-OUT voltage is above 6.4V typical, the internal short-circuit comparator is enabled. This is to ensure that the external FET is fully enhanced and a short-circuit fault is not falsely triggered during device startup. The device integrates a current sense amplifier that monitors the external FET Q2 VDS voltage to provide short-circuit protection. The device can be switched off by changing the external components (R ISCP and R SET ) parameter, which allows very flexible change of the threshold. By comparing the value detected by the current sensing amplifier with the threshold, it is possible to determine whether a short circuit exists.
[0086] When a short circuit condition occurs at the output and the voltage across CS+ and ISCP exceeds the default short circuit comparator threshold (typically 50mV), HGATE is pulled to OUT within 2μs to protect the HFET. At the same time, FLT is set low. Once a short circuit condition is detected, the device latches off MOSFET Q2 until EN, Or the VS pin switches from low to high.
[0087] By using an external series resistor R SET or R on the ISCP pin ISCP , the short-circuit protection threshold can be increased or decreased relative to the default threshold of 50mV. SET The resistor increases this threshold, and R ISCP The resistor will reduce this threshold. The change in the short circuit protection threshold is calculated by the following two equations:
[0088] V DS_SNS =50mV+(11μA×R SET )
[0089] V DS_SNS =50mV-(11μA×R ISCP )
[0090] An additional anti-spike capacitor C is added between the CS+ pin and the ISCP pin. ISCP This provides blanking for any short stray current spikes, thus avoiding false triggering of short-circuit faults due to input micro-interruptions (LV124, E-10), AC superposition (LV124, E-06) or fast transients such as ISO7637-2 pulse 2A in automobiles.
[0091] The power input pin of the ideal diode controller provided in this embodiment is connected to the resistor Rvs, and the other end of the resistor Rvs is connected to the connection circuit between the drain of the field effect transistor Q1 and the drain of the field effect transistor Q2; the power input pin of the ideal diode controller is also connected to the capacitor Cvs, and the capacitor Cvs is grounded.
[0092] When MOSFET Q2 is turned off due to a short-circuit condition, voltage oscillations may appear on the power supply line due to the inductive effects caused by board parasitics and input harness inductance. To avoid these oscillations from reaching the device power pin VS and causing a false reset, an additional series resistor R VS The series resistor R VS The decoupling capacitor C on the VS side VS This forms an RC low pass filter and helps dampen oscillations.
[0093] The safe operating area (SOA) of the external N-channel MOSFET must be carefully considered to ensure that the peak drain-source current and short-circuit protection response time are within the SOA rating of the MOSFET and that the R of the external N-channel MOSFET is within the given temperature range. DS (ON) changes will affect the accuracy of overcurrent detection.
[0094] like Fig. 9 As shown, the ideal diode controller has two different low power modes, depending on EN and pin status. In sleep mode ( When the enable pin is low, the device enters an ultra-low power mode by completely disconnecting the load, with a typical current consumption of 2.5μA.
[0095] like Fig.10 , Fig.11 As shown, the embodiment of the present application integrates a disconnect switch between the A pin and the SW pin of the ideal diode controller. It controls whether the power supply needs to be judged for under-voltage or over-voltage. The pin is pulled low and the switch is turned off. This helps reduce the leakage current flowing through the resistor divider network during the system shutdown state (IGN_OFF state). When there is an overvoltage or undervoltage on the input side, the voltage divided by the voltage divider resistor is compared with the internal preset value, and the result of the comparison is output to the field effect tube Q2 control logic, which determines whether the circuit needs to be cut off. When the overvoltage or undervoltage condition on the input side disappears, HGATE will turn on again.
[0096] The ideal diode controller protection circuit provided in this embodiment controls two N-channel power MOSFETs through the ideal diode controller LM74912-Q1, where DGATE is used to control the diode MOSFET to simulate an ideal diode, and HGATE is used to control the second MOSFET Q2 to cut off the power path when disabled or during overcurrent, overvoltage or undervoltage events. The MOSFET controlled by HGATE can be used to clamp the output under overvoltage or load dump conditions. EN or The device is placed in a low quiescent current mode where both DGATE and HGATE are off. The device has a separate supply input pin (VS) from which the charge pump is derived. The device has a separate supply input configuration and a separate gate control architecture to drive back-to-back connected MOSFETs in a common drain topology, thereby supporting various system architectures such as power ORing applications and power priority multiplexer applications. With these different topologies, the front-end power system can be designed to meet various system design requirements.
[0097] The main advantages of low forward conduction losses, lower leakage current, and simplified load sharing enable ideal diode controllers to achieve more efficient and reliable power supply ORing circuits. Due to the low forward voltage drop of the ideal diode controller, the power dissipation and its related thermal management issues when using Schottky diodes will be negligible. The leakage current of MOSFET at high temperature is not as high as that of Schottky diodes, and the use of MOSFET can reduce reverse leakage current losses, so the overall efficiency and reliability of the system will be improved. When using an ideal diode controller, there is no load sharing problem caused by the forward voltage difference of Schottky diodes and their negative temperature coefficient. In addition, the linear regulation of the forward voltage drop can enhance the load sharing between power supplies. This embodiment provides a power supply protection circuit based on an ideal diode, which achieves similar performance by simulating the relevant characteristics of the ideal diode. Compared with the ordinary PMOS protection circuit, the performance has been greatly improved, and the power supply and load can be better protected. At the same time, the relevant functions integrated internally can also meet the needs of more complex applications.
[0098] An embodiment of the present application also provides an automotive circuit, including the power protection circuit based on the ideal diode controller.
[0099] Although the above describes the specific implementation mode of the present invention in conjunction with the accompanying drawings, it is not intended to limit the scope of protection of the present invention. Those skilled in the art should understand that various modifications or variations that can be made by those skilled in the art on the basis of the technical solution of the present invention without creative work are still within the scope of protection of the present invention.
Claims
1. A power protection circuit based on an ideal diode controller, characterized in that: It includes an ideal diode controller, a field effect transistor Q1 and a field effect transistor Q2; The drain of the field effect tube Q1 is connected to the drain of the field effect tube Q2; the source of the field effect tube Q1 is connected to the power input terminal; the source of the field effect tube Q2 is connected to the power output terminal; the gate of the field effect tube Q1 and the gate of the field effect tube Q2 are connected to the two field effect tube on / off signal output pins of the ideal diode controller in a one-to-one correspondence; The high level chip select pin of the ideal diode controller and the resistor R SET Connection, resistor R SET The other end is connected to the connection circuit between the drain of field effect transistor Q1 and the drain of field effect transistor Q2; the capacitor C is connected in series between the programming and debugging pin of the ideal diode controller and the high-level chip select pin ISCP .
2. A power protection circuit based on an ideal diode controller as claimed in claim 1, characterized in that: The power input pin of the ideal diode controller is connected to the resistor Rvs, and the other end of the resistor Rvs is connected to the connection circuit between the drain of the field effect transistor Q1 and the drain of the field effect transistor Q2; the power input pin of the ideal diode controller is also connected to the capacitor Cvs, and the capacitor Cvs is grounded.
3. A power protection circuit based on an ideal diode controller as claimed in claim 1, characterized in that: The power switch pin of the ideal diode controller is connected to the connection circuit between the power input terminal and the source of the field effect transistor Q1; The output pin of the ideal diode controller is connected to the connection circuit between the power supply output terminal and the source of the field effect transistor Q2.
4. A power protection circuit based on an ideal diode controller as claimed in claim 1, characterized in that: The ideal diode controller capacitor pin and capacitor C CAP Connection, capacitor C CAP The other end is connected to the connection circuit between the drain of the field effect transistor Q1 and the drain of the field effect transistor Q2.
5. A power protection circuit based on an ideal diode controller as claimed in claim 1, characterized in that: The current detection pin of the ideal diode controller is connected to the connection circuit between the drain of the field effect transistor Q1 and the drain of the field effect transistor Q2.
6. A power protection circuit based on an ideal diode controller as claimed in claim 1, characterized in that: The low level chip select pin CS- of the ideal diode controller is connected to the drain of the field effect transistor Q2.
7. A power protection circuit based on an ideal diode controller as claimed in claim 1, characterized in that: The switching pin of the ideal diode controller is connected in series with resistor R3 and resistor R4 in sequence, and resistor R4 is grounded; the undervoltage lockout pin of the ideal diode controller is connected with resistor R1, resistor R2 and capacitor Cuv, and the other end of resistor R1 is connected to the connection circuit between the switching pin of the ideal diode controller and resistor R3; resistor R2 and capacitor Cuv are both grounded; the overvoltage protection pin of the ideal diode controller is connected to the connection circuit between resistor R3 and resistor R4.
8. A power protection circuit based on an ideal diode controller as claimed in claim 1, characterized in that: A series resistor R is connected between the programming and debugging pin of the ideal diode controller and the source of the field effect transistor Q2. ISCP .
9. A power protection circuit based on an ideal diode controller as claimed in claim 1, characterized in that: One of the FET on / off signal output pins of the ideal diode controller is connected to the resistor R G One end of the resistor R G The other end of the capacitor C dVdT Connection, capacitor C dVdT Ground.
10. An automotive circuit, characterized in that: A power protection circuit based on an ideal diode controller comprising the method described in any one of claims 1 to 9.