Switching converter and controller and integrated control circuit thereof

Abstract

The invention discloses a switching converter, a controller thereof and an integrated control circuit. A controller for a switching converter including a power switch, the controller including: a gate driver providing a driving voltage at an output to control the power switch in response to a switching control signal; the first transistor is coupled between the first power supply node and the power supply end of the gate driver; the high-side switching tube responds to a first level of the switching control signal and provides a current detection signal representing current flowing through the power switch to the floating node; the low-side switch tube responds to a second level of the switch control signal and is coupled with the floating node to the reference ground; and a regulator that regulates a control end voltage of the first transistor based on a floating reference voltage and a feedback voltage representative of an output end voltage of the regulator, where the floating reference voltage is a superimposed signal of a voltage of the floating node and the reference voltage. According to the invention, the reliability is ensured while the stable performance and low on-resistance of the power switch are maintained.

Description

Technical Field

[0001] The present invention relates to electronic circuits, and particularly to a switching converter, its controller, and an integrated control circuit. Background Art

[0002] In automotive, consumer, and industrial applications, many functions of modern devices, such as converting electrical energy and driving motors, rely on controllable power switching devices. For example, insulated gate bipolar transistors (IGBTs), metal-oxide-semiconductor field-effect transistors (MOSFETs), gallium nitride (GaN), silicon carbide (SiC), etc. have been applied to various applications of switches in, but not limited to, power supplies and power converters.

[0003] Generally, controllable power switching devices require a gate driver to provide a driving voltage to control their turn-on and turn-off. As Figure 1 shown, the gate driver 10 receives a switching control signal PWM and generates a driving voltage VG according to the switching control signal PWM to drive the power switching device Q1. For example, when the switching control signal PWM becomes high, the driving voltage VG controls the power switching device Q1 to turn on, and when the switching control signal PWM becomes low, the driving voltage VG controls the power switching device Q1 to turn off. However, the gate-source voltage VGS of the power switching device Q1 often changes in practical applications. When the gate-source voltage VGS is too low, it will increase the on-resistance of the power switching device Q1 and reduce the performance of the device, while when the gate-source voltage VGS is too high, it will cause electrical overstress (EOS) and reliability problems. Summary of the Invention

[0004] Aiming at one or more problems existing in the prior art, the purpose of the present invention is to provide a switching converter, its controller, or an integrated control circuit, which can ensure the performance and reliability of the power switch by dynamically adjusting the voltages at the power supply terminal and the output terminal of the gate driver.

[0005] According to an embodiment of the present invention, a controller for a switching converter is provided. The switching converter includes a power switch. The controller includes: a gate driver having an input terminal, a power supply terminal, and an output terminal. The input terminal receives a switching control signal, and the output terminal is coupled to the control terminal of the power switch and provides a drive control signal. In response to the switching control signal, the gate driver provides a drive voltage at its output terminal to control the conduction and turn-off of the power switch; a first transistor coupled between a first power supply node and the power supply terminal of the gate driver; a high-side switching transistor that, in response to a first level of the switching control signal, provides a current detection signal representing the current flowing through the power switch to a floating node; a low-side switching transistor that, in response to a second level of the switching control signal, couples the floating node to a reference ground; and a regulator having a first input terminal, a second input terminal, a ground terminal, and an output terminal. The first input terminal receives a floating reference voltage, which is a superimposed signal of the voltage of the floating node and a reference voltage. The second input terminal is coupled to a feedback stage that provides a feedback voltage. The ground terminal is coupled to the floating node, and the output terminal is coupled to the feedback stage and the gate of the first transistor. Based on the floating reference voltage and the feedback voltage, the regulator adjusts the gate voltage of the first transistor.

[0006] According to another embodiment of the present invention, a switching converter is provided, which includes a power switch and the controller as described above.

[0007] According to still another embodiment of the present invention, an integrated control circuit for a switching converter is provided. The switching converter includes a power switch. The integrated control circuit includes: a first pin for receiving a first supply voltage; a second pin for coupling to the control terminal of the power switch and providing a drive control signal; a third pin for receiving a current detection signal representing the current flowing through the power switch; a fourth pin for coupling to a reference ground; a gate driver having an input terminal, a power supply terminal, and an output terminal. The input terminal receives a switching control signal, and the output terminal is coupled to the second pin. In response to the switching control signal, the gate driver provides a drive voltage at its output terminal to control the conduction and turn-off of the power switch; a first transistor coupled between the first pin and the power supply terminal of the gate driver; a high-side switching transistor coupled between the third pin and a floating node that, in response to a first level of the switching control signal, provides the current detection signal to the floating node; a low-side switching transistor coupled between the floating node and the fourth pin that, in response to a second level of the switching control signal, couples the floating node to a reference ground; and a regulator having a first input terminal, a second input terminal, a ground terminal, and an output terminal. The first input terminal receives a floating reference voltage, which is a superimposed signal of the voltage of the floating node and a reference voltage. The second input terminal is coupled to a feedback stage that provides a feedback voltage. The ground terminal is coupled to the floating node, and the output terminal is coupled to the feedback stage and the control terminal of the first transistor. Based on the floating reference voltage and the feedback voltage, the regulator adjusts the voltage of the control terminal of the first transistor.

[0008] In an embodiment of the present invention, a floating node that responds to a switch control signal is provided, and the voltage of the floating node and the superimposed signal of the reference voltage are used as a reference to dynamically adjust the voltage applied to the gate driver power supply terminal, thereby adjusting the drive voltage at the gate driver output terminal. With such an adjustment method, even if the current flowing through the power switch changes with the load current, the gate-source voltage of the power switch device will not change. The stable performance and low on-resistance of the power switch are maintained while ensuring reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 It is a schematic diagram of the circuit structure of the existing power switch device Q1 and the gate driver 10;

[0010] Figure 2 is a schematic diagram of a circuit structure of a switching converter 200 according to an embodiment of the present invention;

[0011] Figure 3 is a circuit diagram of a controller 100A according to yet another embodiment of the present invention;

[0012] Figure 4 is a circuit diagram of a controller 100B according to yet another embodiment of the present invention;

[0013] Figure 5 is a working waveform diagram of a switching converter according to an embodiment of the present invention;

[0014] Figure 6 FIG. 2 is a circuit diagram of a switching converter 200A according to another embodiment of the present invention. DETAILED DESCRIPTION

[0015] The specific embodiments of the present invention will be described in detail below. It should be noted that the embodiments described herein are only for illustration and are not intended to limit the present invention. In the following description, a large number of specific details are set forth in order to provide a thorough understanding of the present invention. However, it is obvious to those of ordinary skill in the art that these specific details do not have to be used to implement the present invention. In other examples, in order to avoid confusing the present invention, known circuits, materials or methods are not specifically described.

[0016] Throughout the specification, references to "one embodiment", "an embodiment", "an example" or "an example" mean that a particular feature, structure or characteristic described in conjunction with the embodiment or example is included in at least one embodiment of the present invention. Therefore, the phrases "in one embodiment", "in an embodiment", "an example" or "an example" appearing in various places throughout the specification do not necessarily refer to the same embodiment or example. In addition, particular features, structures or characteristics may be combined in one or more embodiments or examples in any appropriate combination and / or sub-combination. In addition, it should be understood by those of ordinary skill in the art that the drawings provided herein are for illustrative purposes and that the drawings are not necessarily drawn to scale. It should be understood that when an "element" is said to be "connected to" or "coupled" to another element, it may be directly connected or coupled to another element or there may be an intermediate element. In contrast, when an element is said to be "directly connected to" or "directly coupled to" another element, there is no intermediate element. The same reference numerals indicate the same element. The term "and / or" used herein includes any and all combinations of one or more related listed items.

[0017] Figure 2 FIG. 2 is a schematic diagram of a circuit structure of a switching converter 200 according to an embodiment of the present invention. Figure 2 As shown, the switching converter 200 includes a transformer T1, a power switch MP, a secondary diode D0, an input capacitor Cin, an output capacitor Cout, and a controller 100. The transformer T1 has a primary winding and a secondary winding, wherein the primary winding and the secondary winding both have a first end and a second end, the first end of the primary winding receives the input voltage Vin, and the second end of the secondary winding is coupled to the secondary reference ground. The power switch MP is coupled between the second end of the primary winding and the primary reference ground GND, and the controller 100 controls the on and off of the power switch MP so that energy is alternately stored in the primary winding of the transformer T1 or transferred to the secondary winding of the transformer. The secondary winding of the transformer transfers energy to the output capacitor Cout, and a DC output voltage Vout is generated at both ends of the output capacitor Cout to achieve power conversion. Figure 2 The illustrated embodiment is described by taking a flyback circuit as an example. Those skilled in the art will appreciate that any other switching converter topology including a power switch may also be applicable to the present invention.

[0018] exist Figure 2In the illustrated embodiment, the power switch MP includes a control terminal G, a first power terminal D, and a second power terminal S. The power switch MP includes, for example, an insulated gate bipolar transistor (IGBT), a metal oxide semiconductor field effect transistor (MOSFET), gallium nitride (GaN), silicon carbide (SiC), etc. For convenience of description, the gate is used as an example to represent the control terminal of the power switch MP, for example, representing the control terminal of a field effect transistor, silicon carbide, or gallium nitride. The power switch MP controls the electrical connection between the first power terminal D and the second power terminal S of the power switch MP based on a drive control signal DRV applied to the control terminal.

[0019] like Figure 2 As shown, the controller 100 includes a gate driver 101, a first transistor 102, a high-side switch tube 103, a low-side switch tube 104, a regulator 105, a feedback stage 106, and a switch control circuit 110. Figure 2 In the illustrated embodiment, the switch control circuit 110 receives a current detection signal VS representing the current flowing through the power switch MP and a compensation signal Vcomp related to the output voltage Vout, and provides a switch control signal PWM at the output terminal. The switch control signal PWM is, for example, a pulse width modulation signal. In one embodiment, the switch control circuit 110 is coupled to a current detection resistor Rcs coupled in series with the power switch MP to detect the current flowing through the power switch MP and provide the current detection signal VS.

[0020] The gate driver 101 has an input terminal 111, a power supply terminal 112, an output terminal 113, and a ground terminal coupled to a primary reference ground GND. The input terminal 111 receives a switch control signal PWM, and the output terminal 113 is coupled to a control terminal G of the power switch MP and provides a drive control signal DRV. In response to the switch control signal PWM, the gate driver 101 provides a drive voltage VG at the output terminal 113 to control the on and off of the power switch MP. When the switch control signal PWM is a first level (e.g., a high level), the gate driver 101 controls the power switch MP to turn on. When the switch control signal PWM is a second level (e.g., a low level), the gate driver 101 controls the power switch MP to turn off. The maximum voltage value of the drive voltage VG is related to the voltage VD received by the power supply terminal 112. In one embodiment, the maximum value of the drive voltage VG is equal to the voltage VD received by the power supply terminal 112. In another embodiment, the maximum value of the drive voltage VG is equal to the voltage VD minus a voltage threshold.

[0021] The first transistor 102 has a first terminal, a second terminal and a control terminal, wherein the first terminal is coupled to the power node 22 to receive the power supply voltage VCC, and the second terminal is coupled to the power supply terminal 112 of the gate driver 101. Figure 2In the illustrated embodiment, the first transistor 102 has a drain coupled to the power node 22, a source coupled to the power supply terminal 112, and a gate coupled to the output terminal 153 of the regulator 105. The first transistor 102 is configured to provide a supply current from the power node 22 to the power supply terminal 112 according to a voltage level of its control terminal and provide a voltage VD.

[0022] like Figure 2 As shown, the high-side switch tube 103 has a first end, a second end and a control end, wherein the first end is coupled to receive the current detection signal VS, the second end is coupled to the floating node FGND, and the control end is coupled to the output end of the switch control circuit 110 to receive the switch control signal PWM. The high-side switch tube 103 is configured to provide the current detection signal VS to the floating node FGND in response to the first level of the switch control signal PWM. The low-side switch tube 104 has a first end, a second end and a control end, wherein the first end is coupled to the floating node FGND, the second end is coupled to the primary reference ground GND, and the control end receives the switch control signal PWM via the inverter INV. The low-side switch tube 104 is configured to couple the floating node FGND to the primary reference ground GND in response to the second level of the switch control signal PWM.

[0023] The regulator 105 has a first input terminal 151, a second input terminal 152, an output terminal 153 and a ground terminal 154. The first input terminal 151 receives a floating reference voltage VA, wherein the floating reference voltage VA is a voltage V FGND The second input terminal 152 is coupled to the feedback stage 106 providing the feedback voltage VFB. The ground terminal 154 is coupled to the floating node FGND, and the output terminal 153 is coupled to the feedback stage 106 and the control terminal of the first transistor 102. The regulator 105 is configured to adjust the control terminal voltage of the first transistor 102, such as the gate voltage of the first transistor 102, based on the floating reference voltage VA and the feedback voltage VFB.

[0024] The feedback stage 106 is coupled between the output terminal 153 of the regulator 105 and the floating node FGND, and has an output terminal for providing a feedback voltage VFB. In one embodiment, the feedback stage 106 includes a resistor voltage divider circuit. In other embodiments, the feedback stage 106 includes other voltage divider circuits.

[0025] According to an embodiment of the present disclosure, the controller 100 sets a floating node FGND in response to the switch control signal PWM, and increases the voltage V FGNDThe superimposed signal with the reference voltage VREF is used as a reference to dynamically adjust the voltage at the control terminal of the first transistor 102, thereby adjusting the voltage VD applied to the power supply terminal 112 of the gate driver 101, and finally realizing the adjustment of the driving voltage VG output from the output terminal 113 of the gate driver 101. With such an adjustment method, even if the current flowing through the power switch MP changes dynamically with the load current, it can ensure that the voltage between the control terminal G and the second power terminal S of the power switch MP is high enough to minimize the on-resistance of the power switch MP, and at the same time is low enough not to exceed the reliability limit allowed by the power switch MP.

[0026] Figure 3 FIG. 4 is a circuit diagram of the controller 100A according to another embodiment of the present invention. In Figure 3 the illustrated embodiment, the regulator 105A includes a first operational amplifier AMP1, a second operational amplifier AMP2, and a compensation circuit 30.

[0027] The first operational amplifier AMP1 has a first input terminal, a second input terminal, and an output terminal. The first input terminal receives a floating reference voltage VA, and the second input terminal is coupled to the output terminal of the feedback stage 106A to receive a feedback voltage VFB. The first input terminal of the first operational amplifier AMP1 is the non-inverting input terminal, and the second input terminal is the inverting input terminal.

[0028] The second operational amplifier AMP2 has a first input terminal, a second input terminal, and an output terminal. The first input terminal is coupled to the output terminal of the first operational amplifier AMP1, the second input terminal is coupled to the output terminal of the second operational amplifier AMP2, and the output terminal is coupled to the output terminal 153 of the regulator 105A. The first input terminal of the second operational amplifier AMP2 is the non-inverting input terminal, and the second input terminal is the inverting input terminal. In addition, the ground terminals of the first operational amplifier AMP1 and the second operational amplifier AMP2 are both coupled to the floating node FGND.

[0029] The compensation circuit 30 is coupled between the first input terminal of the second operational amplifier AMP2 and the floating node FGND to ensure the stability of the feedback loop. In Figure 3 the illustrated embodiment, the compensation circuit 30 includes a compensation capacitor C1, which pushes the pole of the feedback system to a lower frequency, thereby improving the stability of the system.

[0030] The feedback stage 106A is coupled between the output terminal 153 of the regulator 105A and the floating node FGND, and provides a feedback voltage VFB at the output terminal. In Figure 3 the illustrated embodiment, the feedback stage 106A includes a resistor voltage dividing circuit composed of resistors R3 and R4.

[0031] In Figure 3In the illustrated implementation, the controller 100A further includes a floating reference voltage generating circuit 107. The floating reference voltage generating circuit 107 includes a third operational amplifier AMP3, a current mirror 170, and a third transistor MN1.

[0032] The third operational amplifier AMP3 has a first input terminal, a second input terminal and an output terminal, wherein the first input terminal receives the reference voltage VREF0, and the second input terminal is coupled to the primary reference ground GND via a resistor R1. The first input terminal of the third operational amplifier AMP3 is a non-inverting input terminal, and the second input terminal is an inverting input terminal. The current mirror 170 has a setting terminal 171, an output terminal 172 and a power supply terminal 173. The power supply terminal 173 is coupled to the power supply node 32 to receive the second power supply voltage VDD. The second power supply voltage VDD is a voltage obtained by stepping down the first power supply voltage VCC. In one embodiment, the second power supply voltage VDD is 5V, and the voltage range of the first power supply voltage VCC is 9V to 30V. The output terminal 172 is coupled to the floating node FGND via a resistor R2. The third transistor MN1 is coupled between the setting terminal 171 of the current mirror 170 and the second input terminal of the third operational amplifier AMP1, and its control terminal is coupled to the output terminal of the third operational amplifier AMP1.

[0033] The output terminal 172 of the current mirror 170 is further coupled to the first input terminal 151 of the regulator 105A to provide a floating reference voltage VA. Figure 3 In the embodiment shown, the floating reference voltage VA provided by the floating reference voltage generating circuit 107 is equal to VREF0(R2 / R1)+V FGND = VREF + V FGND . Where V FGND is the voltage on the floating node FGND, VREF0 is the base reference voltage, and VREF is the reference voltage. Accordingly, the voltage VC at the output terminal 153 of the regulator 105A is equal to VREF(1+R4 / R3)+V FGND .

[0034] In practical applications, since the threshold voltage of the first transistor 102 is sensitive to temperature changes, for example, the threshold voltage will decrease as the temperature rises. Since the power supply terminal 112 of the gate driver 101 is coupled to the source of the first transistor 102, the change of the voltage VD of the power supply terminal 112 caused by the threshold voltage will also be amplified. Figure 2 Compared to the controller 100 shown, Figure 4 The controller 100B shown further introduces a current source IS and a second transistor 108 .

[0035] Figure 4 FIG. 1 is a circuit diagram of a controller 100B according to another embodiment of the present invention. Figure 4As shown, the current source IS has a power supply terminal and an output terminal, wherein the power supply terminal is coupled to the power supply node 22, and the output terminal is coupled to the control terminal of the first transistor 102. The second transistor 108 has a source, a drain, and a gate, wherein the source is coupled to the output terminal 153 of the regulator 105B, and the drain and the gate are coupled to the control terminal of the first transistor 102. In response to the change of the voltage VC on the output terminal 153 of the regulator 105B, the gate voltages of the second transistor 108 and the first transistor 102 are adjusted and changed. Specifically, as Figure 4 As shown, the voltage VD received by the power supply terminal 112 of the gate driver 101 is expressed as: VD=VC+VGS2−VGS1, where VGS1 is the gate-source voltage of the first transistor 102 and VGS2 is the gate-source voltage of the second transistor 108.

[0036] It can be seen that the voltage VD of the power supply terminal 112 includes the difference between the two gate-source voltages, so that the temperature dependence is partially offset, so that the voltage VD of the power supply terminal 112 is not affected by the temperature dependence and reaches a substantially constant level.

[0037] Further, Figure 4 The regulator 105B shown further includes a level shift circuit VOS. The level shift circuit VOS has a positive terminal and a negative terminal, wherein the positive terminal is coupled to the source of the second transistor 108 and the output terminal 153 of the regulator 105B, and the negative terminal is coupled to the output terminal of the second operational amplifier AMP3. The level shift circuit VOS is used to limit the voltage of the regulator 105B to not exceed the operating range of the first operational amplifier AMP1 and the second operational amplifier AMP2.

[0038] Figure 5 FIG. 2 is a working waveform diagram of a switching converter according to an embodiment of the present invention. Figure 5 As shown, in response to the first level of the switch control signal PWM, the high-side switch tube 103 is turned on, and the voltage V on the floating node FGND FGND As the current flowing through the power switch MP increases, the voltage VD of the power supply terminal 112 of the gate driver 101 and the driving voltage VG output by the output terminal 113 of the gate driver 101 also increase. In response to the second level of the switch control signal PWM, the low-side switch tube 104 is turned on, and the voltage V FGND Coupled to the primary reference ground GND, the voltage VD at the power supply terminal 112 of the gate driver 101 recovers as VFGND decreases, and the driving voltage VG outputted from the output terminal 113 of the gate driver 101 drops to a low level to turn off the power switch MP.

[0039] Figure 6 FIG. 2 is a circuit diagram of a switching converter 200A according to another embodiment of the present invention. Figure 6As shown, the switching converter 200A includes a transformer T, a power switch MP, a secondary switch tube SR and an integrated control circuit 100C. The transformer T has a primary winding and a secondary winding, wherein the primary winding and the secondary winding both have a first end and a second end, the first end of the primary winding receives an input voltage Vin, the first end of the secondary winding provides a DC output voltage, and the second end is coupled to a secondary reference ground. The power switch MP is coupled between the second end of the primary winding and the primary reference ground GND. The secondary switch tube SR is coupled between the second end of the secondary winding and the secondary reference ground.

[0040] and Figure 2 Compared to the controller 100 shown, Figure 6 The integrated control circuit 100C shown includes a gate driver 101, a first transistor 102, a high-side switch 103, a low-side switch 104, a regulator 105C, a feedback stage 106, a floating reference voltage generating circuit 107A, and a switch control circuit 110, and further includes a voltage conversion circuit 120 and a plurality of pins. The plurality of pins include a power supply pin P1, a control pin P2, a current detection pin P3, and a reference ground pin P4 coupled to a primary reference ground GND.

[0041] like Figure 6 As shown, the power supply pin P1 is coupled to the power supply circuit (not shown) and the power supply capacitor C2 of the switching converter 200A, receives the first power supply voltage VCC, and provides a suitable power supply voltage for the integrated control circuit 100C. In one embodiment, the operating range of the power supply voltage VCC is 9V to 30V. The first transistor 102 is coupled between the power supply pin P1 and the power supply terminal 112 of the gate driver 101. The voltage conversion circuit 120 has an input terminal and an output terminal, wherein the input terminal receives the first power supply voltage VCC, steps down the first power supply voltage VCC, and provides a second power supply voltage VDD less than the first power supply voltage VCC at the output terminal. The second power supply voltage VDD is used to power the logic components inside the integrated control circuit 100C, which is generally about 5V. For example, the second power supply voltage VDD is applied to the power supply terminal of the floating reference voltage generating circuit 107A and the power supply terminal 155 of the regulator 105C to power their operation. In one embodiment, the voltage conversion circuit 120 includes a buck converter. In another embodiment, the voltage conversion circuit 120 includes an LDO.

[0042] The output terminal 113 of the gate driver 101 is coupled to the control pin P2 , and in response to the switch control signal PWM, provides a driving voltage VG at the output terminal 113 to control the on and off of the power switch MP.

[0043] In one embodiment, the current detection pin P3 is coupled to a current detection resistor Rcs coupled in series with the power switch MP to detect the current flowing through the power switch MP and provide a current detection signal VS. The switch control circuit 110 has a first input terminal, a second input terminal and an output terminal, wherein the first input terminal is coupled to the current detection pin P3 to receive the current detection signal VS, the second input terminal receives a signal related to the output signal of the switching converter 200A, and provides a switch control signal PWM at the output terminal.

[0044] The gate driver 101 responds to the switch control signal PWM and provides a drive voltage VG at its output terminal to control the on and off of the power switch MP. In response to the first level of the switch control signal PWM, the high-side switch tube 103 is turned on to provide a current detection signal VS representing the current flowing through the power switch to the floating node FGND. In response to the second level of the switch control signal PWM, the low-side switch 104 is turned on to couple the floating node FGND to the reference ground. The regulator 105C is based on the floating reference voltage (VREF+V FGND ) and the feedback voltage VFB, adjust the gate voltage of the first transistor 102 to control the voltage VD at the power supply terminal and the voltage VG at the output terminal of the gate driver 101 to change with the current flowing through the power switch MP. Finally, it is ensured that the voltage between the control terminal G of the power switch MP and the second power terminal S is high enough to minimize the on-resistance of the power switch MP, and low enough not to exceed the reliability limit allowed by the power switch MP.

[0045] Throughout the specification and claims, relative terms such as first, second, and third may be used only to distinguish one entity or action from another entity or action, and do not necessarily or imply any physical relationship or order between these entities or actions. Numerical sequences such as "first", "second", "third", etc. only refer to different individuals in a plurality and do not imply any order or sequence unless specifically defined by the claim language.

[0046] The above description and implementation are merely exemplary and are not intended to limit the scope of the present invention. It is possible to make changes and modifications to the disclosed embodiments, and other feasible optional embodiments and equivalent changes to the elements in the embodiments can be understood by those of ordinary skill in the art. Other changes and modifications to the embodiments disclosed by the present invention do not exceed the spirit and scope of protection of the present invention.

Claims

1. A controller for a switching converter, the switching converter comprising a power switch, the controller include: A gate driver having an input terminal, a power supply terminal and an output terminal, wherein the input terminal receives a switch control signal, the output terminal is coupled to the control terminal of the power switch and provides a drive control signal, and in response to the switch control signal, the gate driver provides a drive voltage at its output terminal to control the on and off of the power switch; A first transistor coupled between a first power supply node and a power supply terminal of a gate driver; The high-side switch tube provides a current detection signal representing a current flowing through the power switch to the floating node in response to a first level of the switch control signal; A low-side switch tube, in response to a second level of the switch control signal, couples the floating node to a reference ground; as well as A regulator has a first input terminal, a second input terminal, a ground terminal and an output terminal, wherein the first input terminal receives a floating reference voltage, which is a superimposed signal of a voltage of a floating node and a reference voltage, the second input terminal is coupled to a feedback stage that provides a feedback voltage, the ground terminal is coupled to the floating node, and the output terminal is coupled to the feedback stage and the gate of the first transistor. Based on the floating reference voltage and the feedback voltage, the regulator adjusts the gate voltage of the first transistor.

2. The controller as claimed in claim 1, wherein the regulator include: The feedback stage is coupled between the output terminal of the regulator and the floating node and has an output terminal for providing a feedback voltage; A first operational amplifier having a first input terminal, a second input terminal and an output terminal, wherein the first input terminal receives a floating reference voltage, and the second input terminal is coupled to the output terminal of the feedback stage; A second operational amplifier having a first input terminal, a second input terminal and an output terminal, wherein the first input terminal is coupled to the output terminal of the first operational amplifier, and the second input terminal is coupled to the output terminal of the second operational amplifier; as well as The compensation circuit is coupled between the first input terminal of the second operational amplifier and the floating node, and provides a compensation voltage for the first input terminal of the second operational amplifier.

3. The controller of claim 2, wherein the compensation circuit comprises a compensation capacitor.

4. The controller according to claim 2, further comprising: include: A current source having a power supply terminal and an output terminal, wherein the power supply terminal is coupled to a first power supply node, and the output terminal is coupled to a gate of a first transistor, wherein the first transistor has a first gate-source voltage; A second transistor having a source, a drain and a gate, wherein the drain and the gate of the second transistor are both coupled to the gate of the first transistor and has a second gate-source voltage whose absolute value is greater than the first gate-source voltage; as well as The output terminal of the regulator is coupled to the source of the second transistor, and is used to change the gate voltages of the second transistor and the first transistor in response to the voltage change on the output terminal of the regulator.

5. The controller according to claim 4, further comprising: include: The level shift circuit has a positive terminal and a negative terminal, wherein the positive terminal is coupled to the output terminal of the regulator, and the negative terminal is coupled to the output terminal of the second operational amplifier.

6. The controller according to claim 1, further comprising: include: A third operational amplifier having a first input terminal, a second input terminal and an output terminal, wherein the first input terminal receives a reference voltage, and the second input terminal is coupled to a reference ground via a first resistor; A current mirror having a power supply terminal, a setting terminal and an output terminal, wherein the power supply terminal is coupled to the second power supply node, and the output terminal is coupled to the floating node via a second resistor; as well as The third transistor is coupled between the setting terminal of the current mirror and the second input terminal of the third operational amplifier, and a control terminal of the third transistor is coupled to the output terminal of the third operational amplifier. 7 . The controller of claim 6 , wherein a voltage of the second power supply node is lower than a voltage of the first power supply node.

8. A switching converter, include: Power switch; as well as A controller as claimed in any one of claims 1 to 7.

9. An integrated control circuit for a switching converter, the switching converter comprising a power switch, the integrated control circuit include: A first pin, used to receive a first supply voltage; A second pin is used to couple to a control terminal of the power switch and provide a driving control signal; A third pin is used to receive a current detection signal representing a current flowing through the power switch; A fourth pin, used for coupling to a reference ground; A gate driver having an input terminal, a power supply terminal and an output terminal, wherein the input terminal receives a switch control signal, the output terminal is coupled to the second pin, and in response to the switch control signal, the gate driver provides a driving voltage at its output terminal to control the on and off of the power switch; A first transistor coupled between the first pin and a power supply terminal of the gate driver; A high-side switch tube is coupled between the third pin and the floating node, and provides a current detection signal to the floating node in response to a first level of the switch control signal; A low-side switch tube is coupled between the floating node and the fourth pin, and couples the floating node to the reference ground in response to the second level of the switch control signal; as well as A regulator has a first input terminal, a second input terminal, a ground terminal and an output terminal, wherein the first input terminal receives a floating reference voltage, which is a superimposed signal of a voltage of a floating node and a reference voltage, the second input terminal is coupled to a feedback stage that provides a feedback voltage, the ground terminal is coupled to the floating node, and the output terminal is coupled to the feedback stage and the control terminal of the first transistor. Based on the floating reference voltage and the feedback voltage, the regulator adjusts the voltage of the control terminal of the first transistor.

10. The integrated control circuit as claimed in claim 9, wherein the regulator include: The feedback stage is coupled between the output terminal of the regulator and the floating node and has an output terminal for providing a feedback voltage; A first operational amplifier having a first input terminal, a second input terminal and an output terminal, wherein the first input terminal receives a floating reference voltage, and the second input terminal is coupled to the output terminal of the feedback stage; A second operational amplifier having a first input terminal, a second input terminal and an output terminal, wherein the first input terminal is coupled to the output terminal of the first operational amplifier, and the second input terminal is coupled to the output terminal of the second operational amplifier; as well as The compensation capacitor is coupled between the first input terminal of the second operational amplifier and the floating node, and provides a compensation voltage for the first input terminal of the second operational amplifier to improve the stability of the regulator.

11. The integrated control circuit according to claim 10, further comprising: include: A current source having a power supply terminal and an output terminal, wherein the power supply terminal is coupled to the first pin, and the output terminal is coupled to the control terminal of the first transistor, wherein the first transistor has a first gate-source voltage; A second transistor having a source, a drain and a gate, wherein the source and the gate of the second transistor are both coupled to the control terminal of the first transistor and have a second gate-source voltage whose absolute value is greater than the first gate-source voltage; as well as The output terminal of the regulator is coupled to the source of the second transistor, and is used to change the gate voltage of the second transistor in response to the voltage change on the output terminal of the regulator.

12. The integrated control circuit according to claim 11, further comprising: include: The level shift circuit has a positive terminal and a negative terminal, wherein the positive terminal is coupled to the source of the second transistor, and the negative terminal is coupled to the output terminal of the second operational amplifier.

13. The integrated control circuit according to claim 9, further comprising: include: A third operational amplifier having a first input terminal, a second input terminal and an output terminal, wherein the first input terminal receives a reference voltage, and the second input terminal is coupled to the fourth pin via a first resistor; A current mirror having a power supply terminal, a setting terminal and an output terminal, wherein the power supply terminal receives a second power supply voltage less than the first power supply voltage, and the output terminal is coupled to a floating node via a second resistor; as well as The third transistor is coupled between the setting terminal of the current mirror and the second input terminal of the third operational amplifier, and a control terminal of the third transistor is coupled to the output terminal of the third operational amplifier.

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