Power converter

Abstract

The invention discloses a power converter. According to the technical scheme of the embodiment of the invention, the sum of the voltages on the two flying capacitors is kept not greater than the input voltage by controlling the conduction states of the switch and the crossbar switch in the power conversion unit, so that the flying capacitors are prevented from charging the input end, and the efficiency of the power converter under a large duty ratio is improved.

Description

Technical Field

[0001] The present invention relates to power electronics technology, and more particularly to a power converter. Background Art

[0002] Power converters are widely used in the field of power management. To improve power density and efficiency, traditional power converters are combined with switched-capacitor converters, as Figure 1 shown. Figure 1 The power converter shown receives an input voltage V in at the input terminal, and generates an output voltage V out at the output terminal through power conversion. Under the same input and output conditions, compared with traditional buck circuit topologies, Figure 1 the power converter has the advantages of doubling the duty cycle, significantly reducing the root mean square (RMS) current, and significantly reducing the switching stress, thus greatly increasing its efficiency.

[0003] However, this power converter is not suitable for a wide input voltage range. Specifically, to expand the conversion ratio of the output voltage to the input voltage, the duty cycle of the drive signal used to control the switches will be greater than 50%. At this time, when the flying capacitors in the power converter are charged simultaneously, the sum of the voltages on the two flying capacitors will be greater than the input voltage V in , resulting in the flying capacitors discharging directly to the input terminal, which will cause significant additional losses. Therefore, a power converter that supports expanding the output-input voltage conversion ratio is needed to meet the requirements of the power supply. Summary of the Invention

[0004] In view of this, an embodiment of the present invention provides a power converter. The power converter controls the conduction timing of the switches and cross switches in each phase power conversion unit to achieve normal operation at full duty cycle, thereby improving efficiency.

[0005] According to a first aspect of an embodiment of the present invention, there is provided a power converter. The power converter includes: a first high-side switch, a first flying capacitor, and a first low-side switch connected in series between a first port;

[0006] a second high-side switch, a second flying capacitor, and a second low-side switch connected in series between the first port;

[0007] a first cross switch having a first end coupled to the first flying capacitor and the first high-side switch, and a second end coupled to the second flying capacitor and the second low-side switch; and

[0008] a second cross switch having a first end coupled to the second flying capacitor and the second high-side switch, and a second end coupled to the first flying capacitor and the first low-side switch;

[0009] The power converter controls the sum of the voltages on the first flying capacitor and the second flying capacitor to be not greater than the input voltage in each switching cycle by switching the conduction state of the switch.

[0010] Preferably, the power converter further comprises:

[0011] a first inductor coupled between the first flying capacitor and a first end of the second port of the power converter; and

[0012] A second inductor is coupled between the second flying capacitor and the first end of the second port; wherein the second ends of the first port and the second port are both coupled to a reference end.

[0013] When the duty cycle is greater than 0.5, the power converter controls the switch to operate in multiple modes in sequence, and the multiple modes include a first mode, in which the sum of the voltages on the first flying capacitor and the second flying capacitor is controlled to continuously decrease from the input voltage.

[0014] Preferably, the multiple modes include a second mode, in which the voltages on the first flying capacitor and the second flying capacitor both rise, and at the end of the second mode, the sum of the voltages on the first flying capacitor and the second flying capacitor is equal to the input voltage, wherein the second mode is located after the first mode.

[0015] Preferably, the multiple modes include a third mode, in which the sum of the voltages on the first flying capacitor and the second flying capacitor remains equal to the input voltage, wherein the third mode is located before the first mode.

[0016] Preferably, within the switching cycle, the power converter operates in the first mode, the second mode and the third mode twice respectively.

[0017] Preferably, the duration of the first mode is set according to the duration of the second mode.

[0018] Preferably, in adjacent first and second modes, the duration of the first mode is twice the duration of the second mode.

[0019] Preferably, the first mode is in a first time period and a second time period respectively, wherein

[0020] In the first time period, the reference end is coupled to the first end of the second port via the second low-side switch, the second flying capacitor, the second cross switch and the first inductor, and is coupled to the first end of the second port via the second low-side switch and the second inductor;

[0021] In the second time period, the reference end is coupled to the first end of the second port via the first low-side switch, the first flying capacitor, the first cross switch and the second inductor, and is coupled to the first end of the second port via the first low-side switch and the first inductor.

[0022] Preferably, in the second mode, the first end of the first port is coupled to the first end of the second port via the first high-side switch, the first flying capacitor and the first inductor, and is coupled to the first end of the second port via the second high-side switch, the second flying capacitor and the second inductor.

[0023] Preferably, the third mode is in a third time period and a fourth time period respectively, wherein

[0024] In the third time period, the reference end is coupled to the first end of the second port via the second low-side switch, the second flying capacitor, the second cross switch and the first inductor, and is coupled to the first end of the second port via the second low-side switch and the second inductor; the first end of the first port is coupled to the first end of the second port via the first high-side switch, the first flying capacitor and the first inductor;

[0025] In the fourth time period, the reference end is coupled to the first end of the second port via the first low-side switch, the first flying capacitor, the first cross switch and the second inductor, and is coupled to the first end of the second port via the first low-side switch and the first inductor; the first end of the first port is coupled to the first end of the second port via the second high-side switch, the second flying capacitor and the second inductor.

[0026] Preferably, when the first port is an input terminal and the second port is an output terminal, the power converter is configured as a buck converter; when the first port is an output terminal and the second port is an input terminal, the power converter is configured as a boost converter.

[0027] Preferably, when the duty cycle is greater than 0.5, when the power converter is configured as a buck converter, the ratio of the output voltage to the input voltage is greater than 0.25, and when the power converter is configured as a boost converter, the ratio of the output voltage to the input voltage is less than 4.

[0028] Preferably, a phase difference of a driving signal for controlling the first high-side switch and a phase difference of a driving signal for controlling the second high-side switch is 180°.

[0029] Preferably, within one switching cycle, the voltage drop across the first and second flying capacitors in the first mode is equal to the sum of the voltage increase across the first and second flying capacitors in the second mode.

[0030] The technical solution of the embodiment of the present invention controls the conduction timings of the switches and cross switches in each phase power conversion unit at a large duty cycle to achieve normal operation at the full switch duty cycle, thereby improving the efficiency. Description of the Drawings

[0031] Through the following description of the embodiments of the present invention with reference to the drawings, the above and other objects, features and advantages of the present invention will become more apparent. In the drawings:

[0032] Figure 1 The figure shows the circuit diagram of a power converter in the prior art;

[0033] Figure 2 The figure shows the circuit diagram of a power converter based on a novel control method according to an embodiment of the present invention;

[0034] Figure 3 The figure shows the circuit diagram of the power converter according to an embodiment of the present invention operating in the first mode;

[0035] Figure 4 The figure shows the circuit diagram of the power converter according to an embodiment of the present invention operating in the second mode;

[0036] Figure 5 The figure shows the circuit diagram of the power converter according to an embodiment of the present invention operating in the third mode;

[0037] Figure 6 The figure shows the working waveform diagram of the drive signal of the power converter according to an embodiment of the present invention;

[0038] Figure 7 The figure shows the working waveform diagram of the voltage on the flying capacitor in the power converter according to an embodiment of the present invention;

[0039] Figure 8 It is the working waveform diagram of the power converter according to an embodiment of the present invention. Detailed Embodiments

[0040] The following describes the present invention based on embodiments, but the present invention is not limited to these embodiments. In the following detailed description of the present invention, some specific details are described in detail. Those skilled in the art can fully understand the present invention without the description of these details. In order to avoid obscuring the essence of the present invention, well-known methods, processes, procedures, elements and circuits are not described in detail.

[0041] In addition, those of ordinary skill in the art should understand that the drawings provided herein are for illustrative purposes only, and the drawings are not necessarily drawn to scale.

[0042] At the same time, it should be understood that in the following description, "circuit" refers to a conductive loop composed of at least one element or subcircuit through electrical connection or electromagnetic connection. When an element or circuit is said to be "connected to" another element or an element / circuit is said to be "connected between" two nodes, it can be directly coupled or connected to another element or there can be an intermediate element, and the connection between the elements can be physical, logical, or a combination thereof. On the contrary, when an element is said to be "directly coupled to" or "directly connected to" another element, it means that there is no intermediate element between the two.

[0043] Unless the context clearly requires otherwise, throughout the specification and claims, the words "include", "comprising" and similar words should be interpreted in an inclusive sense rather than an exclusive or exhaustive sense; that is, in the sense of "including but not limited to".

[0044] In the description of the present invention, it should be understood that the terms "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance. In addition, in the description of the present invention, unless otherwise specified, "plurality" means two or more.

[0045] Figure 2 FIG. 1 is a circuit diagram of a power converter according to a first embodiment of the present invention. Figure 2 As shown, the power converter includes a first high-side switch Q connected in series between the first port i H1 , the first flying capacitor C F1 and the first low-side switch Q L1 ; A second high-side switch Q connected in series between the first port i H2 , the second flying capacitor C F2 and the second low-side switch Q L2 The first high-side switch Q H1 , the first flying capacitor C F1 and the first low-side switch Q L1 Forming the first phase power conversion unit, the second high-side switch Q H2 , the second flying capacitor C F2 and the second low-side switch Q L2 A second phase power conversion unit is formed, and the two-phase power conversion units work with a phase shift of 180°.

[0046] The first end of the first port i receives an input voltage V in The second end is connected to the reference end. In this embodiment, the reference end is the ground end. The power converter also includes a first cross switch Q S1 and the second cross switch Q S2 The first cross switch Q S1 The first end is connected to the first flying capacitor C F1 and the first high-side switch Q H1The second end is connected to the second flying capacitor C F2 and the second low-side switch Q L2 The second cross switch Q S2 The first end is connected to the second flying capacitor C F2 and the second high-side switch Q H2 The common connection point of the first flying capacitor C F1 and the first low-side switch Q L1 The power converter also includes a first inductor L 1 and the second inductor L 2 The first inductor L 1 The first end is connected to the first flying capacitor C F1 and the first low-side switch Q L1 The second inductor L has a common connection point, and a second end connected to a first end of the second port o. 2 The first end is connected to the second flying capacitor C F2 and the second low-side switch Q L2 The common connection point of the first and second ends of the second ports o is connected to the first end of the second port o. The second end of the second port o is connected to the reference end.

[0047] In this embodiment, the power converter is configured as a bidirectional power converter, which can work as a buck converter or a boost converter. When the power converter is used as a buck converter, the first port i is used as an input terminal to receive an input voltage V in The second port o is used as the output terminal to generate the output voltage V out When the power converter is used as a boost converter, the second port o is used as an input terminal to receive the input voltage V in , the first port i is used as the output terminal to generate an output voltage V out .

[0048] The power converter further includes an output capacitor Co. The output capacitor Co is connected between the second port o and generates an output voltage V out .

[0049] exist Figure 2 In the embodiment, the power converter is described by taking a buck converter as an example, wherein the first port i is an input terminal receiving an input voltage V in The second port o is used as the output terminal to generate the output voltage V out The second ends of the first port i and the second port o are both connected to the ground. In this embodiment, the switch Q H1 and Q H2 , Q L1 and Q L2 , and switch Q S1 and Q S2Metal oxide semiconductor transistors (MOSFET) are used. However, other types of electronically controlled switch devices, such as bipolar junction transistors (BJT) and insulated gate transistors (IGBT), can also be used as switches in this embodiment.

[0050] The switch Q in the power converter H1 and Q L1 Through the driving signal G H1 and G L1 Control, switch Q H2 and Q L2 Through the driving signal G H2 and G L2 Control. Drive signal G H1 and G H2 The phase difference is 180°. The first cross switch Q S1 The driving signal G S1 With the driving signal G L1 Same, the second cross switch Q S2 The driving signal G S2 With the driving signal G L2 In each switching cycle, the power converter controls the switch Q H1 and Q H2 , switch Q L1 and Q L2 , and switch Q S1 and Q S2 The first flying capacitor C F1 and the second flying capacitor C F2 The sum of the upper voltage is not greater than the input voltage V in , thereby preventing the flying capacitor from discharging to the input terminal. Specifically, the power converter controls the flying capacitor C F1 and C F2 The charging and discharging time and the duration of charging and discharging make the flying capacitor C F1 and the flying capacitor C F2 The sum of the upper voltage is not greater than the input voltage V in。

[0051] In one embodiment, when the duty cycle D is greater than 0.5, the power converter controls the switch Q H1 and Q H2 , switch Q L1 and Q L2 , and switch Q S1 and Q S2 The first flying capacitor C F1 and the second flying capacitor C F2 The sum of the upper voltages is controlled from the input voltage Vin Continue to decrease, so that in the next mode flying capacitor C F1 and the flying capacitor C F2 The sum of the upper voltage is not greater than the input voltage V in , thereby avoiding the flying capacitor C F1 and C F2 In this embodiment, the duty cycle D represents the percentage period of the time when the voltage on the nodes SW1 and SW2 is at the first level relative to the switching period, where the first level is V in / 2.

[0052] In one embodiment, when the duty cycle D is less than 0.5, the driving signal G H1 and G H2 The phase difference is 180°. The driving signal G L1 and G L2 Respectively with the driving signal G H1 and G H2 The second cross switch Q S2 The driving signal G S2 The driving signal G of the first high-side switch H1 Same, the first cross switch Q S1 The driving signal G S1 The driving signal G of the second high-side switch H2 same.

[0053] In this embodiment, within one switching cycle, for the two-phase power conversion unit, the power converter operates in the first mode twice, such as Figure 3 As shown. For the first phase power conversion unit, the low-side switch Q L2 and crossbar switch Q S2 Turn on, switch Q H1 , Q H2 , Q L2 and switch Q S1 Shutdown, such as Figure 3 This forms a circuit that starts from the ground and passes through the low-side switch Q L2 、Inductor L 2 , and the circuit of capacitor Co, inductor L 2 releases energy; at the same time, a current is formed from the ground end through the low-side switch Q L2 、Flying capacitor C F2 , Crossbar switch Q S2 、Inductor L 1 , and the circuit of capacitor Co, the flying capacitor C F2 Discharge, inductor L 1 Energy storage. At this time, the flying capacitor C F1 The voltage on the capacitor remains unchanged, and the capacitor C F2 Drop, flying capacitor CF1 and the flying capacitor C F2 The sum of the upper voltages is controlled from the input voltage V in For the second phase power conversion unit, the low side switch Q L1 and crossbar switch Q S1 Turn on, switch Q H1 , Q H2 , Q L1 and switch Q S2 Shut down, such as Figure 3 (b). This forms a circuit that starts from the ground and passes through the low-side switch Q L1 、Inductor L 1 , and the circuit of capacitor Co, inductor L 1 releases energy; at the same time, a current is formed from the ground end through the low-side switch Q L1 、Flying capacitor C F1 , Crossbar switch Q S1 、Inductor L 2 , and the circuit of capacitor Co, the flying capacitor C F1 Discharge, inductor L 2 Energy storage. Thus, the flying capacitor C F2 The voltage on the flying capacitor C remains unchanged. F1 The voltage on the flying capacitor C F1 and the flying capacitor C F2 The sum of the upper voltages is controlled from the input voltage V in Continue to decline.

[0054] In one embodiment, the plurality of operating modes include a second mode, such as Figure 4 The second mode is adjacent to the first mode and is located after the first mode. In one switching cycle, the power converter operates in the second mode twice. In the second mode, the high-side switch Q H1 and Q H2 At the same time, switch Q L1 and Q L2 And switch Q S1 and Q S2 This forms a voltage from the input V in , high side switch Q H1 、Flying capacitor C F1 、Inductor L 1 and capacitor Co, input voltage V in For flying capacitor C F1 charging, while forming a voltage from the input V in , high side switch Q H2 , high side capacitor C F2 、Inductor L 2 and capacitor Co, input voltage V inFor flying capacitor C F2 In the first mode, the capacitor C F2 Upper voltage V CF2 and capacitor C F1 Upper voltage V CF1 The sum of the input voltages is reduced in the second mode voltage V CF1 and V CF2 The sum just rises to the input voltage V in , thus avoiding the flying capacitor from discharging directly to the input terminal and improving efficiency.

[0055] In one embodiment, the plurality of operating modes include a third mode, such as Figure 5 As shown. The third mode is adjacent to the first mode and is located before the first mode. In one switching cycle, the power converter operates in the third mode twice. For the first phase power conversion unit, the high-side switch Q H1 , Cross Q S2 and low-side Q L2 Turn on, switch Q H2 , Q L1 and Q S1 Shutdown, such as Figure 5 (a). This forms a voltage from the input voltage V in , high side switch Q H1 、Flying capacitor C F1 、Inductor L 1 and capacitor Co, input voltage V in For flying capacitor C F1 charging; at the same time, a current is formed from the ground through the low-side switch Q L2 、Flying capacitor C F2 , Crossbar switch Q S2 、Inductor L 1 The circuit of capacitor Co and flying capacitor C F2 Discharge, inductor L 1 Energy storage; in addition, a voltage is formed from the ground end through the low-side switch Q L2 、Inductor L 2 The circuit of capacitor Co and inductor L 2 Release energy. At this time, the flying capacitor C F1 Upper voltage V CF1 Rise, flying capacitor C F2 Upper voltage V CF1 Drop, voltage V CF1 and V CF2 The sum is kept equal to the input voltage V in .

[0056] For the second phase power conversion unit, the high-side switch Q H2 , Crossbar switch Q S1and low-side Q L1 Turn on, switch Q H1 , Q L2 and Q S2 Shutdown, such as Figure 5 (b). This forms a voltage from the input voltage V in , high side switch Q H2 、Flying capacitor C F2 、Inductor L 2 and capacitor Co, input voltage V in For flying capacitor C F2 charging; at the same time, a current is formed from the ground terminal through the low side Q L1 、Flying capacitor C F1 , Crossbar switch Q S1 、Inductor L 2 The circuit of capacitor Co and flying capacitor C F1 Discharge, inductor L 2 Energy storage; in addition, a voltage is formed from the ground end through the low-side switch Q L1 、Inductor L 1 The circuit of capacitor Co and inductor L 1 Release energy. At this time, the flying capacitor C F2 Upper voltage V CF2 Rise, flying capacitor C F1 Upper voltage V CF1 Drop, voltage V CF1 and V CF2 The sum is kept equal to the input voltage V in .

[0057] In this embodiment, when the duty cycle D is greater than 0.5, the second high-side switch Q H2 Before turning on, the power converter turns off the first high-side switch Q H1 The predetermined time, that is, entering the first mode, and at the first high-side switch Q H1 Before turning on, turn off the second high-side switch Q H2 The predetermined time means re-entering the first mode, thereby preventing the flying capacitor from charging the input terminal, thereby reducing the loss.

[0058] Therefore, the power converter can control the switch to switch between different modes, so that the flying capacitor can be repeatedly charged and discharged, thereby controlling the voltage on the flying capacitor to be no greater than the input voltage V in , avoiding the flying capacitor from charging the input, thus achieving high efficiency at large duty cycle.

[0059] Figure 6 FIG. 1 is a working waveform diagram of a driving signal of a power converter according to an embodiment of the present invention. Figure 6 This is the operating waveform diagram when the duty cycle D of the power converter is greater than 0.5. Figure 6 The driving signal G for controlling the high-side switch in each phase power conversion unit is shown. H1 and G H2 , used to drive the low-side switch drive signal G L1 and G L2 , used to drive the driving signal G of the cross switch S1 and G S2 In this embodiment, a black bar indicates that the signal is valid and represents a high level, otherwise it represents a low level. H1 and G H2 The phase difference is 180°, and the duty cycle represents the percentage period of time when the voltage on nodes SW1 and SW2 is at the first level relative to the switching period, that is, the time period t0-t3 in the figure relative to the switching period T S percentage period.

[0060] In the time period t0-t1, the power converter switches from the first mode of the previous switching cycle to the second mode. H1 and G H2 is high level, the first high-side switch Q H1 and the second high-side switch Q H2 Conductivity.

[0061] In the time period t1-t1', the power converter switches from the second mode to the third mode. H1 ,G S2 ,G L2 is high level, the first high-side switch Q H1 , the second cross switch Q S2 And the second low-side switch Q L2 Conductivity.

[0062] In the time period t1'-t2, the power converter switches from the third mode to the first mode. S2 and G L2 is high level, the second cross switch Q S2 and the second low-side switch Q L2 Conductivity.

[0063] In the time period t2-t3, the power converter switches from the first mode to the second mode. H1 and G H2 is high level, the first high-side switch Q H1 and the second high-side switch Q H2 Conductivity.

[0064] In the time period t3-t3', the power converter switches from the second mode to the third mode. H2 ,G S1 ,G L1is high level, the second high side switch Q H2 , the first cross switch Q S1 and the first low-side switch Q L1 Conductivity.

[0065] In the time period t3'-t4, the power converter switches from the third mode to the first mode. S1 and G L1 is high level, the first cross switch Q S1 and the first low-side switch Q L1 Then, in the next switching cycle, the power converter switches to the second mode again, and the cycle repeats.

[0066] exist Figure 6 When the duty cycle D is greater than 0.5, the power converter operates in the switching period T S The first mode, the second mode and the third mode are each operated twice. For the first phase power conversion unit, the power converter sequentially operates in the third mode (time period t1-t1'), the first mode (time period t1'-t2) and the second mode (time period t2-t3); for the second phase power conversion unit, the power converter sequentially operates in the third mode (time period t2-t3), the first mode (time period t3'-t4) and the second mode (time period t0-t1).

[0067] In this embodiment, in the adjacent first mode and the second mode, the duration of the first mode is set according to the duration of the second mode. Specifically, the duration of the first mode is twice the duration of the adjacent second mode, that is, the time period t1'-t2 is twice the time period t2-t3, and the time period t3'-t4 is twice the time when the first and second high-side switches are simultaneously turned on in the next switching cycle.

[0068] Figure 7 FIG. 1 is a working waveform diagram of the voltage on the flying capacitor in the power converter of the embodiment of the present invention. Figure 6 The waveform of the driving signal in Figure 7 The voltage V on the first flying capacitor is shown in sequence. CF1 , the voltage on the second flying capacitor V CF2 , and the sum of the voltages on the first and second flying capacitors (V CF1 +V CF1 ) waveform diagram.

[0069] During the time period t0-t1, the power converter operates in the second mode, referring to Figure 4 At this time, the first and second flying capacitors are charged simultaneously, and the voltage V CF1 and V CF2 Both rise, and at the end of the second mode, the sum of the voltages on the first and second flying capacitors is equal to the input voltage Vin .

[0070] During the time period t1-t1', the power converter operates in the third mode, referring to Figure 5 (a). At this time, the first transcapacitor is charged and the second flying capacitor is discharged, so the voltage V CF1 Rising, voltage V CF2 The sum of the voltages on the first and second flying capacitors remains equal to the input voltage V in。

[0071] In the time period t1'-t2, the power converter operates in the first mode, referring to Figure 3 (a). At this time, only the second flying capacitor is discharged, and the voltage V CF1 remains unchanged, the voltage V CF2 The sum of the voltages on the first and second flying capacitors drops from the input voltage V in Continue to decline.

[0072] During the time period t2-t3, the power converter operates in the second mode, referring to Figure 4 The working status of this time period is the same as that of the time period t0-t1.

[0073] During the time period t3-t3', the power converter operates in the third mode, referring to Figure 5 (b). At this time, the first transcapacitor is charged and the second flying capacitor is discharged, so the voltage V CF2 Rising, voltage V CF1 The sum of the voltages on the first and second flying capacitors remains equal to the input voltage V in。

[0074] In the time period t3'-t4, the power converter operates in the first mode, referring to Figure 3 (b). At this time, only the first flying capacitor is discharged, and the voltage V CF2 remains unchanged, the voltage V CF1 The sum of the voltages on the first and second flying capacitors drops from the input voltage V in Continue to decline.

[0075] In the time period t0-t1 and the time period t2-t3, the voltage V CF1 The rise is △V CF1_2 , voltage V CF2 The rise is △V CF2_2 , rise △V CF1_2 and △V CF2_2 It can be expressed as follows.

[0076] △V CF1_2 =I L1 *(D-0.5)*T S / CF1

[0077] △V CF2_2 =I L2 *(D-0.5)*T S / C F2

[0078] Among them I L1 is the current flowing through the first inductor, I L2 is the current flowing through the second inductor. The duty cycle D represents the time when the voltage on the nodes SW1 and SW2 is at the first level relative to the switching period T S percentage period.

[0079] In time period t 1 '-t 2 Voltage V CF2 The drop is △V CF2_1 , in time period t 3 '-t 4 Voltage V CF1 The drop is △V CF1_1 . Drop amount △V CF2_1 and △V CF1_1 It can be expressed as follows.

[0080] △V CF2_1 =I L1 *(2D-1)*T S / C F2

[0081] △V CF1_1 =I L2 *(2D-1)*T S / C F1

[0082] Because I L1 =I L2 ,C F1 =C F2 , from which we can get the rise △V CF1_2 and △V CF2_2 Equal, drop △V CF2_1 and △V CF1_1 Equal, which can be expressed as follows:

[0083] △V CF1_1 =△V CF2_1

[0084] △V CF1_2 =△V CF2_2

[0085] From this we get the voltage V CF2 The decrease of △V CF2_1 and voltage VCF1 The decrease of △V CF1_1 Equal to the rise △V CF1_2 and △V CF2_2 The specific expression is as follows.

[0086] △V CF1_1 =△V CF2_1 =△V CF1_2 +△V CF2_2

[0087] Therefore, when the power converter enters the third mode, that is, when the switch Q H1 Turn off, switch Q S1 and Q L1 When it is turned on (time t3), and at Q H2 Shutdown, Q S2 and Q L2 When turned on (time t1), the sum of the voltages on the first and second flying capacitors (V CF1 +V CF2 ) are exactly equal to the input voltage V in , avoid flying capacitor C F1 and C F2 Direct discharge to the input terminal.

[0088] Figure 8 is a working waveform diagram of the power converter of the embodiment of the present invention. Under the control mode of the embodiment of the present invention, Figure 8 The voltage V on nodes SW1 and SW2 is shown in sequence SW1 and V SW2 , the current on the first inductor I L1 , and the current I on the second inductor L2 The waveform of Figure 8 As shown, the voltage V SW1 and V SW2 The phase difference is 180°. The voltage V SW1 and V SW2 The first level is V in / 2, the second level is 0. Figure 3-6 , in different time periods, the power converter works in different modes. S Internal voltage V SW1 The current I is at the first level during the time period t0-t3 and at the second level during the time period t3-t4. L1 It rises in the time period t0-t3 and falls in the time period t3-t4. SW2 The first level is in the time period t0-t1 and the time period t2-t4, and the first level is in the time period t 1 -t 2 is the second level; current I L1The current I increases during the time period t0-t3 and decreases during the time period t3-t4. L2 It rises in the time period t0-t1 and the time period t2-t4, and in the time period t 1 -t 2 Internal decline.

[0089] Based on the control method of the embodiment of the present invention, when the power converter is a buck converter, the output voltage V out and input voltage V in The relationship can be expressed as follows:

[0090] V out =V in / 2*D

[0091] Thus, when the duty cycle D is greater than 0.5, when the power converter is configured as a buck converter, the ratio of the output voltage to the input voltage is greater than 0.25. It should be understood that those skilled in the art can deduce that when the power converter is configured as a boost converter, the ratio of the output voltage to the input voltage is less than 4.

[0092] The technical solution of the embodiment of the present invention controls the conduction timing of the switch and the cross switch in the power conversion unit to keep the sum of the voltages on the first and second flying capacitors not greater than the input voltage, so as to avoid the flying capacitor charging the input terminal, thereby improving the efficiency of the power converter at a large duty cycle.

[0093] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A power converter, comprising: a first high-side switch, a first flying capacitor and a first low-side switch coupled in series between the first port; A second high-side switch, a second flying capacitor and a second low-side switch are coupled in series between the first port; a first cross switch having a first end coupled to the first flying capacitor and the first high-side switch and a second end coupled to the second flying capacitor and the second low-side switch; as well as a second cross switch, having a first end coupled to the second flying capacitor and the second high-side switch, and a second end coupled to the first flying capacitor and the first low-side switch; The power converter controls the sum of the voltages on the first flying capacitor and the second flying capacitor to be not greater than the input voltage in each switching cycle by switching the conduction state of the switch.

2. The power converter according to claim 1, characterized in that: The power converter also includes: a first inductor coupled between the first flying capacitor and a first end of the second port of the power converter; as well as A second inductor is coupled between the second flying capacitor and the first end of the second port; wherein the second ends of the first port and the second port are both coupled to a reference end. When the duty cycle is greater than 0.5, the power converter controls the switch to operate in multiple modes in sequence, and the multiple modes include a first mode, in which the sum of the voltages on the first flying capacitor and the second flying capacitor is controlled to continuously decrease from the input voltage.

3. The power converter according to claim 2, characterized in that: The multiple modes include a second mode, in which the voltages on the first flying capacitor and the second flying capacitor both rise, and at the end of the second mode, the sum of the voltages on the first flying capacitor and the second flying capacitor is equal to the input voltage, wherein the second mode is located after the first mode.

4. The power converter according to claim 3, characterized in that: The plurality of modes include a third mode, in which a sum of voltages across the first flying capacitor and the second flying capacitor remains equal to the input voltage, wherein the third mode is located before the first mode.

5. The power converter according to claim 4, characterized in that: In the switching cycle, the power converter operates in the first mode, the second mode and the third mode twice respectively.

6. The power converter according to claim 3, characterized in that: The duration of the first mode is set according to the duration of the second mode.

7. The power converter according to claim 6, characterized in that: In adjacent first and second modes, the duration of the first mode is twice the duration of the second mode.

8. The power converter according to claim 2, wherein: The first mode is in a first time period and a second time period respectively, wherein In the first time period, the reference end is coupled to the first end of the second port via the second low-side switch, the second flying capacitor, the second cross switch and the first inductor, and is coupled to the first end of the second port via the second low-side switch and the second inductor; In the second time period, the reference end is coupled to the first end of the second port via the first low-side switch, the first flying capacitor, the first cross switch and the second inductor, and is coupled to the first end of the second port via the first low-side switch and the first inductor.

9. The power converter according to claim 3, characterized in that: In the second mode, the first end of the first port is coupled to the first end of the second port via the first high-side switch, the first flying capacitor and the first inductor, and is coupled to the first end of the second port via the second high-side switch, the second flying capacitor and the second inductor.

10. The power converter according to claim 4, characterized in that: The third mode is in the third time period and the fourth time period respectively, wherein In the third time period, the reference end is coupled to the first end of the second port via the second low-side switch, the second flying capacitor, the second cross switch and the first inductor, and is coupled to the first end of the second port via the second low-side switch and the second inductor; the first end of the first port is coupled to the first end of the second port via the first high-side switch, the first flying capacitor and the first inductor; In the fourth time period, the reference end is coupled to the first end of the second port via the first low-side switch, the first flying capacitor, the first cross switch and the second inductor, and is coupled to the first end of the second port via the first low-side switch and the first inductor; the first end of the first port is coupled to the first end of the second port via the second high-side switch, the second flying capacitor and the second inductor.

11. The power converter according to claim 1, wherein: When the first port is an input port and the second port is an output port, the power converter is configured as a buck converter; when the first port is an output port and the second port is an input port, the power converter is configured as a boost converter.

12. The power converter according to claim 1, wherein: When the duty cycle is greater than 0.5, when the power converter is configured as a buck converter, the ratio of the output voltage to the input voltage is greater than 0.25, and when the power converter is configured as a boost converter, the ratio of the output voltage to the input voltage is less than 4.

13. The power converter according to claim 1, wherein: The phase difference between the driving signal for controlling the first high-side switch and the driving signal for controlling the second high-side switch is 180°.

14. The power converter according to claim 3, characterized in that: In one switching cycle, the voltage drop across the first and second flying capacitors in the first mode is equal to the sum of the voltage increase across the first and second flying capacitors in the second mode.

Images