Suppression of random telegraph noise in crossbar circuits

Abstract

The present disclosure provides mechanisms for reducing and suppressing random telegraph noise (RTN) in crossbar circuits. The processing device may perform a programming process to program a resistive random access memory (RRAM) device in the crossbar circuit to a target conductance value. The processing device may then determine whether a telegraph noise (RTN) value associated with the RRAM device is within a predetermined range of acceptable RTN values. If the RTN value associated with the RRAM device is not within a predetermined range of acceptable RTN values, one or more noise reduction voltages may be applied to the RRAM device until the RTN value associated with the RRAM device is within the predetermined range of acceptable RTN values.

Description

[0001] This disclosure claims priority to U.S. Patent Application No. 18 / 361,282, filed July 28, 2023, entitled “Suppressing Random Telegraph Noise in Cross Switch Circuits,” the entire contents of which are incorporated herein by reference. Technical Field

[0002] Embodiments of this disclosure generally relate to cross-switching circuits including resistive random access memory (RRAM or ReRAM), and more specifically, to mechanisms for reducing and suppressing random telegraph noise (RTN) in cross-switching circuits. Background Technology

[0003] A cross-switch circuit can refer to a circuit structure with interconnected conductive lines, at the intersections of which are spaced storage elements, such as resistive switching materials. The resistive switching materials may include, for example, memristors (also known as resistive random access memory (RRAM or ReRAM)). Cross-switch circuits can be used to implement in-memory computing applications, non-volatile solid-state memories, image processing applications, neural networks, etc. Summary of the Invention

[0004] The following is a brief summary of the invention disclosed to provide a basic understanding of some aspects of this disclosure. The summary is not a broad overview of this disclosure. It is not intended to identify key or essential elements of this disclosure, nor is it intended to define any scope of any particular matter or claim. The sole purpose of the summary is to simplify the presentation of some concepts of this disclosure in the more detailed description that follows.

[0005] According to one or more aspects of this disclosure, a method for programming a cross-connect circuit is provided. The method includes performing a first programming process to program a cross-point device in the cross-connect circuit to a target conductance value, wherein during the first programming process, at least one programming voltage is applied to the cross-point device, the cross-point device including an RRAM device; determining a first random telegraph noise (RTN) value associated with the RRAM device by a processing device; and, given that the first RTN value associated with the RRAM device is determined to be outside a predetermined range of acceptable RTN values, applying a first noise reduction voltage to the cross-point device, wherein the at least one programming voltage is higher than the first noise reduction voltage.

[0006] In some embodiments, the method further includes: generating a digital signal via the processing device to instruct a voltage generator to generate the first noise-reducing voltage.

[0007] In some embodiments, the first RTN value associated with the crossover device includes features representing a signal of current flowing through the crossover device.

[0008] In some embodiments, the method further includes: using a transimpedance amplifier to generate a signal representing the current flowing through the crossover device.

[0009] In some embodiments, the signal representing the current flowing through the crossover device is characterized by its amplitude.

[0010] In some embodiments, the method further includes: after applying a first noise reduction voltage to the cross-point device, performing a second programming process to program the RRAM device to the target conductance value; determining a second random telegraph noise (RTN) value associated with the RRAM device by the processing device; and applying a second noise reduction voltage to the cross-point device in view of the determination that the second RTN value associated with the RRAM device is not within a predetermined range of acceptable RTN values.

[0011] In some embodiments, the method further includes: performing one or more additional programming processes and applying one or more additional noise reduction voltages to the crosspoint device until the conductance of the crosspoint device matches the target conductance value and the RTN value associated with the crosspoint device is within a predetermined range of acceptable RTN values.

[0012] According to one or more aspects of this disclosure, a system including a processing device is provided. The processing device is configured to perform a first programming process to program a crosspoint device in the cross-switch circuit to a target conductance value, wherein during the first programming process, at least one programming voltage is applied to the crosspoint device, the crosspoint device including an RRAM device; determine a first random telegraph noise (RTN) value associated with the RRAM device; and, in response to determining that the first RTN value associated with the RRAM device is not within a predetermined range of acceptable RTN values, apply a first noise reduction voltage to the crosspoint device, wherein the at least one programming voltage is higher than the first noise reduction voltage.

[0013] In some embodiments, in order to apply a first noise reduction voltage to the crossover device, the processing device generates at least one digital signal to instruct a voltage generator to generate the first noise reduction voltage.

[0014] In some embodiments, the first RTN value associated with the RRAM device includes features representing a signal of current flowing through the crossover device.

[0015] In some embodiments, a transimpedance amplifier is used to generate a signal representing the current flowing through the crossover device.

[0016] In some embodiments, the signal representing the current flowing through the crossover device is characterized by its amplitude.

[0017] In some embodiments, the processing device is further configured to: after applying a first noise reduction voltage to the crossover device, perform a second programming process to program the RRAM device to the target conductance value; determine a second random telegraph noise (RTN) value associated with the RRAM device; and in response to determining that the second RTN value associated with the RRAM device is not within a predetermined range of acceptable RTN values, thereby causing a second noise reduction voltage to be applied to the crossover device, wherein the second noise reduction voltage is not greater than a threshold voltage of a transistor connected to the RRAM device.

[0018] In some embodiments, the processing device is further configured to perform one or more additional programming processes, and to apply one or more additional noise reduction voltages to the crosspoint device until the conductance of the crosspoint device matches the target conductance value and the RTN value associated with the crosspoint device is within a predetermined range of acceptable RTN values.

[0019] According to one or more aspects of this disclosure, a non-volatile computer-readable storage medium including instructions is provided. When accessed by a processing device, the non-volatile computer-readable storage medium causes the processing device to perform a first programming process to program a crosspoint device in a cross-switching circuit to a target conductance value, wherein during the first programming process, at least one programming voltage is applied to the crosspoint device, the crosspoint device including an RRAM device; the processing device determines a first random telegraph noise (RTN) value associated with the RRAM device; and in response to determining that the first RTN value associated with the RRAM device is not within a predetermined range of acceptable RTN values, a first noise reduction voltage is applied to the crosspoint device, wherein the at least one programming voltage is higher than the first noise reduction voltage. Attached Figure Description

[0020] This disclosure will be more fully understood from the following detailed description and the accompanying drawings of various embodiments thereof. However, the drawings should not be used to limit this disclosure to the particular embodiments, but are for explanation and understanding only.

[0021] Figure 1 This is a block diagram illustrating an example cross switch circuit according to some embodiments of the present disclosure; Figure 2A , 2B Figures 2C, 2D, and 2E are plots showing the output current of an RRAM device without noise reduction operation as a function of time when a constant voltage is applied to the RRAM device. Figure 3A ,3B Figures 3C, 3D, 3E, and 3F show cross-sectional views of an example RRAM device according to some embodiments of the present disclosure; Figure 4 This is a flowchart illustrating an exemplary method for programming a cross switch circuit according to some embodiments of the present disclosure; Figure 5A This is a graph showing the relationship between the number of noise reduction pulses applied to the RRAM device and the probability of successfully reducing RTN; Figure 5B It is a graph showing the relationship between the number of noise reduction pulses applied to the RRAM device and the output current of the RRAM device; Figure 6 A schematic representation of a computer system according to some embodiments of the present disclosure is shown. Detailed Implementation

[0022] Various aspects of this disclosure provide mechanisms (e.g., apparatus, systems, methods, non-volatile computer-readable media, etc.) for reducing and suppressing random telegraph noise (RTN) in cross-switch circuits.

[0023] A cross-switch circuit may include interconnecting conductive lines (e.g., row lines, column lines, etc.) and cross-point devices arranged in one or more arrays. Each of the cross-point devices may be connected to both row lines and column lines. The cross-point devices may include, for example, memristors, phase-change memory (PCM) devices, floating-gate devices, spintronic devices, ferroelectric devices, or resistive random access memory (RRAM) devices (also known as memristors).

[0024] Resistive random access memory (RRAM) devices can exhibit random switching behavior. That is, under constant voltage, the resistance value of the RRAM device can randomly switch between multiple levels. This can cause the output current of the memristor to fluctuate randomly over time under constant voltage, leading to the emergence of RTN (Resistive Transfer Memory).

[0025] The cross-connect circuit can perform vector matrix multiplication (VMM). For example, an input voltage can be applied to each selected row in the cross-connect circuit. The input voltage can flow through the cross-point devices on the rows of the cross-connect circuit. The conductance of each cross-point device can be adjusted to a specific value (also known as a "weight"). According to Ohm's law and Kirchhoff's current law, the input-output relationship of the cross-connect circuit can be expressed as I=VG, where I represents the output signal matrix, which is current; V represents the input signal matrix, which is voltage; and G represents the conductance matrix of the cross-point devices. Therefore, according to Ohm's law, the output voltage is weighted by the conductance of each cross-point device. The weighted current is output through each column line and can be accumulated according to Kirchhoff's current law. However, the conductance values ​​of the programmed RRAM devices may vary randomly over time, leading to the generation of RTN. This can cause errors and instability in the cross-connect circuit and can limit the inference accuracy of the cross-connect circuit.

[0026] This disclosure provides a mechanism for suppressing and reducing RTN in a cross-connected switching circuit. In some embodiments, programming an RRAM device in a cross-connected switching circuit may involve programming the RRAM device to a target conductance value (e.g., by applying one or more programming voltages to the RRAM device). A controller may determine whether an RTN value associated with the RRAM is within a predetermined range of acceptable RTN values. The RTN value may be, for example, the amplitude of a signal representing the current flowing through the RRAM device. In response to determining that the RTN value is not within the predetermined range, the controller may cause a noise-reducing voltage to be applied to the RRAM device. For example, the controller may generate one or more digital signals to instruct one or more voltage generators to generate the noise-reducing voltage. The voltage generator may generate the noise-reducing voltage based on the digital signals and apply the noise-reducing voltage to the RRAM device.

[0027] The controller then determines the conductance value of the RRAM device after applying a first noise reduction voltage, and if the conductance value of the RRAM device does not match the target conductance value, the RRAM device can be programmed to the target conductance value. The controller then determines whether the RTN value of the RRAM device is within a predetermined range. The controller can apply one or more noise reduction voltages until the RTN value associated with the RRAM device is within the predetermined range. Therefore, the mechanism described in this disclosure enables precise programming of the RRAM device.

[0028] Figure 1This is a block diagram illustrating an example cross switch circuit 100 according to some embodiments of the present disclosure. As shown, the cross switch circuit 100 may include a plurality of interconnecting conductive lines, for example, for one or more row lines 111a, ..., 111i, ..., 111n and column lines 113a, ..., 113i, ..., 113n in an n-row by m-column cross switch array. The cross switch circuit 100 may further include cross point devices 120a, ..., 120ij, 120z, etc. The number of column lines 113a-m may be the same as the number of row lines 111a-n, or they may be different. The cross switch circuit 100 may further include select lines 115a, 115b, ..., 115n. Each cross point device may connect one row line, one column line, and one select line. For example, cross point device 120ij may connect row line 111i and column line 113j. Each of the row lines 111a-n, column lines 113a-m, and select lines 115a-n can be a metal line. In some embodiments, each row line 111a-n can be a word line, and each column line 113a-m can be a bit line.

[0029] The crossover switch circuit may further include one or more voltage generators 161a, ..., 161i, ..., 161n connected to row lines 111a-n, voltage generators 163a, ..., 163j, ..., 163m connected to word lines 113a-m, and voltage generators 165a, 165b, ..., 165n connected to select lines 115a-n. Each of the voltage generators 161a-n, 163a-m, and 165a-n may include any suitable components for generating and providing voltage signals. The voltage generators 161a, ..., 161i, ..., 161n can apply voltage to one or more crossover devices 120a-z via the corresponding row lines 111a-n. The voltage generators 163a, ..., 163j, ..., 163m can apply voltage to one or more crossover devices 120a-z via the corresponding column lines 113a-m. Voltage generators 165a, 165b, ..., 165m can apply voltage to one or more cross-point devices 120a-z via corresponding selection lines 115a-n.

[0030] Each crosspoint device 120a-z can be and / or includes any suitable device with programmable resistors, such as phase-change memory (PCM) devices, floating-gate devices, spintronic devices, ferroelectric devices, RRAM devices, etc. Each crosspoint device 120a-z can be programmed to a suitable conductance value by applying a suitable programming signal (e.g., a suitable voltage or current signal) to the crosspoint device. The resistance value of each crosspoint device can be electrically switched between a high-resistance state and a low-resistance state. Setting a crosspoint device may involve switching the resistance value of the crosspoint device from a high-resistance state to a low-resistance state. Resetting a crosspoint device may involve switching the resistance value of the crosspoint device from a low-resistance state to a high-resistance state.

[0031] Each crosspoint device 120a-z may include an n-transistor-m-resistor (nTmR) configuration, where n and m indicate the number of transistors and the number of programmable devices (e.g., RRAM devices) in the crosspoint device, respectively. The transistors can provide access control for the RRAM devices in the crosspoint device.

[0032] In some embodiments, one or more cross-point devices 120a-z may include a single transistor single resistor (1T1R). For example, as Figure 1 As shown, the crossover device 120a may include an RRAM device 121a and a transistor 123a connected in series. The transistor 123a provides access control to the RRAM device 121a. The transistor may include a gate, a source, and a drain. In some embodiments, a first terminal of the RRAM device 121a may be connected to the drain terminal of the transistor 123a. A second terminal of the RRAM device 121a may be connected to a row line 111a. The source terminal of the transistor 123a may be connected to a column line 113a. The gate terminal of the transistor 123a may be connected to a select line 115a. In one embodiment, the row line 111a and the column line 113a may be a word line and a bit line, respectively. In other embodiments, the row line 111a and the column line 113a may be a bit line and a word line, respectively.

[0033] Transistor 123a can be used as a selector or a current controller, and can set a current limit for RRAM device 121a during programming. The gate voltage of transistor 123a can set a current limit for crosspoint device 121a during programming, and thus control the conductance and analog behavior of crosspoint device 120a. For example, when crosspoint device 120a and / or RRAM device 121a are set from a high-resistance state to a low-resistance state, a setting signal (e.g., a voltage signal, a current signal) can be provided via row line 111a (or column line 113a). Another voltage, also referred to as the select voltage or gate voltage, can be applied to the transistor gate of transistor 123a via select line 115a to open the gate and set the current limit, while column line 113a (or row line 111a) can be grounded. When the crosspoint device 120a and / or the RRAM device 121 is reset from a low-resistance state to a high-resistance state, a gate voltage can be applied to the gate of transistor 123a via select line 115a to turn on the transistor gate. Simultaneously, a reset signal can be applied to RRAM device 121a via column line 113a (or row line 111a), and row line 111a (or column line 113a) can be grounded. The set signal and reset signal may have the same polarity or different polarities.

[0034] The RTN readout circuits 140a, ..., 140j, ..., 140m may include any suitable circuitry for converting the current flowing through the corresponding column lines 113a, ..., 113j, ..., 113m into an output signal. For example, each RTN readout circuit 140a-m may include a transimpedance amplifier (TIA) (not shown) that converts the current flowing through the corresponding column line into a corresponding voltage signal. Each RTN readout circuit 140a-m may further include an analog-to-digital converter (ADC) (not shown) that converts the voltage signal generated by its corresponding TIA into a digital output. In some embodiments, the output of the RTN readout circuits 140a-m may be provided to the controller 150.

[0035] The cross-switch circuit 100 can perform parallel weighted voltage multiplication and current summation. For example, an input voltage signal can be applied to one or more rows of the cross-switch circuit 100 (e.g., one or more selected rows). The input signal can flow through the cross-point devices of the rows of the cross-switch circuit 100. The conductance values ​​of the cross-point devices can be adjusted to a specific value (also referred to as "weights"). According to Ohm's law, the input voltage is multiplied by the conductance value of the cross-point device, generating a current flowing through the cross-point device. According to Kirchhoff's laws, the sum of the currents flows through the activated cross-point devices in the corresponding columns (also referred to as "bit line currents"), which can be read from the column. According to Ohm's law and Kirchhoff's current law, the input-output relationship of the cross-switch array can be expressed as I=VG, where I represents the output signal matrix, which is the current; V represents the input signal matrix, which is the voltage; and G represents the conductance matrix of the cross-point devices. Therefore, according to Ohm's law, the input signal is weighted by the conductance of each cross-point device. The weighted current (“bit line current”) is output through each column line and accumulated according to Kirchhoff’s current law. This can be achieved through in-memory computation (IMC) via parallel multiplication and summation performed in the crossbar switch array.

[0036] The crossover switch circuit 100 can be configured to perform a suitable matrix multiplication (VMM). A VMM operation can be represented as Y = XA, where each of Y, X, and A represents a corresponding matrix. More specifically, for example, the input vector X can be mapped to the input voltage V of the crossover switch circuit 100. Matrix A can be mapped to the conductance value G. The output current I can be read and mapped back to the output result Y. In some embodiments, the crossover switch circuit 100 can be configured to implement part of a neural network by performing VMM.

[0037] However, the conductance G of a programmed RRAM device can randomly switch between multiple levels over time under a constant voltage, leading to the occurrence of RTN. For example, as... Figures 2A-2E As shown, the output current of an un-noise-reduced RRAM device fluctuates randomly over time under constant voltage. This can lead to errors and instabilities in cross-switching circuits and limit their inference accuracy.

[0038] Controller 150 may include any suitable hardware and / or software components for suppressing RTN in cross-switch circuit 100. In some embodiments, controller 150 may include components combined with the following... Figure 6 The aforementioned processing device. The controller 150 may be and / or include... Figure 6The computer system in the system. In one embodiment, the controller 150 may be used as a separate device that is not part of the cross switch circuit 100. In another embodiment, the controller 150 may be considered as part of the cross switch circuit 100.

[0039] Controller 150 can perform operations to suppress RTN in crossover switching circuit 100. For example, controller 150 can program the conductance of a selected crossover device to a target conductance value. For example, controller 150 can provide instructions to generate and apply one or more programming voltages to one or more voltage generators (e.g., voltage generators connected to row and / or column lines connected to the selected crossover device). The selected crossover device can be considered to have been programmed to the target conductance value when the difference between the conductance of the selected crossover device and the target conductance value is not greater than a predetermined threshold. Controller 150 can then determine whether the RTN value associated with the selected crossover device is within a predetermined range of acceptable RTN values. The RTN value can be a characteristic (e.g., amplitude) of the output of the RTN readout circuit 140a-m. In response to determining that the RTN value is within the predetermined range, controller 150 can terminate the programming of the selected crossover device. In response to determining that the RTN value is not within the predetermined range, controller 150 may generate one or more instructions to cause the voltage generators 161a-n and / or 163a-m to generate a noise-reducing voltage and apply the noise-reducing voltage to the selected crossover device via row lines and / or column lines connected to the selected crossover device. Controller 150 may then determine the conductance value of the selected crossover device after the noise-reducing voltage is applied. If the conductance value of the selected crossover device does not match the target conductance value, controller 150 may program the selected crossover device to the target conductance value. Controller 150 may apply one or more noise-reducing voltages until the RTN value associated with the RRAM device is within the predetermined range. Therefore, precise programming of the RRAM device can be achieved. In some embodiments, controller 150 may implement... Figure 4 Method 400 performs RTN reduction operation for cross switch circuit 100.

[0040] Figure 2A , 2B Figures 2C, 2D, and 2E are graphs showing the output current of the RRAM device as a function of time when a constant voltage is applied to the RRAM device. No noise reduction operation as described in this disclosure is performed on the RRAM device. As shown, the output current of the RRAM device fluctuates randomly over time under a constant voltage, indicating the presence of RTN.

[0041] Figure 3A , 3BFigures 3C, 3D, 3E, and 3F show cross-sectional views of example RRAM devices according to some embodiments of the present disclosure. RRAM devices 300a, 300b, and 300c may correspond to RRAM devices in an initial state, a low-resistance state, and a high-resistance state, respectively. RRAM device 300d corresponds to RRAM device 300a, which simultaneously includes both complete and incomplete filaments. RRAM devices 300e and 300f correspond to RRAM device 300d after the application of a noise-reducing voltage.

[0042] like Figure 3A As shown, the RRAM device 300a may include a substrate 310, a first electrode 320, a switching oxide layer 330, and a second electrode 340. The RRAM device 300a may further include one or more other components for implementing in-memory computing applications.

[0043] The substrate 310 may comprise one or more layers of any suitable material for use as a substrate of an RRAM device, such as silicon (Si), silicon dioxide (SiO2), silicon nitride (Si3N4), aluminum oxide (Al2O3), aluminum nitride (AlN), etc. In some embodiments, the substrate 310 may include diodes, transistors, interconnects, integrated circuits, etc. In some embodiments, the substrate may include a driving circuit comprising one or more individually controllable electronic circuits (e.g., an array of electronic circuits). In some embodiments, the driving circuit may include one or more complementary metal-oxide-semiconductor (CMOS) drivers.

[0044] The first electrode 320 can be and / or includes any suitable material that is unresponsive to the switching oxide and is electronically conductive. For example, the first electrode may include platinum (Pt), palladium (Pd), iridium (Ir), titanium nitride (TiN), tantalum nitride (TaN), etc.

[0045] The switching oxide layer 330 may include one or more transition metal oxides, such as TaOx, HfOx, TiOx, NbOx, ZrOx, etc., which may be second-order oxides, third-order oxides, and higher-order oxides. In some embodiments, the chemical stability of the non-reactive material in the first electrode 320 may be higher than the chemical stability of the transition metal oxide in the switching oxide layer 330.

[0046] The second electrode 340 may comprise any suitable electronically conductive metallic material that reacts with the transition metal oxide in the switching oxide layer. For example, the metallic material in the second electrode 340 may include Ta, Hf, Ti, TiN, TaN, etc. The second electrode 340 may react with the switching oxide and may have suitable oxygen solubility to adsorb some oxygen from the switching oxide and create oxygen vacancies in the switching oxide. In other words, the reactive metallic material in the second electrode 340 may have suitable oxygen solubility and / or oxygen mobility. In some embodiments, the second electrode 340 may not only create oxygen vacancies in the switching oxide layer 330 (e.g., by scavenging oxygen) but may also serve as an oxygen reservoir or oxygen source for the switching oxide layer 330 during cell programming.

[0047] The RRAM device 330a may have an initial resistance (also referred to herein as "original resistance") after its fabrication. The initial resistance of the RRAM device 330a can be altered through the formation process, and the RRAM device 300 can be switched to a low-resistance state. For example, a suitable voltage or current can be applied to the RRAM device 300a. Applying a voltage to the RRAM device 300a can induce the metal material in the second electrode to adsorb oxygen from the switching oxide layer 330, creating oxygen vacancies in the switching oxide layer 330. Therefore, oxygen-vacancy-rich conductive channels (e.g., filaments) can be formed in the switching oxide layer 330. For example, as... Figure 3B As shown, a conductive channel 335a may be formed in the switching oxide layer 330. As illustrated, the conductive channel 335a may be formed across the switching oxide layer 330 from the second electrode 340 to the first electrode 320. The RRAM device 300b may be reset to a high-resistance state. For example, a reset signal (e.g., a voltage signal or a current signal) may be applied to the RRAM device 300b during the reset process. In some embodiments, the set signal and the reset signal may have opposite polarities, e.g., positive and negative signals, respectively. The application of the reset signal may cause oxygen to migrate back to the switching oxide layer and recombine with one or more oxygen vacancies. For example, during the reset process, as... Figure 3C The interrupted conductive channel 335b shown can be formed in the switching oxide layer 330. As shown, the conductive channel can be interrupted due to the gap between the interrupted conductive channel 335b and the first electrode 320. The conductive channel 335b does not continuously connect the first electrode 320 and the second electrode 340. By applying appropriate programming signals (e.g., voltage signals, current signals, etc.) to the RRAM device, the RRAM device 300a-c can be electrically switched between a high-resistance state and a low-resistance state.

[0048] refer to Figure 3DIn some embodiments, during programming of the RRAM device 300a, both complete filaments 337a and incomplete filaments 337b may be formed simultaneously. An incomplete filament can be considered an intermediate state between the original switching film and the complete filament. The incomplete filament may contain some conductive material, but it has a smaller size and higher resistance compared to the complete filament. The conductivity of the conductive channels in the switching oxide layer 330 is affected by a shielding effect. When one or more charge trap centers 339a, 339b, etc., are present in the switching oxide layer 330, they may occasionally trap charges, leading to occasional occurrences of the shielding effect.

[0049] Since the shielding effect radius decreases as the free charge carrier density increases, the shielding effect has a limited impact on the conductivity of the intact filament. In the intact conductive channel, the free charge carrier density is very high, so the shielding effect is negligible. However, due to the low free charge carrier density in the incomplete channel, the shielding effect can significantly affect the conductivity of the incomplete channel. Therefore, the conductivity of the switching membrane changes during the switching between the capture and decapture states, leading to the emergence of RTN.

[0050] Compared to a complete filament, an incomplete filament may be more sensitive to voltage input. This is because there is less conductive material within the incomplete filament, so even minute movements of this material can have a more significant impact on its characteristics. Therefore, the behavior of an incomplete filament can be regulated using a voltage lower than that required to program a complete filament.

[0051] For example, such as Figure 3E As shown, a noise reduction voltage (e.g., a sub-threshold voltage lower than the threshold voltage of the transistor providing access control for the RRAM device) can be applied to the RRAM device in the RESET direction. The incomplete filament 337b tends to break (shown as incomplete filament 337c), and therefore does not cause RTN. For example, as... Figure 3F As shown, applying a noise reduction voltage to the RRAM device in the SET direction can strengthen the incomplete filament to form filament 337d, thereby reducing its sensitivity to the shielding effect.

[0052] Figure 4 This is a flowchart illustrating an exemplary method 400 for programming a cross-switching circuit according to some embodiments of the present disclosure. The cross-switching circuit may include a plurality of bit lines crossing a plurality of word lines and a plurality of cross-point devices. Each of the plurality of cross-point devices is connected to at least one word line and at least one bit line. The cross-switching circuit may be... Figure 1The method 400 can be performed to program the conductance of the cross-point devices (e.g., RRAM devices 120a-z) and / or RRAM devices (e.g., RRAM devices 121a-z) in the cross-switch circuit to a target conductance value, and to reduce and / or decrease the RTN in the cross-switch circuit.

[0053] In step 405, a first programming process can be performed to program the crosspoint device in the cross switch circuit to a target conductance value. The crosspoint device (e.g., Figure 1 The crosspoint devices (120a-z) in the diagram may include at least one RAMM device. For example, the crosspoint devices can be programmed by iteratively performing the operations described in steps 410, 420, and 430.

[0054] In 410, a suitable circuit can be used to read the current conductance value of the crossover device. For example, the current conductance value of the target crossover device can be determined based on the output current of the target crossover device (e.g., the current flowing through the crossover device when it is selected) and the input voltage applied to the crossover device.

[0055] In step 420, the processing device can compare the current conductance value of the crossover device with a target conductance value to determine whether the current conductance value matches the target conductance value. When the difference between the current conductance value and the target conductance value is not greater than a predetermined threshold, the current conductance value can be considered to match the target conductance value.

[0056] In some embodiments where the current conductance value does not match the target conductance value (No at 420), the target crossover device can be programmed based on the comparison result in 430. For example, in some embodiments where the current conductance value is higher than the target conductance value, a reset operation can be performed on the target crossover device. More specifically, for example, the processing device can provide one or more instructions and / or digital signals to one or more voltage generators to apply one or more reset voltages to the target crossover device. The voltage generator can then generate a reset voltage based on the instructions and / or digital signals and apply the reset voltage to the target crossover device. As another example, in some embodiments where the current conductance value is lower than the target conductance value, a setting operation can be performed on the target crossover device. More specifically, for example, the processing device can provide one or more instructions and / or digital signals to the voltage generator to apply one or more setting voltages to the target crossover device. The voltage generator can then generate a setting voltage based on the instructions and / or digital signals and apply the setting voltage to the target crossover device. Method 400 can loop back to 410 after executing 430. The crosspoint device can be programmed by iteratively executing 410, 420, and 430 until the conductance of the crosspoint device (the conductance of the RRAM device in the crosspoint device) matches the target conductance value.

[0057] In some embodiments where the current conductance value matches a target conductance value, the controller may perform 440 and determine an RTN value associated with the crossover device. The RTN value may be, for example, one or more characteristics (e.g., amplitude) of a signal representing the current flowing through the crossover device. Figure 1 The output of the RTN readout circuit 140a-m.

[0058] In step 450, the processing device may determine whether the RTN value associated with the target crossover device is within a predetermined range of acceptable RTN values. Given that the current RTN value is determined to be outside the predetermined range of acceptable RTN values, in step 460, a noise reduction voltage (also referred to as a "first noise reduction voltage") may be applied to the target crossover device. The noise reduction voltage may include one or more pulses (also referred to as "noise reduction pulses") and may be lower than that applied to the RRAM device (e.g., ...). Figure 1 The threshold voltage required to program (e.g., set, reset, etc.) the RRAM device 121a in the RRAM. The noise reduction voltage is lower than the programming voltage used to program the target crosspoint device to the target conductance value.

[0059] To apply a noise-reducing voltage to the target crossover device, the processing device may generate one or more instructions and / or digital signals for generating the noise-reducing voltage, and may provide the instructions to one or more voltage generators connected to word lines and / or bit lines connected to the target crossover device. The voltage generators may then generate the noise-reducing voltage based on the instructions and / or digital signals. The noise-reducing voltage can be applied to the target crossover device via word lines and / or bit lines connected to the target crossover device.

[0060] The processing device can then return to step 410, determining the conductance value of the RRAM device in the target crossover device after applying the first noise reduction voltage, and if the conductance value of the RRAM device does not match the target conductance value, programming the RRAM device (e.g., by applying one or more programming voltages) to the target conductance value. Additional programming voltages can be applied to the target crossover device until the conductance of the RRAM device matches the target conductance value.

[0061] The processing device then determines a second RTN value associated with the RRAM device (e.g., the amplitude of a second signal representing the current flowing through the RRAM device and / or the target crossover device). If the second RTN value associated with the RRAM device is not within a predetermined range of acceptable RTN values, a second noise reduction voltage may be applied to the target crossover device and / or the RRAM device. One or more additional noise reduction voltages may be applied to the RRAM device until the second RTN value associated with the target crossover device is within a predetermined range of acceptable RTN values ​​(e.g., "Yes" in 450). The target crossover device can then be considered successfully programmed, and the controller can terminate the programming of the target crossover device.

[0062] Figure 5A Schematic diagram 500a illustrates the relationship between the number of noise reduction pulses applied to an RRAM device and the probability of successfully reducing RTN. Due to ion movement, the effect of the noise reduction voltage may have a degree of randomness. As shown, applying an appropriate number of noise reduction voltage pulses to the RRAM device can address this issue and make the probability of achieving a successful result nearly deterministic.

[0063] Figure 5BThis is a schematic diagram 500b illustrating the relationship between the number of noise reduction pulses applied to an RRAM device and the output current of the RRAM device. As shown, the RTN reduction operation according to this disclosure may have the potential to change the overall conductance of the RRAM device. However, the resulting changes are still within acceptable tolerances. In some embodiments where the changes exceed tolerance thresholds, the RRAM device enters a fine-tuning feedback regulation loop (e.g., combined with...). Figure 4 The iterative executions (450, 460, 410, 420, 430, etc.) enable reprogramming to return to the desired target conductivity level.

[0064] Figure 6 A schematic representation of a machine is shown as an example of a computer system 600, in which a set of instructions can be executed to enable the machine to perform any one or more methods discussed in this disclosure. In alternative embodiments, the machine may be connected (e.g., via a network) to other machines in a local area network, intranet, extranet, or the Internet. The machine may act as a server or client machine in a client-server network environment, or operate as a peer machine in a peer-to-peer (or distributed) network environment. The machine may be a personal computer (PC), tablet computer, set-top box (STB), personal digital assistant (PDA), cellular phone, network device, server, network router, switch, or bridge, or any machine capable of executing a set (sequential or otherwise) of instructions that specify the action to be taken by the machine. Furthermore, although only one machine is shown, the term "machine" should also be understood to include any set of machines that individually or collectively execute a set (or more) of instructions to perform any one or more methods discussed in this disclosure.

[0065] Example computer system 600 includes a processing device (processor) 602, a main memory 604 (e.g., read-only memory (ROM), flash memory, dynamic random access memory (DRAM), such as synchronous DRAM (SDRAM) or Rambus DRAM (RDRAM), etc.), a static memory 606 (e.g., flash memory, static random access memory (SRAM), etc.), and a data storage device 618, which communicate with each other via bus 608.

[0066] Processing device 602 represents one or more general-purpose processing devices, such as microprocessors, central processing units, etc. More specifically, processing device 602 may be a Complex Instruction Set Computing (CISC) microprocessor, a Reduced Instruction Set Computing (RISC) microprocessor, a Very Long Instruction Word (VLIW) microprocessor, or a processor implementing other instruction sets, or a processor implementing a combination of multiple instruction sets. Processing device 602 may also be one or more special-purpose processing devices, such as application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), digital signal processors (DSPs), network processors, etc. Processing device 602 is configured to execute instructions 626 to perform the operations and steps discussed in this disclosure.

[0067] The computer system 600 may also include a network interface device 622. The computer system 600 may also include a video display unit 610 (e.g., a liquid crystal display (LCD), a cathode ray tube (CRT), or a touch screen), an alphanumeric input device 612 (e.g., a keyboard), a cursor control device 614 (e.g., a mouse), and a signal generating device 620 (e.g., a speaker).

[0068] Data storage device 618 may include a computer-readable storage medium 624 storing one or more sets of instructions 626 (e.g., software) embodying any one or more methods or functions described in this disclosure. During execution of these instructions 626 by computer system 600, they may also reside wholly or at least partially in main memory 604 and / or processing device 602, which also constitute computer-readable storage media. Instructions 626 may also be transmitted or received via network 674 through network interface device 622.

[0069] In one embodiment, instruction 626 includes instructions for implementing a processing device that can reduce RTN in a cross-switching circuit, the processing device possibly corresponding to the controller 150 described in conjunction with FIG1, and / or a software library containing the methods described in conjunction with FIG4. Although computer-readable storage medium 624 is shown as a single medium in the example embodiment, the term "computer-readable storage medium" should be understood to include a single medium or multiple media (e.g., a centralized or distributed database, and / or associated caches and servers) that store one or more sets of instructions. The term "computer-readable storage medium" should also be understood to include any medium capable of storing, encoding, or carrying a set of instructions for machine execution, and causing the machine to perform any one or more methods of this disclosure. Therefore, the term "computer-readable storage medium" should be understood to include, but is not limited to, solid-state memory, optical media, and magnetic media.

[0070] For ease of explanation, the methods in this disclosure are depicted and described as a series of actions. However, actions according to this disclosure may occur in various sequences and / or simultaneously, and may also occur with other actions not shown or described in this disclosure. Furthermore, not all illustrated actions are necessary for implementing the methods according to the disclosed subject matter. Additionally, those skilled in the art will understand and recognize that these methods may also be represented by state diagrams or events as a series of interrelated states. Furthermore, it should be understood that the methods disclosed in this specification can be stored on an article of art to facilitate the transfer and assignment of these methods to a computing device. As used in this disclosure, the term "article of art" is intended to encompass any computer program available from any computer-readable device or storage medium.

[0071] As used herein, the terms “about,” “about,” and “substantially” can refer to normal tolerances in the art, for example, within two standard deviations of the average, within ±20% of the target size in some embodiments, within ±10% of the target size in some embodiments, within ±5% of the target size in some embodiments, within ±2% of the target size in some embodiments, within ±1% of the target size in some embodiments, and even within ±0.1% of the target size in some embodiments. The terms “about” and “about” can include the target size. Unless otherwise expressly stated or obvious from the context, all numerical values ​​described herein are modified to be “about.”

[0072] In this disclosure, a range includes all numerical values ​​within that range. For example, a range of 1 to 10 may include any single number, combination of numbers, subranges, and fractions of 1, 2, 3, 4, 5, 6, 7, 8, 9, and 10.

[0073] This disclosure has set forth numerous details in the foregoing description. However, it will be apparent that this disclosure can be practiced without these specific details. In some instances, well-known structures and devices are shown in block diagrams rather than in detail to highlight the scope of the invention.

[0074] The terms “first,” “second,” “third,” “fourth,” etc., used in this disclosure are markers used to distinguish different elements and do not necessarily have the ordinal meaning of the numerical designations used.

[0075] The terms “example” or “exemplary” as used in this disclosure are intended to serve as examples, instances, or illustrations. Any aspect or design described as “example” or “exemplary” in this disclosure is not necessarily to be construed as being more preferred or superior than other aspects or designs. Rather, the use of “example” or “exemplary” is intended to present concepts in a concrete manner. The term “or” as used in this application is intended to mean an inclusive “or” rather than an exclusive “or.” That is, unless otherwise specified or clearly apparent from the context, “X includes A or B” is intended to mean any natural inclusion arrangement. That is, if X includes A; X includes B; or X includes both A and B, then “X includes A or B” holds true in any of the foregoing cases. Furthermore, the articles “a” and “an” used in this application and the appended claims should generally be interpreted as “one or more” unless otherwise specified or clearly apparent from the context as referring to the singular form. References throughout this specification to “one embodiment” or “an embodiment” mean that a particular feature, structure, or characteristic described in association with that embodiment is included in at least one embodiment. Therefore, the phrase "one implementation" or "an implementation" appearing in various places in this specification does not necessarily refer to the same implementation.

[0076] As used in this disclosure, when an element or layer is referred to as being "above" another element or layer, the element or layer may be directly above the other element or layer, and there may also be intermediate elements or layers. Conversely, when an element or layer is referred to as being "directly above" another element or layer, there are no intermediate elements or layers.

[0077] While many changes and modifications to this disclosure will undoubtedly become apparent to those skilled in the art after reading the foregoing description, it should be understood that any particular embodiment shown and described by way of example is in no way intended to be limiting. Therefore, references to details of various embodiments are not intended to limit the scope of the claims, which themselves merely enumerate those features considered part of this disclosure.

Claims

1. A method for programming a cross switch circuit, comprising: A first programming process is performed to program the crosspoint device in the cross switch circuit to a target conductance value, wherein during the first programming process, at least one programming voltage is applied to the crosspoint device, the crosspoint device including a resistive random access memory (RRAM) device. The processing device determines the first random telegraph noise (RTN) value associated with the RRAM device; and Given that a first RTN value associated with the RRAM device is determined to be outside a predetermined range of acceptable RTN values, a first noise reduction voltage is applied to the crossover device, wherein at least one programming voltage is higher than the first noise reduction voltage.

2. The method of claim 1, further comprising: The processing device generates a digital signal to instruct the voltage generator to generate the first noise-reducing voltage.

3. The method of claim 1, wherein the first RTN value associated with the crossover device includes features representing a signal of current flowing through the crossover device.

4. The method of claim 3, further comprising: A transimpedance amplifier is used to generate a signal representing the current flowing through the crossover device.

5. The method of claim 3, wherein the signal representing the current flowing through the intersection device is characterized by amplitude.

6. The method of claim 1, further comprising: After applying a first noise reduction voltage to the crossover device, a second programming process is performed to program the RRAM device to the target conductance value; The processing device determines a second random telegraph noise (RTN) value associated with the RRAM device; and Given that the second RTN value associated with the RRAM device is determined to be outside the predetermined range of acceptable RTN values, a second noise reduction voltage is applied to the crossover device.

7. The method of claim 1, further comprising: Perform one or more additional programming processes and apply one or more additional noise reduction voltages to the cross-point device until the conductance of the cross-point device matches the target conductance value and the RTN value associated with the cross-point device is within a predetermined range of acceptable RTN values.

8. A system comprising: Processing equipment, used for: A first programming process is performed to program the crosspoint device in the cross switch circuit to a target conductance value, wherein during the first programming process, at least one programming voltage is applied to the crosspoint device, the crosspoint device including a resistive random access memory (RRAM) device. Determine the first random telegraph noise (RTN) value associated with the RRAM device; and In response to determining that a first RTN value associated with the RRAM device is not within a predetermined range of acceptable RTN values, a first noise reduction voltage is applied to the crossover device, wherein the at least one programming voltage is higher than the first noise reduction voltage.

9. The system of claim 8, wherein, In order to apply a first noise reduction voltage to the crossover device, the processing device generates at least one digital signal to instruct the voltage generator to generate the first noise reduction voltage.

10. The system of claim 8, wherein the first RTN value associated with the RRAM device includes features representing a signal of current flowing through the crossover device.

11. The system of claim 10, wherein, A transimpedance amplifier is used to generate a signal representing the current flowing through the crossover device.

12. The system of claim 10, wherein the signal representing the current flowing through the intersection device is characterized by amplitude.

13. The system of claim 8, wherein the processing device is further configured to: After applying a first noise reduction voltage to the crossover device, a second programming process is performed to program the RRAM device to the target conductance value; Determine the second random telegraph noise (RTN) value associated with the RRAM device; and In response to determining that a second RTN value associated with the RRAM device is not within a predetermined range of acceptable RTN values, a second noise reduction voltage is applied to the crossover device, wherein the second noise reduction voltage is not greater than the threshold voltage of the transistor connected to the RRAM device.

14. The method of claim 8, wherein the processing device is further configured to perform one or more additional programming processes, and to apply one or more additional noise reduction voltages to the cross-point device until the conductance of the cross-point device matches the target conductance value and the RTN value associated with the cross-point device is within a predetermined range of acceptable RTN values.

15. A non-volatile computer-readable storage medium, comprising instructions that, when accessed by a processing device, cause the processing device to: A first programming process is performed to program the crosspoint device in the cross switch circuit to a target conductance value, wherein during the first programming process, at least one programming voltage is applied to the crosspoint device, the crosspoint device including a resistive random access memory (RRAM) device. The processing device determines the first random telegraph noise (RTN) value associated with the RRAM device; and In response to determining that a first RTN value associated with the RRAM device is not within a predetermined range of acceptable RTN values, a first noise reduction voltage is applied to the crossover device, wherein at least one programming voltage is higher than the first noise reduction voltage.

16. The non-transitory computer readable storage medium of claim 15, wherein, In order to apply a first noise reduction voltage to the crossover device, the processing device generates at least one digital signal to instruct the voltage generator to generate the first noise reduction voltage.

17. The non-volatile computer-readable storage medium of claim 15, wherein the first RTN value associated with the RRAM device includes features representing a signal of current flowing through the crossover device.

18. The non-transitory computer-readable storage medium of claim 17, wherein, A transimpedance amplifier is used to generate a signal representing the current flowing through the crossover device.

19. The non-volatile computer-readable storage medium of claim 17, wherein the signal representing the current flowing through the crossover device is characterized by an amplitude.

20. The non-volatile computer-readable storage medium of claim 15, wherein the processing apparatus is further configured to: After applying a first noise reduction voltage to the crossover device, a second programming process is performed to program the RRAM device to the target conductance value; Determine the second random telegraph noise (RTN) value associated with the RRAM device; and In response to determining that a second RTN value associated with the RRAM device is not within a predetermined range of acceptable RTN values, a second noise reduction voltage is applied to the crossover device, wherein the second noise reduction voltage is not greater than the threshold voltage of the transistor connected to the RRAM device.

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