Protection circuit, electronic equipment and vehicle

Abstract

The invention provides a protection circuit, electronic equipment and a vehicle. The circuit comprises a first PMOS transistor, a second PMOS transistor, a first resistor, a first switching device, a second resistor and a first diode, the drain electrode of the first PMOS tube is used for being connected with the positive electrode of a power supply, the source electrode of the first PMOS tube is connected with the source electrode of the second PMOS tube, and the drain electrode of the second PMOS tube is used for being connected with the input end of a load; the grid electrode of the first PMOS tube and the grid electrode of the second PMOS tube are connected with the first end of the first switching device, and the second end of the first switching device is grounded; the first end of the first resistor is connected with the source electrode of the first PMOS tube, and the second end of the first resistor is connected with the grid electrode of the first PMOS tube; the control end of the first switching device is used for inputting a control signal, and the control signal is used for controlling on-off of the first switching device; the first end of the second resistor is connected with the grid electrode of the first PMOS tube, and the second end of the second resistor is connected with the negative electrode of the first diode; the anode of the first diode is connected with the first end of the first switching device.

Description

Technical Field

[0001] The present disclosure relates to the field of circuit safety technology, and in particular to a protection circuit, an electronic device and a vehicle. Background Art

[0002] Shutdown and anti-reverse connection circuits are widely used in protection circuits of electronic systems. The shutdown circuit is used to reduce the static leakage current of the electronic system, and the anti-reverse connection circuit is used to prevent the subsequent circuit from being damaged when the positive and negative poles of the external power supply are reversed. In the related art, the unidirectional conduction characteristics of the diode are usually used to achieve the anti-reverse connection function. However, due to the voltage drop when the diode is turned on, it will cause more power consumption in high current scenarios. Therefore, metal oxide semiconductor (MOS) tubes are usually used to achieve the shutdown and anti-reverse connection functions of the circuit.

[0003] However, due to the parasitic capacitance between the gate G and source S of the MOS tube, the MOS tube will remain on for a period of time when the charge of the parasitic capacitance is not released. When the power supply is reversed or the negative voltage surge of the power supply occurs, the MOS tube cannot be turned off quickly due to the presence of parasitic capacitance, resulting in the risk of damaging the subsequent circuit. Summary of the invention

[0004] The present disclosure provides a protection circuit, an electronic device and a vehicle.

[0005] A first aspect of the present disclosure provides a protection circuit, the circuit comprising a first PMOS transistor, a second PMOS transistor, a first resistor, a first switch device, a second resistor and a first diode;

[0006] The drain of the first PMOS tube is used to connect to the positive electrode of the power supply, the source of the first PMOS tube is connected to the source of the second PMOS tube, and the drain of the second PMOS tube is used to connect to the input end of the load;

[0007] The gate of the first PMOS tube and the gate of the second PMOS tube are both connected to the first end of the first switch device, and the second end of the first switch device is grounded;

[0008] A first end of the first resistor is connected to the source of the first PMOS transistor, and a second end of the first resistor is connected to the gate of the first PMOS transistor;

[0009] The control terminal of the first switch device is used to input a control signal, and the control signal is used to control the on and off of the first switch device;

[0010] A first end of the second resistor is connected to the gate of the first PMOS tube, and a second end of the second resistor is connected to the cathode of the first diode;

[0011] An anode of the first diode is connected to the first end of the first switching device.

[0012] In one embodiment, the protection circuit provided by the first aspect of the present disclosure further includes a third resistor;

[0013] The third resistor is connected between the gate of the first PMOS tube and the first end of the first switch device.

[0014] In one embodiment, the protection circuit provided in the first aspect of the present disclosure further includes a first filter capacitor and a second filter capacitor;

[0015] The first end of the first filter capacitor is used to connect to the positive electrode of the power supply, and the second end of the first filter capacitor is connected to the first end of the first switch device;

[0016] The first end of the second filter capacitor is used to connect to the input end of the load, and the second end of the second filter capacitor is connected to the first end of the first switch device.

[0017] In one embodiment, the protection circuit provided in the first aspect of the present disclosure further includes a second diode, and the second diode is a voltage regulator diode;

[0018] The anode of the second diode is connected to the gate of the first PMOS tube, and the cathode of the second diode is connected to the source of the first PMOS tube.

[0019] In one embodiment, the first switch device comprises an NMOS transistor;

[0020] The source of the NMOS tube is grounded, and the drain of the NMOS tube is connected to both the gate of the first PMOS tube and the gate of the second PMOS tube;

[0021] The gate of the NMOS tube is used to input a control signal, and the control signal is used to control the on and off of the NMOS tube.

[0022] In one embodiment, the first switching device comprises a triode;

[0023] The emitter of the triode is grounded, and the collector of the NMOS tube is connected to both the gate of the first PMOS tube and the gate of the second PMOS tube;

[0024] The base of the transistor is used to input a control signal, and the control signal is used to control the on and off of the transistor.

[0025] In one embodiment, the protection circuit provided in the first aspect of the present disclosure further includes a first clamping diode;

[0026] The anode of the first clamping diode is connected to the drain of the NMOS tube, and the cathode of the first clamping diode is used to connect to the input end of the load.

[0027] In one embodiment, the protection circuit provided by the first aspect of the present disclosure further includes a second clamping diode;

[0028] The anode of the second clamping diode is grounded, and the cathode of the second clamping diode is used to connect to the input end of the load.

[0029] A third aspect of the present disclosure provides an electronic device, comprising the protection circuit provided by the first aspect of the present disclosure.

[0030] A third aspect of the present disclosure provides a vehicle, which includes the protection circuit provided by the first aspect of the present disclosure or the electronic device provided by the second aspect of the present disclosure.

[0031] The present disclosure provides a protection circuit, an electronic device and a vehicle. The protection circuit includes a first PMOS tube, a second PMOS tube, a first switch device, a second resistor and a first diode; the drain of the first PMOS tube is used to connect to the positive electrode of a power supply, the source of the first PMOS tube is connected to the source of the second PMOS tube, and the drain of the second PMOS tube is used to connect to the input end of a load; the gate of the first PMOS tube and the gate of the second PMOS tube are both connected to the first end of the first switch device, and the second end of the first switch device is grounded; the control end of the first switch device is used to input a control signal, and the control signal is used to control the on and off of the first switch device; the first end of the second resistor is connected to the gate of the first PMOS tube, and the second end of the second resistor is connected to the cathode of the first diode; the anode of the first diode is connected to the first end of the first switch device.

[0032] Through the scheme disclosed in the present invention, the on and off of the first switch device can be controlled by a control signal. Furthermore, when the electronic system needs to be turned off, it is only necessary to control the first switch device to be turned off by a control signal, and then the voltage between the gate and the source of the first PMOS tube and the second PMOS tube is zero. Therefore, the first PMOS tube and the second PMOS are disconnected because the conduction condition cannot be met. Therefore, the circuit between the power supply and the load is disconnected, and the static leakage current of the system is reduced. Further, when the power supply is reversed, even if the first switch device is turned on, the gate voltage of the first PMOS tube and the second PMOS tube is greater than the source voltage. Therefore, the first PMOS tube and the second PMOS are disconnected because the conduction condition cannot be met. Therefore, the circuit between the power supply and the load is disconnected to prevent the reverse connection of the power supply from damaging the subsequent circuit. Furthermore, when the first PMOS tube and the second PMOS tube fail to meet the conduction condition, a discharge path is formed between the gate G and the source S of the first PMOS tube Q1, the second resistor R2, the cathode and anode of the first diode D1, the NMOS tube, and the ground, so that the parasitic capacitance between the gate G and the source S of the first PMOS tube Q1 is discharged quickly, thereby accelerating the cut-off speed of the first PMOS tube Q1 and eliminating the risk of damaging the subsequent circuit.

[0033] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present application, nor is it intended to limit the scope of the present application. Other features of the present application will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] The accompanying drawings are used to better understand the present solution and do not constitute a limitation of the present disclosure.

[0035] Figure 1 A schematic diagram of the structure of a first protection circuit provided by an embodiment of the present disclosure;

[0036] Figure 2 A schematic diagram of the structure of a second protection circuit provided by an embodiment of the present disclosure;

[0037] Figure 3 A schematic diagram of the structure of a third protection circuit provided by an embodiment of the present disclosure;

[0038] Figure 4 A schematic diagram of the structure of a fourth protection circuit provided by an embodiment of the present disclosure;

[0039] Figure 5 A schematic diagram of the structure of a fifth protection circuit provided by an embodiment of the present disclosure;

[0040] Figure 6 This is a schematic diagram of the structure of the sixth protection circuit provided in the embodiment of the present disclosure. DETAILED DESCRIPTION

[0041] The following is a description of exemplary embodiments of the present disclosure in conjunction with the accompanying drawings, including various details of the embodiments of the present disclosure to facilitate understanding, which should be considered as merely exemplary. Therefore, it should be recognized by those of ordinary skill in the art that various changes and modifications may be made to the embodiments described herein without departing from the scope and spirit of the present disclosure. Similarly, for the sake of clarity and conciseness, descriptions of well-known functions and structures are omitted in the following description.

[0042] like Figure 1 As shown: The embodiment of the present disclosure provides a protection circuit, which includes a first P-channel Metal Oxide Semiconductor (PMOS) tube, a second PMOS tube Q2, a first resistor R1, a first switch device Q3, a second resistor R2 and a first diode D1;

[0043] The drain electrode D of the first PMOS tube Q1 is used to connect to the positive electrode of the power supply, the source electrode S of the first PMOS tube Q1 is connected to the source electrode S of the second PMOS tube Q2, and the drain electrode D of the second PMOS tube Q2 is used to connect to the input end of the load;

[0044] The gate G of the first PMOS transistor Q1 and the gate G of the second PMOS transistor Q2 are both connected to the first end of the first switch device Q3, and the second end of the first switch device Q3 is grounded;

[0045] A first end of the first resistor R1 is connected to the source S of the first PMOS transistor Q1, and a second end of the first resistor R1 is connected to the gate G of the first PMOS transistor Q1;

[0046] The control terminal of the first switch device Q3 is used to input a control signal, and the control signal is used to control the on and off of the first switch device Q3;

[0047] A first end of the second resistor R2 is connected to the gate G of the first PMOS transistor Q1, and a second end of the second resistor R2 is connected to the cathode of the first diode D1;

[0048] An anode of the first diode D1 is connected to a first end of the first switching device Q3.

[0049] In one embodiment, the protection circuit provided by the present disclosure may be applied to a front-stage power supply circuit of an electronic system of a vehicle to provide shutdown and power reverse connection protection for a rear-stage circuit.

[0050] In one embodiment, the first switch device Q3 may be an N-channel Metal Oxide Semiconductor (NMOS) transistor or a triode.

[0051] In one embodiment, the control signal for controlling the on and off of the first switch device Q3 may be provided by a microcontroller unit (MCU) of the vehicle. For example, the output terminal of the MCU outputs a high-level control signal to control the NMOG tube or the triode to be turned on; the output terminal of the MCU outputs a low-level control signal to control the NMOG tube or the triode to be turned off.

[0052] In one embodiment, the output terminal of the MCU outputs a high-level control signal, the power supply is not reversed, and the electronic system works normally. For example, the first switch device Q3 can be an NMOS tube:

[0053] Since the output end of the MCU outputs a high-level control signal, the NMOS tube is turned on.

[0054] Since the power supply is not reversely connected, the circuit between the positive pole of the power supply, the body diode of the first PMOS tube Q1, the NMOS tube and the ground is turned on. Since the body diode of the first PMOS tube Q1 will produce a voltage drop of about 0.7V, the source S power supply of the first PMOS tube Q1 is about the power supply voltage minus 0.7V; since the gate G of the first PMOS tube Q1 is grounded through the NMOS tube, the gate G voltage of the first PMOS tube Q1 is about 0V. That is, the gate-source voltage Vgs of the first PMOS tube Q1 is less than Vgsth, and the first PMOS tube Q1 is turned on. Among them, Vgsth is the threshold voltage of the first PMOS tube Q1. Since the gate G and source S of the second PMOS tube Q2 have the same potential as the gate G and source S of the first PMOS tube Q1, the second PMOS tube Q2 is turned on at this time, and the electronic system works normally. In this process, the parasitic capacitance between the gate G and source S of the first PMOS tube Q1 and the second PMOS tube Q2 is charged.

[0055] When the electronic system is turned off, in order to reduce the static leakage current in the electronic system, the circuit between the power supply and the load needs to be turned off. At this time, the output end of the MCU outputs a low-level control signal and the NMOS tube is turned off.

[0056] The parasitic capacitance between the gate G and the source S of the first PMOS tube Q1 and the second PMOS tube Q2 is discharged through the first resistor R1. After the discharge is completed, the voltage difference between the gate G and the source S of the first PMOS tube Q1 and the second PMOS tube Q2 is zero, that is, the first PMOS tube Q1 and the second PMOS tube Q2 are turned off because they do not meet the conduction condition, thereby reducing the static leakage current after the electronic system is turned off.

[0057] In one embodiment, the output terminal of the MCU outputs a high-level control signal, and when the power supply is suddenly reversed or a negative surge voltage of the power supply occurs, the NMOS tube is turned on;

[0058] However, since the source S voltage of the first PMOS transistor Q1 is lower than the gate G voltage, Vgs>Vgsth, the parasitic capacitance between the gate G and the source S of the first PMOS transistor Q1 is completely discharged and then turned off. Similarly, the parasitic capacitance between the gate G and the source S of the second PMOS transistor Q2 is also turned off after being completely discharged. Therefore, the power supply circuit between the power supply and the load cannot be turned on, thereby realizing the reverse connection protection function.

[0059] In one embodiment, the second resistor R2 and the first diode D form a fast discharge circuit;

[0060] In one embodiment, taking the first switch tube as an NMOS tube as an example: when the output terminal of the MCU outputs a high-level control signal and the power supply is suddenly reversed or a negative surge voltage of the power supply occurs, the NMOS tube is turned on;

[0061] However, since the source S voltage of the first PMOS tube Q1 is lower than the gate G voltage, Vgs>Vgsth, the first PMOS tube Q1 does not meet the conduction condition. At this time, due to the effect of the parasitic capacitance between the gate G and the source S of the first PMOS tube Q1, the first PMOS tube Q1 cannot be turned off immediately, and therefore, damage may be caused to the subsequent circuit. However, in the disclosed embodiment, through the effect of the fast discharge circuit, a discharge path is formed between the gate G and the source S of the first PMOS tube Q1, the second resistor R2, the cathode and anode of the first diode D1, the NMOS tube, and the ground, so that the parasitic capacitance between the gate G and the source S of the first PMOS tube Q1 is quickly discharged, thereby accelerating the cut-off speed of the first PMOS tube Q1 to prevent damage to the subsequent circuit. The second PMOS tube Q2 is similar.

[0062] like Figure 2 As shown, in one embodiment, the protection circuit provided by the present disclosure further includes a first driving circuit;

[0063] The first driving circuit includes a third resistor R3;

[0064] The third resistor R3 is connected between the gate G of the first PMOS transistor Q1 and the first end of the first switch device Q3.

[0065] In one embodiment, the first resistor R1 and the third resistor R3 form a voltage divider circuit, and the relationship between the first resistor R1 and the third resistor R3 satisfies the conduction condition of the PMOS tube.

[0066] like Figure 3 As shown, in one embodiment, the protection circuit provided by the present disclosure further includes a filtering circuit;

[0067] The filter circuit at least includes a first filter capacitor C1 and a second filter capacitor C2;

[0068] The first end of the first filter capacitor C1 is used to connect to the positive electrode of the power supply, and the second end of the first filter capacitor C1 is connected to the first end of the first switch device Q3;

[0069] A first end of the second filter capacitor C2 is used to connect to the input end of the load, and a second end of the second filter capacitor C2 is connected to a first end of the first switch device Q3.

[0070] In one embodiment, the first filter capacitor C1 is connected between the positive electrode of the power supply and the first end of the first switch device Q3 to filter out voltage fluctuations of the power supply and maintain the stability of the voltage of the power supply input to the electronic system.

[0071] In one embodiment, the second filter capacitor C2 is connected between the load and the first end of the first switch device Q3 to filter out voltage fluctuations of the load and maintain the stability of the voltage input to the load.

[0072] like Figure 4 As shown, in one embodiment, the protection circuit provided by the present disclosure further includes an anti-breakdown circuit;

[0073] The anti-breakdown circuit includes a second diode D2, and the second diode D2 is a voltage regulator diode;

[0074] An anode of the second diode D2 is connected to the gate G of the first PMOS transistor Q1 , and a cathode of the second diode D2 is connected to the source S of the first PMOS transistor Q1 .

[0075] In one embodiment, during normal operation, if the voltage of the power supply is too large, after the voltage divider circuit is formed by the first resistor R1 and the third resistor R3, the Vgs of the first PMOS tube Q1 is greater than the breakdown voltage of the second diode D2, and the second diode D2 will be reversely broken down. Then, the Vgs of the first PMOS tube Q1 is stabilized near the breakdown voltage of the second diode D2, ensuring that the gate G and the source S of the first PMOS tube Q1 are not broken down.

[0076] In one embodiment, since the second diode D2 consumes power when in operation, in order to reduce the power consumption of the second diode D2, in the voltage divider circuit formed by the first resistor R1 and the third resistor R3, the resistance of the third resistor R3 is relatively large, such as a resistance of the kilo-ohm level.

[0077] In one embodiment, since the resistance of the third resistor R3 is relatively large, when the power supply is suddenly reversed or a negative surge voltage of the power supply appears, the resistance of the third resistor R3 in the discharge path formed between the gate G and source S of the first PMOS tube Q1, the third resistor R3, the NMOS tube, and the ground is relatively large, and the discharge is relatively slow. Therefore, the resistance of the second resistor R2 is relatively small, so as to ensure that the discharge path between the gate G and source S of the first PMOS tube Q1, the second resistor R2, the cathode and anode of the first diode D1, the NMOS tube, and the ground can quickly discharge the parasitic capacitance between the gate G and source S of the first PMOS tube Q1, thereby accelerating the cut-off speed of the first PMOS tube Q1 and preventing damage to the subsequent circuit. The second PMOS tube Q2 is similar.

[0078] like Figure 5 As shown, in one embodiment, the first switch device Q3 includes an NMOS tube;

[0079] The source S of the NMOS tube is grounded, and the drain D of the NMOS tube is connected to both the gate G of the first PMOS tube Q1 and the gate G of the second PMOS tube Q2;

[0080] The gate G of the NMOS tube is used to input a control signal, and the control signal is used to control the on and off of the NMOS tube.

[0081] In one embodiment, when the first switch device Q3 includes an NMOS tube, the protection circuit provided by the present disclosure further includes a first clamping circuit;

[0082] The first clamping circuit includes a first clamping diode D3;

[0083] The anode of the first clamping diode D3 is connected to the drain D of the NMOS tube, and the cathode of the first clamping diode D3 is used to connect to the input end of the load.

[0084] When part of the negative surge voltage enters the protection circuit through the load, the first clamping diode D3 can clamp the negative surge voltage at a lower voltage value to prevent damage to the subsequent circuit.

[0085] like Figure 6 As shown, in one embodiment, the first switch device Q3 includes a triode;

[0086] The emitter of the transistor is grounded, and the collector of the NMOS tube is connected to both the gate G of the first PMOS tube Q1 and the gate G of the second PMOS tube Q2;

[0087] The base of the transistor is used to input a control signal, and the control signal is used to control the on and off of the transistor.

[0088] In one embodiment, when the first switch device Q3 includes a triode, the protection circuit provided by the present disclosure further includes a second clamping circuit;

[0089] The second clamping circuit includes a second clamping diode D4;

[0090] An anode of the second clamping diode D4 is grounded, and a cathode of the second clamping diode D4 is used to connect to an input end of a load.

[0091] The function of the second clamping diode D4 is the same as that of the first clamping diode D3.

[0092] exist Figure 5 In order to ensure that the NMOS tube can be normally turned on, the protection circuit provided by the present disclosure also includes a second driving circuit;

[0093] The second driving circuit includes a fourth resistor and a fifth resistor;

[0094] The fourth resistor is connected between the input terminal of the control signal and the gate G of the NMOS tube, and the fifth resistor is connected between the gate G and the source S of the NMOS tube.

[0095] In one embodiment, the second driving circuit can also serve as a driving circuit for a transistor.

[0096] An embodiment of the present invention further provides an electronic device, comprising the aforementioned protection circuit.

[0097] An embodiment of the present invention further provides a vehicle, comprising the aforementioned protection circuit or the aforementioned electronic device.

[0098] In the description of the present invention, it is to be understood that the terms “center”, “longitudinal”, “lateral”, “length”, “width”, “thickness”, “up”, “down”, “front”, “back”, “left”, “right”, “vertical”, “horizontal”, “top”, “bottom”, “inside”, “outside”, “clockwise”, “counterclockwise”, “axial”, “radial”, “circumferential”, etc., indicating orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.

[0099] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In the description of the present invention, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0100] In the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral one; it can be a mechanical connection, an electrical connection, or communication with each other; it can be a direct connection, or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0101] In the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, a first feature being "above", "above" or "above" a second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being "below", "below" or "below" a second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0102] In the present invention, the terms "one embodiment", "some embodiments", "examples", "specific examples", or "some examples" etc. mean that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the described specific features, structures, materials or characteristics may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradiction.

[0103] Although the embodiments of the present invention have been shown and described above, it is to be understood that the above embodiments are exemplary and are not to be construed as limitations of the present invention. A person skilled in the art may change, modify, replace and vary the above embodiments within the scope of the present invention.

Claims

1. A protection circuit, It is characterized in that It includes a first PMOS tube, a second PMOS tube, a first resistor, a first switch device, a second resistor and a first diode; The drain of the first PMOS tube is used to connect to the positive electrode of the power supply, the source of the first PMOS tube is connected to the source of the second PMOS tube, and the drain of the second PMOS tube is used to connect to the input end of the load; The gate of the first PMOS tube and the gate of the second PMOS tube are both connected to the first end of the first switch device, and the second end of the first switch device is grounded; A first end of the first resistor is connected to the source of the first PMOS transistor, and a second end of the first resistor is connected to the gate of the first PMOS transistor; The control terminal of the first switch device is used to input a control signal, and the control signal is used to control the on and off of the first switch device; A first end of the second resistor is connected to the gate of the first PMOS transistor, and a second end of the second resistor is connected to the cathode of the first diode; An anode of the first diode is connected to a first end of the first switching device.

2. The protection circuit according to claim 1, It is characterized in that The protection circuit further includes a third resistor; The third resistor is connected between the gate of the first PMOS tube and the first end of the first switch device.

3. The protection circuit according to claim 1, It is characterized in that The protection circuit further includes a first filter capacitor and a second filter capacitor; The first end of the first filter capacitor is used to connect to the positive electrode of the power supply, and the second end of the first filter capacitor is connected to the first end of the first switch device; The first end of the second filter capacitor is used to connect to the input end of the load, and the second end of the second filter capacitor is connected to the first end of the first switch device.

4. The protection circuit according to claim 1, It is characterized in that The protection circuit further includes a second diode, and the second diode is a voltage regulator diode; An anode of the second diode is connected to the gate of the first PMOS tube, and a cathode of the second diode is connected to the source of the first PMOS tube.

5. The protection circuit according to claim 1, It is characterized in that The first switch device includes an NMOS tube; The source of the NMOS tube is grounded, and the drain of the NMOS tube is connected to both the gate of the first PMOS tube and the gate of the second PMOS tube; The gate of the NMOS tube is used to input a control signal, and the control signal is used to control the on and off of the NMOS tube.

6. The protection circuit according to claim 1, It is characterized in that The first switching device includes a triode; The emitter of the triode is grounded, and the collector of the NMOS tube is connected to both the gate of the first PMOS tube and the gate of the second PMOS tube; The base of the transistor is used to input a control signal, and the control signal is used to control the on and off of the transistor.

7. The protection circuit according to claim 6, It is characterized in that The protection circuit further includes a first clamping diode; The anode of the first clamping diode is connected to the drain of the NMOS tube, and the cathode of the first clamping diode is used to connect to the input end of the load.

8. The protection circuit according to claim 7, It is characterized in that The protection circuit further includes a second clamping diode; An anode of the second clamping diode is grounded, and a cathode of the second clamping diode is used to connect to an input end of a load.

9. An electronic device, It is characterized in that The protection circuit comprises the protection circuit as claimed in any one of claims 1 to 8.

10. A vehicle, It is characterized in that The invention comprises the protection circuit according to any one of claims 1 to 8 or the electronic device according to claim 9.

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