Microphone self-checking circuit

Abstract

The invention relates to the technical field of micro electro mechanical systems, in particular to a microphone self-checking circuit, which comprises a self-excited oscillator for generating a signal with a set frequency; the output end of the capacitor driver is respectively connected with the first end and the second end of a ceramic capacitor; the input end of the signal amplifier is connected with the output end of a microphone, and the signal amplifier outputs an amplified signal; the input end of the first comparator is connected with the output end of the signal amplifier; the input end of the second comparator is connected with the output end of the first comparator; the first indicating lamp is connected between the second power supply voltage and the output end of the first comparator; and the second indicating lamp is connected between the output end of the second comparator and the grounding end. Whether the microphone works normally or not can be detected, and an alarm is indicated in time when a fault is detected.

Description

Technical Field

[0001] The invention relates to the field of micro-electromechanical technology, and in particular to a microphone self-test circuit. Background Art

[0002] Self-driving cars need to be equipped with microphones not only inside the car, but also with sensors including microphones outside the car to improve the vehicle's ability to perceive the sounds of the surrounding environment, such as alarms, sirens, etc., and to combine with other sensor data to improve the vehicle's ability to respond to emergencies. Once the existing microphones malfunction, the vehicle will not be able to respond to emergencies in a timely manner, which will cause endless troubles. Summary of the invention

[0003] In view of the above problems, an object of the present invention is to provide a microphone self-test circuit.

[0004] A microphone self-test circuit, comprising:

[0005] A self-excited oscillator generates a signal of a set frequency;

[0006] A capacitor driver connected to the self-excited oscillator, wherein an output end of the capacitor driver is respectively connected to a first end and a second end of a ceramic capacitor;

[0007] A signal amplifier, wherein an input end of the signal amplifier is connected to an output end of a microphone, and the signal amplifier outputs an amplified signal;

[0008] A first comparator, wherein an input terminal of the first comparator is connected to an output terminal of the signal amplifier;

[0009] a second comparator, wherein an input terminal of the second comparator is connected to an output terminal of the first comparator;

[0010] A first indicator light connected between a second power supply voltage and an output terminal of the first comparator;

[0011] The second indicator light is connected between the output terminal of the second comparator and the ground terminal.

[0012] The microphone self-test circuit of the present invention comprises an acoustic sensor and a dedicated integrated circuit chip installed in an acoustic cavity on a circuit substrate, and the ceramic capacitor is also located in the microphone.

[0013] In the microphone self-test circuit of the present invention, the capacitor driver is connected to the second power supply voltage via a self-test switch, and the input end of the first comparator is connected to the ground end via a reset switch.

[0014] The microphone self-test circuit of the present invention, the self-excited oscillator comprises a first chip, the IA terminal of the first chip is connected to the first end of the first capacitor through a first resistor, the second end of the first capacitor is connected to the ground terminal through a third capacitor, and a fourth resistor is connected in parallel with the third capacitor;

[0015] The second end of the first capacitor is connected to the first end of the sixth capacitor through the second capacitor and the third resistor in sequence, the second end of the sixth capacitor is connected to the OB terminal of the first chip, and the first end of the sixth capacitor is also connected to the ground terminal through the seventh resistor;

[0016] The IA terminal of the first chip is connected to the OA terminal of the first chip through a second resistor; the VDD terminal of the first chip is connected to a second power supply voltage, and the VDD terminal of the first chip is also connected to a ground terminal through a seventh capacitor;

[0017] The BYPASS terminal of the first chip is connected to the ground terminal through the fourth capacitor; the IB terminal of the first chip is connected to the OA terminal of the first chip through the fifth resistor and the fifth capacitor in sequence.

[0018] In the microphone self-test circuit described in the present invention, the signal of the set frequency includes a 9KHz signal, the first indicator light is a red indicator light, the second indicator light is a green indicator light, and the ceramic capacitor is a multilayer ceramic capacitor.

[0019] The microphone self-test circuit of the present invention, the capacitor driver includes a second chip, the IA end of the second chip is connected to the second end of the sixth capacitor through an eighth resistor and an eighth capacitor, the SD end of the second chip is connected to the second power supply voltage through the self-test switch, and the SD end of the second chip is also connected to the SD end of the first chip through a ninth resistor; the MICBIAS end of the second chip is connected to the ground end through a ninth capacitor, the IB end of the second chip is connected to the OA end of the second chip through a tenth resistor and a tenth capacitor, the IB end of the second chip is connected to the OB end of the second chip through an eleventh resistor, the VDD end of the second chip is connected to the first power supply voltage, the VDD end of the second chip is also connected to the ground end through an eleventh capacitor, the IA end of the second chip is connected to the OA end of the second chip through a twelfth capacitor, the twelfth resistor is connected in parallel to the two ends of the twelfth capacitor, the OB end of the second chip is connected to the first end of the thirteenth capacitor, and the second end of the thirteenth capacitor is connected to the ground end through the thirteenth resistor; the OA end of the second chip is connected to the first end of the fourteenth capacitor, the second end of the fourteenth capacitor is connected to the first power supply voltage through the fourteenth resistor, and the SD end of the second chip is also connected to the ground end through the fifteenth resistor.

[0020] In the microphone self-test circuit of the present invention, the FBR_1 end of the microphone is connected to the second end of the fourteenth capacitor, the CONFIG2 end of the microphone is connected to the second end of the thirteenth capacitor, the VOUT1 end of the microphone is connected to the first end of the sixteenth resistor, the second end of the sixteenth resistor outputs the microphone output signal, and the second end of the sixteenth resistor is connected to the VOUT2 end of the microphone through the seventeenth resistor, the VDD end of the microphone is connected to the second power supply voltage, and is connected to the ground end through the fifteenth capacitor.

[0021] The microphone self-test circuit described in the present invention, the signal amplifier includes a third chip, the IA end of the third chip is connected to the microphone output signal through an eighteenth resistor and a sixteenth capacitor in sequence, the SD end of the third chip is connected to the SD end of the first chip; the bypass end of the third chip is connected to the ground end through a seventeenth capacitor, the IB end of the third chip is connected to the OA end of the third chip through a nineteenth resistor and an eighteenth capacitor, the IB end of the third chip is also connected to the OB end of the third chip through a twentieth resistor, the nineteenth capacitor is connected in parallel to both ends of the twentieth resistor, the VDD end of the third chip is connected to the second power supply voltage, and the VDD end of the third chip is also connected to the ground end through the twentieth capacitor.

[0022] The microphone self-test circuit of the present invention comprises a fourth chip, wherein the fourth chip comprises a first comparator and a second comparator, wherein the first input terminal of the fourth chip is connected to the OB terminal of the third chip through a twenty-first resistor, the second input terminal of the fourth chip is connected to the second power supply voltage through a twenty-second resistor, the second input terminal of the fourth chip is also connected to the ground terminal through a twenty-third resistor, the first input terminal of the fourth chip is connected to the ground terminal through the reset switch, the first input terminal of the fourth chip is also connected to the OUTB output terminal of the fourth chip through a twenty-fourth resistor, the OUTA output terminal of the fourth chip is connected to the third input terminal, the OUTA output terminal of the fourth chip is also connected to the second power supply voltage through the first indicator light and the twenty-fifth resistor, the fourth input terminal of the fourth chip is connected to the ground terminal through a twenty-sixth resistor, the fourth input terminal of the fourth chip is connected to the second power supply voltage through a twenty-seventh resistor, the output signal of the OUTB output terminal of the fourth chip is connected to the ground terminal through the twenty-eighth resistor and the second indicator light in sequence, the V+ terminal of the fourth chip is connected to the second power supply voltage, and the V+ terminal of the fourth chip is also connected to the ground terminal through a twenty-first capacitor.

[0023] In the microphone self-test circuit described in the present invention, a low voltage difference linear regulator converts a first power supply voltage into the second power supply voltage, the VIN end of the low voltage difference linear regulator is connected to the first power supply voltage, the VIN end of the low voltage difference linear regulator is also connected to the ground end through a twenty-second capacitor, the VIN end of the low voltage difference linear regulator is connected to the EN end of the low voltage difference linear regulator, the Vout end of the low voltage difference linear regulator outputs the second power supply voltage, the Vout end of the low voltage difference linear regulator is connected to the ground end through a twenty-ninth resistor and a third indicator light, a twenty-third capacitor is connected between the Vout end of the low voltage difference linear regulator and the ground end, and the GND end of the low voltage difference linear regulator is connected to the ground end.

[0024] Beneficial effects: The present invention generates a signal of a set frequency through a self-excited oscillator, drives a ceramic capacitor to generate sound after amplification, and a microphone captures the sound generated by the ceramic capacitor. The microphone output signal is amplified and compared with a set threshold value. The comparison result drives the first indicator light or the second indicator light to light up, so as to detect whether the microphone is working normally and promptly indicate an alarm when a fault is detected. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 It is a principle block diagram of the microphone self-test circuit of the present invention;

[0026] Figure 2 is a schematic diagram of the structure of a microphone of the present invention;

[0027] Figure 3 It is a chip connection diagram of the microphone self-test circuit of the present invention;

[0028] Figure 4 It is a connection diagram of the low voltage difference linear regulator of the present invention. DETAILED DESCRIPTION

[0029] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0030] It should be noted that, in the absence of conflict, the embodiments of the present invention and the features in the embodiments may be combined with each other.

[0031] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments, but they are not intended to limit the present invention.

[0032] Reference Figure 1, a microphone self-test circuit, comprising,

[0033] A self-excited oscillator 1 generates a signal of a set frequency;

[0034] The capacitor driver 2 is connected to the self-excited oscillator 1, and the output end of the capacitor driver 2 is respectively connected to a first end OUTP and a second end OUTN of a ceramic capacitor 31;

[0035] A signal amplifier 3, wherein an input end of the signal amplifier 3 is connected to an output end of a microphone MIC, and the signal amplifier 3 outputs an amplified signal Vo_amp;

[0036] A first comparator 41, wherein an input end of the first comparator 41 is connected to an output end of the signal amplifier 3;

[0037] A second comparator 42, wherein an input end of the second comparator 42 is connected to an output end of the first comparator 41;

[0038] A first indicator LED1 is connected between a second power supply voltage VDD2 and an output terminal of a first comparator 41;

[0039] The second indicator LED2 is connected between the output terminal of the second comparator 42 and the ground terminal.

[0040] The present invention generates a signal of a set frequency through a self-excited oscillator, drives a ceramic capacitor to generate sound after amplification, and a microphone captures the sound generated by the ceramic capacitor. The microphone output signal is amplified and compared with a set threshold value. The comparison result drives the first indicator light or the second indicator light to light up, so as to detect whether the microphone is working normally and give an alarm in time when a fault is detected.

[0041] In a preferred embodiment of the present invention, the microphone MIC includes an acoustic sensor 32 and a dedicated integrated circuit chip 33, which are installed in an acoustic cavity on a circuit substrate 30. The ceramic capacitor 31 is also located on the circuit substrate 30 and in the same acoustic cavity.

[0042] The present invention can realize the integrated self-checking function of the microphone by integrating a ceramic capacitor into the packaging structure of the microphone.

[0043] In a preferred embodiment of the present invention, the signal of the set frequency includes a 9KHz signal, the first indicator light is a red indicator light, the second indicator light is a green indicator light, and the ceramic capacitor is a multilayer ceramic capacitor.

[0044] The comparison result of the comparator is indicated by a red indicator light and a green indicator light. When the microphone is working normally, the green indicator light indicates it, and when it is not working normally, the red indicator light indicates it.

[0045] In a preferred embodiment of the present invention, the self-excited oscillator 1 includes a first chip U1, an IA terminal of the first chip U1 is connected to a first end of a first capacitor C11 through a first resistor R11, a second end of the first capacitor C11 is connected to a ground terminal through a third capacitor C13, and a fourth resistor R14 is connected in parallel with the third capacitor C13;

[0046] The second end of the first capacitor C11 is connected to the first end of the sixth capacitor C16 through the second capacitor C12 and the third resistor R13 in sequence. The second end of the sixth capacitor C16 is connected to the OB terminal of the first chip U1. The first end of the sixth capacitor C16 is also connected to the ground terminal through the seventh resistor R17.

[0047] The IA terminal of the first chip U1 is connected to the OA terminal of the first chip U1 through the second resistor R12; the VDD terminal of the first chip U1 is connected to the second power supply voltage VDD2, and the VDD terminal of the first chip U1 is also connected to the ground terminal through the seventh capacitor C17;

[0048] The BYPASS terminal of the first chip U1 is connected to the ground terminal through the fourth capacitor C14; the IB terminal of the first chip U1 is connected to the OA terminal of the first chip U1 through the fifth resistor R15 and the fifth capacitor C15 in sequence.

[0049] In a preferred embodiment of the present invention, the capacitor driver 2 includes a second chip U2, the IA end of the second chip U2 is connected to the second end of the sixth capacitor C16 through an eighth resistor R21 and an eighth capacitor C21, the SD end of the second chip U2 is connected to the second power supply voltage VDD2 through a self-test switch K1, and the SD end of the second chip U2 is also connected to the SD end of the first chip U1 through a ninth resistor R22; the MICBIAS end of the second chip U2 is connected to the ground end through a ninth capacitor C22, the IB end of the second chip U2 is connected to the OA end of the second chip U2 through a tenth resistor R24 ​​and a tenth capacitor C23, the IB end of the second chip U2 is connected to the OB end of the second chip U2 through an eleventh resistor R25, and the second chip The VDD end of U2 is connected to the first power supply voltage VDD1, and the VDD end of the second chip U2 is also connected to the ground end through the eleventh capacitor C24. The IA end of the second chip U2 is connected to the OA end of the second chip U2 through the twelfth capacitor C27. The twelfth resistor R26 is connected in parallel to the two ends of the twelfth capacitor C27. The OB end of the second chip U2 is connected to the first end of the thirteenth capacitor C25, and the second end of the thirteenth capacitor C25 is connected to the ground end through the thirteenth resistor R27; the OA end of the second chip U2 is connected to the first end of the fourteenth capacitor C26, and the second end of the fourteenth capacitor C26 is connected to the first power supply voltage VDD1 through the fourteenth resistor R28. The SD end of the second chip U2 is also connected to the ground end through the fifteenth resistor R1.

[0050] The first chip U1 , the second chip U2 , and the third chip U3 are operational amplifier chips.

[0051] In a preferred embodiment of the present invention, the FBR_1 end of the microphone MIC is connected to the second end of the fourteenth capacitor C26, the CONFIG2 end of the microphone MIC is connected to the second end of the thirteenth capacitor C25, the VOUT1 end of the microphone MIC is connected to the first end of the sixteenth resistor R31, the second end of the sixteenth resistor R31 outputs the microphone output signal MIC out, and the second end of the sixteenth resistor R31 is connected to the VOUT2 end of the microphone MIC through the seventeenth resistor R32, the VDD end of the microphone MIC is connected to the second power supply voltage VDD2, and is connected to the ground end through the fifteenth capacitor C31.

[0052] In a preferred embodiment of the present invention, the signal amplifier 3 includes a third chip U3, the IA end of the third chip U3 is connected to the microphone output signal MIC out through the eighteenth resistor R33 and the sixteenth capacitor C32 in sequence, and the SD end of the third chip U3 is connected to the SD end of the first chip U1; the bypass end of the third chip U3 is connected to the ground end through the seventeenth capacitor C33, the IB end of the third chip U3 is connected to the OA end of the third chip U3 through the nineteenth resistor R34 and the eighteenth capacitor C34, the IB end of the third chip U3 is also connected to the OB end of the third chip U3 through the twentieth resistor R35, the nineteenth capacitor C35 is connected in parallel to the two ends of the twentieth resistor R35, the VDD end of the third chip U3 is connected to the second power supply voltage VDD2, and the VDD end of the third chip U3 is also connected to the ground end through the twentieth capacitor C36.

[0053] A preferred embodiment of the present invention includes a fourth chip U4. The fourth chip U4 includes a first comparator 41 and a second comparator 41. The first input terminal +INA of the fourth chip U4 is connected to the OB terminal of the third chip U3 through a twenty-first resistor R5. The second input terminal -INA of the fourth chip U4 is connected to the second power supply voltage VDD2 through a twenty-second resistor R41. The second input terminal -INA of the fourth chip U4 is also connected to the ground terminal through a twenty-third resistor R42. The first input terminal +INA of the fourth chip U4 is connected to the ground terminal through a reset switch K2. The first input terminal +INA of the fourth chip U4 is also connected to the OUTB output terminal of the fourth chip U4 through a twenty-fourth resistor R4. The OUTA output terminal of the fourth chip U4 is connected to the third input terminal +INB. The OUTA output terminal of the fourth chip U4 is also connected to the second power supply voltage VDD2 through a first indicator LED2 and a twenty-fifth resistor R2. The fourth input terminal -INB of the fourth chip U4 is connected to the ground terminal through a twenty-sixth resistor R45. The fourth input terminal -INB of the fourth chip U4 is connected to the second power supply voltage VDD2 through a twenty-seventh resistor R46. The signal Vcomp output from the OUTB output terminal of the fourth chip U4 is connected to the ground terminal through a twenty-eighth resistor R3 and a second indicator LED2 in sequence. The V+ terminal of the fourth chip U4 is connected to the second power supply voltage VDD2. The V+ terminal of the fourth chip U4 is also connected to the ground terminal through a twenty-first capacitor C41.

[0054] Referring to Figure 4 , a preferred embodiment of the present invention converts the first power supply voltage VDD1 into the second power supply voltage VDD2 through a low dropout linear regulator LDO. The VIN terminal of the low dropout linear regulator LDO is connected to the first power supply voltage VDD1. The VIN terminal of the low dropout linear regulator LDO is also connected to the ground terminal through a twenty-second capacitor C51. The VIN terminal of the low dropout linear regulator LDO is connected to the EN terminal of the low dropout linear regulator LDO. The Vout terminal of the low dropout linear regulator LDO outputs the second power supply voltage VDD2. The Vout terminal of the low dropout linear regulator LDO is connected to the ground terminal through a twenty-ninth resistor R51 and a third indicator LED3. A twenty-third capacitor C52 is connected between the Vout terminal of the low dropout linear regulator LDO and the ground terminal. The GND terminal of the low dropout linear regulator LDO is connected to the ground terminal. The first power supply voltage is 5V, and the second power supply voltage is 3.3V, which supplies power to the operational amplifier chip and the microphone.

[0055] Through the description and the drawings, typical embodiments of specific structures of the specific implementation manners are given. Based on the spirit of the present invention, other conversions can also be made. Although the above-mentioned invention proposes the existing preferred embodiments, however, these contents are not used as limitations.

[0056] For those skilled in the art, various changes and modifications will undoubtedly be obvious after reading the above description. Therefore, the attached claims should be regarded as covering all changes and modifications to the true intent and scope of the present invention. Any and all equivalent ranges and contents within the scope of the claims should be considered to still be within the intent and scope of the present invention.

Claims

1. A microphone self-test circuit, characterized in that: include, A self-excited oscillator generates a signal of a set frequency; A capacitor driver connected to the self-excited oscillator, wherein an output end of the capacitor driver is respectively connected to a first end and a second end of a ceramic capacitor; A signal amplifier, wherein an input end of the signal amplifier is connected to an output end of a microphone, and the signal amplifier outputs an amplified signal; A first comparator, wherein an input terminal of the first comparator is connected to an output terminal of the signal amplifier; a second comparator, wherein an input terminal of the second comparator is connected to an output terminal of the first comparator; A first indicator light connected between a second power supply voltage and an output terminal of the first comparator; The second indicator light is connected between the output terminal of the second comparator and the ground terminal.

2. The microphone self-test circuit according to claim 1, characterized in that: The microphone comprises an acoustic sensor and a dedicated integrated circuit chip, which are installed in an acoustic cavity on a circuit substrate. The ceramic capacitor is also located in the microphone.

3. The microphone self-test circuit according to claim 1, characterized in that: The capacitor driver is connected to the second power supply voltage through a self-checking switch, and the input end of the first comparator is connected to the ground end through a reset switch.

4. The microphone self-test circuit according to claim 3, characterized in that: The self-excited oscillator comprises a first chip, wherein the IA terminal of the first chip is connected to the first terminal of the first capacitor via a first resistor, the second terminal of the first capacitor is connected to the ground terminal via a third capacitor, and a fourth resistor is connected in parallel with the third capacitor; The second end of the first capacitor is connected to the first end of the sixth capacitor through the second capacitor and the third resistor in sequence, the second end of the sixth capacitor is connected to the OB terminal of the first chip, and the first end of the sixth capacitor is also connected to the ground terminal through the seventh resistor; The IA terminal of the first chip is connected to the OA terminal of the first chip through a second resistor; the VDD terminal of the first chip is connected to a second power supply voltage, and the VDD terminal of the first chip is also connected to a ground terminal through a seventh capacitor; The BYPASS terminal of the first chip is connected to the ground terminal through the fourth capacitor; the IB terminal of the first chip is connected to the OA terminal of the first chip through the fifth resistor and the fifth capacitor in sequence.

5. The microphone self-test circuit according to claim 1, characterized in that: The signal of the set frequency includes a 9KHz signal, the first indicator light is a red indicator light, the second indicator light is a green indicator light, and the ceramic capacitor is a multilayer ceramic capacitor.

6. The microphone self-test circuit according to claim 4, characterized in that: The capacitor driver includes a second chip, wherein the IA end of the second chip is connected to the second end of the sixth capacitor through an eighth resistor and an eighth capacitor, the SD end of the second chip is connected to the second power supply voltage through the self-test switch, and the SD end of the second chip is also connected to the SD end of the first chip through a ninth resistor; the MICBIAS end of the second chip is connected to the ground end through a ninth capacitor, the IB end of the second chip is connected to the OA end of the second chip through a tenth resistor and a tenth capacitor, the IB end of the second chip is connected to the OB end of the second chip through an eleventh resistor, the VDD end of the second chip is connected to the first power supply voltage, and the VDD end of the second chip is also connected to the ground end through an eleventh capacitor, the IA end of the second chip is connected to the OA end of the second chip through a twelfth capacitor, the twelfth resistor is connected in parallel to the two ends of the twelfth capacitor, the OB end of the second chip is connected to the first end of the thirteenth capacitor, and the second end of the thirteenth capacitor is connected to the ground end through the thirteenth resistor; the OA end of the second chip is connected to the first end of the fourteenth capacitor, the second end of the fourteenth capacitor is connected to the first power supply voltage through a fourteenth resistor, and the SD end of the second chip is also connected to the ground end through a fifteenth resistor.

7. The microphone self-test circuit according to claim 6, characterized in that: The FBR_1 end of the microphone is connected to the second end of the fourteenth capacitor, the CONFIG2 end of the microphone is connected to the second end of the thirteenth capacitor, the VOUT1 end of the microphone is connected to the first end of the sixteenth resistor, the second end of the sixteenth resistor outputs the microphone output signal, and the second end of the sixteenth resistor is connected to the VOUT2 end of the microphone through the seventeenth resistor, the VDD end of the microphone is connected to the second power supply voltage, and is connected to the ground end through the fifteenth capacitor.

8. The microphone self-test circuit according to claim 7, characterized in that: The signal amplifier includes a third chip, the IA end of the third chip is connected to the microphone output signal through an eighteenth resistor and a sixteenth capacitor in sequence, and the SD end of the third chip is connected to the SD end of the first chip; the bypass end of the third chip is connected to the ground end through a seventeenth capacitor, the IB end of the third chip is connected to the OA end of the third chip through a nineteenth resistor and an eighteenth capacitor, the IB end of the third chip is also connected to the OB end of the third chip through a twentieth resistor, the nineteenth capacitor is connected in parallel to both ends of the twentieth resistor, the VDD end of the third chip is connected to the second power supply voltage, and the VDD end of the third chip is also connected to the ground end through a twentieth capacitor.

9. The microphone self-test circuit according to claim 8, characterized in that: A fourth chip is included, the fourth chip includes a first comparator and a second comparator, the first input end of the fourth chip is connected to the OB end of the third chip through a twenty-first resistor, the second input end of the fourth chip is connected to the second power supply voltage through a twenty-second resistor, the second input end of the fourth chip is also connected to the ground end through a twenty-third resistor, the first input end of the fourth chip is connected to the ground end through the reset switch, the first input end of the fourth chip is also connected to the OUTB output end of the fourth chip through a twenty-fourth resistor, the OUTA output end of the fourth chip is connected to the third input end, the OUTA output end of the fourth chip is also connected to the second power supply voltage through the first indicator light and the twenty-fifth resistor, the fourth input end of the fourth chip is connected to the ground end through a twenty-sixth resistor, the fourth input end of the fourth chip is connected to the second power supply voltage through a twenty-seventh resistor, the output signal of the OUTB output end of the fourth chip is connected to the ground end through the twenty-eighth resistor and the second indicator light in sequence, the V+ end of the fourth chip is connected to the second power supply voltage, and the V+ end of the fourth chip is also connected to the ground end through a twenty-first capacitor.

10. The microphone self-test circuit according to claim 1, characterized in that: A low voltage dropout linear regulator converts a first power supply voltage into the second power supply voltage, the VIN terminal of the low voltage dropout linear regulator is connected to the first power supply voltage, the VIN terminal of the low voltage dropout linear regulator is also connected to the ground terminal through a twenty-second capacitor, the VIN terminal of the low voltage dropout linear regulator is connected to the EN terminal of the low voltage dropout linear regulator, the Vout terminal of the low voltage dropout linear regulator outputs the second power supply voltage, the Vout terminal of the low voltage dropout linear regulator is connected to the ground terminal through a twenty-ninth resistor and a third indicator light, a twenty-third capacitor is connected between the Vout terminal of the low voltage dropout linear regulator and the ground terminal, and the GND terminal of the low voltage dropout linear regulator is connected to the ground terminal.

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