Semiconductor device

Abstract

The invention relates to a semiconductor device. An example semiconductor device includes: a channel layer; a barrier layer on the channel layer and including a material having a different band gap than the material included in the channel layer; the gate electrode is positioned on the barrier layer; the gate semiconductor layer is positioned between the barrier layer and the gate electrode; a protective layer on the barrier layer and the gate electrode; the source electrode and the drain electrode are located on the two sides of the gate electrode and extend to penetrate through the protection layer so as to cover the side surfaces of the channel layer and the barrier layer; and a diffusion barrier layer within the protective layer, covering the barrier layer and the gate electrode, and including nitrogen.

Description

Technical Field

[0001] The present disclosure relates to a semiconductor device having stable electrical characteristics and improved reliability. Background Art

[0002] In modern society, semiconductor devices are closely related to daily life. In particular, the importance of power semiconductor devices used in various fields such as transportation fields (such as electric vehicles, railways and trams), renewable energy systems (such as solar power generation and wind power generation) and mobile devices is gradually increasing. Power semiconductor devices are semiconductor devices for processing high voltage or high current, and perform functions such as power conversion and control in large power systems or high-power electronic devices. Power semiconductor devices have the ability and durability to handle high power, handle large amounts of current and withstand high voltage. For example, power semiconductor devices can handle voltages of hundreds to thousands of volts and currents of tens of amperes to thousands of amperes. Power semiconductor devices can improve the efficiency of electric energy by minimizing power loss. In addition, even in environments such as high temperatures, power semiconductor devices can also operate stably.

[0003] These power semiconductor devices can be classified according to materials, and examples include SiC power semiconductor devices and GaN power semiconductor devices. By using SiC or GaN instead of existing silicon wafers (Si wafers) to manufacture power semiconductor devices, the disadvantages of silicon having unstable characteristics at high temperatures can be compensated. SiC power semiconductor devices are resistant to high temperatures and have low power loss, and can be suitable for electric vehicles, renewable energy systems, etc. GaN power semiconductor devices require high costs, but are efficient in speed and can be suitable for high-speed charging of mobile devices. Summary of the invention

[0004] In general, according to some aspects, a semiconductor device includes: a channel layer; a barrier layer, the barrier layer is positioned on the channel layer and includes a material having a different energy bandgap than the channel layer; a gate electrode, the gate electrode is positioned on the barrier layer; a gate semiconductor layer, the gate semiconductor layer is positioned between the barrier layer and the gate electrode; a protective layer, the protective layer is positioned on the barrier layer and the gate electrode; a source electrode and a drain electrode, the source electrode and the drain electrode are positioned on both sides of the gate electrode and penetrate the protective layer to cover the side surfaces of the channel layer and the barrier layer; and a diffusion barrier layer, the diffusion barrier layer is positioned within the protective layer to cover the barrier layer and the gate electrode and includes nitrogen.

[0005] In general, according to some aspects, a semiconductor device includes: a channel layer; a barrier layer, the barrier layer being positioned on the channel layer and including a material having a higher energy bandgap than the channel layer; a gate electrode, the gate electrode being positioned on the barrier layer; a gate semiconductor layer, the gate semiconductor layer being positioned between the barrier layer and the gate electrode; a first protection layer, the first protection layer being positioned on the gate electrode; a first source electrode and a first drain electrode, the first source electrode and the first drain electrode being positioned on both sides of the gate electrode on the first protection layer and connected to the channel layer; a first field dispersion layer, the first field dispersion layer being positioned on the first protection layer to overlap with the gate electrode; a second protection layer, the second protection layer positioned on the first source electrode, the first drain electrode and the first field dispersion layer; a second source electrode, the second source electrode being connected to the first source electrode on the second protective layer; a second drain electrode, the second drain electrode being connected to the first drain electrode on the second protective layer; a second field dispersion layer, the second field dispersion layer being positioned to overlap with the gate electrode on the second protective layer; a capping layer, the capping layer being positioned on the second source electrode, the second drain electrode and the second field dispersion layer; and a diffusion barrier layer, the diffusion barrier layer being positioned at least within the first protective layer, within the second protective layer, between the first protective layer and the second protective layer, or between the second protective layer and the capping layer, and comprising nitrogen.

[0006] In general, according to some aspects, a semiconductor device includes: a channel layer, the channel layer includes GaN; a barrier layer, the barrier layer is positioned on the channel layer and includes AlGaN; a gate electrode, the gate electrode is positioned on the barrier layer and includes a metal material; a gate semiconductor layer, the gate semiconductor layer is positioned between the barrier layer and the gate electrode and includes GaN doped with P-type impurities; a protective layer, the protective layer is positioned on the barrier layer and the gate electrode; a source electrode and a drain electrode, the source electrode and the drain electrode are positioned on both sides of the gate electrode and penetrate the protective layer to contact the side surfaces of the channel layer and the barrier layer; a covering layer, the covering layer is positioned on the source electrode and the drain electrode and includes at least one of F and Cl; and a diffusion barrier layer, the diffusion barrier layer is positioned within the protective layer to cover the barrier layer and the gate electrode, and includes at least one of SiN, SiON, SiOCN and AlN.

[0007] In some implementations, electrical characteristics and reliability of the semiconductor device are improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 and Figure 2 is a cross-sectional view showing an example of a semiconductor device.

[0009] Figure 3 is a diagram showing the movement path of ions within an example of a semiconductor device.

[0010] Figure 4 is a diagram showing the movement path of ions within an example of a semiconductor device.

[0011] Figures 5 to 11B is a cross-sectional view showing an example of a semiconductor device.

[0012] Figures 12 to 21 1 and 2 are process cross-sectional views shown in order of processes for manufacturing an example of a semiconductor device. DETAILED DESCRIPTION

[0013] The present disclosure will be described more fully hereinafter with reference to the accompanying drawings, in which implementations of the present disclosure are shown. As will be appreciated by those skilled in the art, the described implementations may be modified in various different ways, all without departing from the spirit or scope of the present disclosure.

[0014] In order to clearly describe the present disclosure, parts irrelevant to the description are omitted, and the same reference numerals refer to the same or similar constituent elements throughout the specification.

[0015] In addition, since the sizes and thicknesses of the constituent members shown in the drawings are arbitrarily given for better understanding and ease of description, the present disclosure is not limited to the sizes and thicknesses shown. In the drawings, the thicknesses of layers, films, panels, regions, etc. are exaggerated for clarity. In the drawings, the thicknesses of some layers and regions are exaggerated for better understanding and ease of description.

[0016] It should be understood that when an element such as a layer, film, region, or substrate is referred to as being "on another element," it can be directly on the other element or there may also be intervening elements. In contrast, when an element is referred to as being "directly on another element," there are no intervening elements. In addition, in the specification, the words "on..." or "over..." mean being positioned on or below an object part, and do not necessarily mean being positioned on the upper side of an object part based on the direction of gravity.

[0017] In addition, unless explicitly described to the contrary, the word “comprise” and variations such as “comprises” or “comprising” will be understood to imply the inclusion of stated elements but not the exclusion of any other elements.

[0018] Furthermore, throughout the specification, the phrase “on a plane” means observing a target portion from the top, and the phrase “on a cross section” means observing a cross section formed by vertically cutting the target portion from the side.

[0019] In the following, reference Figure 1 and Figure 2 A semiconductor device according to an implementation is described as follows.

[0020] Figure 1 and Figure 2 is a cross-sectional view showing an example of a semiconductor device. Figure 1 Indicates that the semiconductor device is in the off state. Figure 2 Indicates the situation where a semiconductor device is in the on state.

[0021] First, if Figure 1 As shown, the semiconductor device includes a channel layer 132, a barrier layer 136 positioned on the channel layer 132, a gate electrode 155 positioned on the barrier layer 136, a gate semiconductor layer 152 positioned between the barrier layer 136 and the gate electrode 155, a source electrode 173 and a drain electrode 175 separated from each other on the channel layer 132, protective layers 140 and 160 positioned on the barrier layer 136 and the gate electrode 155, and a diffusion barrier layer 500 positioned within the protective layers 140 and 160.

[0022] The channel layer 132 is a layer that forms a channel between the source electrode 173 and the drain electrode 175, and a two-dimensional electron gas (2DEG) 134 may be positioned inside the channel layer 132. The two-dimensional electron gas 134 is a charge transfer model used in solid physics, and refers to a group of electrons that can move freely in two dimensions (e.g., the xy plane direction) but cannot move in another dimension (e.g., the z direction) and are tightly bound in a two-dimensional space. In other words, the two-dimensional electron gas 134 may exist in a two-dimensional paper-like form in a three-dimensional space. This two-dimensional electron gas 134 mainly appears in a semiconductor heterojunction structure, and may occur at an interface between the channel layer 132 and the barrier layer 136 in a semiconductor device. For example, the two-dimensional electron gas 134 may be generated in a portion closest to the barrier layer 136 in the channel layer 132.

[0023] The channel layer 132 may include one or more materials selected from the group III-V materials, for example, a nitride including at least one of Al, Ga, In, and B. The channel layer 132 may be composed of a single layer or a plurality of layers. The channel layer 132 may be Al x In y Ga (1-x-y) N(0≤x≤1, 0≤y≤1, x+y≤1). For example, the channel layer 132 may include at least one of AlN, GaN, InN, InGaN, AlGaN, AlInN, and AlInGaN. The channel layer 132 may be a layer with doped impurities or a layer with undoped impurities. The thickness of the channel layer 132 may be about several hundred nm or less.

[0024] The channel layer 132 may be positioned on the substrate 110, and the buffer layer 122, the superlattice layer 124, and the high resistance layer 126 may be positioned between the substrate 110 and the channel layer 132. The substrate 110, the buffer layer 122, and the superlattice layer 124 are layers necessary for forming the channel layer 132, and may be omitted in some cases. For example, when a substrate made of GaN is used as the channel layer 132, at least one of the substrate 110, the buffer layer 122, and the superlattice layer 124 may be omitted. Considering that the price of a substrate made of GaN is relatively high, a substrate 110 made of Si may be used to grow the channel layer 132 including GaN. At this time, since the lattice structure of Si and the lattice structure of GaN are different, it may not be easy to grow the channel layer 132 directly on the substrate 110. Therefore, the buffer layer 122 and the superlattice layer 124 may be first grown on the substrate 110, and then the channel layer 132 may be grown on the superlattice layer 124. Additionally, at least one of the substrate 110 , the buffer layer 122 , and the superlattice layer 124 may be removed from the final structure of the semiconductor device after being used in the manufacturing process.

[0025] The substrate 110 may include a semiconductor material. For example, the substrate 110 may include sapphire, Si, SiC, AlN, GaN, or a combination thereof. The substrate 110 may be a silicon-on-insulator (SOI) substrate. However, the material of the substrate 110 is not limited thereto, and any commonly used substrate may be applied. In some cases, the substrate 110 may include an insulating material. For example, after the first several layers including the channel layer 132 are formed on the semiconductor substrate, the semiconductor substrate may then be removed to be replaced with an insulating substrate.

[0026] The buffer layer 122 may be positioned on the substrate 110. The seed layer may be further positioned between the substrate 110 and the buffer layer 122. The seed layer may be directly positioned on the substrate 110. However, it is not limited thereto, and another predetermined layer may be further positioned between the substrate 110 and the seed layer. The seed layer is a layer used as a seed for growing the buffer layer 122, and may be made of a lattice structure that becomes a seed of the buffer layer 122. For example, the seed layer may include AlN, but is not limited thereto. The buffer layer 122 may be directly positioned on the seed layer. However, it is not limited thereto, and another predetermined layer may be positioned between the seed layer and the buffer layer 122.

[0027] The buffer layer 122 may be positioned between the substrate 110 and the superlattice layer 124. The buffer layer 122 is a layer for alleviating the difference in lattice constant and thermal expansion coefficient between the substrate 110 and the channel layer 132. The buffer layer 122 may include one or more materials selected from III-V group materials, such as a nitride including at least one of Al, Ga, In, and B. The buffer layer 122 may be Al x In y Ga (1-x-y) N(0≤x≤1, 0≤y≤1, x+y≤1). For example, the buffer layer 122 may include at least one of AlN, GaN, InN, InGaN, AlGaN, AlInN, and AlInGaN. The buffer layer 122 may consist of a single layer or a plurality of layers.

[0028] The superlattice layer 124 may be positioned on the buffer layer 122. The superlattice layer 124 may be positioned directly on the buffer layer 122. However, it is not limited thereto, and another predetermined layer may be positioned between the buffer layer 122 and the superlattice layer 124. The superlattice layer 124 may be positioned between the buffer layer 122 and the channel layer 132. Like the buffer layer 122, the superlattice layer 124 alleviates the difference in lattice constant and thermal expansion coefficient between the substrate 110 and the channel layer 132, thereby reducing the tensile stress and compressive stress generated between the substrate 110 and the channel layer 132, and the superlattice layer 124 is a layer for alleviating compressive stress and relieving stress between all layers formed by growth in the final structure of the semiconductor device. The superlattice layer 124 may include one or more materials selected from group III-V materials, such as a nitride including at least one of Al, Ga, In, and B. The superlattice layer 124 may be Al x In y Ga (1-x-y) N(0≤x≤1, 0≤y≤1, x+y≤1). For example, the superlattice layer may include at least one of AlN, GaN, InN, InGaN, AlGaN, AlInN, and AlInGaN. The superlattice layer 124 may be composed of a single layer or a plurality of layers. For example, the superlattice layer 124 may have a structure in which a layer made of AlGaN and a layer made of GaN are repeatedly stacked. For example, AlGaN / GaN / AlGaN / GaN / AlGaN / GaN may be stacked sequentially to form a superlattice layer. The number of AlGaN and GaN layers constituting the superlattice layer 124 may be changed in various ways, and the material constituting the superlattice layer 124 may be changed in various ways.

[0029] The high resistance layer 126 may be positioned on the superlattice layer 124. The high resistance layer 126 may be positioned directly on the superlattice layer 124. However, it is not limited thereto, and other predetermined layers may be positioned between the superlattice layer 124 and the high resistance layer 126. The high resistance layer 126 may be positioned between the superlattice layer 124 and the channel layer 132. The high resistance layer 126 is to prevent degradation of the semiconductor device by preventing parasitic current (leakage current) from flowing through the channel layer 132. The high resistance layer 126 may be made of a material with low electrical conductivity so that the substrate 110 and the channel layer 132 are electrically insulated. The high resistance layer may include one or more materials selected from group III-V materials, such as a nitride including at least one of Al, Ga, In, and B. The high resistance layer 126 may be Al x In y Ga (1-x-y) N(0≤x≤1, 0≤y≤1, x+y≤1). For example, the high resistance layer 126 may include at least one of AlN, GaN, InN, InGaN, AlGaN, AlInN, and AlInGaN. The high resistance layer 126 may be made of a single layer or a plurality of layers. The high resistance layer 126 may be a layer in which impurities are not doped.

[0030] The barrier layer 136 may be positioned on the channel layer 132. The barrier layer 136 may be positioned directly on the channel layer 132. However, it is not limited thereto, and another predetermined layer may be further positioned between the channel layer 132 and the barrier layer 136. The region of the channel layer 132 overlapping with the barrier layer 136 may be a drift region DTR. The drift region DTR may be positioned between the source electrode 173 and the drain electrode 175. When a potential difference occurs between the source electrode 173 and the drain electrode 175, carriers may move in the drift region DTR. The semiconductor device may be turned on / off depending on whether a voltage is applied to the gate electrode 155 and / or the magnitude of the voltage applied to the gate electrode 155. When a voltage higher than the threshold voltage is applied to the gate electrode 155 and the semiconductor device is turned on, a channel may be created in the depletion region DPR. Therefore, the movement of carriers may occur in the drift region DTR. If a voltage lower than the threshold voltage is applied to the gate electrode 155 or no voltage is applied, a channel path may be blocked in the depletion region DPR, and movement of carriers may not occur.

[0031] The barrier layer 136 may include one or more materials selected from the group III-V materials, such as a nitride including at least one of Al, Ga, In, and B. The barrier layer 136 may be Al x In y Ga (1-x - y)N(0≤x≤1, 0≤y≤1, x+y≤1). The barrier layer 136 may include at least one of GaN, InN, AlGaN, AlInN, InGaN, AlN, AlInGaN, etc. The energy band gap of the barrier layer 136 may be adjusted by the composition ratio of Al and / or In. The barrier layer 136 may be doped with predetermined impurities. At this time, the impurities doped in the barrier layer 136 may be a P-type dopant that can provide holes. For example, the impurities doped in the barrier layer 136 may be magnesium (Mg). By increasing or decreasing the impurity doping concentration of the barrier layer 136, the threshold voltage, on-resistance, etc. of the semiconductor device may be adjusted.

[0032] The barrier layer 136 may include a semiconductor material having characteristics different from those of the channel layer 132. The barrier layer 136 may be different from the channel layer 132 in at least one of polarization characteristics, energy band gap, and lattice constant. For example, the barrier layer 136 may include a material having a different energy band gap than the channel layer 132. At this time, the barrier layer 136 may have a higher energy band gap than the channel layer 132, and may have a higher electric susceptibility than the channel layer 132. This barrier layer 136 may induce a two-dimensional electron gas 134 in the channel layer 132 having a relatively low electric susceptibility. In this regard, the barrier layer 136 may also be referred to as a channel supply layer or a two-dimensional electron gas supply layer. The two-dimensional electron gas 134 may be formed in a portion of the channel layer 132 positioned below the interface between the channel layer 132 and the barrier layer 136. The two-dimensional electron gas 134 may have a very high electron mobility.

[0033] The barrier layer 136 may be composed of a single layer or a plurality of layers. If the barrier layer 136 is made of a plurality of layers, the energy band gap of the material of each layer constituting the plurality of layers may be different. At this time, the plurality of layers constituting the barrier layer 136 may be arranged so that the energy band gap increases as it approaches the channel layer 132.

[0034] The gate electrode 155 may be positioned on the barrier layer 136. The gate electrode 155 may overlap some regions of the barrier layer 136. The gate electrode 155 may overlap a portion of the drift region DTR of the channel layer 132. The gate electrode 155 may be positioned between the source electrode 173 and the drain electrode 175. The gate electrode 155 may be separated from the source electrode 173 and the drain electrode 175.

[0035] The gate electrode 155 may include a conductive material. For example, the gate electrode 155 may include a metal, a metal alloy, a conductive metal nitride, a metal silicide, a doped semiconductor material, a conductive metal oxide, or a conductive metal oxynitride. For example, the gate electrode 155 may include titanium nitride (TiN), tantalum carbide (TaC), tantalum nitride (TaN), titanium silicon nitride (TiSiN), tantalum silicon nitride (TaSiN), tantalum titanium nitride (TaTiN), titanium aluminum nitride (TiAlN), tantalum aluminum nitride (TaAlN), tungsten nitride (WN), ruthenium (Ru), titanium aluminum (TiAl), titanium aluminum carbonitride (TiAlC-N), titanium aluminum carbide (TiAlC), titanium carbide (TiC), tantalum carbonitride (TaCN), tungsten The gate electrode 155 may be made of a single layer or a plurality of layers.

[0036] The gate semiconductor layer 152 may be positioned between the barrier layer 136 and the gate electrode 155. That is, the gate semiconductor layer 152 may be positioned on the barrier layer 136, and the gate electrode 155 may be positioned on the gate semiconductor layer 152. The gate electrode 155 may be in Schottky contact with the gate semiconductor layer 152. However, it is not limited thereto, and in some cases, the gate electrode 155 may be in ohmic contact with the gate semiconductor layer 152. The gate semiconductor layer 152 may overlap with the gate electrode 155. At this time, the gate semiconductor layer 152 may completely overlap with the gate electrode 155 in the vertical direction. The vertical direction may mean a vertical direction of the upper surface of the channel layer 132 or the barrier layer 136. The upper surface of the gate semiconductor layer 152 may be completely covered by the gate electrode 155. That is, the gate semiconductor layer 152 may have a planar shape substantially equivalent to the planar shape of the gate electrode 155.

[0037] The gate semiconductor layer 152 may be positioned between the source electrode 173 and the drain electrode 175. The gate semiconductor layer 152 may be spaced apart from the source electrode 173 and the drain electrode 175. The gate semiconductor layer 152 may be positioned closer to the source electrode 173 than the drain electrode 175. That is, the separation distance between the gate semiconductor layer 152 and the source electrode 173 may be smaller than the separation distance between the gate semiconductor layer 152 and the drain electrode 175.

[0038] The gate semiconductor layer 152 may include one or more materials selected from the group III-V materials, such as a nitride including at least one of Al, Ga, In, and B. The gate semiconductor layer 152 may be Al x In y Ga (1-x-y) N(0≤x≤1, 0≤y≤1, x+y≤1). For example, the gate semiconductor layer 152 may include at least one of AlN, GaN, InN, InGaN, AlGaN, AlInN, and AlInGaN. The gate semiconductor layer 152 may include a material having a different energy band gap than the barrier layer 136. For example, the gate semiconductor layer 152 may include GaN, and the barrier layer 136 may include AlGaN. The gate semiconductor layer 152 may be doped with a predetermined impurity. At this time, the impurity doped in the gate semiconductor layer 152 may be a P-type dopant that can provide holes. For example, the gate semiconductor layer 152 may include GaN doped with a P-type impurity. That is, the gate semiconductor layer 152 may be made of a p-GaN layer. However, it is not limited thereto, and the gate semiconductor layer 152 may be a p-AlGaN layer. The impurity doped in the gate semiconductor layer 152 may be magnesium (Mg). The gate semiconductor layer 152 may be made of a single layer or a plurality of layers.

[0039] The depletion region DPR may be formed in the channel layer 132 by the gate semiconductor layer 152. The depletion region DPR may be positioned in the drift region DTR and may have a narrower width than the drift region DTR. Since the gate semiconductor layer 152 having a different energy band gap from the barrier layer 136 is positioned on the barrier layer 136, the level of the energy band of the portion of the barrier layer 136 overlapping the gate semiconductor layer 152 may increase. Therefore, the depletion region DPR may be formed in the region of the channel layer 132 overlapping the gate semiconductor layer 152. The depletion region DPR may be a region where the two-dimensional electron gas 134 is not formed in the channel path of the channel layer 132 or has a lower electron concentration than the remaining region. In other words, the depletion region DPR may mean a region where the flow of the two-dimensional electron gas 134 in the drift region DTR is disconnected. As the depletion region DPR occurs, the current does not flow between the source electrode 173 and the drain electrode 175, and the channel path may be blocked. Therefore, the semiconductor device may have a normally-off characteristic.

[0040] That is, the semiconductor device may be a normally-off high electron mobility transistor (HEMT). Figure 1 As shown, in a normal state where no voltage is applied to the gate electrode 155, there is a depletion region DPR, and the semiconductor device can be in an off state. Figure 2As shown, when a voltage higher than the threshold voltage is applied to the gate electrode 155, the depletion region DPR disappears, and the two-dimensional electron gas 134 in the drift region DTR may not be disconnected but connected. That is, the two-dimensional electron gas 134 may be formed in the entire channel path between the source electrode 173 and the drain electrode 175, and the semiconductor device may be turned on. In summary, the semiconductor device may include semiconductor layers having different electric polarization characteristics, and the semiconductor layer having a relatively high polarizability may induce the two-dimensional electron gas 134 in another semiconductor layer heterojunctioned therewith. This two-dimensional electron gas 134 may be used as a channel between the source electrode 173 and the drain electrode 175, and the connection or disconnection of the flow of this two-dimensional electron gas 134 may be controlled by the bias voltage applied to the gate electrode 155. In the gate-off state, the flow of the two-dimensional electron gas 134 is blocked, so the current may not flow between the source electrode 173 and the drain electrode 175. As the flow of the two-dimensional electron gas 134 continues in the gate-on state, the current may flow between the source electrode 173 and the drain electrode 175.

[0041] In the above, the case where the semiconductor device is a normally-off high electron mobility transistor has been described, but it is not limited thereto. For example, the semiconductor device may be a normally-on high electron mobility transistor. In the case of a normally-on high electron mobility transistor, the gate semiconductor layer 152 may be omitted, and thus the gate electrode 155 may be directly positioned on the barrier layer 130. That is, the gate electrode 155 may be in contact with the barrier layer 130. In this structure, the two-dimensional electron gas 134 may be used as a channel in the absence of a voltage applied to the gate electrode 155, and current flow may occur between the source electrode 173 and the drain electrode 175. Additionally, when a negative voltage is applied to the gate electrode 155, a depletion region DPR in which the flow of the two-dimensional electron gas 134 is disconnected below the gate electrode 155 may occur.

[0042] The above-mentioned buffer layer 122, superlattice layer 124, high resistance layer 126, channel layer 132, barrier layer 136 and gate semiconductor layer 152 may be sequentially deposited on substrate 110. In the semiconductor device, at least one of the buffer layer 122, superlattice layer 124, high resistance layer 126, channel layer 132, barrier layer 136 and gate semiconductor layer 152 may be omitted. These buffer layer 122, superlattice layer 124, high resistance layer 126, channel layer 132, barrier layer 136 and gate semiconductor layer 152 may be made of the same base semiconductor material, and the material composition ratio of each layer may be different considering the role of each layer and the performance required by the semiconductor device.

[0043] The protective layers 140 and 160 may include a first protective layer 140 and a second protective layer 160 positioned on the first protective layer 140. The first protective layer 140 and the second protective layer 160 may cover the upper surfaces of the barrier layer 136 and the gate electrode 155, and may cover the side surfaces of the gate electrode 155 and the gate semiconductor layer 152. The bottom surface of the first protective layer 140 may be in contact with the barrier layer 136, the gate electrode 155, and the gate semiconductor layer 152. The upper surface of the first protective layer 140 may be in contact with the second protective layer 160. The second protective layer 160 may be separated from the barrier layer 136, the gate electrode 155, and the gate semiconductor layer 152 by the first protective layer 140. Therefore, the second protective layer 160 may not be in contact with the barrier layer 136, the gate electrode 155, and the gate semiconductor layer 152.

[0044] The barrier layer 136 and the gate electrode 155 may be protected by the protective layers 140 and 160 and may be separated from other components. The first protective layer 140 and the second protective layer 160 may include an insulating material. For example, the first protective layer 140 and the second protective layer 160 may include an insulating material such as SiO 2 or Al 2 O 3 As another example, the first protective layer 140 and the second protective layer 160 may include a nitride such as SiN or an oxynitride such as SiON. The first protective layer 140 and the second protective layer 160 may include a material different from the diffusion barrier layer 500. The first protective layer 140 and the second protective layer 160 may include the same material or different materials. If the first protective layer 140 and the second protective layer 160 are made of the same material, the boundary between the first protective layer 140 and the second protective layer 160 may not be identified. The first protective layer 140 and the second protective layer 160 may each be composed of a single layer or a plurality of layers. For example, the second protective layer 160 may include a second lower protective layer 160a and a second upper protective layer 160b. The second upper protective layer 160b may be positioned on the second lower protective layer 160a. Although not shown, the first protective layer 140 may also include a first lower protective layer and a second upper protective layer. In some cases, at least one of the first protective layer 140 and the second protective layer 160 may include three or more layers.

[0045] The source electrode 173 and the drain electrode 175 may be positioned on the channel layer 132. The source electrode 173 and the drain electrode 175 may be spaced apart from each other, and the gate electrode 155 and the gate semiconductor layer 152 may be positioned between the source electrode 173 and the drain electrode 175. The gate electrode 155 and the gate semiconductor layer 152 are spaced apart from the source electrode 173 and the drain electrode 175. The source electrode 173 may be electrically connected to the channel layer 132 on one side of the gate electrode 155. The drain electrode 175 may be electrically connected to the channel layer 132 on the other side of the gate electrode 155. The source electrode 173 and the drain electrode 175 may be positioned outside the drift region DTR of the channel layer 132. The interface between the source electrode 173 and the channel layer 132 may be one edge of the drift region DTR. Similarly, the interface between the drain electrode 175 and the channel layer 132 may be another edge of the drift region DTR. However, the present disclosure is not limited thereto, and the source electrode 173 and the drain electrode 175 may not be positioned outside the drift region DTR of the channel layer 132. At this time, the channel layer 132 may not be recessed, and the source electrode 173 and the drain electrode 175 may be positioned on the upper surface of the channel layer 132. The bottom surfaces of the source electrode 173 and the drain electrode 175 may be in contact with the upper surface of the channel layer 132. The portion of the channel layer 132 in contact with the source electrode 173 and the drain electrode 175 may be doped with a high concentration. At this time, carriers passing through the two-dimensional electron gas 134 may pass through the portion of the channel layer 132 doped with a high concentration, that is, the upper portion of the two-dimensional electron gas 134, and be transmitted to the source electrode 173 and the drain electrode 175. The source electrode 173 and the drain electrode 175 may not be in direct contact with the two-dimensional electron gas 134 in the horizontal direction. The horizontal direction may mean a direction parallel to the upper surface of the channel layer 132 or the barrier layer 136.

[0046] The source electrode 173 and the drain electrode 175 may include a conductive material. For example, the source electrode 173 and the drain electrode 175 may include a metal, a metal alloy, a conductive metal nitride, a metal silicide, a doped semiconductor material, a conductive metal oxide, or a conductive metal oxynitride. For example, the source electrode 173 and the drain electrode 175 may include titanium nitride (TiN), tantalum carbide (TaC), tantalum nitride (TaN), titanium silicon nitride (TiSiN), tantalum silicon nitride (TaSiN), tantalum titanium nitride (TaTiN), titanium aluminum nitride (TiAlN), tantalum aluminum nitride (TaAlN), tungsten nitride (WN), ruthenium (Ru), titanium aluminum (TiAl), titanium aluminum carbonitride (TiAlC-N), titanium aluminum carbide (TiAlC), titanium carbide (TiC), tantalum carbonitride (TaC The source electrode 173 and the drain electrode 175 may be made of a single layer or a plurality of layers. The source electrode 173 and the drain electrode 175 may be in ohmic contact with the channel layer 132. The region in contact with the source electrode 173 and the drain electrode 175 in the channel layer 132 may be doped at a relatively high concentration compared to other regions.

[0047] The source electrode 173 may include a first source electrode 173a and a second source electrode 173b. The second source electrode 173b may be positioned on the first source electrode 173a. The first source electrode 173a may be in direct contact with the channel layer 132 and electrically connected to the channel layer 132. The second source electrode 173b may not be in direct contact with the channel layer 132 and may be electrically connected to the channel layer 132 through the first source electrode 173a.

[0048] The drain electrode 175 may include a first drain electrode 175a and a second drain electrode 175b. The second drain electrode 175b may be positioned on the first drain electrode 175a. The first drain electrode 175a may be in direct contact with the channel layer 132 and electrically connected to the channel layer 132. The second drain electrode 175b may not be in direct contact with the channel layer 132 and may be electrically connected to the channel layer 132 through the first drain electrode 175a.

[0049] The first source electrode 173a and the first drain electrode 175a may be positioned on the first protective layer 140. The first source electrode 173a and the first drain electrode 175a may be positioned between the first protective layer 140 and the second protective layer 160. The grooves penetrating the first protective layer 140 and the barrier layer 136 and recessed into the upper surface of the channel layer 132 may be positioned on both sides of the gate electrode 155 to be spaced apart from each other. The first source electrode 173a and the first drain electrode 175a may be positioned in the grooves positioned on both sides of the gate electrode 155, respectively. The first source electrode 173a and the first drain electrode 175a may be formed to fill the grooves. In the grooves, the first source electrode 173a and the first drain electrode 175a may contact the channel layer 132 and the barrier layer 136. The channel layer 132 may form the bottom surface and sidewalls of the groove, and the barrier layer 136 may form the sidewalls of the groove. Thus, the first source electrode 173a and the first drain electrode 175a may contact the upper surface and the side surface of the channel layer 132. Additionally, the first source electrode 173a and the first drain electrode 175a may contact the side surface of the barrier layer 136. That is, the first source electrode 173a and the first drain electrode 175a may cover the side surfaces of the channel layer 132 and the barrier layer 136.

[0050] The upper surfaces of the first source electrode 173a and the first drain electrode 175a may protrude from the upper surface of the first protection layer 140. Additionally, at least one of the first source electrode 173a and the first drain electrode 175a may cover at least a portion of the upper surface of the first protection layer 140. The second protection layer 160 may be positioned on the first source electrode 173a and the first drain electrode 175a. At least a portion of the first source electrode 173a and the first drain electrode 175a may be covered by the second protection layer 160. At least a portion of the first source electrode 173a and the first drain electrode 175a may be in contact with the second lower protection layer 160a, and may not be in contact with the second upper protection layer 160b.

[0051] The semiconductor device may further include a first field dispersion layer 177a positioned on the first protective layer 140. The first field dispersion layer 177a may be positioned between the source electrode 173 and the drain electrode 175. The first field dispersion layer 177a may overlap the gate electrode 155 in a vertical direction. The gate electrode 155 may be covered by the first field dispersion layer 177a. The first field dispersion layer 177a may be electrically connected to the source electrode 173. For example, the first field dispersion layer 177a may be connected to the first source electrode 173a. The first field dispersion layer 177a may include the same material as the first source electrode 173a and may be positioned in the same layer as the first source electrode 173a. The first field dispersion layer 177a may be formed simultaneously in the same process as the first source electrode 173a. The boundary between the first field dispersion layer 177a and the first source electrode 173a is unclear, and the first field dispersion layer 177a may be formed integrally with the first source electrode 173a. However, it is not limited thereto, and the first field dispersion layer 177a may be a component separate from the first source electrode 173a. Additionally, the first field dispersion layer 177a may be positioned in a layer different from the first source electrode 173a, and may be formed in a different process. In some cases, the first field dispersion layer 177a may be electrically connected to the gate electrode 155. For example, an opening overlapping the gate electrode 155 may be formed in the first protective layer 140, and the first field dispersion layer 177a may be connected to the gate electrode 155 through the opening. At this time, the first field dispersion layer 177a may not be connected to the source electrode 173.

[0052] The first field dispersion layer 177a may be used to disperse the electric field concentrated around the gate electrode 155. In the gate-off state, the two-dimensional electron gas 134 having a very high concentration may be positioned in a portion of the channel layer 132 positioned between the gate electrode 155 and the source electrode 173 and a portion of the channel layer 132 positioned between the gate electrode 155 and the drain electrode 175. When the electric field is concentrated on the gate electrode 155 and the gate semiconductor layer 152, the leakage current may increase and the breakdown voltage may decrease. The semiconductor device includes the first field dispersion layer 177a, and thus may disperse the electric field concentrated around the gate electrode 155. Therefore, the leakage current may be reduced and the breakdown voltage may be increased.

[0053] The second source electrode 173b and the second drain electrode 175b may be positioned on the second protective layer 160. The opening penetrating the second protective layer 160 may be positioned to overlap with the first source electrode 173a, and the second source electrode 173b may be positioned within the opening. The second source electrode 173b may be formed to fill the opening. In the opening, the second source electrode 173b may contact the first source electrode 173a. The second source electrode 173b may be connected to the first source electrode 173a through the opening. Another opening penetrating the second protective layer 160 may be positioned to overlap with the first drain electrode 175a, and the second drain electrode 175b may be positioned within the opening. The second drain electrode 175b may be formed to fill the opening. In the opening, the second drain electrode 175b may contact the first drain electrode 175a. The second drain electrode 175b may be connected to the first drain electrode 175a through the opening. The upper surfaces of the second source electrode 173b and the second drain electrode 175b may protrude from the upper surface of the second protective layer 160. Additionally, at least one of the second source electrode 173 b and the second drain electrode 175 b may cover at least a portion of the upper surface of the second protective layer 160 .

[0054] The opening filled with the second source electrode 173b may overlap with the groove filled with the first source electrode 173a. However, it is not limited to this, and in some cases, the opening and the groove may not overlap. The opening filled with the second source electrode 173b may completely overlap with the first source electrode 173a. However, it is not limited to this, and in some cases, at least a portion of the opening filled with the second source electrode 173b may not overlap with the first source electrode 173a. At this time, the second source electrode 173b may cover the side of the first source electrode 173a and may contact the upper surface of the first protective layer 140. The width of the opening filled with the second source electrode 173b may be similar to the width of the groove filled with the first source electrode 173a. However, the relationship between the width of the opening and the width of the groove is not limited to this, and may change in various ways.

[0055] The opening filled with the second drain electrode 175b may overlap with the groove filled with the first drain electrode 175a. However, it is not limited to this, and in some cases, the opening and the groove may not overlap. The opening filled with the second drain electrode 175b may completely overlap with the first drain electrode 175a. However, it is not limited to this, and in some cases, at least a portion of the opening filled with the second drain electrode 175b may not overlap with the first drain electrode 175a. At this time, the second drain electrode 175b may cover the side of the first drain electrode 175a and may contact the upper surface of the first protective layer 140. The width of the opening filled with the second drain electrode 175b may be similar to the width of the groove filled with the first drain electrode 175a. However, the relationship between the width of the opening and the width of the groove is not limited to this, and may change in various ways.

[0056] The semiconductor device may further include a second field dispersion layer 177b positioned on the second protective layer 160. The second field dispersion layer 177b may be positioned between the source electrode 173 and the drain electrode 175. The second field dispersion layer 177b may overlap the gate electrode 155 in a vertical direction. The second field dispersion layer 177b may overlap the first field dispersion layer 177a in a vertical direction. The gate electrode 155 and the first field dispersion layer 177a may be covered by the second field dispersion layer 177b. The second field dispersion layer 177b may be wider than the first field dispersion layer 177a. The second field dispersion layer 177b may completely cover the first field dispersion layer 177a. However, it is not limited thereto, and the width and positional relationship of the first field dispersion layer 177a and the second field dispersion layer 177b may be changed in various ways. The second field dispersion layer 177b may be electrically connected to the source electrode 173. For example, the second field dispersion layer 177b may be connected to the second source electrode 173b. The second field dispersion layer 177b may include the same material as the second source electrode 173b and may be positioned in the same layer as the second source electrode 173b. The second field dispersion layer 177b may be formed simultaneously in the same process as the second source electrode 173b. The boundary between the second field dispersion layer 177b and the second source electrode 173b is unclear, and the second field dispersion layer 177b may be formed integrally with the second source electrode 173b. However, it is not limited thereto, and the second field dispersion layer 177b may be a component separated from the second source electrode 173b. Additionally, the second field dispersion layer 177b may be positioned in a different layer and may be formed in a different process from the second source electrode 173b. In some cases, the second field dispersion layer 177b may be electrically connected to the gate electrode 155. For example, the first field dispersion layer 177a may be connected to the gate electrode 155 through an opening formed in the first protective layer 140, and the second field dispersion layer 177b may be connected to the first field dispersion layer 177a through an opening formed in the second protective layer 160.

[0057] In some cases, at least one of the field dispersion layers 177a and 177b may be omitted. For example, the semiconductor device may include the first field dispersion layer 177a but not the second field dispersion layer 177b. Alternatively, the semiconductor device may include the second field dispersion layer 177b but not the first field dispersion layer 177a. Alternatively, the semiconductor device may not include the first field dispersion layer 177a and the second field dispersion layer 177b.

[0058] The semiconductor device may further include a capping layer 190 positioned on the source electrode 173 and the drain electrode 175. At least a portion of the upper surface and the side surface of the second source electrode 173b and the second drain electrode 175b may be covered by the capping layer 190. The second field dispersion layer 177b may be covered by the capping layer 190. The capping layer 190 is intended to protect the semiconductor device from external stress (such as moisture or oxygen) and may be positioned on the uppermost layer of the semiconductor device. That is, the capping layer 190 may be positioned at the outermost side of the semiconductor device. The source electrode 173 and the drain electrode 175 may be connected to an external wire, and the capping layer 190 may include pad opening portions 191 and 193 for connecting to the wire. A first pad opening portion 191 overlapping at least a portion of the source electrode 173 may be formed in the capping layer 190. The upper surface of the source electrode 173 may be exposed to the outside through the first pad opening portion 191. Although not shown, a wire electrically connected to the source electrode 173 through the first pad opening portion 191 may be further formed. A second pad opening portion 193 overlapping at least a portion of the drain electrode 175 may be formed in the capping layer 190. An upper surface of the drain electrode 175 may be exposed to the outside through the second pad opening portion 193. Although not shown, a wire electrically connected to the drain electrode 175 through the second pad opening portion 193 may be further formed.

[0059] The cover layer 190 may include an insulating material. For example, the cover layer 190 may include an insulating material such as polyimide (PI, polyimide), fluorinated polyimide (FPI), SiO 2 , SiN, SiON, etc. Most materials such as polyimide can have a functional group including F. The capping layer 190 may include a component having a high electron affinity, such as F, Cl, etc., and F ions, Cl ions, etc. may diffuse from the capping layer 190 to the surroundings. The electron affinity of F is about 328.2 kJ / mol, and the electron affinity of Cl is about 348.6 kJ / mol. When the diffused F ions, Cl ions, etc. move into the channel layer 132, the density of the two-dimensional electron gas 134 formed in the channel layer 132 may decrease. Therefore, if the flow of the two-dimensional electron gas 134 is disconnected, the current may not flow properly and the channel may not be formed. That is, degradation may occur, such as a decrease in the on-current (Id) formed in the channel when the gate is turned on and an increase in the on-resistance (Ron) of the semiconductor device.

[0060] The cover layer 190 may be composed of a single layer or a plurality of layers. The cover layer 190 is positioned on the outermost layer to physically and chemically protect the interior of the device from external influences, and may be formed much thicker than other layers of the semiconductor device. For example, when the cover layer 190 includes polyimide, the thickness of the cover layer 190 may be about 5 μm or more. In some cases, the thickness of the cover layer 190 may be less than about 5 μm. For example, when the cover layer 190 is composed of SiO 2 When the cover layer 190 is made of a double layer of SiN, SiON, etc., the thickness of the cover layer 190 may be less than about 3 μm. However, the thickness of the cover layer 190 is not limited thereto and may be changed in various ways. For example, if the cover layer 190 is made of a material with very high strength, it may be formed thinner.

[0061] The diffusion barrier layer 500 may be positioned within the protective layers 140 and 160. The diffusion barrier layer 500 may be positioned within the second protective layer 160. The diffusion barrier layer 500 may be positioned between the second lower protective layer 160a and the second upper protective layer 160b. The bottom surface of the diffusion barrier layer 500 may be in contact with the second lower protective layer 160a, and the upper surface of the diffusion barrier layer 500 may be in contact with the second upper protective layer 160b. However, it is not limited thereto, and another predetermined layer may be positioned between the diffusion barrier layer 500 and the second lower protective layer 160a or between the diffusion barrier layer 500 and the second upper protective layer 160b. The diffusion barrier layer 500 may be positioned approximately in the middle of the second protective layer 160. The second lower protective layer 160a and the second upper protective layer 160b may be separated from each other by the diffusion barrier layer 500, and the thickness of the second lower protective layer 160a and the thickness of the second upper protective layer 160b may be similar. However, the position of the diffusion barrier layer 500 is not limited thereto and may be changed in various ways. For example, the diffusion barrier layer 500 may be positioned at a substantially lower portion within the second protective layer 160. At this time, the thickness of the second lower protective layer 160a may be relatively thinner than the thickness of the second upper protective layer 160b. In other cases, the diffusion barrier layer 500 may be positioned on a substantially upper portion of the second protective layer 160. At this time, the thickness of the second lower protective layer 160a may be relatively thick compared to the thickness of the second upper protective layer 160b.

[0062] The thickness of the diffusion barrier layer 500 may be thinner than that of the second protective layer 160. For example, when the sum of the thicknesses of the second lower protective layer 160a and the second upper protective layer 160b is approximately When the diffusion barrier layer 500 has a thickness of about or greater and approximately That is, the thickness of the diffusion barrier layer 500 may be between about 1 / 30 and about 1 / 3 of the total thickness of the second lower protective layer 160a and the second upper protective layer 160b.

[0063] The diffusion barrier layer 500 may be positioned on the channel layer 132, the barrier layer 136, and the gate electrode 155. The channel layer 132, the barrier layer 136, and the gate electrode 155 may be covered by the diffusion barrier layer 500. The diffusion barrier layer 500 may overlap the channel layer 132, the barrier layer 136, and the gate electrode 155 in a vertical direction. In particular, the diffusion barrier layer 500 may overlap the drift region DTR of the channel layer 132 in a vertical direction. It is shown that the diffusion barrier layer 500 overlaps most of the channel layer 132, but is not limited thereto. The diffusion barrier layer 500 may overlap the drift region DTR of the channel layer 132, but may not overlap the remaining region.

[0064] The diffusion barrier layer 500 may be penetrated by the source electrode 173 and the drain electrode 175. The second source electrode 173b may penetrate the diffusion barrier layer 500 and be connected to the first source electrode 173a. The second drain electrode 175b may be connected to the first drain electrode 175a by penetrating the diffusion barrier layer 500. Therefore, the diffusion barrier layer 500 may not overlap at least a portion of the source electrode 173 and the drain electrode 175 in the vertical direction. The second source electrode 173b and the second drain electrode 175b may contact the side of the diffusion barrier layer 500. Observing the position where the second source electrode 173b and the diffusion barrier layer 500 contact, one side of the second source electrode 173b (e.g., the portion of the diffusion barrier layer 500 that contacts the left side in the drawing) may be positioned at a lower height than the other side of the second source electrode 173b (e.g., the portion of the diffusion barrier layer 500 that contacts the right side in the drawing). That is, the portion of the diffusion barrier layer 500 in contact with one side of the second source electrode 173b may be positioned at a different height than the portion of the diffusion barrier layer 500 in contact with the other side of the second source electrode 173b. Looking at the position where the second drain electrode 175b contacts the diffusion barrier layer 500, the portion of the diffusion barrier layer 500 in contact with one side of the second drain electrode 175b may be positioned at a height substantially equivalent to the portion of the diffusion barrier layer 500 in contact with the other side of the second drain electrode 175b. Additionally, looking at the portion of the diffusion barrier layer 500 positioned between the second source electrode 173b and the second drain electrode 175b, the portion of the diffusion barrier layer 500 in contact with the second source electrode 173b may be positioned at a higher height than the portion of the diffusion barrier layer 500 in contact with the second drain electrode 175b. That is, the portion of the diffusion barrier layer 500 in contact with the second source electrode 173b may be positioned at a different height than the portion of the diffusion barrier layer 500 in contact with the second drain electrode 175b. However, this is merely an example, and the positions at which the source electrode 173 and the drain electrode 175 contact the diffusion barrier layer 500 may be changed in various ways.

[0065] The diffusion barrier layer 500 may be positioned below the capping layer 190. The diffusion barrier layer 500 may be covered by the capping layer 190. The diffusion barrier layer 500 may be positioned between the channel layer 132 and the capping layer 190. The diffusion barrier layer 500 may be positioned between the drift region DTR generating the two-dimensional electron gas 134 in the channel layer 132 and the capping layer 190. The diffusion barrier layer 500 may be positioned between the barrier layer 136 and the capping layer 190. The diffusion barrier layer 500 may be positioned between a portion of the barrier layer 136 overlapping the drift region DTR and the capping layer 190.

[0066] The diffusion barrier layer 500 may include an insulating material. The diffusion barrier layer 500 may be made of an insulating material containing nitrogen. For example, the diffusion barrier layer 500 may include materials such as SiN, SiON, SiOCN, AlN, etc. The diffusion barrier layer 500 may prevent a predetermined material from diffusing to the surroundings. The diffusion barrier layer 500 may prevent F ions and Cl ions diffused from the capping layer 190 from moving into the channel layer 132. Therefore, the density of the two-dimensional electron gas 134 formed in the channel layer 132 may be prevented from being reduced, and the characteristics such as the on-current and the on-resistance may be prevented from being degraded. In addition, the diffusion barrier layer 500 may prevent moisture or oxygen from penetrating into the channel layer 132. In other words, the semiconductor device may have stable electrical characteristics, and reliability may be improved.

[0067] Next, we will refer to Figure 3 and Figure 4 Characteristics of the semiconductor device and the semiconductor device according to the reference example are compared and described.

[0068] Figure 3 is a diagram showing the movement path of ions within an example of a semiconductor device. Figure 4 is a diagram showing the movement path of ions within an example of a semiconductor device.

[0069] like Figure 3 As shown, the semiconductor device according to the reference example may include a channel layer 132, a barrier layer 136 positioned on the channel layer 132, a gate electrode 155 positioned on the barrier layer 136, a gate semiconductor layer 152 positioned between the barrier layer 136 and the gate electrode 155, a source electrode 173 and a drain electrode 175 separated from each other on the channel layer 132, protective layers 140 and 160 positioned on the barrier layer 136 and the gate electrode 155, and a capping layer 190 positioned on the source electrode 173, the drain electrode 175, and the protective layers 140 and 160. The semiconductor device according to the reference example does not have a separate diffusion barrier layer in the protective layers 140 and 160.

[0070] The capping layer 190 may include polyimide including F, and F ions (F-) may diffuse from the capping layer 190 and move to the lower portion of the capping layer 190. The F ions (F-) diffused from the capping layer 190 may pass through the second protective layer 160 and the first protective layer 140 and reach the blocking layer 136 and the channel layer 132. At this time, the F ions (F-) may not pass through the source electrode 173 or the drain electrode 175. When these F ions (F-) reach the channel layer 132, the density of the two-dimensional electron gas 134 formed in the channel layer 132 may decrease. Therefore, if the flow of the two-dimensional electron gas 134 is interrupted, the current may not flow properly and the channel may not be formed, which may degrade the performance of the semiconductor device according to the reference example.

[0071] like Figure 4 As shown, the semiconductor device may include a diffusion barrier layer 500 positioned within the protection layers 140 and 160. The diffusion barrier layer 500 may be positioned between the channel layer 132 and the capping layer 190. The diffusion barrier layer 500 may be positioned between the barrier layer 136 and the capping layer 190. The diffusion barrier layer 500 may be positioned between the source electrode 173 and the drain electrode 175. The diffusion barrier layer 500 may overlap with the drift region DTR of the channel layer 132.

[0072] F ions (F-) diffused from the capping layer 190 may pass through the second upper protective layer 160b and reach the diffusion barrier layer 500. F ions (F-) may not pass through the diffusion barrier layer 500. The semiconductor device includes the diffusion barrier layer 500, thereby preventing F ions (F-) diffused from the capping layer 190 from passing through the protective layers 140 and 160. Therefore, F ions (F-) diffused from the capping layer 190 may be prevented from reaching the barrier layer 136 or the channel layer 132. Therefore, the density of the two-dimensional electron gas 134 formed in the channel layer 132 may be prevented from being reduced, and the characteristics of the semiconductor device may be improved. In addition, the diffusion barrier layer 500 may prevent moisture, oxygen, etc. from penetrating into the interior of the semiconductor device. In other words, the semiconductor device may have stable electrical characteristics and may be able to improve reliability. Compared with the semiconductor device according to the reference example, the on-current of the semiconductor device may be increased and the on-resistance may be reduced. Particularly, in a high temperature reverse bias (HTRB) quality test, the semiconductor device shows an improvement of about 10% to about 30% or more compared to the semiconductor device according to the reference example.

[0073] Next, refer to Figures 5 to 11B A semiconductor device according to an implementation is described.

[0074] Figures 5 to 11B is a cross-sectional view showing an example of a semiconductor device.

[0075] Figures 5 to 11B Shows Figure 1 Many exemplary variations of semiconductor devices are shown. Figures 5 to 11B The implementation shown includes Figure 1 Many parts of the implementation shown are the same, so their description is omitted and the differences are mainly described. Otherwise, the same reference numerals are used for the same parts as the previous implementation. Figures 5 to 11B In the implementation shown, the location of the diffusion barrier layer, etc. may be slightly different from previous implementations.

[0076] like Figure 5 As shown, the semiconductor device includes a channel layer 132, a barrier layer 136 positioned on the channel layer 132, a gate electrode 155 positioned on the barrier layer 136, a gate semiconductor layer 152 positioned between the barrier layer 136 and the gate electrode 155, a source electrode 173 and a drain electrode 175 separated from each other on the channel layer 132, protective layers 140 and 160 positioned on the barrier layer 136 and the gate electrode 155, and a diffusion barrier layer 500 positioned on the protective layers 140 and 160.

[0077] The semiconductor device may further include a capping layer 190 positioned on the diffusion barrier layer 500. The diffusion barrier layer 500 may be positioned between the protective layers 140 and 160 and the capping layer 190. The protective layers 140 and 160 may include a first protective layer 140 and a second protective layer 160 positioned on the first protective layer 140. The diffusion barrier layer 500 may be positioned between the second protective layer 160 and the capping layer 190. The bottom surface of the diffusion barrier layer 500 may be in contact with the second protective layer 160. The upper surface of the diffusion barrier layer 500 may be in contact with the capping layer 190. The semiconductor device may further include a second field dispersion layer 177b connected to the second source electrode 173b, and the upper surface of the diffusion barrier layer 500 may be further in contact with the second field dispersion layer 177b. However, it is not limited thereto, and other layers may be positioned between the diffusion barrier layer 500 and the second protective layer 160 and between the diffusion barrier layer 500 and the capping layer 190.

[0078] The material diffused from the capping layer 190 may be stopped from moving by the diffusion barrier layer 500. Therefore, the material diffused from the capping layer 190 may be prevented from reaching the barrier layer 136 and the channel layer 132, and the characteristics of the semiconductor device may be improved.

[0079] like Figure 6As shown, the diffusion barrier layer 500 may be positioned between the first protective layer 140 and the second protective layer 160. The bottom surface of the diffusion barrier layer 500 may be in contact with the first protective layer 140. The bottom surface of the diffusion barrier layer 500 may further be in contact with the first source electrode 173a, the first field dispersion layer 177a, and the first drain electrode 175a. The diffusion barrier layer 500 may cover the upper surface and the side surface of the first field dispersion layer 177a. At this time, the diffusion barrier layer 500 may contact the upper surface and the side surface of the first field dispersion layer 177a. The side of the diffusion barrier layer 500 may be in contact with the second source electrode 173b and the second drain electrode 175b. The upper surface of the diffusion barrier layer 500 may be in contact with the second protective layer 160. However, it is not limited thereto, and other layers may be positioned between the diffusion barrier layer 500 and the first protective layer 140 and between the diffusion barrier layer 500 and the second protective layer 160. The semiconductor device includes the diffusion barrier layer 500 , thereby preventing materials diffused from the capping layer 190 from reaching the channel layer 132 , which may improve device characteristics.

[0080] like Figure 7 As shown, the diffusion barrier layer 500 may be positioned within the first protective layer 140. The first protective layer 140 may include a first lower protective layer 140a and a first upper protective layer 140b. The diffusion barrier layer 500 may be positioned between the first lower protective layer 140a and the first upper protective layer 140b. The bottom surface of the diffusion barrier layer 500 may be in contact with the first lower protective layer 140a, and the upper surface of the diffusion barrier layer 500 may be in contact with the first upper protective layer 140b. However, it is not limited thereto, and other layers may be positioned between the diffusion barrier layer 500 and the first lower protective layer 140a and between the diffusion barrier layer 500 and the first upper protective layer 140b. The side of the diffusion barrier layer 500 may be in contact with the first source electrode 173a and the first drain electrode 175a. By preventing the material diffused from the capping layer 190 from reaching the channel layer 132 by the diffusion barrier layer 500, the characteristics of the semiconductor device may be improved.

[0081] like Figure 8As shown, the diffusion barrier layer 500 may be positioned between the first protective layer 140 and the second protective layer 160. The bottom surface of the diffusion barrier layer 500 may be in contact with the first protective layer 140. The upper surface of the diffusion barrier layer 500 may be in contact with the second protective layer 160. The upper surface of the diffusion barrier layer 500 may be in contact with the first source electrode 173a and the first field dispersion layer 177a. In some cases, the first drain electrode 175a may be formed to cover at least a portion of the upper surface of the diffusion barrier layer 500, and in this case, the upper surface of the diffusion barrier layer 500 may be in contact with the first drain electrode 175a. The side of the diffusion barrier layer 500 may be in contact with the first source electrode 173a and the first drain electrode 175a. However, it is not limited thereto, and other layers may be positioned between the diffusion barrier layer 500 and the first protective layer 140 and between the diffusion barrier layer 500 and the second protective layer 160. The semiconductor device includes the diffusion barrier layer 500 to prevent materials diffused from the capping layer 190 from reaching the channel layer 132 , thereby improving device characteristics.

[0082] like Fig. 9 As shown, the semiconductor device includes a channel layer 132, a barrier layer 136 positioned on the channel layer 132, a gate electrode 155 positioned on the barrier layer 136, a gate semiconductor layer 152 positioned between the barrier layer 136 and the gate electrode 155, a source electrode 173 and a drain electrode 175 separated from each other on the channel layer 132, protective layers 140, 160 and 180 positioned on the barrier layer 136 and the gate electrode 155, and a diffusion barrier layer 500 positioned within the protective layers 140, 160 and 180.

[0083] The source electrode 173 may include a first source electrode 173a, a second source electrode 173b, and a third source electrode 173c. The second source electrode 173b may be positioned on the first source electrode 173a, and the third source electrode 173c may be positioned on the second source electrode 173b. The first source electrode 173a may be connected to the channel layer 132, the second source electrode 173b may be connected to the first source electrode 173a, and the third source electrode 173c may be connected to the second source electrode 173b.

[0084] The semiconductor device may further include a first field dispersion layer 177a, a second field dispersion layer 177b, and a third field dispersion layer 177c. The first field dispersion layer 177a may be connected to the first source electrode 173a and may be integrated with the first source electrode 173a. The second field dispersion layer 177b may be connected to the second source electrode 173b and may be integrated with the second source electrode 173b. The third field dispersion layer 177c may be connected to the third source electrode 173c and may be integrated with the third source electrode 173c.

[0085] The drain electrode 175 may include a first drain electrode 175a, a second drain electrode 175b, and a third drain electrode 175c. The second drain electrode 175b may be positioned on the first drain electrode 175a, and the third drain electrode 175c may be positioned on the second drain electrode 175b. The first drain electrode 175a may be connected to the channel layer 132, the second drain electrode 175b may be connected to the first drain electrode 175a, and the third drain electrode 175c may be connected to the second drain electrode 175b.

[0086] The protective layers 140, 160, and 180 may include a first protective layer 140, a second protective layer 160, and a third protective layer 180. The first protective layer 140 may be positioned on the barrier layer 136 and the gate electrode 155. The first protective layer 140 may be positioned between the gate electrode 155 and the first field dispersion layer 177a. The first source electrode 173a may penetrate the first protective layer 140 and be connected to the channel layer 132. The first drain electrode 175a may penetrate the first protective layer 140 and be connected to the channel layer 132.

[0087] The second protection layer 160 may be positioned on the first source electrode 173a and the first drain electrode 175a. The second protection layer 160 may be positioned between the first field dispersion layer 177a and the second field dispersion layer 177b. The second source electrode 173b may penetrate the second protection layer 160 and be connected to the first source electrode 173a. The second drain electrode 175b may penetrate the second protection layer 160 and be connected to the first drain electrode 175a.

[0088] The third protection layer 180 may be positioned on the second source electrode 173b and the second drain electrode 175b. The third protection layer 180 may be positioned between the second field dispersion layer 177b and the third field dispersion layer 177c. The third source electrode 173c may penetrate the third protection layer 180 and be connected to the second source electrode 173b. The third drain electrode 175c may penetrate the third protection layer 180 and be connected to the second drain electrode 175b.

[0089] The third protective layer 180 may include a third lower protective layer 180a and a third upper protective layer 180b. The third upper protective layer 180b may be positioned on the third lower protective layer 180a. The diffusion barrier layer 500 may be positioned between the third lower protective layer 180a and the third upper protective layer 180b. The bottom surface of the diffusion barrier layer 500 may be in contact with the third lower protective layer 180a, and the upper surface of the diffusion barrier layer 500 may be in contact with the third upper protective layer 180b. However, it is not limited thereto, and other layers may be positioned between the diffusion barrier layer 500 and the third lower protective layer 180a and between the diffusion barrier layer 500 and the third upper protective layer 180b. Additionally, the diffusion barrier layer 500 may be positioned in the first protective layer 140 and / or the second protective layer 160 instead of the third protective layer 180. The semiconductor device includes the diffusion barrier layer 500, thereby preventing the material diffused from the capping layer 190 from reaching the channel layer 132, thereby improving the device characteristics.

[0090] like Fig.10 As shown, the semiconductor device includes a channel layer 132, a barrier layer 136 positioned on the channel layer 132, a gate electrode 155 positioned on the barrier layer 136, a gate semiconductor layer 152 positioned between the barrier layer 136 and the gate electrode 155, a source electrode 173 and a drain electrode 175 separated from each other on the channel layer 132, a first protective layer 140 positioned on the barrier layer 136 and the gate electrode 155, and a diffusion barrier layer 500 positioned within the first protective layer 140.

[0091] The first protective layer 140 may include a first lower protective layer 140a and a first upper protective layer 140b. The diffusion barrier layer 500 may be positioned between the first lower protective layer 140a and the first upper protective layer 140b. The bottom surface of the diffusion barrier layer 500 may be in contact with the first lower protective layer 140a. The upper surface of the diffusion barrier layer 500 may be in contact with the first upper protective layer 140b. However, it is not limited thereto, and other layers may be positioned between the diffusion barrier layer 500 and the first lower protective layer 140a and between the diffusion barrier layer 500 and the first upper protective layer 140b. In some cases, the diffusion barrier layer 500 may be positioned on the first protective layer 140. In other words, the diffusion barrier layer 500 may be positioned between the first protective layer 140 and the capping layer 190. The semiconductor device includes the diffusion barrier layer 500, thereby preventing the material diffused from the capping layer 190 from reaching the channel layer 132, which may improve device characteristics.

[0092] like Fig.11AAs shown, the diffusion barrier layer 500 may include a first diffusion barrier layer 510 and a second diffusion barrier layer 520. The first diffusion barrier layer 510 may be positioned within the first protective layer 140, and the second diffusion barrier layer 520 may be positioned within the second protective layer 160. The first diffusion barrier layer 510 may be positioned between the first lower protective layer 140a and the first upper protective layer 140b. The second diffusion barrier layer 520 may be positioned between the second lower protective layer 160a and the second upper protective layer 160b.

[0093] However, it is not limited thereto, and the positions of the first diffusion barrier layer 510 and the second diffusion barrier layer 520 may be changed in various ways. The semiconductor device may include a plurality of diffusion barrier layers 500, and each of the plurality of diffusion barrier layers 500 may be formed at a position corresponding to one of the above-mentioned implementations. In other words, by combining two or more of the above-mentioned implementations, a semiconductor device including a plurality of diffusion barrier layers 500 may be formed. For example, the first diffusion barrier layer 510 may be positioned between the first protective layer 140 and the second protective layer 160, and the second diffusion barrier layer 520 may be positioned between the second protective layer 160 and the capping layer 190. As another example, the first diffusion barrier layer 510 and the second diffusion barrier layer 520 may be positioned between the first protective layer 140 and the second protective layer 160. At this time, the upper surface of the first diffusion barrier layer 510 may contact the bottom surface of the first field dispersion layer 177a, and the bottom surface of the second diffusion barrier layer 520 may contact the upper surface of the first field dispersion layer 177a.

[0094] Additionally, the number of layers constituting the diffusion barrier layer 500 may be changed in various ways. For example, the diffusion barrier layer 500 may include three or more layers. The diffusion barrier layer 500 may include a layer positioned within the first protective layer 140, a layer positioned between the first protective layer 140 and the second protective layer 160, and a layer positioned between the second protective layer 160 and the capping layer 190.

[0095] The semiconductor device includes the diffusion barrier layer 500 to prevent materials diffused from the capping layer 190 from reaching the channel layer 132 , thereby improving device characteristics.

[0096] like Fig. 11BAs shown, the diffusion barrier layer 500 may be positioned between the first protection layer 140 and the second protection layer 160. The bottom surface of the diffusion barrier layer 500 may be in contact with the first protection layer 140. The side surface of the diffusion barrier layer 500 may be in contact with the first source electrode 173a and the first drain electrode 175a. Additionally, the side surface of the diffusion barrier layer 500 may be in contact with the side surface of the first field dispersion layer 177a. The upper surface of the diffusion barrier layer 500 may be in contact with the second protection layer 160. At this time, the diffusion barrier layer 500 may not be in contact with the second source electrode 173b and the second drain electrode 175b. Additionally, the diffusion barrier layer 500 may not cover the upper surface of the first field dispersion layer 177a. That is, the diffusion barrier layer 500 may not be in contact with the upper surface of the first field dispersion layer 177a.

[0097] Although not shown, as another example, the diffusion barrier layer 500 may be positioned on the second protective layer 160 and may also be in contact with the side surface of the second field dispersion layer 177b. At this time, the upper surface of the diffusion barrier layer 500 may be in contact with the second protective layer 160, and the side surface of the diffusion barrier layer 500 may be in contact with the second source electrode 173b and the second drain electrode 175b. Additionally, the upper surface of the diffusion barrier layer 500 may be in contact with the capping layer 190. In some cases, if the third protective layer is also positioned between the second protective layer 160 and the capping layer 190, the upper surface of the diffusion barrier layer 500 may be in contact with the third protective layer. The diffusion barrier layer 500 may not be in contact with the upper surface of the second field dispersion layer 177b.

[0098] Next, refer to Figures 12 to 21 A method of manufacturing a semiconductor device according to an implementation is described.

[0099] Figures 12 to 21 1 and 2 are process cross-sectional views shown in order of processes for manufacturing an example of a semiconductor device.

[0100] First, if Fig.12 As shown, a buffer layer 122 , a superlattice layer 124 , a high resistance layer 126 , a channel layer 132 , a barrier layer 136 , and a gate semiconductor material layer 152 a may be sequentially formed on a substrate 110 .

[0101] The substrate 110 may include a semiconductor material. For example, the substrate 110 may include sapphire, Si, SiC, AlN, GaN, or a combination thereof. The substrate 110 may be a silicon-on-insulator (SOI) substrate. However, the material of the substrate 110 is not limited thereto, and any commonly used substrate may be applied.

[0102] The buffer layer 122, the superlattice layer 124, the high resistance layer 126, the channel layer 132, the barrier layer 136, and the gate semiconductor material layer 152a may be sequentially formed using an epitaxial growth method. The buffer layer 122 may be first formed on the substrate 110, the superlattice layer 124 may be formed on the buffer layer 122, and the high resistance layer 126 may be formed on the superlattice layer 124. Next, the channel layer 132 may be formed on the high resistance layer 126, the barrier layer 136 may be formed on the channel layer 132, and the gate semiconductor material layer 152a may be formed on the barrier layer 136. Although not shown, before the buffer layer 122 is formed on the substrate 110, a seed layer may be further formed. In the final structure of the semiconductor device, the seed layer may be positioned between the substrate 110 and the buffer layer 122. The seed layer is a layer used as a seed for growing the buffer layer 122, and may be made of a lattice structure that becomes a seed of the buffer layer 122.

[0103] The buffer layer 122, the superlattice layer 124, the high resistance layer 126, the channel layer 132, the barrier layer 136, and the gate semiconductor material layer 152a may be made of the same base semiconductor material. However, considering the role of each layer and the performance required by the semiconductor device, the material composition ratio of each layer may be different. The buffer layer 122, the superlattice layer 124, the high resistance layer 126, the channel layer 132, the barrier layer 136, and the gate semiconductor material layer 152a may include one or more materials selected from the III-V group materials, for example, a nitride including at least one of Al, Ga, In, and B. The buffer layer 122, the superlattice layer 124, the high resistance layer 126, the channel layer 132, the barrier layer 136, and the gate semiconductor material layer 152a may be Al x In y Ga (1-x-y) N(0≤x≤1, 0≤y≤1, x+y≤1). For example, the buffer layer 122, the superlattice layer 124, the high resistance layer 126, the channel layer 132, the barrier layer 136 and the gate semiconductor material layer 152a may include at least one of AlN, GaN, InN, InGaN, AlGaN, AlInN, and AlInGaN. The barrier layer 136 may include a material having a different energy band gap than the channel layer 132. The barrier layer 136 may have a higher energy band gap than the channel layer 132. The gate semiconductor material layer 152a may include a material having a different energy band gap than the barrier layer 136.

[0104] As an example, the substrate 110 may include Si, the buffer layer 122 may include GaN, and the superlattice layer 124 may have a structure in which a layer made of AlGaN and a layer made of GaN are repeatedly stacked. The high resistance layer 126 may include GaN, the channel layer 132 may include GaN, and the barrier layer 136 may include AlGaN. The channel layer 132 and the barrier layer 136 may or may not be doped with impurities. The gate semiconductor material layer 152a may include GaN and may be doped with impurities. The gate semiconductor material layer 152a may be doped with P-type impurities, such as magnesium (Mg).

[0105] Since the lattice structure of Si and the lattice structure of GaN are different, it may not be easy to grow the channel layer 132 made of GaN directly on the substrate 110 made of Si. In the method of manufacturing a semiconductor device, the buffer layer 122, the superlattice layer 124, etc. are first formed on the substrate 110, and then the channel layer 132 is formed, so that the lattice structure of the channel layer 132 can be stably formed.

[0106] like Fig.13 As shown, a gate electrode material layer 155a may be formed on the gate semiconductor material layer 152a. The gate semiconductor material layer 152a is positioned between the barrier layer 136 and the gate electrode material layer 155a.

[0107] The gate electrode material layer 155a may be formed using a deposition process. For example, the gate electrode material layer 155a may be formed using at least one of physical vapor deposition (PVD), thermal chemical vapor deposition (thermal CVD), low pressure chemical vapor deposition (LP-CVD), plasma enhanced chemical vapor deposition (PE-CVD), or atomic layer deposition (ALD) techniques, but is not limited thereto.

[0108] The gate electrode material layer 155a may include a conductive material. For example, the gate electrode material layer 155a may include a metal, a metal alloy, a conductive metal nitride, a metal silicide, a doped semiconductor material, a conductive metal oxide, or a conductive metal oxynitride, etc. For example, the gate electrode material layer 155a may include titanium nitride (TiN), tantalum carbide (TaC), tantalum nitride (TaN), titanium silicon nitride (TiSiN), tantalum silicon nitride (TaSiN), tantalum titanium nitride (TaTiN), titanium aluminum nitride (TiAlN), tantalum aluminum nitride (TaAlN), tungsten nitride (WN), ruthenium (Ru), titanium aluminum (TiAl), titanium aluminum carbonitride (TiAlC-N), titanium aluminum carbide (TiAlC), titanium carbide (TiC), tantalum carbonitride (TaCN) , tungsten (W), aluminum (Al), copper (Cu), cobalt (Co), titanium (Ti), tantalum (Ta), nickel (Ni), platinum (Pt), nickel platinum (Ni-Pt), niobium (Nb), niobium nitride (NbN), niobium carbide (NbC), molybdenum (Mo), molybdenum nitride (MoN), molybdenum carbide (WC), tungsten carbide (WC), rhodium (Rh), palladium (Pd), iridium (Ir), osmium (Os), silver (Ag), gold (Au), zinc (Zn), vanadium (V) or a combination thereof, but is not limited thereto. The gate electrode material layer 155a may be made of a single layer or a plurality of layers.

[0109] Next, if Fig.15 As shown, the gate electrode 155 and the gate semiconductor layer 152 may be formed by patterning the gate electrode material layer 155 a and the gate semiconductor material layer 152 a using a photo and etching process.

[0110] For example, a hard mask layer and a photoresist layer may be sequentially formed on the gate electrode material layer 155a. A photoresist pattern may be formed by patterning the photoresist layer using a photo process. A hard mask pattern may be formed by etching the hard mask layer using the photoresist pattern as a mask. By etching the gate electrode material layer 155a and the gate semiconductor material layer 152a continuously using the hard mask pattern as a mask, at least a portion of the gate electrode material layer 155a and the gate semiconductor material layer 152a may be removed. Therefore, the remaining portion of the gate electrode material layer 155a may become the gate electrode 155. Additionally, the remaining portion of the gate semiconductor material layer 152a may become the gate semiconductor layer 152. The gate semiconductor layer 152 is positioned between the barrier layer 136 and the gate electrode 155. The gate electrode 155 may be in Schottky contact or ohmic contact with the gate semiconductor layer 152.

[0111] By patterning the gate semiconductor material layer 152a and the gate electrode material layer 155a using the same mask, the gate semiconductor layer 152 and the gate electrode 155 may have the same pattern. That is, the gate semiconductor layer 152 and the gate electrode 155 may have the same planar shape. In a cross section, the gate semiconductor layer 152 and the gate electrode 155 may have the same width. The gate semiconductor layer 152 may completely overlap with the gate electrode 155 in the vertical direction, and the upper surface of the gate semiconductor layer 152 may be completely covered by the gate electrode 155.

[0112] In order to minimize the damage to the barrier layer 136 during the etching of the gate semiconductor material layer 152a, the selective etching process conditions need to have a difference in the etching rates of the gate semiconductor material layer 152a and the barrier layer 136. For example, although the barrier layer 136 made of AlGaN is hardly etched, the gate semiconductor material layer 152a made of p-GaN can be easily etched. At this time, the etching gas can be added with oxygen (O 2 ) to use a surface oxidation etching method. Therefore, if the barrier layer 136 is not damaged and has a predetermined thickness, the channel layer 132 can have a high current density.

[0113] like Fig.15 As shown, a first protective layer 140 may be formed on the barrier layer 136 and the gate electrode 155 .

[0114] The first protective layer 140 may be formed using a deposition process. The first protective layer 140 may include an insulating material. For example, the first protective layer 140 may include an insulating material such as SiO 2 、SiN、SiON、Al 2 O 3 The first protective layer 140 is shown as a single layer, but in some cases, it may be composed of multiple layers. At this time, different materials may be sequentially deposited to form the first protective layer 140. Alternatively, by using the same material and changing the deposition conditions, a first protective layer 140 composed of several layers with different characteristics may be formed. In particular, a portion of the first protective layer 140 adjacent to the barrier layer 136 may be made of an insulating material of much better quality than other portions. This is to prevent electrons forming the channel from being trapped in the channel layer 132 positioned below the barrier layer 136. The portion of the first protective layer 140 in contact with the barrier layer 136 may be made of SiO 2 Made.

[0115] The side surfaces of the gate electrode 155 and the gate semiconductor layer 152 may be covered by the first protective layer 140. The side surfaces of the gate electrode 155 and the gate semiconductor layer 152 may be in contact with the first protective layer 140. A step may occur between a portion of the first protective layer 140 overlapping the gate electrode 155 and the gate semiconductor layer 152 and the remaining portion. However, it is not limited thereto, and in some cases, the upper surface of the first protective layer 140 may be completely flat. For example, if the thickness of the first protective layer 140 is relatively thick, a step may not occur between a portion of the first protective layer 140 overlapping the gate electrode 155 and the gate semiconductor layer 152 and the remaining portion.

[0116] like Fig.16 As shown, by patterning the first protective layer 140 using a photo and etching process, the first trench 141 and the second trench 143 may be formed. At this time, not only the first protective layer 140 but also the barrier layer 136 and the channel layer 132 may be patterned together.

[0117] For example, a photoresist pattern may be formed on the first protective layer 140, and the first protective layer 140, the barrier layer 136, and the channel layer 132 may be sequentially etched using this photoresist pattern as a mask. At this time, the first protective layer 140 and the barrier layer 136 may be penetrated by the first trench 141 and the second trench 143, and the upper surface of the channel layer 132 may be recessed. The channel layer 132 may not be penetrated by the first trench 141 or the second trench 143. That is, the depth of the recess of the upper surface of the channel layer 132 may be less than the entire thickness of the channel layer 132. At this time, the depth of the recess of the upper surface of the channel layer 132 may be much smaller than the entire thickness of the channel layer 132. For example, the depth of the recess of the upper surface of the channel layer 132 may be about 0% to about 30% of the entire thickness of the channel layer 132. In addition, the depth of the recess of the upper surface of the channel layer 132 may be less than the thickness of the barrier layer 136. However, it is not limited thereto, and the depth of the recess of the upper surface of the channel layer 132 may be changed in various ways. The side surfaces of the first protective layer 140 and the barrier layer 136 may be exposed to the outside through the first trench 141 and the second trench 143, and the top surface and the side surface of the channel layer 132 may be exposed. The channel layer 132 may form the bottom surface and the sidewalls of the first trench 141 and the second trench 143, and the barrier layer 136 may form the sidewalls of the first trench 141 and the second trench 143.

[0118] The first trench 141 and the second trench 143 may be spaced apart from each other. The first trench 141 and the second trench 143 may be positioned on both sides of the gate electrode 155. The first trench 141 may be positioned on one side of the gate electrode 155 to be spaced apart from the gate electrode 155. The second trench 143 may be positioned on the other side of the gate electrode 155 to be spaced apart from the gate electrode 155. The distance separating the first trench 141 from the gate electrode 155 may be less than the distance separating the second trench 143 from the gate electrode 155. The shapes of the first trench 141 and the second trench 143, such as width and depth, are shown to be similar, but are not limited thereto. The shapes of the first trench 141 and the second trench 143 may be changed in various ways.

[0119] like Fig.17 As shown, a conductive material may be deposited on the first protection layer 140 on which the first trench 141 and the second trench 143 are formed and patterned to form a first source electrode 173 a and a first drain electrode 175 a .

[0120] The first source electrode 173a and the first drain electrode 175a may include a conductive material. For example, the first source electrode 173a and the first drain electrode 175a may include a metal, a metal alloy, a conductive metal nitride, a metal silicide, a doped semiconductor material, a conductive metal oxide, or a conductive metal oxynitride. The first source electrode 173a and the first drain electrode 175a may be made of a single layer or multiple layers. For example, a plurality of conductive layers including different materials may be stacked and then patterned to form the first source electrode 173a and the first drain electrode 175a. At this time, a plurality of conductive layers may be etched simultaneously or sequentially using a mask pattern. For example, Ti, Al, Ti, and TiN may be sequentially stacked and then patterned to form the first source electrode 173a and the first drain electrode 175a. At this time, the thickness of the four conductive layers constituting the first source electrode 173a and the first drain electrode 175a may be similar or different. For example, a layer made of Al may be relatively thick compared to other layers.

[0121] The first source electrode 173a may be formed to fill the inside of the first trench 141. Within the first trench 141, the first source electrode 173a may be in contact with the channel layer 132 and the barrier layer 136. The first source electrode 173a may be in contact with the side surfaces of the channel layer 132 and the barrier layer 136. The first source electrode 173a may cover the side surfaces of the channel layer 132 and the barrier layer 136. The first source electrode 173a may be electrically connected to the channel layer 132 through the first trench 141. An upper surface of the first source electrode 173a may protrude from an upper surface of the first protective layer 140.

[0122] The first drain electrode 175a may be formed to fill the inside of the second trench 143. In the second trench 143, the first drain electrode 175a may be in contact with the channel layer 132 and the barrier layer 136. The first drain electrode 175a may be in contact with the side surfaces of the channel layer 132 and the barrier layer 136. The first drain electrode 175a may cover the side surfaces of the channel layer 132 and the barrier layer 136. The first drain electrode 175a may be electrically connected to the channel layer 132 through the second trench 143. An upper surface of the first drain electrode 175a may protrude from an upper surface of the first protective layer 140.

[0123] The first source electrode 173a and the first drain electrode 175a may be in ohmic contact with the channel layer 132. The region in contact with the first source electrode 173a and the first drain electrode 175a in the channel layer 132 may be doped at a relatively high concentration compared to other regions. For example, the channel layer 132 may be doped by an ion implantation process, an annealing process, etc. However, it is not limited thereto, and the doping process of the channel layer 132 may include other processes. The doping process of the channel layer 132 may be performed before forming the first source electrode 173a and the first drain electrode 175a. In some cases, the channel layer 132 may not be doped.

[0124] Inside the channel layer 132, the two-dimensional electron gas 134 may be formed in a portion adjacent to the barrier layer 136. The two-dimensional electron gas 134 may be positioned at the interface between the channel layer 132 and the barrier layer 136. The two-dimensional electron gas 134 may be positioned in the drift region DTR between the first source electrode 173a and the first drain electrode 175a. The depletion region DPR may be formed in the channel layer 132 by a gate semiconductor layer 152 having an energy band gap different from that of the barrier layer 136. Therefore, the semiconductor device may have a normally-off characteristic. That is, the semiconductor device may be a normally-off high electron mobility transistor (HEMT). In the gate-off state, the two-dimensional electron gas 134 can be positioned in the drift region DTR of the channel layer 132 excluding the depletion region DPR. In the gate-on state, the flow of the two-dimensional electron gas 134 continues in the depletion region DPR, so that the two-dimensional electron gas 134 can be positioned in the drift region DTR as a whole.

[0125] In the step of forming the first source electrode 173a and the first drain electrode 175a, a first field dispersion layer 177a may be formed together. The first field dispersion layer 177a may be positioned between the first source electrode 173a and the first drain electrode 175a. The first field dispersion layer 177a may overlap the gate electrode 155. The first field dispersion layer 177a can be electrically connected to the first source electrode 173a. The first field dispersion layer 177a may be formed integrally with the first source electrode 173a. The first field dispersion layer 177a may include the same material as the first source electrode 173a and may be positioned in the same layer as the first source electrode 173a.

[0126] like Fig.18 As shown, a second protective layer 160 and a diffusion barrier layer 500 may be formed on the first source electrode 173a and the first drain electrode 175a. At this time, the diffusion barrier layer 500 may be positioned within the second protective layer 160. The second protective layer 160 may include a second lower protective layer 160a and a second upper protective layer 160b, and the diffusion barrier layer 500 may be positioned between the second lower protective layer 160a and the second upper protective layer 160b.

[0127] The second lower protective layer 160a, the diffusion barrier layer 500, and the second upper protective layer 160b may be sequentially formed using a deposition process. The second lower protective layer 160a, the diffusion barrier layer 500, and the second upper protective layer 160b may include an insulating material. The diffusion barrier layer 500 may include a material different from that of the second lower protective layer 160a and the second upper protective layer 160b. For example, the second lower protective layer 160a and the second upper protective layer 160b may include a material such as SiO 2 、SiN、SiON、Al 2 O 3 The second lower protective layer 160a and the second upper protective layer 160b may include the same material or different materials. The diffusion barrier layer 500 may be made of an insulating material containing nitrogen. For example, the diffusion barrier layer 500 may include materials such as SiN, SiON, SiOCN, AlN, etc. The diffusion barrier layer 500 may include a material capable of preventing the diffusion of ions such as F and Cl having a high electron affinity. In addition, the diffusion barrier layer 500 may also prevent the diffusion of moisture or oxygen.

[0128] The first source electrode 173a, the first drain electrode 175a, the first field dispersion layer 177a, and the first protection layer 140 may be covered by the second protection layer 160 and the diffusion barrier layer 500. The first source electrode 173a, the first drain electrode 175a, the first field dispersion layer 177a, and the first protection layer 140 may be in contact with the second lower protection layer 160a. A step may occur between the portion of the second protection layer 160 overlapping with the first source electrode 173a, the first drain electrode 175a, and the first field dispersion layer 177a and the remaining portion. However, it is not limited thereto, and in some cases, the upper surface of the second protection layer 160 may be completely flat. For example, when the thickness of the second protection layer 160 is formed to be relatively thick, a step may not occur between the portion of the second protection layer 160 overlapping with the first source electrode 173a, the first drain electrode 175a, and the first field dispersion layer 177a and the remaining portion.

[0129] like Fig.19 As shown, the first opening 161 and the second opening 163 may be formed by patterning the second protection layer 160 and the diffusion barrier layer 500 using a photo and etching process.

[0130] For example, a photoresist pattern may be formed on the second protective layer 160, and the second upper protective layer 160b, the diffusion barrier layer 500, and the second lower protective layer 160a may be sequentially etched using this photoresist pattern as a mask. At this time, the second upper protective layer 160b, the diffusion barrier layer 500, and the second lower protective layer 160a may be penetrated by the first opening 161 and the second opening 163. Through the first opening 161, the upper surface of the first source electrode 173a or the first field dispersion layer 177a may be exposed to the outside. The upper surface of the first drain electrode 175a may be exposed to the outside through the second opening 163.

[0131] The first opening 161 and the second opening 163 may be spaced apart from each other. The first opening 161 and the second opening 163 may be positioned on both sides of the gate electrode 155. The first opening 161 may overlap with the first trench 141, and the second opening 163 may overlap with the second trench 143. The separation distance between the first opening 161 and the second opening 163 may be similar to the separation distance between the first trench 141 and the second trench 143. The separation distance between the first opening 161 and the gate electrode 155 may be less than the separation distance between the second opening 163 and the gate electrode 155. The width of the first opening 161 may be similar to the width of the first trench 141, and the width of the second opening 163 may be similar to the width of the second trench 143. However, the shapes and positions of the first opening 161 and the second opening 163 may be changed in various ways.

[0132] Next, a conductive material may be deposited on the second protection layer 160 on which the first and second openings 161 and 163 are formed and patterned to form the second source electrode 173 b and the second drain electrode 175 b .

[0133] The second source electrode 173b and the second drain electrode 175b may include a conductive material. For example, the second source electrode 173b and the second drain electrode 175b may include a metal, a metal alloy, a conductive metal nitride, a metal silicide, a doped semiconductor material, a conductive metal oxide, or a conductive metal oxynitride. The second source electrode 173b and the second drain electrode 175b may be made of a single layer or a plurality of layers. The second source electrode 173b and the second drain electrode 175b may include the same material as the first source electrode 173a and the first drain electrode 175a, and may have the same layered structure. However, it is not limited thereto, and the second source electrode 173b and the second drain electrode 175b may include a different material from the first source electrode 173a and the first drain electrode 175a, and may have a different layered structure. For example, Ti, TiN, Al, and TiN may be sequentially stacked and then patterned to form the second source electrode 173b and the second drain electrode 175b. At this time, the thickness of the four conductive layers constituting the second source electrode 173b and the second drain electrode 175b may be similar or different. For example, a layer made of Al may be relatively thick compared to other layers.

[0134] The second source electrode 173b may be formed to fill the inside of the first opening 161. The second source electrode 173b may contact the first source electrode 173a within the first opening 161. The second source electrode 173b may be electrically connected to the first source electrode 173a through the first opening 161. An upper surface of the second source electrode 173b may protrude from an upper surface of the second protective layer 160.

[0135] The second drain electrode 175b may be formed to fill the inside of the second opening 163. The second drain electrode 175b may contact the first drain electrode 175a within the second opening 163. The second drain electrode 175b may be electrically connected to the first drain electrode 175a through the second opening 163. An upper surface of the second drain electrode 175b may protrude from an upper surface of the second protective layer 160.

[0136] In the step of forming the second source electrode 173b and the second drain electrode 175b, the second field dispersion layer 177b may be formed together. The second field dispersion layer 177b may be positioned between the second source electrode 173b and the second drain electrode 175b. The second field dispersion layer 177b may overlap with the gate electrode 155. The second field dispersion layer 177b may overlap with the first field dispersion layer 177a. The second field dispersion layer 177b may be wider than the width of the first field dispersion layer 177a. The second field dispersion layer 177b may completely cover the first field dispersion layer 177a. However, it is not limited thereto, and the width and positional relationship of the first field dispersion layer 177a and the second field dispersion layer 177b may be changed in various ways. The second field dispersion layer 177b may be electrically connected to the second source electrode 173b. The second field dispersion layer 177b may be formed integrally with the second source electrode 173b. The second field dispersion layer 177 b may include the same material as the second source electrode 173 b , and may be positioned in the same layer as the first source electrode 173 a .

[0137] like Fig. 20 As shown, a capping layer 190 may be formed on the second source electrode 173 b and the second drain electrode 175 b .

[0138] The cover layer 190 may include an insulating material. For example, the cover layer 190 may include an insulating material such as polyimide (PI), SiO 2 , SiN, SiON, etc. The capping layer 190 may be composed of a single layer or a plurality of layers. The capping layer 190 is a layer positioned on the outermost side of the semiconductor device and may have a relatively high thickness to protect the inside of the device from external influences.

[0139] like Fig.21 As shown, by patterning the capping layer 190 using a photo and etching process, the first pad opening portion 191 and the second pad opening portion 193 may be formed.

[0140] A photoresist pattern may be formed on the capping layer 190, and the capping layer 190 may be etched using this photoresist pattern as a mask. At this time, the capping layer 190 may be penetrated by the first pad opening portion 191 and the second pad opening portion 193. The upper surface of the second source electrode 173b may be exposed to the outside through the first pad opening portion 191. The upper surface of the second drain electrode 175b may be exposed to the outside through the second pad opening portion 193.

[0141] Although not shown, a wiring connected to the second source electrode 173b and a wiring connected to the second drain electrode 175b may be additionally formed in a subsequent process. A signal applied from the wiring connected to the second source electrode 173b may be transmitted to one region of the channel layer 132 through the second source electrode 173b and the first source electrode 173a. A signal applied from the wiring connected to the second drain electrode 175b may be transmitted to another region of the channel layer 132 through the second drain electrode 175b and the first drain electrode 175a.

[0142] According to the method of manufacturing a semiconductor device, in the process of forming the second protective layer 160, by forming the diffusion barrier layer 500 in the second protective layer 160, it is possible to prevent the material diffused from the capping layer 190 from reaching the channel layer 132. Therefore, it is possible to prevent the density of the two-dimensional electron gas 134 in the channel layer 132 from being reduced, and the characteristics of the semiconductor device can be improved.

[0143] Although this specification contains many specific implementation details, these should not be interpreted as limitations on the scope of any invention or the scope of what may be claimed, but rather as descriptions of features that may be peculiar to a particular implementation of a particular invention. Certain features described in this specification in the context of a separate implementation can also be implemented in combination in a single implementation. Conversely, various features described in the context of a single implementation can also be implemented separately or in any suitable sub-combination in multiple implementations. In addition, although features may be described above as working in certain combinations, one or more features from a combination can be removed from the combination in some cases, and the combination can be directed to a sub-combination or a variation of a sub-combination.

[0144] While the disclosure has been described in conjunction with what are presently considered to be practical exemplary implementations, it is to be understood that the disclosure is not limited to the disclosed implementations, but on the contrary, the disclosure is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.

Claims

1. A semiconductor device, comprising: Channel layer; a barrier layer located on the channel layer and including a material having a different energy band gap than a material included in the channel layer; a gate electrode, the gate electrode being located on the barrier layer; A gate semiconductor layer, wherein the gate semiconductor layer is located between the barrier layer and the gate electrode; a protective layer, the protective layer being located on the barrier layer and the gate electrode; a source electrode and a drain electrode, the source electrode and the drain electrode being located on both sides of the first side and the second side of the gate electrode, extending through the protection layer, and covering multiple side surfaces of the channel layer and the barrier layer; as well as A diffusion barrier layer is located in the protection layer, covers the barrier layer and the gate electrode, and includes nitrogen.

2. The semiconductor device according to claim 1, wherein The channel layer includes a drift region generating a two-dimensional electron gas between the source electrode and the drain electrode, and The diffusion barrier layer overlaps the drift region of the channel layer.

3. The semiconductor device according to claim 2, comprising: a covering layer, the covering layer being located on the source electrode and the drain electrode, Wherein, the diffusion barrier layer is located between the drift region of the channel layer and the cover layer.

4. The semiconductor device according to claim 3, wherein: The cover layer includes at least one of polyimide, SiO2, SiN or SiON.

5. The semiconductor device according to claim 3, wherein: The capping layer includes at least one of F or Cl.

6. The semiconductor device according to claim 3, wherein: The capping layer is located at the outermost side of the semiconductor device.

7. The semiconductor device according to claim 3, wherein: The covering layer comprises: a first pad opening portion, the first pad opening portion overlapping at least a portion of the source electrode; and A second pad opening portion overlaps at least a portion of the drain electrode.

8. The semiconductor device according to claim 1, wherein The diffusion barrier layer includes at least one of SiN, SiON, SiOCN or AlN.

9. The semiconductor device according to claim 1, wherein: The barrier layer includes a material having a higher energy band gap than a material included in the channel layer.

10. The semiconductor device according to claim 1, comprising: A field spreading layer is connected to the source electrode and covers the gate electrode.

11. The semiconductor device according to claim 10, wherein: The field spreading layer and the source electrode are located on the same layer, the field spreading layer and the source electrode include the same material, and the field spreading layer is integrally formed with the source electrode.

12. The semiconductor device according to claim 1, wherein The source electrode includes: a first source electrode connected to the channel layer; and a second source electrode connected to the first source electrode and positioned on the first source electrode, and The drain electrode includes a first drain electrode connected to the channel layer and a second drain electrode connected to the first drain electrode and positioned on the first drain electrode.

13. The semiconductor device according to claim 12, wherein: The protective layer comprises: a first protective layer, the first protective layer being located between the gate electrode and the first source electrode and between the gate electrode and the first drain electrode; and A second protection layer is located between the first source electrode and the second source electrode and between the first drain electrode and the second drain electrode.

14. The semiconductor device according to claim 13, wherein: The second protective layer comprises: a second lower protective layer, the second lower protective layer being located on the first protective layer; and a second upper protective layer, the second upper protective layer being located on the second lower protective layer, and Wherein, the diffusion barrier layer is located between the second lower protective layer and the second upper protective layer.

15. A semiconductor device, comprising: Channel layer; a barrier layer located on the channel layer and including a material having a higher energy band gap than a material included in the channel layer; a gate electrode, the gate electrode being located on the barrier layer; A gate semiconductor layer, wherein the gate semiconductor layer is located between the barrier layer and the gate electrode; a first protective layer, wherein the first protective layer is located on the gate electrode; a first source electrode and a first drain electrode, the first source electrode and the first drain electrode being located on both sides of a first side and a second side of the gate electrode on the first protection layer and connected to the channel layer; a first field dispersion layer, the first field dispersion layer overlapping the gate electrode on the first protection layer; a second protection layer, the second protection layer being located on the first source electrode, the first drain electrode and the first field dispersion layer; a second source electrode connected to the first source electrode on the second protection layer; a second drain electrode connected to the first drain electrode on the second protection layer; a second field spreading layer, the second field spreading layer overlapping the gate electrode on the second protection layer; a covering layer, the covering layer being located on the second source electrode, the second drain electrode and the second field dispersion layer; as well as A diffusion barrier layer is located at least in the first protection layer, in the second protection layer, between the first protection layer and the second protection layer, or between the second protection layer and the capping layer, and includes nitrogen.

16. The semiconductor device according to claim 15, wherein: The diffusion barrier layer comprises: a first diffusion barrier layer, the first diffusion barrier layer being located within the first protective layer; and A second diffusion barrier layer is located in the second protection layer.

17. The semiconductor device according to claim 15, wherein: The channel layer includes a drift region generating a two-dimensional electron gas between the first source electrode and the first drain electrode, and The diffusion barrier layer overlaps the drift region of the channel layer.

18. The semiconductor device according to claim 17, wherein: The capping layer includes at least one of F or Cl, and The diffusion barrier layer includes at least one of SiN, SiON, SiOCN or AlN.

19. A semiconductor device, comprising: a channel layer, wherein the channel layer comprises GaN; a barrier layer, the barrier layer being located on the channel layer and comprising AlGaN; a gate electrode, the gate electrode being located on the barrier layer and comprising a metal material; a gate semiconductor layer, the gate semiconductor layer being located between the barrier layer and the gate electrode and comprising GaN doped with P-type impurities; a protective layer, the protective layer being located on the barrier layer and the gate electrode; a source electrode and a drain electrode, the source electrode and the drain electrode being located on both sides of the first side and the second side of the gate electrode, extending through the protection layer, and contacting multiple side surfaces of the channel layer and the barrier layer; a covering layer, the covering layer being located on the source electrode and the drain electrode and comprising at least one of F and Cl; as well as A diffusion barrier layer is located in the protection layer, covers the barrier layer and the gate electrode, and includes at least one of SiN, SiON, SiOCN and AlN.

20. The semiconductor device according to claim 19, wherein The channel layer includes a drift region generating a two-dimensional electron gas between the source electrode and the drain electrode, and The diffusion barrier layer is located between the drift region of the channel layer and the capping layer.

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