Power converter

Abstract

According to the invention, the problem of reducing noise while suppressing switching loss is solved. A power converter (100) includes a plurality of switches (8), a plurality of resonant capacitors (9), at least one resonant inductor (L1), a controller (50), a voltage divider circuit (20), and a plurality of common mode filters (21). The voltage division circuit (20) includes a first capacitor (C1) and a second capacitor (C2) connected in series with each other. The plurality of common mode filters (21) are provided one-to-one with respect to the plurality of switching circuits (10). A voltage division circuit (20) has an intermediate potential node (N1) between a first capacitor (C1) and a second capacitor (C2). Each of the plurality of common mode filters (21) includes a third capacitor (C3) connected between a connection node (3) and an intermediate potential node (N1) of each of the plurality of switching circuits (10).

Description

Technical Field

[0001] The present disclosure generally relates to power converters. More particularly, the present disclosure relates to power converters having the ability to convert DC power to AC power. Background Art

[0002] Patent Document 1 discloses an inverter type driver (power converter).

[0003] Patent Document 1 Fig.18 The inverter type driver disclosed in the invention includes: a smoothing capacitor; two capacitors (a first capacitor and a second capacitor) connected in series with each other; six switching elements (a plurality of first switching elements and a plurality of second switching elements); and a plurality of filter circuits (common mode filters) each including a capacitor (a third capacitor). In the inverter type driver, an intermediate connection node (an intermediate potential node) between the two capacitors and a common connection node of the plurality of filter circuits are connected to each other.

[0004] In the power converter disclosed in Patent Document 1, for example, a series circuit of a third capacitor and one of two capacitors (a first capacitor and a second capacitor) is connected to both ends of a switching element, so there is a concern that switching loss increases. A power converter is sometimes required to reduce noise while reducing switching loss.

[0005] Prior art literature

[0006] Patent Literature

[0007] Patent Document 1: Japanese Patent Application Laid-Open No. 2001-69762 Summary of the invention

[0008] An object of the present disclosure is to provide a power converter having the ability to reduce noise while reducing switching losses.

[0009] A power converter according to one aspect of the present disclosure includes a first DC terminal and a second DC terminal, a power conversion circuit, a plurality of AC terminals, a plurality of switches, a plurality of resonant capacitors, at least one resonant inductor, a regenerative capacitor, a controller, a voltage divider circuit, and a plurality of common mode filters. The power conversion circuit includes a plurality of first switching elements and a plurality of second switching elements. In the power conversion circuit, a plurality of switching circuits are connected in parallel to each other, and in each of the plurality of switching circuits, a first switching element among the plurality of first switching elements and a corresponding second switching element among the plurality of second switching elements are connected in series one-to-one. In the power conversion circuit, the plurality of first switching elements are connected to the first DC terminal, and the plurality of second switching elements are connected to the second DC terminal. The plurality of AC terminals are respectively set one-to-one for the plurality of switching circuits. Each of the plurality of AC terminals is connected to a connection node between a first switching element and a second switching element of a corresponding switching circuit among the plurality of switching circuits. The plurality of switches are set one-to-one for the plurality of switching circuits. Each of the plurality of switches has a first end and a second end. The first end of each of the plurality of switches is connected to a connection node between a first switching element and a second switching element of a corresponding switching circuit among the plurality of switching circuits. The plurality of resonant capacitors are respectively arranged one-to-one for the plurality of switches. Each resonant capacitor in the plurality of resonant capacitors is connected between the first end of the corresponding switch in the plurality of switches and the second DC terminal. The at least one resonant inductor has a third end and a fourth end. In the at least one resonant inductor, its third end is connected to the second end of the corresponding switch in the plurality of switches. The regeneration capacitor has a fifth end and a sixth end. In the regeneration capacitor, its fifth end is connected to the second DC terminal, and its sixth end is connected to the fourth end of the at least one resonant inductor. The controller controls the plurality of first switching elements, the plurality of second switching elements and the plurality of switches. The voltage divider circuit includes a first capacitor and a second capacitor connected in series. In the voltage divider circuit, the first capacitor is connected to the first DC terminal, and the second capacitor is connected to the second DC terminal. The voltage divider circuit has an intermediate potential node between the first capacitor and the second capacitor. The plurality of common mode filters are arranged one-to-one for the plurality of switching circuits. Each of the plurality of common mode filters includes a third capacitor connected between a connection node of the corresponding switching circuit in the plurality of switching circuits and the intermediate potential node. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 is a circuit diagram illustrating a system including a power converter according to a first embodiment, with illustration of a plurality of protection circuits omitted;

[0011] Figure 2 is a circuit diagram illustrating a system including the power converter, with illustration of a plurality of common mode filters omitted;

[0012] Figure 3 illustrates how the power converter operates in a situation where its controller has performed basic operations when the load current is >0 and its resonant capacitor undergoes a charging operation;

[0013] Figure 4 It also illustrates how the power converter operates in a situation where its controller has performed basic operations when the load current is >0 and its resonant capacitor undergoes a charging operation;

[0014] Figure 5 showing how duty ratios and load currents respectively corresponding to three-phase voltage commands in AC loads connected to a plurality of AC terminals of the power converter vary with time;

[0015] Figure 6 showing a first current threshold and a second current threshold for use in a controller of the power converter;

[0016] Figure 7 illustrates how the power converter operates in a situation where its controller has performed basic operations when the load current is >0 and its resonant capacitor undergoes a discharge operation;

[0017] Figure 8 It also illustrates how the power converter operates in a situation where its controller has performed basic operations when the load current is <0 and its resonant capacitor undergoes a discharge operation;

[0018] Fig. 9 illustrates how the power converter operates in a situation where its controller has performed basic operations when the load current is <0 and its resonant capacitor undergoes a charging operation;

[0019] Fig.10 is a timing diagram illustrating how the power converter operates;

[0020] Fig.11 Demonstrate how the power converter performs charging operation;

[0021] Fig.12 Demonstrate how the power converter performs a discharge operation;

[0022] Fig.13 Demonstrate how the power converter operates;

[0023] Fig.14 is a circuit diagram illustrating a system including a power converter according to a first modification of the first embodiment, with illustration of a plurality of protection circuits omitted;

[0024] Fig.15 is a circuit diagram illustrating a system including a power converter according to a second modification of the first embodiment, with illustration of a plurality of protection circuits omitted;

[0025] Fig.16 is a circuit diagram illustrating a system including a power converter according to a second embodiment, with illustration of a plurality of protection circuits omitted;

[0026] Fig.17 is a circuit diagram illustrating a system including a power converter according to a third embodiment, with illustration of a plurality of protection circuits omitted;

[0027] Fig.18 is a circuit diagram illustrating a system including a power converter according to a fourth embodiment, with illustration of a protection circuit omitted;

[0028] Fig.19 is a circuit diagram illustrating a system including the power converter, with illustration of a plurality of common mode filters omitted;

[0029] Fig. 20 Demonstrate how the power converter performs charging operation;

[0030] Fig.21 Demonstrate how the power converter performs a discharge operation;

[0031] Fig. 22 is a circuit diagram illustrating a system including a power converter according to a first modification of the fourth embodiment, with illustration of a protection circuit omitted;

[0032] Fig.23 is a circuit diagram illustrating a system including a power converter according to a second modification of the fourth embodiment, with illustration of a protection circuit omitted;

[0033] Fig.24 is a circuit diagram illustrating a system including a power converter according to a third modification of the fourth embodiment, with illustration of a protection circuit omitted;

[0034] Fig.25 is a circuit diagram illustrating a system including a power converter according to a fourth modification of the fourth embodiment, with illustration of a protection circuit omitted;

[0035] Fig.26 is a circuit diagram illustrating a system including a power converter according to a fifth modification of the fourth embodiment, with illustration of a protection circuit omitted;

[0036] Fig. 27 is a circuit diagram illustrating a system including a power converter according to a sixth modification of the fourth embodiment, with illustration of a protection circuit omitted; and

[0037] Fig.28 is a circuit diagram illustrating a system including a power converter according to a fifth embodiment. DETAILED DESCRIPTION

[0038] (First embodiment)

[0039] Will refer to Figures 1 to 13 A power converter 100 according to a first embodiment will be described.

[0040] (1) Overall configuration of power converter

[0041] For example, Figure 1 As shown, the power converter 100 includes a first DC terminal 31 and a second DC terminal 32 and a plurality of (e.g., three) AC terminals 41. The DC power source E1 is connected between the first DC terminal 31 and the second DC terminal 32. The AC load RA1 is connected to the plurality of AC terminals 41. The AC load RA1 may be, for example, a three-phase motor. The power converter 100 converts the DC output of the DC power source E1 into AC power and outputs the AC power to the AC load RA1. The DC power source E1 may include, for example, a solar cell or a fuel cell. The DC power source E1 may include a DC-DC converter. In the power converter 100, if the plurality of AC terminals 41 are three AC terminals 41, the AC power may be, for example, a three-phase AC power having a U phase, a V phase, and a W phase.

[0042] The power converter 100 includes a power conversion circuit 11, a plurality of (e.g., three) switches 8, a plurality of (e.g., three) resonant capacitors 9, a regenerative capacitor 15, a plurality of (e.g., three) resonant inductors L1, a controller 50, a voltage divider circuit 20, and a plurality of (e.g., three) common mode filters 21. Each of the plurality of switches 8 may be, for example, a bidirectional switch. The power converter 100 further includes a protection circuit 17 (see Figure 2 ). Note that Figure 1 In, omitted Figure 2 FIG. 1 is a diagram of a protection circuit 17. Figure 2 In, omitted Figure 1 A diagram of a plurality of common mode filters 21 is shown.

[0043] The power conversion circuit 11 includes a plurality of (for example, three) first switching elements 1 and a plurality of (for example, three) second switching elements 2. In the power conversion circuit 11, a plurality of (for example, three) switching circuits 10 are connected in parallel to each other, and in each switching circuit 10, one of the plurality of first switching elements 1 and a corresponding second switching element of the plurality of second switching elements 2 are connected in series one-to-one. In the power conversion circuit 11, the plurality of first switching elements 1 are connected to the first DC terminal 31, and the plurality of second switching elements 2 are connected to the second DC terminal 32. A plurality of AC terminals 41 are provided one-to-one for the plurality of switching circuits 10, respectively. Each of the plurality of AC terminals 41 is connected to a connection node 3 between the first switching element 1 and the second switching element 2 of a corresponding switching circuit in the plurality of switching circuits 10. A plurality of switches 8 are provided one-to-one for the plurality of switching circuits 10. Each of the plurality of switches 8 has a first end 81 and a second end 82. The first end 81 of each of the plurality of switches 8 is connected to a connection node 3 between the first switching element 1 and the second switching element 2 of a corresponding switching circuit in the plurality of switching circuits 10. A plurality of resonant capacitors 9 are provided one-to-one for the plurality of switches 8, respectively. Each of the plurality of resonant capacitors 9 is connected between the first end 81 of the corresponding switch in the plurality of switches 8 and the second DC terminal 32. Each of the plurality of resonant inductors L1 has a third end and a fourth end. In each of the plurality of resonant inductors L1, its fourth end is connected to the regenerative capacitor 15. In each of the plurality of resonant inductors L1, its third end is connected to the second end 82 of the corresponding switch in the plurality of switches 8. The regenerative capacitor 15 has a fifth end 153 and a sixth end 154. In the regenerative capacitor 15, its fifth end 153 is connected to the second DC terminal 32, and its sixth end 154 is connected to the fourth end of each of the plurality of resonant inductors L1. The controller 50 controls the plurality of first switching elements 1, the plurality of second switching elements 2, and the plurality of switches 8. The voltage dividing circuit 20 includes a first capacitor C1 and a second capacitor C2 connected in series. In the voltage divider circuit 20, the first capacitor C1 is connected to the first DC terminal 31, and the second capacitor C2 is connected to the second DC terminal 32. The voltage divider circuit 20 has an intermediate potential node N1 between the first capacitor C1 and the second capacitor C2. The plurality of common mode filters 21 are provided one-to-one for the plurality of switching circuits 10. Each of the plurality of common mode filters 21 includes a third capacitor C3 connected between the connection node 3 of the corresponding switching circuit in the plurality of switching circuits 10 and the intermediate potential node N1.

[0044] (2) Details of power converter

[0045] In the following description, for the sake of convenience, for the sake of convenience, with respect to the plurality of switching circuits 10, the switching circuits 10 for the U phase, the V phase, and the W phase will be referred to as “switching circuit 10U”, “switching circuit 10V”, and “switching circuit 10W”, respectively, hereinafter. In addition, in the following description, the first switching element 1 and the second switching element 2 of the switching circuit 10U will be referred to as “the first switching element 1U” and the “second switching element 2U”, respectively, hereinafter. Similarly, in the following description, the first switching element 1 and the second switching element 2 of the switching circuit 10V will be referred to as “the first switching element 1V” and the “second switching element 2V”, respectively, hereinafter. Similarly, in the following description, the first switching element 1 and the second switching element 2 of the switching circuit 10W will be referred to as “the first switching element 1W” and the “second switching element 2W”, respectively, hereinafter. Furthermore, in the following description, the connection node 3 between the first switching element 1U and the second switching element 2U will be referred to as “connection node 3U” hereinafter, the connection node 3 between the first switching element 1V and the second switching element 2V will be referred to as “connection node 3V” hereinafter, and the connection node 3 between the first switching element 1W and the second switching element 2W will be referred to as “connection node 3W” hereinafter. Furthermore, in the following description, the AC terminal 41 connected to the connection node 3U will be referred to as “AC terminal 41U” hereinafter, the AC terminal 41 connected to the connection node 3V will be referred to as “AC terminal 41V” hereinafter, and the AC terminal 41 connected to the connection node 3W will be referred to as “AC terminal 41W” hereinafter. Furthermore, in the following description, the resonance capacitor 9 connected in parallel to the second switching element 2U will be referred to as “resonance capacitor 9U” hereinafter, the resonance capacitor 9 connected in parallel to the second switching element 2V will be referred to as “resonance capacitor 9V” hereinafter, and the resonance capacitor 9 connected in parallel to the second switching element 2W will be referred to as “resonance capacitor 9W” hereinafter. In addition, in the following description, the switch 8 connected to the connection node 3U will be referred to as "switch 8U" below, the switch 8 connected to the connection node 3V will be referred to as "switch 8V" below, and the switch 8 connected to the connection node 3W will be referred to as "switch 8W" below.

[0046] In the power converter 100, for example, a high potential output terminal (positive electrode) of the DC power source E1 may be connected to the first DC terminal 31, and a low potential output terminal (negative electrode) of the DC power source E1 may be connected to the second DC terminal 32. Furthermore, in the power converter 100, a U-phase terminal, a V-phase terminal, and a W-phase terminal of the AC load RA1 are connected to three AC terminals 41U, 41V, and 41W, respectively.

[0047] In the power conversion circuit 11, each of the plurality of (for example, three) first switching elements 1 and the plurality of (for example, three) second switching elements 2 has a control terminal, a first main terminal, and a second main terminal. The control terminals of the plurality of first switching elements 1 and the plurality of second switching elements 2 are connected to the controller 50. In each of the plurality of switching circuits 10 of the power converter 100, the first main terminal of the first switching element 1 is connected to the first DC terminal 31, the second main terminal of the first switching element 1 is connected to the first main terminal of the second switching element 2, and the second main terminal of the second switching element 2 is connected to the second DC terminal 32. In each of the plurality of switching circuits 10, the first switching element 1 is a high-side switching element (P-side switching element), and the second switching element 2 is a low-side switching element (N-side switching element). Each of the plurality of first switching elements 1 and the plurality of second switching elements 2 may be, for example, an insulated gate bipolar transistor (IGBT). Thus, in each of the plurality of first switching elements 1 and the plurality of second switching elements 2, the control terminal, the first main terminal, and the second main terminal thereof are respectively a gate terminal, a collector terminal, and an emitter terminal.

[0048] The power conversion circuit 11 also includes: a plurality of (for example, three) first diodes 4, which are connected in anti-parallel to the plurality of (for example, three) first switching elements 1 in one-to-one; and a plurality of (for example, three) second diodes 5, which are connected in anti-parallel to the plurality of (for example, three) second switching elements 2 in one-to-one. In each of the plurality of first diodes 4, the anode of the first diode 4 is connected to the second main terminal (emitter terminal) of the first switching element 1 corresponding to the first diode 4, and the cathode of the first diode 4 is connected to the first main terminal (collector terminal) of the first switching element 1 corresponding to the first diode 4. In each of the plurality of second diodes 5, the anode of the second diode 5 is connected to the second main terminal (emitter terminal) of the second switching element 2 corresponding to the second diode 5, and the cathode of the second diode 5 is connected to the first main terminal (collector terminal) of the second switching element 2 corresponding to the second diode 5.

[0049] The U-phase terminal of the AC load RA1 may be connected to the connection node 3U between the first switching element 1U and the second switching element 2U, for example, via the AC terminal 41U. The V-phase of the AC load RA1 may be connected to the connection node 3V between the first switching element 1V and the second switching element 2V, for example, via the AC terminal 41V. The W-phase of the AC load RA1 may be connected to the connection node 3W between the first switching element 1W and the second switching element 2W, for example, via the AC terminal 41W.

[0050] A plurality of resonant capacitors 9 are provided one-to-one for the plurality of switches 8. Each of the plurality of resonant capacitors 9 is connected between the first end 81 of the corresponding switch in the plurality of switches 8 and the second DC terminal 32. The power converter 100 includes a plurality of resonant circuits. Each of the plurality of resonant circuits includes a resonant capacitor 9 and a resonant inductor L1. Each of the plurality of resonant circuits also includes a second capacitor C2 and a third capacitor C3.

[0051] Each of the plurality of switches 8 may include, for example, two IGBTs (i.e., a first IGBT 6 and a second IGBT 7) connected together in anti-parallel. In each of the plurality of switches 8, the collector terminal of the first IGBT 6 and the emitter terminal of the second IGBT 7 are connected to each other, and the emitter terminal of the first IGBT 6 and the collector terminal of the second IGBT 7 are connected to each other. In each of the plurality of switches 8, the emitter terminal of the first IGBT 6 is connected to the connection node 3 of the switching circuit 10 corresponding to the switch 8 including the first IGBT 6. In each of the plurality of switches 8, the collector terminal of the second IGBT 7 is connected to the connection node 3 of the switching circuit 10 corresponding to the switch 8 including the second IGBT 7. The switch 8U is connected to the connection node 3U between the first switching element 1U and the second switching element 2U. The switch 8V is connected to the connection node 3V between the first switching element 1V and the second switching element 2V. The switch 8W is connected to the connection node 3W between the first switching element 1W and the second switching element 2W. In the following description, for the sake of convenience, the first IGBT 6 and the second IGBT 7 of the switch 8U will be referred to as the "first IGBT 6U" and the "second IGBT 7U", respectively, the first IGBT 6 and the second IGBT 7 of the switch 8V will be referred to as the "first IGBT 6V" and the "second IGBT 7V", respectively, and the first IGBT 6 and the second IGBT 7 of the switch 8W will be referred to as the "first IGBT 6W" and the "second IGBT 7W", respectively.

[0052] The plurality of switches 8 are controlled by the controller 50. In other words, the first IGBT 6U, the second IGBT 7U, the first IGBT 6V, the second IGBT 7V, the first IGBT 6W, and the second IGBT 7W are controlled by the controller 50.

[0053] Each of the plurality of resonant inductors L1 has a third end and a fourth end. In each of the plurality of resonant inductors L1, its third end is connected to the second end 82 of the corresponding switch in the plurality of switches 8. The fourth ends of each of the plurality of resonant inductors L1 are commonly connected to the sixth end 154 of the regenerative capacitor 15. The inductances of each of the plurality of resonant inductors L1 are equal to each other. That is, the inductances of each of the three resonant inductors L1 are equal to each other. As used herein, the expression "the inductances of each of the three resonant inductors L1 are equal to each other" refers not only to the case where the inductances of each of two of the three resonant inductors L1 are exactly equal to the inductance of the other resonant inductor L1, but also to the case where the inductance of each of the two resonant inductors L1 is equal to or greater than 95% of the inductance of the other resonant inductor L1 and equal to or less than 105% of the inductance of the other resonant inductor L1.

[0054] The regenerative capacitor 15 is connected between the fourth end of each of the plurality of resonant inductors L1 and the second DC terminal 32. The regenerative capacitor 15 may be, for example, a film capacitor.

[0055] Multiple protection circuits 17 (reference Figure 2 ) includes a third diode 13 and a fourth diode 14. In each of the plurality of protection circuits 17, the third diode 13 is connected between a connection node where its corresponding resonant inductor L1 and its corresponding switch 8 are connected to each other and the first DC terminal 31. In the third diode 13, an anode of the third diode 13 is connected to a connection node between the resonant inductor L1 and the switch 8. In addition, in the third diode 13, a cathode of the third diode 13 is connected to the first DC terminal 31. The fourth diode 14 is connected between a connection node where its corresponding resonant inductor L1 and its corresponding switch 8 are connected to each other and the second DC terminal 32. In the fourth diode 14, an anode of the fourth diode 14 is connected to the second DC terminal 32. In the fourth diode 14, a cathode of the fourth diode 14 is connected to a connection node between the resonant inductor L1 and the switch 8. Thus, in each of the plurality of protection circuits 17, the fourth diode 14 is connected in series to the third diode 13.

[0056] The controller 50 controls a plurality of first switching elements 1, a plurality of second switching elements 2, and a plurality of switches 8. An agent for performing the functions of the controller 50 includes a computer system. The computer system includes a single or multiple computers. The computer system may include a processor and a memory as its main hardware components. The computer system is used as an agent for performing the functions of the controller 50 according to the present disclosure by causing the processor to execute a program stored in the memory of the computer system. The program may be pre-stored in the memory of the computer system. Alternatively, the program may also be downloaded via a telecommunications line, or distributed after being recorded in a non-transient storage medium such as a memory card, an optical disk, or a hard disk drive (disk) (any of which is readable by the computer system). The processor of the computer system may be composed of a single or multiple electronic circuits including a semiconductor integrated circuit (IC) or a large-scale integrated circuit (LSI). These electronic circuits may be integrated together on a single chip or distributed on multiple chips, whichever is appropriate. These multiple chips may be aggregated together in a single device or distributed in multiple devices without limitation.

[0057] The controller 50 outputs control signals SU1, SV1, SW1 for controlling the ON / OFF states of the plurality of first switching elements 1U, 1V, 1W, respectively. Each of the control signals SU1, SV1, SW1 may be, for example, a pulse width modulation (PWM) signal having a potential level that alternates between a first potential level (hereinafter referred to as a "low level") and a second potential level (hereinafter referred to as a "high level") higher than the first potential level. The first switching elements 1U, 1V, 1W each turn on when the control signals SU1, SV1, SW1 thereof have a high level, and each turn off when the control signals SU1, SV1, SW1 thereof have a low level. In addition, the controller 50 also outputs control signals SU2, SV2, SW2 for controlling the ON / OFF states of the plurality of second switching elements 2U, 2V, 2W, respectively. Each of the control signals SU2, SV2, SW2 may be, for example, a PWM signal having a potential level that alternates between a first potential level (hereinafter referred to as a "low level") and a second potential level (hereinafter referred to as a "high level") higher than the first potential level. Each of the second switching elements 2U, 2V, 2W becomes conductive when its control signal SU2, SV2, SW2 has a high level, and each becomes off when its control signal SU2, SV2, SW2 has a low level.

[0058] The controller 50 uses a carrier signal having a sawtooth waveform (reference Figure 3) to generate control signals SU1, SV1, SW1 for multiple first switching elements 1U, 1V, 1W and control signals SU2, SV2, SW2 for multiple second switching elements 2U, 2V, 2W. More specifically, the controller 50 generates control signals SU1, SU2 to be applied to the first switching element 1U and the second switching element 2U, respectively, based at least on the carrier signal and the U-phase voltage command. In addition, the controller 50 generates control signals SV1, SV2 to be applied to the first switching element 1V and the second switching element 2V, respectively, based at least on the carrier signal and the V-phase voltage command. In addition, the controller 50 generates control signals SW1, SW2 to be applied to the first switching element 1W and the second switching element 2W, respectively, based at least on the carrier signal and the W-phase voltage command. The U-phase voltage command, the V-phase voltage command and the W-phase voltage command can, for example, be sinusoidal wave signals whose phases differ by 120 degrees from each other and whose values ​​(voltage command values) vary with time. Note that the waveform of the carrier signal does not have to be a sawtooth waveform, but can also be a triangular waveform or Figure 3 The sawtooth waveform shown is a mirror-inverted version. In addition, the U-phase voltage command, the V-phase voltage command, and the W-phase voltage command each have a cycle of the same length. In addition, the U-phase voltage command, the V-phase voltage command, and the W-phase voltage command have a cycle longer than a cycle of the carrier signal.

[0059] The duty ratios of the control signals SU1, SU2 to be applied from the controller 50 to the first switching element 1U and the second switching element 2U, respectively, vary according to the U-phase voltage command. Figure 5 , the duty cycle of the control signal SU1 is shown as "U-phase duty cycle". Figure 1 ) generates a control signal SU1 to be applied to the first switching element 1U by comparing the U-phase voltage command with the carrier signal. The controller 50 generates a control signal SU2 to be applied to the second switching element 2U by inverting the control signal SU1 to be applied to the first switching element 1U. In addition, in order to prevent the respective conduction periods of the first switching element 1U and the second switching element 2U from overlapping each other, the controller 50 sets a dead zone period Td (reference period Td) between the high level period of the control signal SU1 and the high level period of the control signal SU2. Figure 3 ).

[0060] The duty ratios of the control signals SV1, SV2 to be applied from the controller 50 to the first switching element 1V and the second switching element 2V, respectively, vary according to the V-phase voltage command. Figure 5 , the duty cycle of the control signal SV1 is shown as the "V-phase duty cycle". Figure 1) generates a control signal SV1 to be applied to the first switching element 1V by comparing the V-phase voltage command with the carrier signal. The controller 50 also generates a control signal SV2 to be applied to the second switching element 2V by inverting the control signal SV1 to be applied to the first switching element 1V. In addition, in order to prevent the respective conduction periods of the first switching element 1V and the second switching element 2V from overlapping each other, the controller 50 sets a dead zone period Td (reference period Td) between the high level period of the control signal SV1 and the high level period of the control signal SV2. Figure 3 ).

[0061] The duty ratios of the control signals SW1, SW2 to be applied from the controller 50 to the first switching element 1W and the second switching element 2W, respectively, vary according to the W-phase voltage command. Figure 5 , the duty cycle of the control signal SW1 is shown as the "W-phase duty cycle". Figure 1 ) generates a control signal SW1 to be applied to the first switching element 1W by comparing the W-phase voltage command with the carrier signal. The controller 50 generates a control signal SW2 to be applied to the second switching element 2W by inverting the control signal SW1 to be applied to the first switching element 1W. In addition, in order to prevent the respective conduction periods of the first switching element 1W and the second switching element 2W from overlapping each other, the controller 50 sets a dead zone period Td (reference period Td) between the high level period of the control signal SW1 and the high level period of the control signal SW2. Figure 4 ).

[0062] The U-phase voltage command, the V-phase voltage command, and the W-phase voltage command may be, for example, sinusoidal wave signals whose phases differ from each other by 120 degrees and whose values ​​vary with time. Figure 5 As shown, the duty ratios of the control signals SU1, SV1, and SW1 (i.e., the U-phase duty ratio, the V-phase duty ratio, and the W-phase duty ratio) vary in the form of sinusoidal waves that are 120 degrees out of phase with each other. In the same manner, the duty ratios of the control signals SU2, SV2, and SW2 also vary in the form of sinusoidal waves that are 120 degrees out of phase with each other.

[0063] The controller 50 generates the respective control signals SU1, SU2, SV1, SV2, SW1, SW2 based on the carrier signal, the respective voltage commands, and the information related to the state of the AC load RA1. For example, if the AC load RA1 is a three-phase motor, the information related to the state of the AC load RA1 may include, for example, detection values ​​provided by a plurality of current sensors for respectively detecting output currents iU, iV, iW of the U-phase, V-phase, and W-phase, respectively, flowing through the AC load RA1.

[0064] A plurality of switches 8 , a plurality of resonant inductors L1 , a plurality of resonant capacitors 9 , and a regenerative capacitor 15 are provided to perform zero-voltage soft switching of a plurality of first switching elements 1 and a plurality of second switching elements 2 .

[0065] In this power converter 100 , the controller 50 controls not only the plurality of first switching elements 1 and the plurality of second switching elements 2 of the power conversion circuit 11 , but also the plurality of switches 8 .

[0066] The controller 50 generates control signals SU6, SU7, SV6, SV7, SW6, SW7 for respectively controlling the on / off states of the first IGBT 6U, the second IGBT 7U, the first IGBT 6V, the second IGBT 7V, the first IGBT 6W, and the second IGBT 7W, and outputs the control signals SU6, SU7, SV6, SV7, SW6, SW7 to the respective gate terminals of the first IGBT 6U, the second IGBT 7U, the first IGBT 6V, the second IGBT 7V, the first IGBT 6W, and the second IGBT 7W.

[0067] If the first IGBT 6U is turned on and the second IGBT 7U is turned off, the switch 8U enables a charging current to flow through the regenerative capacitor 15, the resonant inductor L1, the switch 8U, and the resonant capacitor 9U in sequence. The charging current is a current for charging the resonant capacitor 9U. On the other hand, if the first IGBT 6U is turned off and the second IGBT 7U is turned on, the switch 8U enables a discharging current to flow through the resonant capacitor 9U, the switch 8U, the resonant inductor L1, and the regenerative capacitor 15 in sequence. The discharging current is a current for discharging (removing charge) from the resonant capacitor 9U.

[0068] If the first IGBT 6V is turned on and the second IGBT 7V is turned off, the switch 8V enables a charging current to flow through the regenerative capacitor 15, the resonant inductor L1, the switch 8V, and the resonant capacitor 9V in sequence. The charging current is a current for charging the resonant capacitor 9V. On the other hand, if the first IGBT 6V is turned off and the second IGBT 7V is turned on, the switch 8V enables a discharging current to flow through the resonant capacitor 9V, the switch 8V, the resonant inductor L1, and the regenerative capacitor 15 in sequence. The discharging current is a current for discharging (removing charge) from the resonant capacitor 9V.

[0069] If the first IGBT 6W is turned on and the second IGBT 7W is turned off, the switch 8W enables a charging current to flow through the regenerative capacitor 15, the resonant inductor L1, the switch 8W, and the resonant capacitor 9W in sequence. The charging current is a current for charging the resonant capacitor 9W. On the other hand, if the first IGBT 6W is turned off and the second IGBT 7W is turned on, the switch 8W enables a discharging current to flow through the resonant capacitor 9W, the switch 8W, the resonant inductor L1, and the regenerative capacitor 15 in sequence. The discharging current is a current for discharging (removing charge) from the resonant capacitor 9W.

[0070] The voltage divider circuit 20 includes a first capacitor C1 and a second capacitor C2. In the voltage divider circuit 20, the first capacitor C1 and the second capacitor C2 are connected in series. In the voltage divider circuit 20, the first capacitor C1 is connected to the first DC terminal 31 and the second capacitor C2 is connected to the second DC terminal 32. The voltage divider circuit 20 has an intermediate potential node N1 between the first capacitor C1 and the second capacitor C2. The intermediate potential node N1 can be, for example, a connection node where the first capacitor C1 and the second capacitor C2 are connected to each other. The potential at the intermediate potential node N1 is half the output voltage of the DC power supply E1. Note that the capacitance of the second capacitor C2 is equal to the capacitance of the first capacitor C1. As used herein, the expression "the capacitance of the second capacitor C2 is equal to the capacitance of the first capacitor C1" refers not only to the case where the capacitance of the second capacitor C2 is exactly equal to the capacitance of the first capacitor C1, but also to the case where the capacitance of the second capacitor C2 is equal to or greater than 95% of the capacitance of the first capacitor C1 and equal to or less than 105% of the capacitance of the first capacitor C1.

[0071] In each common mode filter of the plurality of common mode filters 21, the third capacitor C3 is connected between the connection node 3 of the corresponding switching circuit in the plurality of switching circuits 10 and the intermediate potential node N1 of the voltage divider circuit 20. The capacitances of the respective third capacitors C3 included in the plurality of common mode filters 21 are equal to each other. That is, the capacitances of the respective three third capacitors C3 are equal to each other. As used herein, the expression "the capacitances of the respective three third capacitors C3 are equal to each other" refers not only to the case where the capacitances of the respective two third capacitors C3 among the three third capacitors C3 are exactly equal to the capacitance of the other third capacitor C3, but also to the case where the capacitances of the respective two third capacitors C3 are equal to or greater than 95% of the capacitance of the other third capacitor C3 and equal to or less than and 105% of the capacitance of the other third capacitor C3.

[0072] (3) Operation of power converter

[0073] In the following description, for the current iL1 flowing through the resonant inductor L1, if the current is Figure 1If the current iL1 flows in the direction indicated by the arrow shown in FIG. 1 , the polarity of the current iL1 is assumed to be positive. On the other hand, if the current iL1 flows in the direction indicated by the arrow shown in FIG. Figure 1 If the current iL1 flows in the direction opposite to the direction indicated by the arrow shown in FIG. 1 , the polarity of the current iL1 is assumed to be negative. In addition, in the following description, for each of the load currents iU, iV, iW flowing through the U phase, V phase, and W phase of the AC load RA1, if the load currents iU, iV, iW are in the direction indicated by Figure 1 If the load current iU, iV, iW flows in the direction indicated by the corresponding arrow in the arrows shown in FIG. 1 , the polarity of the load current iU, iV, iW is assumed to be positive. On the other hand, if the load current iU, iV, iW flows in the direction indicated by the corresponding arrow in the arrows shown in FIG. Figure 1 If the load current iU, iV, iW flows in the direction opposite to the direction indicated by the arrow shown in FIG. 1 , the polarity of the load current iU, iV, iW is assumed to be negative. In addition, for each of the currents i9U, i9V, i9W flowing through the resonant capacitors 9U, 9V, 9W, respectively, if the currents i9U, i9V, i9W are Figure 1 If the currents i9U, i9V, i9W flow in the direction indicated by the corresponding arrows in the arrows shown, the polarity of the currents i9U, i9V, i9W is assumed to be positive. On the other hand, if the currents i9U, i9V, i9W flow in the direction indicated by the corresponding arrows in the arrows shown, the polarity of the currents i9U, i9V, i9W is assumed to be positive. Figure 1 If the current i9U, i9V, i9W flows in a direction opposite to the direction indicated by the arrow shown in FIG. 1 , the polarity of the current i9U, i9V, i9W is assumed to be negative. Therefore, in the case of a discharge operation in which the resonant capacitor 9U, 9V, 9W is discharged, the polarity of the current i9U, i9V, i9W is positive. On the other hand, in the case of a charging operation in which the resonant capacitor 9U, 9V, 9W is charged, the polarity of the current i9U, i9V, i9W is negative.

[0074] The controller 50 sets a dead time period Td between the high level period of the control signal SU1, SV1, SW1 for the first switching element 1U, 1V, 1W and the high level period of the control signal SU2, SV2, SW2 for the second switching element 2U, 2V, 2W for each switching circuit in the multiple switching circuits 10.

[0075] Next, refer to Figures 1 to 9 The basic operation of zero voltage soft switching to be performed on each of the plurality of first switching elements 1 and the plurality of second switching elements 2 is described below. Figures 10 to 12 How the common mode filter 21 operates will be described below.

[0076] (3.1) Basic operations

[0077] When the first switching element 1 is subjected to zero voltage soft switching, the voltage across the first switching element 1 needs to be reduced to zero just before the first switching element 1, which is the object of the zero voltage soft switching, becomes conductive. When the second switching element 2 is subjected to zero voltage soft switching, the voltage across the second switching element 2 needs to be reduced to zero just before the second switching element 2, which is the object of the zero voltage soft switching, becomes conductive. In the following description, the switching element, which is the object of the zero voltage soft switching (which is the first switching element 1 or the second switching element 2), will be referred to as the "object switching element" hereinafter.

[0078] The basic operation of the controller 50 changes according to the polarity (i.e., positive or negative) of the load current flowing through the AC terminal 41 connected to the object switching element and according to whether the resonant capacitor 9 connected in series or in parallel with the object switching element is undergoing a charging operation or a discharging operation. The load currents iU, iV, iW have a positive polarity when flowing from the AC terminal 41 toward the AC load RA1, and have a negative polarity when flowing from the AC load RA1 toward the AC terminal 41. When the resonant capacitor 9 is undergoing a charging operation, the voltage across the resonant capacitor 9 increases. On the other hand, when the resonant capacitor 9 is undergoing a discharging operation, the voltage across the resonant capacitor 9 decreases. The voltage across each of the plurality of second switching elements 2 is the same as the voltage across the resonant capacitor 9 connected in parallel to the second switching element 2.

[0079] (3.1.1) Soft switching operation of the first switching element when the load current is greater than 0

[0080] If the object of soft switching is the first switching element 1 (hereinafter referred to as "the object first switching element 1"), and the polarity of the load current flowing through the AC terminal 41 connected to the object first switching element 1 is positive, the controller 50 turns on the first IGBT 6 corresponding to the object first switching element 1. In this way, the controller 50 causes the resonant inductor L1 and the resonant capacitor 9 connected to the object first switching element 1 to resonate, thereby charging the resonant capacitor 9 with the charge removed from the regenerative capacitor 15 and reducing the voltage across the object first switching element 1 to zero. This enables the power converter 100 to perform zero-voltage soft switching of the object first switching element 1.

[0081] exist Figure 3 , control signals SU1 and SU2 to be applied from the controller 50 to the first switching element 1U and the second switching element 2U of the switching circuit 10U, respectively, are shown in FIG. Figure 3Also shown in FIG. 5 are the control signal SU6 to be applied from the controller 50 to the first IGBT 6U of the switch 8U, the load current iU of the U phase flowing through the AC load RA1, the current iL1 flowing through the resonant inductor L1, the voltage V1u across the first switching element 1U, and the voltage V2u across the second switching element 2U. Figure 3 , control signals SV1 and SV2 to be applied from the controller 50 to the first switching element 1V and the second switching element 2V of the switching circuit 10V, respectively, are also shown in FIG. Figure 3 Also shown are the control signal SV6 to be applied from the controller 50 to the first IGBT 6V of the switch 8V, the load current iV of the V phase flowing through the AC load RA1, the current iL1 flowing through the resonant inductor L1, the voltage V1v across the first switching element 1V, and the voltage V2v across the second switching element 2V.

[0082] In addition, Figure 3 , the controller 50 is also shown to prevent the first switching element 1 and the second switching element 2 of the same phase from becoming conductive at the same time. Figure 3 Also shown in FIG. 5 are additional time Tau set by the controller 50 for the control signal SU6 for the first IGBT 6U of the switch 8U and additional time Tav set by the controller 50 for the control signal SV6 for the first IGBT 6V of the switch 8V. The additional time Tau and the additional time Tav will be described later.

[0083] exist Figure 4 , control signals SW1 and SW2 to be applied from the controller 50 to the first switching element 1W and the second switching element 2W of the switching circuit 10W, respectively, are shown in FIG. Figure 4 Also shown in FIG. 8 are the control signal SW6 to be applied from the controller 50 to the first IGBT 6W of the switch 8W and the load current iW of the W phase flowing through the AC load RA1. Figure 4 Also shown in FIG. 1 is the current iL1 flowing through the resonant inductor L1. Figure 4 Also shown in FIG. 1 is a voltage V1w across the first switching element 1W and a voltage V2w across the second switching element 2W. Figure 4 In FIG. 1 , the voltage value of the DC power supply E1 is designated by Vd.

[0084] In addition, Figure 4 4 also shows the dead time period Td set by the controller 50 to prevent the first switching element 1W and the second switching element 2W from being turned on at the same time. Figure 4Also shown is an additional time Taw set by the controller 50 for the control signal SW6 of the first IGBT 6W for the switch 8W. The additional time Taw will be described later.

[0085] As Figure 3 shown, the additional time Tau is an amount of time during which the controller 50 sets the start time t1 of the high-level period of the control signal SU6 to a time point earlier than the start time t2 (hereinafter also referred to as "start time t2") of the dead time period Td, so that the high-level period of the control signal SU6 is longer than the dead time period Td. The length of the additional time Tau is determined by the value of the load current iU. In order to generate LC resonance starting from the start time t2 of the dead time period Td, it is preferable that the value of the current iL1 coincides with the value of the load current iU at the start time t2 of the dead time period Td. This is because as long as iL1 < iU, all of the current iL1 flows through the AC load RA1, and thus the resonance capacitor 9U cannot be charged. The end time of the high-level period of the control signal SU6 can be the same as or later than the time t3 (hereinafter referred to as "end time t3") at which the dead time period Td ends. In Figure 3 the example shown, the end time of the high-level period of the control signal SU6 is set to be the same as the end time t3 of the dead time period Td. The controller 50 sets the length of the high-level period of the control signal SU6 to Tau + Td. In the switching circuit 10U, the voltage V2u across the second switching element 2U becomes Vd at the end time t3 of the dead time period Td, and the voltage V1u across the first switching element 1U becomes zero at the end time t3 of the dead time period Td. In Figure 3 the example shown, the current iL1 starts flowing through the resonance inductor L1 at the start time t1 of the high-level period of the control signal SU6, and becomes zero at the time t4 after an additional time Tau has elapsed since the end time t3 of the dead time period Td. Regarding the current iL1, starting from the start time t2 of the dead time period Td, the current iL1 satisfies iL1 ≥ iU, and thus the current iL1 in the shaded portion of the current waveform shown as the fifth waveform from the top of Figure 3 flows into the resonance capacitor 9U to generate LC resonance. Starting from the end time t3 of the dead time period Td, the current iL1 will be regenerated to the power conversion circuit 11 via the third diode 13 directly connected to the resonance inductor L1.

[0086] As described above, in order to start generating the LC resonance at the start time t2 of the dead time period Td and end the resonance half cycle at the end time of the dead time period Td, the controller 50 determines an additional time Tau based on the load current iU such that iL1 = iU is satisfied at the start time t2 of the dead time period Td. More specifically, for example, using the detection result of the load current iU by the current sensor or its signal processing value, or the estimated value of the current iU, the detected result of the inductance L of the resonance inductor L1 stored in advance, and the voltage V15 across the regenerative capacitor 15, the controller 50 determines the additional time Tau by the formula Tau = iU × (L / V15). In this case, as the detection result of the load current iU or its signal processing value, the detection value according to the carrier period plus the additional time Tau or the detection value according to the timing closest to the carrier period can be used. Further, in this case, as the estimated value of the load current iU, for example, the value of the load current iU estimated according to the carrier period plus the additional time Tau can be used. The resonance half cycle is half of the resonance period, which is the reciprocal of the resonance frequency of the resonance circuit including one resonance inductor L1 and one resonance capacitor 9. The formula for calculating the resonance half cycle will be described later in the section of "(3.2) Operation of the common mode filter". The controller 50 sets the resonance half cycle so that the resonance half cycle is equal to or shorter than the length of the dead time period Td (for example, as long as the length of the dead time period Td).

[0087] As Figure 3 shown, the additional time Tav is the amount of time in which the controller 50 sets the start time t5 of the high level period of the control signal SV6 to an earlier time point than the start time t6 of the dead time period Td (hereinafter referred to as "start time t6") so that the high level period of the control signal SV6 is longer than the dead time period Td. The length of the additional time Tav is determined by the value of the load current iV. In order to start generating the LC resonance from the start time t6 of the dead time period Td, it is preferable that the value of the current iL1 coincides with the value of the load current iV at the start time t6 of the dead time period Td. This is because as long as iL1 < iV is satisfied, all of the current iL1 flows through the AC load RA1, and thus the resonance capacitor 9V cannot be charged. The end time of the high level period of the control signal SV6 may be the same as or later than the end time t7 of the dead time period Td (hereinafter referred to as "end time t7"). In Figure 3 the example shown, the end time of the high level period of the control signal SV6 is set to be the same as the end time t7 of the dead time period Td. The controller 50 sets the length of the high level period of the control signal SV6 to Tav + Td. The voltage V1v across the first switching element 1V becomes zero at the end time t7 of the dead time period Td. In Figure 3In the example shown, the current iL1 starts flowing through the resonant inductor L1 at the start time t5 of the high-level period of the control signal SV6, and becomes zero at the time t8 which is at an additional time Tav after the end time t7 of the dead time period Td. Regarding the current iL1, starting from the start time t6 of the dead time period Td, the current iL1 satisfies iL1≥iV, so the current iL1 in the shaded part of the current waveform shown as the tenth waveform from the top of Figure 3 flows into the resonant capacitor 9V to generate LC resonance. Starting from the end time t7 of the dead time period Td, the current iL1 will be regenerated to the power conversion circuit 11 via the third diode 13 directly connected to the resonant inductor L1.

[0088] As described above, in order to start generating LC resonance at the start time t6 of the dead time period Td, the controller 50 determines the additional time Tav based on the load current iV such that iL1 = iV is satisfied at the start time t6 of the dead time period Td. More specifically, for example, the controller 50 uses the detection result of the load current iV by the current sensor or its signal processing value, or the estimated value of the current iV, and the detection result of the voltage V15 across the resonant inductor L1 and the regenerative capacitor 15 that have been pre-stored, and determines the additional time Tav by the formula Tav = iV×(L / V15). In this case, as the detection result of the load current iV or its signal processing value, the detection value according to the carrier period plus the additional time Tav or the detection value according to the timing closest to the carrier period can be used. In addition, in this case, as the estimated value of the load current iV, for example, the value of the load current iV estimated according to the carrier period plus the additional time Tav can be used.

[0089] As Figure 4 shown, the additional time Taw is the amount of time in which the controller 50 sets this time amount to make the high-level period of the control signal SW6 longer than the dead time period Td by setting the start time t9 of the high-level period of the control signal SW6 to a time point earlier than the start time t10 (hereinafter referred to as "start time t10") when the dead time period Td starts. The length of the additional time Taw is determined by the value of the load current iW. In order to start generating LC resonance from the start time t10 of the dead time period Td, it is preferable that the value of the current iL1 is consistent with the value of the load current iW at the start time t10 of the dead time period Td. This is because as long as iL1 < iW is satisfied, all of the current iL1 flows through the AC load RA1, so the resonant capacitor 9W cannot be charged. The end time of the high-level period of the control signal SW6 can be the same as or later than the end time t11 of the dead time period Td. In Figure 4In the example shown, the end time of the high level period of the control signal SW6 is set to coincide with the end time t11 of the dead time period Td. The controller 50 sets the high level period of the control signal SW6 to Taw+Td. The voltage V1w across the first switching element 1W becomes zero at the end time t11 of the dead time period Td. Figure 4 In the example shown, the current iL1 starts to flow through the resonant inductor L1 at the start time t9 of the high level period of the control signal SW6, and becomes zero at the time t12 after the additional time Taw has passed since the end time t11 of the dead time period Td. Regarding the current iL1, from the start time t10 of the dead time period Td, the current iL1 satisfies iL1 ≥ iW, so from Figure 4 From the top of the fourth waveform, the current iL1 in the shaded portion of the current waveform flows into the resonant capacitor 9W to generate LC resonance. From the end time t11 of the dead time period Td, the current iL1 will be regenerated to the power conversion circuit 11 via the third diode 13 directly connected to the resonant inductor L1.

[0090] The controller 50 determines the additional time Taw based on the load current iW. More specifically, for example, the controller 50 uses the detection result of the load current iW using the current sensor, the inductance L of the resonant inductor L1 that has been stored in advance, and the detection result of the voltage V15 across the regenerative capacitor 15 to determine the additional time Taw by the formula Taw=iW×(L / V15). In this case, as the detection result of the load current iW or its signal processing value, a detection value according to the carrier cycle to which the additional time Taw is added or a detection value according to the timing closest to the carrier cycle can be used. In addition, in this case, as the estimated value of the load current iW, for example, the value of the load current iw estimated according to the carrier cycle to which the additional time Taw is added can be used.

[0091] (3.1.2) Soft switching operation of the second switching element when the load current is greater than 0

[0092] If the object of soft switching is the second switching element 2 (hereinafter referred to as "the object second switching element 2"), and the polarity of the load current (which is the load current iU, the load current iV or the load current iW) flowing through the AC terminal 41 connected to the object second switching element 2 is positive, the controller 50 compares the current value of the load current with the first current threshold value I1 (=Ith, reference Figure 6) is compared. If the current value of the load current is greater than the first current threshold value I1, the controller 50 does not turn on the switch 8. On the other hand, if the current value of the load current is less than the first current threshold value I1, the controller 50 turns on the switch 8 within the dead time period Td. In the power converter 100, if the current value of the load current is greater than the first current threshold value I1, the controller 50 can use the load current to discharge the resonant capacitor 9 connected in parallel with the object second switching element 2 without turning on the switch 8 corresponding to the object second switching element 2. This enables the power converter 100 to perform zero voltage soft switching of the object second switching element 2.

[0093] exist Figure 7 , regarding the case where the target second switching element 2 is the second switching element 2U of the switching circuit 10U and the current value of the load current iU is greater than the first current threshold value I1, the control signals SU1, SU2, SU7, the load current iU, the current i9U flowing from the resonant capacitor 9U, and the voltage V2u across the second switching element 2 are shown. Figure 7 Also shown in FIG. 8 are the dead time period Td and the additional time Tau set by the controller 50 for the control signal SU7 for the second IGBT 7U of the switch 8U.

[0094] If the current value of the load current iU is greater than the first current threshold value I1, the controller 50 does not set any high level period for the control signal SU7. In this case, in the power converter 100, the current i9U starts to flow from the resonant capacitor 9U at the start time t22 of the dead time period Td, the current i9U decreases to zero before the end time t23 of the dead time period Td, and the voltage V2u across the second switching element 2U becomes zero before the end time t23 of the dead time period Td. Thus, in the power converter 100, when the control signal SU2 changes from a low level to a high level at the end time t23 of the dead time period Td, the second switching element 2U is subjected to zero voltage soft switching.

[0095] If the current value of the load current iU is less than the first current threshold I1, then, for example, Figure 7The double-dot chain line in indicates that the controller 50 sets a high level period for the control signal SU7. In this case, the start time of the high level period of the control signal SU7 may be, for example, simultaneous with the start time t22 of the dead time period Td. In addition, the end time of the high level period of the control signal SU7 is simultaneous with the end time t23 of the dead time period Td. Thus, in the power converter 100, before the end time t23 of the dead time period Td, the voltage V2u across the second switching element 2U becomes zero. As a result, in the power converter 100, when the control signal SU2 changes from a low level to a high level at the end time t23 of the dead time period Td, the second switching element 2U is softly switched at zero voltage. Alternatively, the start time of the high level period of the control signal SU7 may be a time t21 earlier than the start time of the dead time period Td by an additional time Tau. The end time of the high level period of the control signal SU7 may be a time t24 later than the end time t23 of the dead time period Td by an additional time Tau. Note that the time before or after the high level period overlaps with the dead time period Td does not necessarily have to be the additional time Tau, but may be any other preset time.

[0096] (3.1.3) Soft switching operation of the second switching element when the load current is less than 0

[0097] If the polarity of the load current (which is the load current iU, the load current iV, or the load current iW) flowing through the AC terminal 41 connected to the object second switching element 2 is negative, the controller 50 turns on the second IGBT 7 corresponding to the object second switching element 2. In this way, the controller 50 causes the resonant capacitor 9 and the resonant inductor L1 connected to the object second switching element 2 to resonate, thereby discharging from the resonant capacitor 9 and reducing the voltage across the object second switching element 2 to zero. This enables the power converter 100 to perform zero-voltage soft switching of the object second switching element 2.

[0098] exist Figure 8 , for the case where the target second switching element 2 is the second switching element 2U of the switching circuit 10U, control signals SU1, SU2, SU7, load current iU, current iL1 flowing through the resonant inductor L1, and voltage V2u across the second switching element 2U are shown.

[0099] In addition, Figure 8 , the controller 50 is also shown to prevent the first switching element 1 and the second switching element 2 of the same phase from becoming conductive at the same time. Figure 88U. The additional time Tau set by the controller 50 for the control signal SU7 for the second IGBT 7U of the switch 8U is also shown in FIG. The end time of the high level period of the control signal SU7 may be simultaneous with or later than the end time t33 of the dead time period Td. Figure 8 In the example shown, the end time of the high level period of the control signal SU7 is set to coincide with the end time t33 of the dead time period Td. The controller 50 sets the high level period of the control signal SU7 to Tau+Td. In the switching circuit 10U, the voltage V2u across the second switching element 2U becomes zero at the end time t33 of the dead time period Td. Figure 8 In the example shown, the current iL1 starts to flow through the resonant inductor L1 at the time t31 (starting time t31) when the high level period of the control signal SU7 starts, and becomes zero at the time t34 after the additional time Tau has passed since the ending time t33 of the dead time period Td. Regarding the current iL1, from the starting time t32 of the dead time period Td, the current iL1 satisfies iL1≤iU, and thus LC resonance is generated so that the resonant current (i.e., the discharge current from the resonant capacitor 9U) flows from the resonant capacitor 9U toward the resonant inductor L1. From the ending time t33 of the dead time period Td, the current iL1 will be regenerated to the power conversion circuit 11 via the fourth diode 14 directly connected to the resonant inductor L1.

[0100] In order to start generating LC resonance at the start time t32 of the dead time period Td and end the resonant half cycle at the end time t33 of the dead time period Td, the controller 50 determines the additional time Tau based on the load current iU so that iL1=iU is satisfied at the start time t32 of the dead time period Td. More specifically, for example, the controller 50 uses the detection result of the output current iU of the current sensor or its signal processing value, or the estimated value of the load current iU, the inductance L of the resonant inductor L1 stored in advance, and the detection result of the voltage V15 across the regenerative capacitor 15, and determines the additional time Tau by the formula Tau=|iU|×(L / V15). In this case, as the detection result of the load current iU or its signal processing value, the detection value according to the carrier cycle to which the additional time Tau is added or the detection value according to the timing closest to the carrier cycle can be used. In addition, in this case, as the estimated value of the load current iU, for example, the value of the load current iU estimated according to the carrier cycle to which the additional time Tau is added can be used.

[0101] (3.1.4) Soft switching operation of the first switching element when the load current is less than 0

[0102] If the polarity of the load current (which is the load current iU, the load current iV or the load current iW) flowing through the AC terminal 41 connected to the object first switching element 1 is negative, the controller 50 compares the current value of the load current with the second current threshold value I2 (=-Ith, reference Figure 6 ) is compared. If the current value of the load current is less than the second current threshold value I2, the controller 50 does not turn on the switch 8. On the other hand, if the current value of the load current is greater than the second current threshold value I2, the controller 50 turns on the switch 8 within the dead time period Td. In the power converter 100, if the current value of the load current is less than the second current threshold value I2, the controller 50 can use the load current to charge the resonant capacitor 9 connected in series with the object first switching element 1 without turning on the switch 8 corresponding to the object first switching element 1. This enables the power converter 100 to perform zero voltage soft switching of the object first switching element 1.

[0103] exist Fig. 9 , regarding the case where the target first switching element 1 is the first switching element 1U of the switching circuit 10U and the current value of the load current iU is greater than the second current threshold value I2 (in other words, the case where the absolute value of the current value of the load current is less than the absolute value of the second current threshold value I2), the control signals SU1, SU2, SU6, the load current iU, the current i9U flowing from the resonant capacitor 9U, and the voltage V2u across the second switching element 2U are also shown. In addition, Fig. 9 A dead time period Td is also shown.

[0104] If the current value of the load current iU is less than the second current threshold value I2 (in other words, if the absolute value of the load current is greater than the absolute value of the second current threshold value I2), the controller 50 does not provide any high level period for the control signal SU6. In this case, in the power converter 100, the current i9U starts to flow through the resonant capacitor 9U at the start time t41 of the dead time period Td. As a result, in the power converter 100, the resonant capacitor 9U is charged so that the voltage V2u across the second switching element 2U increases. The current i9U becomes zero before the end time t23 of the dead time period Td, and the voltage V1u across the first switching element 1U becomes zero before the end time t42 of the dead time period Td. Thus, in the power converter 100, when the control signal SU1 changes from a low level to a high level at the end time t42 of the dead time period Td, the first switching element 1 is subjected to zero voltage soft switching.

[0105] If the current value of the load current iU is greater than the second current threshold value I2 (in other words, if the absolute value of the load current is less than the absolute value of the second current threshold value), then, for example, as given by Fig. 9The double-dot chain line in indicates that the controller 50 provides a high-level period for the control signal SU6. In this case, the start time of the high-level period of the control signal SU6 can be, for example, simultaneous with the start time t41 of the dead time period Td. In addition, the end time of the high-level period of the control signal SU6 is simultaneous with the end time t42 of the dead time period Td. Thus, in the power converter 100, the voltage V1u across the first switching element 1U becomes zero before the end time t42 of the dead time period Td. As a result, in the power converter 100, when the control signal SU1 changes from a low level to a high level at the end time t42 of the dead time period Td, zero voltage soft switching is performed on the first switching element 1U.

[0106] (3.2) Common mode filter operation

[0107] Next, refer to Figures 10 to 12 Let's explain in more detail how the common mode filter 21 operates. Fig.11 and Fig.12 in Figure 1 Same as in, omitted Figure 2 A schematic diagram of the protection circuit 17 is shown.

[0108] exist Fig.10 In FIG. 1 , for example, control signals SU1, SU2, SU6, and SU7 are illustrated to illustrate how to perform charging and discharging operations on the third capacitor C3 of the common mode filter 21 connected to the U-phase switch 8U. Fig.10 In FIG. 1 , the current Ic1 flowing through the first switching element 1U and the voltage V1u across the first switching element 1U are also shown. Fig.10 In FIG. 1 , the current Ic2 flowing through the second switching element 2U and the voltage V2u across the second switching element 2U are also shown. Fig.10 In FIG. 8 , the current i9U flowing through the resonant capacitor 9U, the voltage VC3 across the third capacitor C3 of the common mode filter 21 connected to the switch 8U, and the current i3 flowing through the third capacitor C3 are also shown. Fig.10 In FIG. 2 , the voltage VC2 across the second capacitor C2 of the voltage divider circuit 20 and the current i2 flowing through the second capacitor C2 are also shown. Fig.10 In Fig.11 The polarity of the current i9U flowing through the resonant capacitor 9U in the direction indicated by the arrow shown is defined as positive, and is determined by the Fig.11 The polarity of the current i9U flowing through the resonance capacitor 9U in the direction opposite to the direction indicated by the arrow shown is defined as negative. Therefore, in the case of a charging operation to charge the resonance capacitor 9U, the polarity of the current i9U is negative. On the other hand, in the case of a discharging operation to discharge from the resonance capacitor 9U, the polarity of the current i9U is positive. In the same manner, Fig.10 In Fig.11 and Fig.12 The polarity of the current i3 flowing through the third capacitor C3 in the direction indicated by the arrow shown is defined as positive, and is in accordance with the Fig.11 and Fig.12 The polarity of the current i3 flowing through the third capacitor C3 in the direction opposite to the direction indicated by the arrow shown is defined as negative. Thus, in the case of a charging operation to charge the third capacitor C3, the polarity of the current i3 is negative. On the other hand, in the case of a discharging operation to discharge from the third capacitor C3, the polarity of the current i3 is positive. In the same manner, in Fig.10 In Fig.11 and Fig.12 The polarity of the current i2 flowing through the second capacitor C2 in the direction indicated by the arrow shown is defined as positive and is in accordance with the Fig.11 and Fig.12 The polarity of the current i2 flowing through the second capacitor C2 in the direction opposite to the direction indicated by the arrow shown is defined as negative. Thus, in the case of a charging operation to charge the second capacitor C2, the polarity of the current i2 is negative. On the other hand, in the case of a discharging operation to discharge from the second capacitor C2, the polarity of the current i2 is positive. Note that in Fig.11 and Fig.12 In the figure, the load currents iU, iV, and iW are omitted.

[0109] In the following description, reference will be made to Fig.10 How to perform charging and discharging operations on the third capacitor C3 of the common mode filter 21 connected to the U-phase switch 8U is described below. The third capacitor C3 of the common mode filter 21 connected to the V-phase switch 8V and the third capacitor C3 of the common mode filter 21 connected to the W-phase switch 8W are also charged and discharged in the same manner.

[0110] (3.2.1) Charging operation

[0111] The controller 50 charges the third capacitor C3 of the common mode filter 21 by performing a first control operation. When performing the first control operation, the controller 50 controls the plurality of first switching elements 1, the plurality of second switching elements 2, and the plurality of switches 8 to charge the third capacitor C3 connected to the switch 8 via one of the plurality of switches 8 using the charge removed from the regeneration capacitor 15.

[0112] More specifically, if Fig.10As shown, for example, the controller 50 charges the resonant capacitor 9U and the third capacitor C3 of the common mode filter 21 in the dead time period Td between the time t31 (end time t31) when the high level period of the control signal SU2 ends and the time t32 when the high level period of the control signal SU1 starts.

[0113] If the controller 50 performs the first control operation, Fig.10 As shown in FIG. 1 , the dead time period Td overlaps with the high level period of the control signal SU6. Fig.11 As shown, the resonant capacitor 9U is charged by the first current I11 flowing from the regenerative capacitor 15 through the resonant capacitor 9U via the first IGBT 6U of the switch 8U. The first current I11 is a part of the resonant current flowing due to LC resonance. The first current I11 flows through a path that passes through the regenerative capacitor 15, the resonant inductor L1, the switch 8, and the resonant capacitor 9 in sequence. In addition, the third capacitor C3 and the second capacitor C2 are also charged by the second current I12 flowing from the regenerative capacitor 15 through the third capacitor C3 of the common mode filter 21 via the first IGBT 6U of the switch 8U. As a result, both the voltage VC3 across the third capacitor C3 and the voltage VC2 across the second capacitor C2 increase. The second current I12 is a part of the resonant current flowing due to LC resonance. The second current I12 flows through a path that passes through the regenerative capacitor 15, the resonant inductor L1, the switch 8, the third capacitor C3, and the second capacitor C2 in sequence.

[0114] If the inductance of the resonant inductor L1 is Lr, the capacitance of the resonant capacitor 9 is Cr, the capacitance of the third capacitor C3 is Cy, the capacitance of the second capacitor C2 is Cn, and the resonant period is Tre, the resonant period is expressed by the following equation (1).

[0115] [Mathematical formula 1]

[0116]

[0117] Therefore, if the resonance half period is Tr1, the resonance half period is calculated by the following equation (2).

[0118] [Mathematical formula 2]

[0119]

[0120] Modifying equation (2) enables the combined capacitance of the resonance capacitor 9, the third capacitor C3, and the second capacitor C2 to be expressed by the following equation (3).

[0121] [Mathematical formula 3]

[0122]

[0123] In the power converter 100, if the length of the dead time period Td is Td1 and the inductance of the resonant inductor L1 is Lr, the combined capacitance of the resonant capacitor 9, the third capacitor C3, and the second capacitor C2 may be less than 4·(Td1 / π) 2 In this case, the combined capacitance of the resonance capacitor 9, the third capacitor C3, and the second capacitor C2 is more preferably smaller than (Td1 / π) 2 In the power converter 100, the combined capacitance of the resonant capacitor 9, the third capacitor C3, and the second capacitor C2 is set to a ratio of (Td1 / π) 2 (1 / Lr) has a small value, which makes it easier to perform zero-voltage soft switching of the first switching element 1U (in other words, allows reducing the possibility that the first switching element 1U is hard switched).

[0124] Furthermore, in the power converter 100, the combined capacitance of the resonance capacitor 9, the third capacitor C3, and the second capacitor C2 is set to be a ratio of (1 / 2)·(Td1 / π) 2 ·(1 / Lr) is a small value, which can reduce the possibility that current begins to flow through the first switching element 1U before the voltage V1u across the first switching element 1U drops to zero volts, thereby allowing more reliable zero-voltage soft switching of the first switching element 1U while reducing the increase in switching losses caused by the first switching element 1U.

[0125] Furthermore, in the power converter 100 , the combined capacitance of the third capacitor C3 and the second capacitor C2 is preferably smaller than the capacitance of the resonance capacitor 9 .

[0126] (3.2.2) Discharge operation

[0127] The controller 50 performs a second control operation to discharge the third capacitor C3 of the common mode filter 21. When performing the second control operation, the controller 50 controls the plurality of first switching elements 1, the plurality of second switching elements 2, and the plurality of switches 8 to discharge the third capacitor C3 of the common mode filter 21 via one switch 8 connected to the third capacitor C3 belonging to the plurality of switches 8.

[0128] More specifically, if Fig.10 As shown, for example, the controller 50 discharges from the resonance capacitor 9U and the third capacitor C3 of the common mode filter 21 in the dead time period Td between the end time t33 of the high level period of the control signal SU1 and the start time t34 of the high level period of the control signal SU2.

[0129] If the controller 50 performs the second control operation, Fig.10As shown in FIG. 1 , the dead time period Td overlaps with the high level period of the control signal SU7. Fig.12 As shown, the third current I13 is discharged from the resonant capacitor 9U by causing the third current I13 to flow from the resonant capacitor 9U through the regenerative capacitor 15 via the second IGBT 7U of the switch 8U. The third current I13 is a part of the resonant current that flows due to LC resonance. The third current I13 flows through a path that passes through the resonant capacitor 9, the switch 8, the resonant inductor L1, and the regenerative capacitor 15 in sequence. In addition, the third capacitor C3 and the second capacitor C2 are discharged by causing the fourth current I14 to flow from the third capacitor C3 of the common mode filter 21 through the regenerative capacitor 15 via the second IGBT 7U of the switch 8U. As a result, both the voltage VC3 across the third capacitor C3 and the voltage VC2 across the second capacitor C2 drop. The fourth current I14 is a part of the resonant current that flows due to LC resonance. The fourth current I14 flows through a path that passes through the third capacitor C3, the switch 8, the resonant inductor L1, the regenerative capacitor 15, and the second capacitor C2 in sequence.

[0130] In the power converter 100, the combined capacitance of the resonant capacitor 9, the third capacitor C3, and the second capacitor C2 is set to be a ratio (Td1 / 2π) 2 (1 / Lr) is a value smaller than (1 / Lr), which makes it easier to perform zero voltage soft switching of the second switching element 2U (in other words, allows reducing the possibility of the second switching element 2U being hard switched). In addition, in the power converter 100, the combined capacitance of the resonant capacitor 9, the third capacitor C3, and the second capacitor C2 is set to be smaller than (Td1 / 2π) 2 ·(1 / Lr) is a small value, which can reduce the possibility that the current Ic2 starts to flow through the second switching element 2U before the voltage V2u across the second switching element 2U drops to zero volts, thereby allowing zero-voltage soft switching of the second switching element 2U to be performed with higher reliability while reducing the increase in switching losses caused by the second switching element 2U.

[0131] Furthermore, in the power converter 100, the combined capacitance of the third capacitor C3 and the second capacitor C2 is preferably smaller than the capacitance of the resonance capacitor 9. This enables the power converter 100 to further reduce the leakage current (common mode current).

[0132] (4) Summary

[0133] The power converter 100 according to the first embodiment includes a plurality of switches 8, a plurality of resonant capacitors 9, at least one resonant inductor L1, a controller 50, a voltage divider circuit 20, and a plurality of common mode filters 21. In the power converter 100, the controller 50 controls a plurality of first switching elements 1, a plurality of second switching elements 2, and a plurality of switches 8. The voltage divider circuit 20 includes a first capacitor C1 and a second capacitor C2 connected in series. In the voltage divider circuit 20, the first capacitor C1 is connected to the first DC terminal 31, and the second capacitor C2 is connected to the second DC terminal 32. The voltage divider circuit 20 has an intermediate potential node N1 between the first capacitor C1 and the second capacitor C2. The plurality of common mode filters 21 are arranged one-to-one for the plurality of switching circuits 10. Each common mode filter in the plurality of common mode filters 21 includes a third capacitor C3 connected between the connection node 3 of the corresponding switching circuit in the plurality of switching circuits 10 and the intermediate potential node N1.

[0134] The power converter 100 according to the first embodiment can reduce noise while reducing switching losses. More specifically, the power converter 100 according to the first embodiment includes a plurality of common mode filters 21 each including a third capacitor C3, thereby reducing the possibility of noise in the U phase, V phase and W phase leaking from the AC terminals 41U, 41V, 41W toward the AC load RA1, and thereby enabling noise reduction. The power converter 100 according to the first embodiment can charge the third capacitor C3 connected to the resonant capacitor 9 while charging the resonant capacitor 9 via the switch 8 to perform zero voltage soft switching of the first switching element 1, thereby allowing the switching loss caused by the first switching element 1 to be reduced. In addition, the power converter 100 according to the first embodiment can also discharge from the third capacitor C3 connected to the resonant capacitor 9 while discharging from the resonant capacitor 9 via the switch 8 to perform zero voltage soft switching of the second switching element 2, thereby allowing the switching loss caused by the second switching element 2 to be reduced.

[0135] In the power converter 100, as Fig.13 As shown, for example, a ground line 110 connected to the AC load RA1 is connected to the intermediate potential node N1 via the chassis 101 of the power converter 100. The power converter 100 can reduce the common mode current Ico flowing from the AC load RA1 via the ground line 110 and the chassis 101.

[0136] (5) Modification of the First Embodiment

[0137] (5.1) First Modification

[0138] In the power converter 100A according to the first modification, as Fig.14As shown, a plurality of common mode filters 21 are connected to the intermediate potential node N1 via the chassis 101, which is different from the power converter 100 according to the first embodiment. In the following description, any constituent element in the power converter 100A according to the first modification example having the same function as the corresponding portion of the power converter 100 according to the first embodiment described above will be designated by the same reference numerals as those of the corresponding portion, and description thereof will be omitted herein.

[0139] The power converter 100A according to the first modification can reduce the common mode current Ico flowing from the AC load RA1 via the ground line 110 and the rack 101 .

[0140] (5.2) Second Modification

[0141] In the power converter 100F according to the second modification, as Fig.15 As shown, each common mode filter in the plurality of common mode filters 21 includes an inductor L3 connected in series to the third capacitor C3. The inductor L3 included in each common mode filter 21 can be, for example, arranged between a connection node where its corresponding switch 8 and the resonant capacitor 9 are connected to each other and its third capacitor C3. However, this is only an example and should not be construed as limiting. Alternatively, each inductor L3 can also be arranged between its corresponding third capacitor C3 and the second capacitor C2.

[0142] In the second modification, if the length of the dead time period Td is Td1, the inductance of each resonant inductor L1 is Lr, and the inductance of the inductor L3 of each common mode filter in the plurality of common mode filters 21 is L0, the combined capacitance of the resonant capacitor 9, the third capacitor C3, and the second capacitor C2 is less than (Td1 / π) 2 ·{1 / (Lr+L0)}. In this case, the combined capacitance is more preferably less than (1 / 2)(Td1 / π) 2 ·{1 / (Lr+L0)}.

[0143] (Second embodiment)

[0144] Reference Fig.16 In the following description, any constituent element in the power converter 100B according to the second embodiment having the same function as the corresponding portion of the power converter 100 according to the first embodiment described above will be designated by the same reference numeral as that of the corresponding portion, and the description thereof will be omitted herein.

[0145] The power converter 100B according to the second embodiment also includes a regenerative capacitor 16 (hereinafter referred to as the "second regenerative capacitor 16") connected between the sixth end 154 of the regenerative capacitor 15 (hereinafter referred to as the "first regenerative capacitor 15") and the first DC terminal 31, which is different from the power converter 100 according to the first embodiment described above.

[0146] The second regenerative capacitor 16 is connected in series to the first regenerative capacitor 15. Thus, in this power converter 100B, a series circuit of the second regenerative capacitor 16 and the first regenerative capacitor 15 is connected between the first DC terminal 31 and the second DC terminal 32. The capacitance of the second regenerative capacitor 16 is equal to the capacitance of the first regenerative capacitor 15. As used herein, the expression "the capacitance of the second regenerative capacitor 16 is equal to the capacitance of the first regenerative capacitor 15" refers not only to the case where the capacitance of the second regenerative capacitor 16 is exactly equal to the capacitance of the first regenerative capacitor 15, but also includes the case where the capacitance of the second regenerative capacitor 16 is equal to or greater than 95% of the capacitance of the first regenerative capacitor 15 and equal to or less than 105% of the capacitance of the first regenerative capacitor 15.

[0147] In the power converter 100B according to the second embodiment, the voltage V15 across the first regenerative capacitor 15 (i.e., the potential at the sixth terminal 154 of the first regenerative capacitor 15) has a value calculated by dividing the voltage value Vd of the DC power supply E1 by 2, which is the number of capacitors (i.e., the second regenerative capacitor 16 and the first regenerative capacitor 15). Thus, the voltage V15 across the first regenerative capacitor 15 is Vd / 2. In the power converter 100B according to the second embodiment, the controller 50 may store the value of the voltage V15 across the first regenerative capacitor 15 in advance.

[0148] The controller 50 of the power converter 100B according to the second embodiment operates in the same manner as the controller 50 of the power converter 100 according to the first embodiment. Thus, the power converter 100B according to the second embodiment can also reduce noise while reducing switching loss like the power converter 100 according to the first embodiment.

[0149] (Third Embodiment)

[0150] Reference Fig.17 A power converter 100C according to a third embodiment will be described. In the following description, any constituent element in the power converter 100C according to the third embodiment having the same function as the corresponding portion of the power converter 100 according to the first embodiment described above will be designated by the same reference numeral as that of the corresponding portion, and description thereof will be omitted herein.

[0151] The power converter 100C further includes a second voltage dividing circuit 22 provided separately from the voltage dividing circuit 20 (hereinafter referred to as "first voltage dividing circuit 20"). The second voltage dividing circuit 22 is connected between the first DC terminal 31 and the second DC terminal 32 as is the first voltage dividing circuit 20. Thus, the second voltage dividing circuit 22 is connected in parallel to the first voltage dividing circuit 20.

[0152] The second voltage dividing circuit 22 includes a fourth capacitor C4 and a fifth capacitor C5 connected in series. In the second voltage dividing circuit 22, the fourth capacitor C4 is connected to the first DC terminal 31 and the fifth capacitor C5 is connected to the second DC terminal 32. The second voltage dividing circuit 22 has a neutral point N2 between the fourth capacitor C4 and the fifth capacitor C5. The intermediate potential node N1 is electrically isolated from the neutral point N2.

[0153] In the power converter 100C, the ground line 110 connected to the AC load RA1 is connected to the neutral point N2 via the frame 101 of the power converter 100C, which is different from the power converter 100 according to the first embodiment.

[0154] In the power converter 100C according to the second embodiment, the common mode current Ico flowing from the AC load RA1 via the ground line 110 and the chassis 101 passes through the neutral point N2. Thus, the power converter 100C can reduce the possibility of leakage current flowing through the third capacitor C3 of each of the plurality of common mode filters 21.

[0155] (Fourth embodiment)

[0156] Reference Figures 18 to 21 In the following description, any constituent element in the power converter 100D according to the fourth embodiment having the same function as the corresponding portion of the power converter 100 according to the first embodiment described above will be designated by the same reference numeral as the reference numeral of the corresponding portion, and its description will be omitted herein. Fig.18 Omitted Fig.19 The protection circuit 17 is shown in the figure, and Fig.19 Omitted Fig.18 A diagram of a plurality of common mode filters 21 is shown.

[0157] (1) Configuration

[0158] like Fig.18As shown, the power converter 100D includes only one resonant inductor L1, which is different from the power converter 100 according to the first embodiment. In the power converter 100D, the resonant inductor L1 is commonly shared by a plurality of resonant circuits. In the power converter 100D, the third end of the resonant inductor L1 is connected to the common connection node 25. The second ends 82 of the plurality of switches 8 are commonly connected to the common connection node 25.

[0159] In addition, the power converter 100D includes only one protection circuit 17 (refer to Fig.19 ), which is another difference from the power converter 100 according to the first embodiment.

[0160] In the power converter 100D, the third diode 13 of the protection circuit 17 is connected between the common connection node 25 and the first DC terminal 31. In the third diode 13, the anode of the third diode 13 is connected to the common connection node 25. In the third diode 13, the cathode of the third diode 13 is connected to the first DC terminal 31. The fourth diode 14 of the protection circuit 17 is connected between the common connection node 25 and the second DC terminal 32. In the fourth diode 14, the anode of the fourth diode 14 is connected to the second DC terminal 32. In the fourth diode 14, the cathode of the fourth diode 14 is connected to the common connection node 25. Thus, the fourth diode 14 is connected in series to the third diode 13.

[0161] (2) Operation of power converter

[0162] In the power converter 100D, as in the power converter 100, the controller 50 also controls a plurality of (e.g., three) first switching elements 1, a plurality of (e.g., three) second switching elements 2, and a plurality of (e.g., three) switches 8. The controller 50 performs basic operation and shift control operation.

[0163] (2.1) Basic operations

[0164] The basic operation performed by the controller 50 is the same as that performed by the controller 50 in the power converter 100 according to the first embodiment. The basic operation is an operation performed when the resonant currents respectively passing through two or more switches 8 belonging to the plurality of switches 8 do not flow through the resonant inductor L1 at the same time.

[0165] (2.2) Shift control operation

[0166] The shift control operation is an operation performed when the controller 50 determines that the resonant currents respectively passing through two or more switches 8 belonging to the plurality of switches 8 flow simultaneously.

[0167] When it is determined that the resonant currents respectively passing through two switches 8 belonging to the plurality of switches 8 flow through the resonant inductor L1 at the same time, the controller 50 performs a shift control operation for shifting the high level period of the control signal for one of the two switches 8 to prevent the resonant currents respectively passing through the two switches 8 from flowing through the resonant inductor L1 at the same time. As used herein, the expression “when it is determined that the resonant currents respectively passing through two switches 8 belonging to the plurality of switches 8 flow through at the same time” means that it has been presumed in advance that the resonant currents respectively passing through the two switches 8 will flow through the resonant inductor L1 at the same time.

[0168] (2.2.1) Determine whether the two-phase resonant current flows simultaneously

[0169] In the power converter 100D, the phases of the three-phase (i.e., U-phase, V-phase, and W-phase) voltage commands are different from each other by 120 degrees, but the command values ​​of the two-phase voltage commands are close to each other every 60 degrees of electrical angle, and the duty ratios of the two-phase control signals are close to each other (refer to Figure 5 Specifically, in the areas A1 and A2 shown in FIG. Figure 5 In the region A1 shown in FIG. 1 , the duty ratio of the U-phase control signal and the duty ratio of the V-phase control signal are around 0.75. Figure 5 In the region A2 shown, the duty ratio of the U-phase control signal and the duty ratio of the V-phase control signal become around 0.25. The polarity of the resonant current is the same as the polarity of the current iL1. In the region A1, the polarity of the resonant current is positive. In the region A2, the polarity of the resonant current is negative. In the region A1, the start time t1 of the high level period of the control signal SU6 to be applied to the first IGBT 6U (reference Figure 3 ) and the start time t5 of the high level period of the control signal SV6 to be applied to the first IGBT 6V (reference Figure 3 ) becomes so short within one cycle time of the carrier signal that the U-phase resonant current and the V-phase resonant current may flow through the resonant inductor L1 at the same time. In the power converter 100D, the direction of the resonant current in the region A2 is opposite to the direction of the resonant current in the region A1, but the U-phase resonant current and the V-phase resonant current may flow through the resonant inductor L1 at the same time.

[0170] Assuming that the capacitance of each of the plurality of resonant capacitors 9U, 9V, and 9W is Cr, if the U-phase current and the V-phase current flow through the resonant inductor L1 simultaneously, a capacitor having a combined capacitance (= 2×Cr) of the resonant capacitor 9U and the resonant capacitor 9V is connected in series to the resonant inductor L1 in the equivalent circuit. Thus, in the power converter 100D, if two-phase currents flow through the resonant inductor L1 simultaneously, the resonant frequency of the resonant circuit including the resonant inductor L1 changes compared to the case where a single-phase current flows through the resonant inductor L1. As a result, the power converter 100D may not be able to perform zero-voltage soft switching.

[0171] (2.2.2) Case of charging operation of resonant capacitor

[0172] Reference will be made Figure 3 to exemplary boundary conditions between a case where the U-phase resonant current and the V-phase resonant current do not overlap with each other (i.e., do not flow simultaneously) and a case where the U-phase resonant current and the V-phase resonant current overlap with each other (i.e., flow simultaneously).

[0173] In the power converter 100D (reference Fig.18 and Fig.19 ), if the time lag ΔTuv between the start time t3 of the high-level period of the control signal SU1 and the start time t7 of the high-level period of the control signal SV1 is equal to or greater than (Tau + Tav + Td), the U-phase resonant current and the V-phase resonant current do not overlap with each other. On the other hand, if the time lag ΔTuv is less than (Tau + Tav + Td), the U-phase resonant current and the V-phase resonant current overlap with each other. That is, in the case where the threshold value for the time lag ΔTuv is set to (Tau + Tav + Td), if the time lag ΔTuv is less than the threshold value, the controller 50 presumes that the resonant currents corresponding to two phases belonging to the switching circuits 10U and 10V of the plurality of switching circuits 10 will flow through the resonant inductor L1 simultaneously. Note that this threshold value is merely an example, and the threshold value can also be set to any other value. For example, in consideration of errors in the additional time Tau and the additional time Tav, the threshold value can also be set to a value even larger than (Tau + Tav + Td). In addition, the above method for calculating the time lag ΔTuv to determine whether two-phase resonant currents flow simultaneously is merely an example and should not be construed as restrictive. Instead, any other calculation method can be adopted as long as a time lag corresponding to the above time lag can be calculated. For example, as the time lag ΔTuv for determining whether two-phase resonant currents flow simultaneously, the time lag between the end time t2 (hereinafter referred to as "end time t2") of the high-level period of the control signal SU2 and the end time t6 (hereinafter referred to as "end time t6") of the high-level period of the control signal SV2 can also be used.

[0174] In the power converter 100D, if the time lag between the time t3 (hereinafter referred to as "start time t3") at which the high level period of the control signal SU1 starts and the time t11 at which the high level period of the control signal SW1 starts is equal to or greater than (Tau+Taw+Td), the U-phase resonant current and the W-phase resonant current do not overlap with each other. On the other hand, if the time lag is less than (Tau+Taw+Td), the U-phase resonant current and the W-phase resonant current overlap with each other. That is, in the case where the threshold for the time lag is set to (Tau+Taw+Td), if the time lag is less than the threshold, the controller 50 presumes that the resonant current corresponding to the two phases of the switching circuit 10U and the switching circuit 10W belonging to the plurality of switching circuits 10 will flow through the resonant inductor L1 at the same time. Note that the threshold is only an example, and the threshold may also be set to any other value. For example, in the case where the error of the additional time Tau and the error of the additional time Taw are taken into account, the threshold may also be set to a value even larger than (Tau+Taw+Td). In addition, the above-mentioned method for calculating the time lag to determine whether the two-phase resonant current flows simultaneously is only an example and should not be interpreted as limiting. On the contrary, any other calculation method may be used as long as the time lag corresponding to the above-mentioned time lag can be calculated. For example, as the time lag for determining whether the two-phase resonant current flows simultaneously, the end time t2 of the high level period of the control signal SU2 and the control signal SW2 (reference Figure 4 ) and the time lag between the time t10 at which the high level period of the transistor ends (hereinafter referred to as “end time t10”).

[0175] In the power converter 100D, if the time t7 (hereinafter referred to as “start time t7”) at which the high level period of the control signal SV1 to be applied to the first switching element 1V of the switching circuit 10V starts coincides with the time t8 (hereinafter referred to as “start time t8”) at which the control signal SW1 to be applied to the first switching element 1W of the switching circuit 10W starts Figure 4) is equal to or greater than (Tav+Taw+Td), the V-phase resonant current and the W-phase resonant current do not overlap with each other. On the other hand, if the time lag is less than (Tav+Taw+Td), the V-phase resonant current and the W-phase resonant current overlap with each other. That is, in the case where the threshold for the time lag is set to (Tav+Taw+Td), if the time lag is less than the threshold, the controller 50 presumes that the resonant currents corresponding to the two phases of the switching circuit 10V and the switching circuit 10W belonging to the plurality of switching circuits 10 will flow through the resonant inductor L1 at the same time. Note that the threshold is merely an example, and the threshold may also be set to any other value. For example, taking into account the error of the additional time Tav and the error of the additional time Taw, the threshold may also be set to a value even greater than (Tav+Taw+Td). In addition, the above-mentioned method for calculating the time lag to determine whether the two-phase resonant currents flow simultaneously is merely an example and should not be construed as limiting. On the contrary, any other calculation method may be used as long as the time lag corresponding to the above time lag can be calculated. For example, as the time lag for determining whether the two-phase resonant current flows simultaneously, the time lag between the end time t6 of the high level period of the control signal SV2 and the end time t10 of the high level period of the control signal SW2 may also be used.

[0176] (2.2.3) When discharging the resonant capacitor

[0177] In the discharge operation of the resonance capacitor 9 , the controller 50 can also determine whether the two-phase resonance currents flow simultaneously using the same time lag and threshold as in the case of the charging operation of the resonance capacitor 9 .

[0178] For example, if the time lag between the start time of the high level period of the control signal SU2 and the start time of the high level period of the control signal SV2 is less than a threshold value (e.g., Tau+Tav+Td), the controller 50 estimates that the U-phase resonant current and the V-phase resonant current will overlap with each other.

[0179] Furthermore, if the time lag between the start time of the high level period of the control signal SU2 and the start time of the high level period of the control signal SW2 is less than a threshold value (e.g., Tau+Taw+Td), the controller 50 estimates that the U-phase resonant current and the W-phase resonant current will overlap with each other.

[0180] Furthermore, if the time lag between the start time of the high level period of the control signal SV2 and the start time of the high level period of the control signal SW2 is less than a threshold value (eg, Tav+Taw+Td), the controller 50 estimates that the V-phase resonant current and the W-phase resonant current will overlap with each other.

[0181] (2.2.4) Shift control to be performed when it is determined that two-phase resonant current flows simultaneously

[0182] For example, in order to prevent the resonance currents respectively passing through the two switches 8 from flowing through the resonance inductor L1 at the same time, the controller 50 performs shift control including shifting the high level period of the control signal for one of the two switches 8 .

[0183] When performing the shift control, the controller 50 shifts the high level period of the control signal for one of the two switches 8 to prevent the length of the high level period of the control signal to be applied to the first switching element 1 and the second switching element 2 of the one switching circuit 10 corresponding to the one switch 8 from changing. For example, when shifting the high level period of the control signal SU6 or SU7 to be applied to the switch 8U, the controller 50 shifts the high level period of each of the control signals SU1 and SU2, but does not change the duty ratio of each of the control signals SU1 and SU2 in one cycle of the carrier signal. Similarly, for example, when shifting the high level period of the control signal SV6 or SV7 to be applied to the switch 8V, the controller 50 shifts the high level period of each of the control signals SV1 and SV2, but does not change the duty ratio of each of the control signals SV1 and SV2 in one cycle of the carrier signal. In the same manner, for example, when shifting the high level period of the control signal SW6 or SW7 to be applied to the switch 8W, the controller 50 shifts the high level period of each of the control signals SW1 and SW2, but does not change the duty cycle of each of the control signals SW1 and SW2 in one cycle of the carrier signal.

[0184] In the power converter 100D, if the controller 50 has performed shift control to perform soft switching of the first switching element 1, for example, at the time when the control signals SU1, SV1 change from the low level period to the high level period (that is, at the end time of the dead time period Td corresponding to each of the U phase and the V phase), the voltage V2u, V2v across the second switching elements 2U, 2V increases to Vd. That is, if the controller 50 has performed shift control, at the end time of the dead time period Td corresponding to each of the U phase and the V phase, the charging of the resonant capacitors 9U, 9V is completed. Thus, in the power converter 100D, if the controller 50 has performed shift control, the first switching elements 1U, 1V are switched by zero voltage soft switching.

[0185] In the above example, an exemplary shift control to be performed by the controller 50 in the case where the controller 50 has predetermined that the U-phase resonant current and the V-phase resonant current will flow through the resonant inductor L1 at the same time has been described. However, this is merely an example and should not be construed as limiting. For example, even in the case where the controller 50 has predetermined that the V-phase resonant current and the W-phase resonant current will flow through the resonant inductor L1 at the same time, or in the case where the controller 50 has predetermined that the W-phase resonant current and the U-phase resonant current will flow through the resonant inductor L1 at the same time, zero voltage soft switching can be performed by causing the controller 50 to perform shift control.

[0186] In the power converter 100D, if the controller 50 has performed shift control to perform soft switching of the second switching element 2, for example, at the time when the control signals SU2, SV2 change from the low level period to the high level period (that is, at the end time of the dead time period Td corresponding to each of the U phase and the V phase), the voltage V1u, V1v across the first switching element 1U, 1V increases to Vd. That is, if the controller 50 has performed shift control, at the end time of the dead time period Td corresponding to each of the U phase and the V phase, the discharge of the resonant capacitor 9U, 9V is completed. Thus, in the power converter 100D, if the controller 50 has performed shift control, the second switching elements 2U, 2V are switched by zero voltage soft switching.

[0187] In the above example, an exemplary shift control to be performed by the controller 50 in the case where the controller 50 has predetermined that the U-phase resonant current and the V-phase resonant current will flow through the resonant inductor L1 at the same time has been described. However, this is merely an example and should not be construed as limiting. For example, even in the case where the controller 50 has predetermined that the V-phase resonant current and the W-phase resonant current will flow through the resonant inductor L1 at the same time, or in the case where the controller 50 has predetermined that the W-phase resonant current and the U-phase resonant current will flow through the resonant inductor L1 at the same time, zero voltage soft switching can be performed by causing the controller 50 to perform shift control.

[0188] (2.3) Common mode filter operation

[0189] The common mode filter 21 operates in the same manner as the common mode filter 21 of the power converter 100 according to the first embodiment. Thus, in each of the plurality of common mode filters 21, if the controller 50 has performed the first control operation, the third capacitor C3 thereof is charged by LC resonance. Furthermore, in each of the plurality of common mode filters 21, if the controller 50 has performed the second control operation, the third capacitor C3 thereof is discharged by LC resonance.

[0190] (2.3.1) Charging operation

[0191] The controller 50 charges the third capacitor C3 of each common mode filter 21 by performing a first control operation. When performing the first control operation, the controller 50 controls the plurality of first switching elements 1, the plurality of second switching elements 2, and the plurality of switches 8 to charge the third capacitor C3 connected to the switch 8 via one of the plurality of switches 8.

[0192] If the controller 50 performs the first control operation, Fig.10 As shown in FIG. 1 , the dead time period Td overlaps with the high level period of the control signal SU6. Fig. 20 As shown, the resonant capacitor 9U is charged by the first current I11 flowing from the regenerative capacitor 15 via the first IGBT 6U of the switch 8U through the resonant capacitor 9U. The first current I11 is a part of the resonant current flowing due to LC resonance. The first current I11 flows through a path that passes through the regenerative capacitor 15, the resonant inductor L1, the switch 8, and the resonant capacitor 9 in sequence. In addition, the third capacitor C3 and the second capacitor C2 are also charged by the second current I12 flowing from the regenerative capacitor 15 via the first IGBT 6U of the switch 8U through the third capacitor C3 of the common mode filter 21. The second current I12 is a part of the resonant current flowing due to LC resonance. The second current I12 flows through a path that passes through the regenerative capacitor 15, the resonant inductor L1, the switch 8, the third capacitor C3, and the second capacitor C2 in sequence.

[0193] In the power converter 100D, if the length of the dead time period Td is Td1 and the inductance of the resonant inductor L1 is Lr, the combined capacitance of the resonant capacitor 9, the third capacitor C3 and the second capacitor C2 may be, for example, less than 4·(Td1 / π) 2 In this case, the combined capacitance of the resonance capacitor 9, the third capacitor C3, and the second capacitor C2 is more preferably smaller than (Td1 / π) 2 In the power converter 100D, the combined capacitance of the resonant capacitor 9, the third capacitor C3, and the second capacitor C2 is set to a ratio of (Td1 / π) 2 (1 / Lr) has a small value, which makes it easier to perform zero-voltage soft switching of the first switching element 1U (in other words, allows reducing the possibility that the first switching element 1U is hard switched).

[0194] Furthermore, in the power converter 100D, the combined capacitance of the resonance capacitor 9, the third capacitor C3, and the second capacitor C2 is set to a ratio of (1 / 2)·(Td1 / π) 2·(1 / Lr) is a small value, which can reduce the possibility that current begins to flow through the first switching element 1U before the voltage V1u across the first switching element 1U drops to zero volts, thereby allowing more reliable zero-voltage soft switching of the first switching element 1U while reducing the increase in switching losses caused by the first switching element 1U.

[0195] Furthermore, in the power converter 100D, the combined capacitance of the third capacitor C3 and the second capacitor C2 is preferably smaller than the capacitance of the resonance capacitor 9. This enables the power converter 100D to further reduce the leakage current (ie, the common mode current).

[0196] (2.3.2) Discharge operation

[0197] The controller 50 performs a second control operation to discharge the third capacitor C3 of each common mode filter 21. When performing the second control operation, the controller 50 controls the plurality of first switching elements 1, the plurality of second switching elements 2, and the plurality of switches 8 to discharge the third capacitor C3 of the common mode filter 21 via one switch 8 connected to the third capacitor C3 belonging to the plurality of switches 8.

[0198] More specifically, if Fig.10 As shown, for example, the controller 50 discharges from the resonance capacitor 9U and the third capacitor C3 of the common mode filter 21 in the dead time period Td between the end time of the high level period of the control signal SU1 and the start time of the high level period of the control signal SU2.

[0199] If the controller 50 performs the second control operation, Fig.10 As shown in FIG. 1 , the dead time period Td overlaps with the high level period of the control signal SU7. Fig.21 As shown, the third current I13 is discharged from the resonant capacitor 9U by causing the third current I13 to flow from the resonant capacitor 9U via the second IGBT 7U of the switch 8U through the regenerative capacitor 15. The third current I13 is a part of the resonant current that flows due to LC resonance. The third current I13 flows through a path that passes through the resonant capacitor 9, the switch 8, the resonant inductor L1, and the regenerative capacitor 15 in sequence. In addition, the third capacitor C3 and the second capacitor C2 are also discharged by causing the fourth current I14 to flow from the third capacitor C3 of the common mode filter 21 via the second IGBT 7U of the switch 8U through the regenerative capacitor 15. The fourth current I14 is a part of the resonant current that flows due to LC resonance. The fourth current I14 flows through a path that passes through the third capacitor C3, the switch 8, the resonant inductor L1, the regenerative capacitor 15, and the second capacitor C2 in sequence.

[0200] In the power converter 100D, the combined capacitance of the resonant capacitor 9, the third capacitor C3, and the second capacitor C2 is set to be the ratio (Td1 / π) 2 ·(1 / Lr) smaller value, which makes it easier to perform zero voltage soft switching of the second switching element 2U (in other words, allows reducing the possibility of the second switching element 2U being hard switched). In addition, in the power converter 100D, the combined capacitance of the resonant capacitor 9, the third capacitor C3, and the second capacitor C2 is set to be smaller than (1 / 2)·(Td1 / π) 2 ·(1 / Lr) is a small value, which can reduce the possibility that the current Ic2 starts to flow through the second switching element 2U before the voltage V2u across the second switching element 2U drops to zero volts, thereby allowing zero-voltage soft switching of the second switching element 2U to be performed with higher reliability while reducing the increase in switching losses caused by the second switching element 2U.

[0201] Furthermore, in the power converter 100D, the combined capacitance of the third capacitor C3 and the second capacitor C2 is preferably smaller than the capacitance of the resonance capacitor 9 .

[0202] (3) Summary

[0203] The power converter 100D according to the fourth embodiment includes a plurality of switches 8, a plurality of resonant capacitors 9, a resonant inductor L1, a controller 50, a voltage divider circuit 20, and a plurality of common mode filters 21. In the power converter 100D, the controller 50 controls a plurality of first switching elements 1, a plurality of second switching elements 2, and a plurality of switches 8. The voltage divider circuit 20 includes a first capacitor C1 and a second capacitor C2 connected in series. In the voltage divider circuit 20, the first capacitor C1 is connected to the first DC terminal 31 and the second capacitor C2 is connected to the second DC terminal 32. The voltage divider circuit 20 has an intermediate potential node N1 between the first capacitor C1 and the second capacitor C2. The plurality of common mode filters 21 are arranged one-to-one for the plurality of switching circuits 10. Each common mode filter in the plurality of common mode filters 21 includes a third capacitor C3 connected between the connection node 3 of the corresponding switching circuit in the plurality of switching circuits 10 and the intermediate potential node N1.

[0204] The power converter 100D according to the fourth embodiment can reduce noise while reducing switching losses. More specifically, the power converter 100D according to the fourth embodiment includes a plurality of common-mode filters 21 each including a third capacitor C3, thereby reducing the possibility of noise in the U-phase, V-phase, and W-phase leaking from the AC terminals 41U, 41V, 41W toward the AC load RA1, and thereby enabling noise reduction. The power converter 100D according to the fourth embodiment can charge the third capacitor C3 connected to the resonant capacitor 9 while charging the resonant capacitor 9 via the switch 8 for zero-voltage soft switching of the first switching element 1, thereby allowing reduction of the switching losses caused by the first switching element 1. In addition, the power converter 100D according to the fourth embodiment can also discharge the third capacitor C3 connected to the resonant capacitor 9 while discharging from the resonant capacitor 9 via the switch 8 for zero-voltage soft switching of the second switching element 2, thereby allowing reduction of the switching losses caused by the second switching element 2.

[0205] In addition, in the power converter 100D according to the fourth embodiment, the number of the provided resonant inductors L1 is one, and the second ends 82 of the plurality of switches 8 are commonly connected to a single resonant inductor L1. Thus, the power converter 100D according to the fourth embodiment can contribute to miniaturization.

[0206] In addition, in the power converter 100D according to the fourth embodiment, when it is determined that the resonant currents respectively passing through two switches 8 belonging to the plurality of switches 8 simultaneously flow through the single resonant inductor L1, the controller 50 performs control for shifting the high-level periods of the control signals for each of the two switches 8 to prevent the resonant currents respectively passing through the two switches 8 from simultaneously flowing through the resonant inductor L1. This enables the power converter 100D according to the fourth embodiment to perform soft switching more reliably.

[0207] (4) Variation of the fourth embodiment

[0208] (4.1) First variation

[0209] Reference will be made to Fig. 22 to describe the power converter 100D according to the first variation. In the following description, any component in the power converter 100D according to the first variation that has the same function as the corresponding part of the power converter 100D according to the fourth embodiment described above will be designated by the same reference numeral as that of the corresponding part, and its description will be omitted herein.

[0210] In the power converter 100D according to the first modification, in each of the plurality of switches 8, the first IGBT 6 and the second IGBT 7 are connected in anti-series. In the power converter 100D according to the first modification, in each of the plurality of switches 8, the collector terminal of the first IGBT 6 and the collector terminal of the second IGBT 7 are connected to each other, the emitter terminal of the first IGBT 6 is connected to the connection node 3 of the corresponding switching circuit in the plurality of switching circuits 10, and the emitter terminal of the second IGBT 7 is connected to the common connection node 25. In addition, each of the plurality of switches 8 further includes a diode 61 connected in anti-parallel to the first IGBT 6 and a diode 71 connected in anti-parallel to the second IGBT 7.

[0211] In the power converter 100D according to the first modification, each of the first IGBT 6 and the second IGBT 7 may be replaced with a MOSFET or a bipolar transistor. In this case, Fig. 22 The diode 61 and the diode 71 shown can each be replaced with, for example, a parasitic diode of a replacement element or an element built into one chip of the replacement element. In addition, in the power converter 100D according to the first modification, the diode 61 and the diode 71 do not necessarily have to be provided as external elements for the first IGBT 6 and the second IGBT 7, respectively, but can also be elements built into one chip.

[0212] The controller 50 may operate in the same manner as, for example, the controller 50 according to the fourth embodiment.

[0213] (4.2) Second Modification

[0214] Reference Fig.23 In the following description, any constituent element in the power converter 100D according to the second modification example having the same function as the corresponding portion of the power converter 100D according to the fourth embodiment described above will be designated by the same reference numeral as that of the corresponding portion, and the description thereof will be omitted herein.

[0215] In the power converter 100D according to the second modification, in each of the plurality of switches 8, the first IGBT 6 and the second IGBT 7 thereof are connected in anti-series. In the power converter 100D according to the second modification, in each of the plurality of switches 8, the emitter terminal of the first IGBT 6 and the emitter terminal of the second IGBT 7 are connected to each other, the collector terminal of the first IGBT 6 is connected to the common connection node 25, and the collector terminal of the second IGBT 7 is connected to the connection node 3 of the corresponding switching circuit in the plurality of switching circuits 10. In addition, each of the plurality of switches 8 further includes a diode 61 connected in anti-parallel to the first IGBT 6 and a diode 71 connected in anti-parallel to the second IGBT 7.

[0216] In the power converter 100D according to the second modification, each of the first IGBT 6 and the second IGBT 7 may be replaced with a MOSFET or a bipolar transistor. In this case, Fig.23 The diode 61 and the diode 71 shown can each be replaced with, for example, a parasitic diode of a replacement element or an element built into one chip of the replacement element. In addition, in the power converter 100D according to the second modification, the diode 61 and the diode 71 do not necessarily have to be provided as external elements for the first IGBT 6 and the second IGBT 7, respectively, but can also be elements built into one chip.

[0217] The controller 50 may operate in the same manner as, for example, the controller 50 according to the fourth embodiment.

[0218] (4.3) Third Modification

[0219] Reference Fig.24 In the following description, any constituent element in the power converter 100D according to the third modification example having the same function as the corresponding portion of the power converter 100D according to the fourth embodiment described above will be designated by the same reference numeral as that of the corresponding portion, and the description thereof will be omitted herein.

[0220] In the power converter 100D according to the third modification, in each of the plurality of switches 8, the first MOSFET 6A and the second MOSFET 7A are connected in anti-series. In the power converter 100D according to the third modification, in each of the plurality of switches 8, the drain terminal of the first MOSFET 6A and the drain terminal of the second MOSFET 7A are connected to each other. In addition, each of the plurality of switches 8 further includes a diode 61 connected in anti-parallel to the first MOSFET 6A and a diode 71 connected in anti-parallel to the second MOSFET 7A. In each of the plurality of switches 8, the source terminal of the second MOSFET 7A is connected to the common connection node 25. In each of the plurality of switches 8, the source terminal of the first MOSFET 6A is connected to the connection node 3 of the switching circuit 10 corresponding to the switch 8 including the first MOSFET 6A. Control signals SU6 and SU7 are applied from the controller 50 to the first MOSFET 6A and the second MOSFET 7A of the switch 8U, respectively. Control signals SV6 and SV7 are applied from the controller 50 to the first MOSFET 6A and the second MOSFET 7A of the switch 8V, respectively. Control signals SW6, SW7 are applied from the controller 50 to the first MOSFET 6A and the second MOSFET 7A of the switch 8W, respectively.

[0221] The controller 50 may operate in the same manner as, for example, the controller 50 according to the fourth embodiment.

[0222] (4.4) Fourth Modification

[0223] Reference Fig.25 In the following description, any constituent element in the power converter 100D according to the fourth modification example having the same function as the corresponding portion of the power converter 100D according to the fourth embodiment described above will be designated by the same reference numeral as that of the corresponding portion, and the description thereof will be omitted herein.

[0224] In the power converter 100D according to the fourth modification, the diode 63 is connected in series to the first MOSFET 6A, and the diode 73 is connected in series to the second MOSFET 7A in each of the plurality of switches 8. In the power converter 100D according to the fourth modification, the series circuit of the first MOSFET 6A and the diode 63 and the series circuit of the second MOSFET 7A and the diode 73 are connected in anti-parallel to each other.

[0225] The controller 50 may operate in the same manner as, for example, the controller 50 according to the fourth embodiment.

[0226] (4.5) Fifth Modification

[0227] Reference Fig.26 In the following description, any constituent element in the power converter 100D according to the fifth modification example having the same function as the corresponding portion of the power converter 100D according to the fourth embodiment described above will be designated by the same reference numeral as that of the corresponding portion, and the description thereof will be omitted herein.

[0228] In the power converter 100D according to the fifth modification, each of the plurality of switches 8 includes: a MOSFET 80; a diode 83, which is connected in anti-parallel to the MOSFET 80; a series circuit of two diodes 84, 85, which are connected in anti-parallel to the MOSFET 80; and a series circuit of two diodes 86, 87, which are connected in anti-parallel to the MOSFET 80. In each of the plurality of switches 8, a connection node between the diodes 84, 85 in the switch 8 (i.e., a first end 81 of the switch 8) is connected to a connection node 3 of a corresponding switching circuit in the plurality of switching circuits 10, and a connection node between the diodes 86, 87 (i.e., a second end 82 of the switch 8) is connected to a common connection node 25. In each of the switches 8, when the MOSFET 80 is turned on, the switch 8 is turned on. On the other hand, when the MOSFET 80 is turned off, the switch 8 is turned off.

[0229] The MOSFETs 80 of the plurality of switches 8 are controlled by the controller 50. The controller 50 outputs a control signal SU8 for controlling the on / off state of the MOSFET 80 of the switch 8U, a control signal SV8 for controlling the on / off state of the MOSFET 80 of the switch 8V, and a control signal SW8 for controlling the on / off state of the MOSFET 80 of the switch 8W.

[0230] In each switch 8, when the MOSFET 80 thereof is turned on, a resonant current generated by the resonant circuit including the resonant inductor L1 and the resonant capacitor 9 flows. In the power converter 100D, during the charging operation of the resonant capacitor 9, the charging current including the resonant current flows along a path that passes through the regenerative capacitor 15, the resonant inductor L1, the diode 86, the MOSFET 80, the diode 85, and the resonant capacitor 9 in sequence when one of the plurality of switches 8 is turned on. Furthermore, in the power converter 100D, during the discharging operation of the resonant capacitor 9, the discharging current including the resonant current flows along a path that passes through the resonant capacitor 9, the diode 84, the MOSFET 80, the diode 87, the resonant inductor L1, and the resonant capacitor 15 in sequence when one of the plurality of switches 8 is turned on.

[0231] In the power converter 100D according to the fifth modification, each of the plurality of MOSFETs 80 may be replaced with an IGBT. In addition, in the power converter 100D according to the fifth modification, each of the plurality of switches 8 may include, for example, a bipolar transistor or a GaN-based gate injection transistor (GIT) instead of the MOSFET 80.

[0232] The controller 50 may operate in the same manner as, for example, the controller 50 according to the fourth embodiment.

[0233] (4.6) Sixth Modification

[0234] Will refer to Fig. 27 In the following description, any constituent element in the power converter 100D according to the sixth modification example having the same function as the corresponding portion of the power converter 100D according to the fourth embodiment described above will be designated by the same reference numeral as that of the corresponding portion, and the description thereof will be omitted herein.

[0235] In the power converter 100D according to the sixth modification, each of the plurality of switches 8 is a dual-gate GaN-based GIT including a first source terminal, a first gate terminal, a second gate terminal, and a second source terminal. In the power converter 100D according to the sixth modification, a control signal SU6 is applied between the first gate terminal and the first source terminal of the dual-gate GaN-based GIT used as switch 8U, and a control signal SU7 is applied between its second gate terminal and the second source terminal. In addition, a control signal SV6 is applied between the first gate terminal and the first source terminal of the dual-gate GaN-based GIT used as switch 8V, and a control signal SV7 is applied between its second gate terminal and the second source terminal. In addition, a control signal SW6 is applied between the first gate terminal and the first source terminal of the dual-gate GaN-based GIT used as switch 8W, and a control signal SW7 is applied between its second gate terminal and the second source terminal.

[0236] The controller 50 may operate in the same manner as, for example, the controller 50 according to the fourth embodiment.

[0237] (Fifth Embodiment)

[0238] Will refer to Fig.28 In the following description, any constituent element in the power converter 100E according to the fifth embodiment having the same function as the corresponding portion of the power converter 100D according to the fourth embodiment described above will be designated by the same reference numeral as that of the corresponding portion, and the description thereof will be omitted herein.

[0239] The power converter 100E according to the fifth embodiment also includes another regenerative capacitor 16 (hereinafter referred to as the "second regenerative capacitor 16") connected between the sixth end 154 of the regenerative capacitor 15 (hereinafter referred to as the "first regenerative capacitor 15") and the first DC terminal 31, which is different from the power converter 100D according to the fourth embodiment.

[0240] The second regenerative capacitor 16 is connected in series to the first regenerative capacitor 15. Thus, in this power converter 100E, a series circuit of the second regenerative capacitor 16 and the first regenerative capacitor 15 is connected between the first DC terminal 31 and the second DC terminal 32. The capacitance of the second regenerative capacitor 16 is equal to the capacitance of the first regenerative capacitor 15. As used herein, the expression "the capacitance of the second regenerative capacitor 16 is equal to the capacitance of the first regenerative capacitor 15" refers not only to the case where the capacitance of the second regenerative capacitor 16 is exactly equal to the capacitance of the first regenerative capacitor 15, but also to the case where the capacitance of the second regenerative capacitor 16 is equal to or greater than 95% of the capacitance of the first regenerative capacitor 15 and equal to or less than 105% of the capacitance of the first regenerative capacitor 15.

[0241] In the power converter 100E according to the fifth embodiment, the voltage V15 across the first regenerative capacitor 15 (i.e., the potential at the sixth terminal 154 of the first regenerative capacitor 15) has a value calculated by dividing the voltage value Vd of the DC power supply E1 by 2, which is the number of capacitors (i.e., the second regenerative capacitor 16 and the first regenerative capacitor 15). Thus, the voltage V15 across the first regenerative capacitor 15 is Vd / 2. In the power converter 100E according to the fourth embodiment, the controller 50 may store the value of the voltage V15 across the first regenerative capacitor 15 in advance.

[0242] The controller 50 of the power converter 100E according to the fifth embodiment operates in the same manner as the controller 50 of the power converter 100D according to the fourth embodiment. Thus, the power converter 100E according to the fifth embodiment can reduce noise while reducing switching loss, like the power converter 100D according to the fourth embodiment.

[0243] (Other Modifications)

[0244] Note that the first to fifth embodiments and their variants described above are merely exemplary embodiments of the various embodiments and their variants of the present disclosure and should not be construed as limiting. On the contrary, the first to fifth exemplary embodiments and their variants can be easily modified in various ways according to design choices or any other factors without departing from the scope of the present disclosure.

[0245] For example, the operation of "determining that two-phase resonant currents flow simultaneously" performed by the controller 50 of the power converter 100D according to the fourth embodiment is not limited to the operation of "determining that two-phase resonant currents flow simultaneously" when the time lag described in the fourth embodiment is less than the threshold.

[0246] Alternatively, if any one of the current difference between the U-phase load current iU and the V-phase load current iV, the current difference between the V-phase load current iV and the W-phase load current iW, and the current difference between the W-phase load current iW and the U-phase load current iU is less than the current difference threshold, the controller 50 can determine that the two-phase resonant currents are flowing simultaneously.

[0247] Alternatively, if the electrical angle determined by calculation or the estimated electrical angle based on sensor information provided by a sensor device for detecting the number of revolutions of the motor (such as an encoder or a rotary transformer, etc.) falls within a first rotation angle range (e.g., equal to or greater than 55 degrees and equal to or less than 65 degrees), or a second rotation angle range (e.g., equal to or greater than 115 degrees and equal to or less than 125 degrees), or a third rotation angle range (e.g., equal to or greater than 175 degrees and equal to or less than 185 degrees), or a fourth rotation angle range (e.g., equal to or greater than 235 degrees and equal to or less than 245 degrees), or a fifth rotation angle range (e.g., equal to or greater than 295 degrees and equal to or less than 305 degrees), or a sixth rotation angle range (e.g., equal to or greater than 355 degrees and equal to or less than 365 degrees), the controller 50 can determine that "two-phase resonant currents flow simultaneously."

[0248] In addition, each switching element in the plurality of first switching elements 1 and the plurality of second switching elements 2 does not necessarily have to be an IGBT, but may also be a MOSFET. In this case, each first diode in the plurality of first diodes 4 may be replaced with, for example, a parasitic diode of a MOSFET used as its corresponding first switching element 1. In addition, each second diode in the plurality of second diodes 5 may be replaced with, for example, a parasitic diode of a MOSFET used as its corresponding second switching element 2. The MOSFET may be, for example, a Si-based MOSFET or a SiC-based MOSFET. Each switching element in the plurality of first switching elements 1 and the plurality of second switching elements 2 may also be, for example, a bipolar transistor or a GaN-based GIT.

[0249] Optionally, in power converters 100, 100A, 100B, 100C, 100D, 100E, 100F, if each of the multiple resonant capacitors 9 has a relatively small capacitance, instead of setting the multiple resonant capacitors 9 as separate elements, parasitic capacitors across the multiple second switching elements 2 can also be used as multiple resonant capacitors 9.

[0250] Furthermore, the length of the dead time period Td does not necessarily have to be set to be as long as one resonance half cycle, but may also be set to be different from one resonance half cycle.

[0251] The dead time period Td may also be set by a dead time generation circuit included in a gate driver integrated circuit (IC) provided separately from the controller 50. Alternatively, the controller 50 may include a gate driver IC, and the dead time generation circuit included in the gate driver IC may set the dead time period Td.

[0252] Furthermore, the power converters 100 , 100A, 100B, 100C, 100D, 100E, 100F are not necessarily configured to output three-phase AC power, but may be configured to output multi-phase AC power having more than three phases.

[0253] (All aspects)

[0254] The foregoing description provides specific implementations of the following aspects of the present disclosure.

[0255] A power converter (100; 100A; 100B; 100C; 100D; 100E; 100F) according to a first aspect comprises a first DC terminal (31) and a second DC terminal (32), a power conversion circuit (11), a plurality of AC terminals (41), a plurality of switches (8), a plurality of resonant capacitors (9), at least one resonant inductor (L1), a regenerative capacitor (15), a controller (50), a voltage divider circuit (20) and a plurality of common mode filters (21). The power conversion circuit (11) comprises a plurality of first switching elements (1) and a plurality of second switching elements (2). In the power conversion circuit (11), a plurality of switching circuits (10) are connected in parallel to each other, and in each switching circuit in the plurality of switching circuits (10), one of the plurality of first switching elements (1) is connected in series with a corresponding second switching element of the plurality of second switching elements (2) in a one-to-one manner. In a power conversion circuit (11), a plurality of first switching elements (1) are connected to a first DC terminal (31), and a plurality of second switching elements (2) are connected to a second DC terminal (32). A plurality of AC terminals (41) are provided one-to-one for each of the plurality of switching circuits (10). Each of the plurality of AC terminals (41) is connected to a connection node (3) between a first switching element (1) and a second switching element (2) of a corresponding switching circuit (10) in the plurality of switching circuits (10). A plurality of switches (8) are provided one-to-one for each of the plurality of switching circuits (10). Each of the plurality of switches (8) has a first end (81) and a second end (82). The first end (81) of each of the plurality of switches (8) is connected to a connection node (3) between a first switching element (1) and a second switching element (2) of a corresponding switching circuit in the plurality of switching circuits (10). A plurality of resonant capacitors (9) are provided one-to-one for each of the plurality of switches (8). Each resonant capacitor in the plurality of resonant capacitors (9) is connected between a first end (81) of a corresponding switch in the plurality of switches (8) and a second DC terminal (32). At least one resonant inductor (L1) has a third end and a fourth end. In the at least one resonant inductor (L1), its third end is connected to a second end (82) of a corresponding switch in the plurality of switches (8). The regenerative capacitor (15) has a fifth end (153) and a sixth end (154). In the regenerative capacitor (15), its fifth end (153) is connected to the second DC terminal (32), and its sixth end (154) is connected to the fourth end of the at least one resonant inductor (L1). The controller (50) controls the plurality of first switching elements (1), the plurality of second switching elements (2), and the plurality of switches (8). The voltage divider circuit (20) includes a first capacitor (C1) and a second capacitor (C2) connected in series. In the voltage divider circuit (20), the first capacitor (C1) is connected to the first DC terminal (31), and the second capacitor (C2) is connected to the second DC terminal (32).The voltage divider circuit (20) has an intermediate potential node (N1) between the first capacitor (C1) and the second capacitor (C2). A plurality of common mode filters (21) are provided one-to-one for the plurality of switching circuits (10). Each common mode filter in the plurality of common mode filters (21) includes a third capacitor (C3) connected between a connection node (3) of a corresponding switching circuit in the plurality of switching circuits (10) and the intermediate potential node (N1).

[0256] This aspect allows reducing noise while reducing switching losses.

[0257] In a power converter (100; 100A; 100B; 100C; 100D; 100E) according to the second aspect which can be implemented in combination with the first aspect, a controller (50) applies a control signal to each of a plurality of first switching elements (1), a plurality of second switching elements (2) and a plurality of switches (8). The control signal has a potential that alternates between a high level and a low level. The controller (50) sets a dead time period (Td) between a high level period of the control signal for the first switching element (1) and a high level period of the control signal for the second switching element (2) for each switching circuit in the plurality of switching circuits (10). The controller (50) causes the control signal for each switch in the plurality of switches (8) to overlap with a dead time period (Td) that has been set for a switching circuit (10) corresponding to the switch (8) belonging to the plurality of switching circuits (10). In the power converter (100; 100A; 100B; 100C; 100D; 100E), the combined capacitance of the resonant capacitor (9), the third capacitor (C3) and the second capacitor (C2) is less than 4·(Td1 / π) 2 (1 / Lr), where Td1 is the length of the dead time period (Td), and Lr is the inductance of the at least one resonant inductor (L1).

[0258] In the power converter (100; 100A; 100B; 100C; 100D; 100E) according to the third aspect which can be implemented in combination with the second aspect, the combined capacitance is less than (Td1 / π) 2 ·(1 / Lr).

[0259] This aspect makes it easier to perform zero voltage soft switching of each of the plurality of first switching elements (1) and the plurality of second switching elements (2) while reducing an increase in switching loss.

[0260] In a power converter (100F) according to a fourth aspect that can be implemented in combination with the first aspect, a controller (50) applies a control signal to each of a plurality of first switching elements (1), a plurality of second switching elements (2), and a plurality of switches (8). The control signal has a potential that alternates between a high level and a low level. The controller (50) sets a dead time period (Td) between a high level period of the control signal for the first switching element (1) and a high level period of the control signal for the second switching element (2) for each switching circuit in the plurality of switching circuits (10). The controller (50) causes the control signal for each switch in the plurality of switches (8) to overlap with a dead time period (Td) that has been set for a switching circuit (10) corresponding to the switch (8) belonging to the plurality of switching circuits (10). In the power converter (100F), a combined capacitance of the resonant capacitor (9), the third capacitor (C3), and the second capacitor (C2) is less than (Td1 / π) 2 ·{1 / (Lr+L0)}, where Td1 is the length of the dead time period (Td), Lr is the inductance of the at least one resonant inductor (L1), and L0 is the inductance of each common mode filter in the plurality of common mode filters.

[0261] This aspect makes it easier to perform zero voltage soft switching of each of the plurality of first switching elements (1) and the plurality of second switching elements (2) while reducing an increase in switching loss.

[0262] In the power converter (100F) according to the fifth aspect which can be implemented in combination with the fourth aspect, the combined capacitance is less than (1 / 2)(Td1 / π) 2 ·{1 / (Lr+L0)}.

[0263] This aspect allows for more reliable zero-voltage soft switching of each of the plurality of first switching elements (1) and the plurality of second switching elements (2) while reducing an increase in switching loss.

[0264] In the power converter (100; 100A; 100B; 100C; 100D; 100E; 100F) according to the sixth aspect which can be implemented in combination with any one of the second to fifth aspects, the combined capacitance of the third capacitor (C3) and the second capacitor (C2) is smaller than the capacitance of the resonant capacitor (9).

[0265] This aspect allows further reduction of leakage currents.

[0266] In a power converter (100; 100A; 100B; 100C; 100D; 100E; 100F) according to a seventh aspect that can be implemented in combination with any one of the first to sixth aspects, a controller (50) performs a first control operation and a second control operation. The first control operation includes: controlling a plurality of first switching elements (1), a plurality of second switching elements (2), and a plurality of switches (8) to charge not only a resonant capacitor (9) connected to one switch (8) belonging to a plurality of resonant capacitors (9) but also a third capacitor (C3) of a common mode filter (21) connected to one switch (8) belonging to a plurality of common mode filters (21) using charges removed from a regenerative capacitor (15) via one switch (8) among the plurality of switches (8). The second control operation includes: controlling a plurality of first switching elements (1), a plurality of second switching elements (2) and a plurality of switches (8) so as to discharge not only a resonant capacitor (9) connected to the one switch (8) belonging to a plurality of resonant capacitors (9) but also a third capacitor (C3) of a common mode filter (21) connected to the one switch (8) belonging to a plurality of common mode filters (21) via one switch (8) among the plurality of switches (8).

[0267] This aspect makes it easier to perform zero voltage soft switching of each of the plurality of first switching elements (1) and the plurality of second switching elements (2) while reducing an increase in switching loss.

[0268] The power converter (100C) according to the eighth aspect, which can be implemented in combination with any one of the first to seventh aspects, further includes a second voltage divider circuit (22) separately from the first voltage divider circuit used as the voltage divider circuit (20). The second voltage divider circuit (22) is connected between the first DC terminal (31) and the second DC terminal (32). The second voltage divider circuit (22) includes a fourth capacitor (C4) and a fifth capacitor (C5) connected in series. In the second voltage divider circuit (22), the fourth capacitor (C4) is connected to the first DC terminal (31), and the fifth capacitor (C5) is connected to the second DC terminal (32). The second voltage divider circuit (22) has a neutral point (N2) between the fourth capacitor (C4) and the fifth capacitor (C5). The intermediate potential node (N1) is electrically isolated from the neutral point (N2).

[0269] This aspect can reduce the possibility of leakage current flowing through the third capacitor (C3) of each common mode filter in the plurality of common mode filters (21).

[0270] In the power converter (100D; 100E) according to the ninth aspect which can be implemented in combination with any one of the first to eighth aspects, at least one resonant inductor (L1) is a single resonant inductor (L1). The second ends (82) of the plurality of switches (8) are connected in common to the single resonant inductor (L1).

[0271] This aspect enables the number of resonant inductors (L1) to be provided to be reduced to one, thereby contributing to miniaturization.

[0272] Description of Reference Numerals

[0273] 1First switching element

[0274] 2 Second switching element

[0275] 3 Connecting Nodes

[0276] 8 Switches

[0277] 81 First End

[0278] 82 Second End

[0279] 9. Resonant capacitor

[0280] 10Switching circuit

[0281] 11 Power conversion circuit

[0282] 15 Regeneration capacitor

[0283] 153 The Fifth End

[0284] 154 The Sixth End

[0285] 20 voltage divider circuit (first voltage divider circuit)

[0286] 21 Common mode filter

[0287] 22 Second voltage divider circuit

[0288] 31 First DC terminal

[0289] 32 Second DC terminal

[0290] 41 AC terminal

[0291] 50 Controller

[0292] 100,100A,100B,100C,100D,100E,100F power converter

[0293] C1 First capacitor

[0294] C2 Second capacitor

[0295] C3 The third capacitor

[0296] C4 Fourth capacitor

[0297] C5 Fifth capacitor

[0298] iU, iV, iW output current (load current)

[0299] L1 resonant inductor

[0300] L3 Inductor

[0301] N1 Intermediate potential node

[0302] N2 Neutral point

[0303] RA1 AC load

[0304] SU1,SU2,SU6,SU7 control signal

[0305] SV1, SV2, SV6, SV7 control signals

[0306] SW1, SW2, SW6, SW7 control signals

[0307] Td Dead time period

[0308] V15 Voltage

[0309] Vth Threshold

Claims

1. A power converter, include: a first DC terminal and a second DC terminal; a power conversion circuit comprising a plurality of first switching elements and a plurality of second switching elements, the power conversion circuit being implemented as a parallel connection of a plurality of switching circuits, in each of the plurality of switching circuits, a first switching element of the plurality of first switching elements and a corresponding second switching element of the plurality of second switching elements being connected in series one-to-one, the plurality of first switching elements being connected to the first DC terminal, and the plurality of second switching elements being connected to the second DC terminal; a plurality of AC terminals, which are respectively provided one-to-one for the plurality of switching circuits, each of the plurality of AC terminals being connected to a connection node between a first switching element and a second switching element of a corresponding switching circuit of the plurality of switching circuits; a plurality of switches, which are arranged one by one for the plurality of switching circuits, each of the plurality of switches having a first end and a second end, the first end of each of the plurality of switches being connected to a connection node between a first switching element and a second switching element of a corresponding switching circuit of the plurality of switching circuits; a plurality of resonant capacitors, which are respectively provided one-to-one for the plurality of switches, each of the plurality of resonant capacitors being connected between the second DC terminal and a first end of a corresponding switch of the plurality of switches; at least one resonant inductor having a third end and a fourth end, the third end of the at least one resonant inductor being connected to the second end of a corresponding switch of the plurality of switches; a regenerative capacitor having a fifth end and a sixth end, the fifth end of the regenerative capacitor being connected to the second DC terminal, the sixth end of the regenerative capacitor being connected to the fourth end of the at least one resonant inductor; a controller configured to control the plurality of first switching elements, the plurality of second switching elements, and the plurality of switches; a voltage dividing circuit comprising a first capacitor and a second capacitor connected in series, the first capacitor being connected to the first DC terminal, the second capacitor being connected to the second DC terminal, the voltage dividing circuit having an intermediate potential node between the first capacitor and the second capacitor; as well as A plurality of common mode filters are provided one-to-one for the plurality of switching circuits, each of the plurality of common mode filters including a third capacitor connected between the intermediate potential node and a connection node of a corresponding switching circuit among the plurality of switching circuits.

2. The power converter according to claim 1, in, The controller is configured to: applying a control signal having a potential alternating between a high level and a low level to each of the plurality of first switching elements, the plurality of second switching elements, and the plurality of switches; For each of the plurality of switching circuits, setting a dead time period between a high level period of a control signal for the first switching element and a high level period of a control signal for the second switching element; as well as making the control signal for each switch of the plurality of switches overlap with the dead time period set for the switching circuit corresponding to the switch belonging to the plurality of switching circuits, and In the power converter, a combined capacitance of the resonant capacitor, the third capacitor, and the second capacitor is less than 4·(Td1 / π) 2 ·(1 / Lr), where Td1 is the length of the dead time period, and Lr is the inductance of the at least one resonant inductor.

3. The power converter according to claim 2, in, The composite capacitance is less than (Td1 / π) 2 ·(1 / Lr).

4. The power converter according to claim 1, in, The controller is configured to: applying a control signal having a potential alternating between a high level and a low level to each of the plurality of first switching elements, the plurality of second switching elements, and the plurality of switches; For each of the plurality of switching circuits, setting a dead time period between a high level period of a control signal for the first switching element and a high level period of a control signal for the second switching element; as well as making the control signal for each switch of the plurality of switches overlap with the dead time period set for the switching circuit corresponding to the switch belonging to the plurality of switching circuits, and In the power converter, a combined capacitance of the resonant capacitor, the third capacitor, and the second capacitor is less than (Td1 / π) 2 ·{1 / (Lr+L0)}, where Td1 is the length of the dead time period, Lr is the inductance of the at least one resonant inductor, and L0 is the inductance of the inductor of each common mode filter in the plurality of common mode filters.

5. The power converter according to claim 4, in, The composite capacitance is less than (1 / 2)(Td1 / π) 2 ·{1 / (Lr+L0)}.

6. The power converter according to any one of claims 2 to 5, in, A combined capacitance of the third capacitor and the second capacitor is smaller than a capacitance of the resonant capacitor.

7. The power converter according to any one of claims 1 to 6, in, The controller is configured to perform a first control operation and a second control operation, The first control operation is for controlling the plurality of first switching elements, the plurality of second switching elements, and the plurality of switches to charge not only the resonant capacitor connected to the one switch belonging to the plurality of resonant capacitors but also the third capacitor of the common mode filter connected to the one switch belonging to the plurality of common mode filters, using the charge removed from the regenerative capacitor via one switch among the plurality of switches, and The second control operation is used to control the multiple first switching elements, the multiple second switching elements and the multiple switches so that, through one switch of the multiple switches, not only the resonant capacitor connected to the one switch belonging to the multiple resonant capacitors is discharged, but also the third capacitor of the common mode filter connected to the one switch belonging to the multiple common mode filters is discharged.

8. The power converter according to any one of claims 1 to 7, further comprising a second voltage dividing circuit separately from a first voltage dividing circuit serving as the voltage dividing circuit, the second voltage dividing circuit being connected between the first DC terminal and the second DC terminal, in, The second voltage dividing circuit includes a fourth capacitor and a fifth capacitor connected in series, the fourth capacitor is connected to the first DC terminal, and the fifth capacitor is connected to the second DC terminal. The second voltage dividing circuit has a neutral point between the fourth capacitor and the fifth capacitor, and The intermediate potential node is electrically isolated from the neutral point.

9. The power converter according to any one of claims 1 to 8, in, The at least one resonant inductor is a single resonant inductor, and Second ends of the respective switches are commonly connected to the single resonant inductor.

Images