Server mixed flash backboard hard disk indicating lamp co-frequency synchronization control method and system

Abstract

The invention discloses a server mixed flash backboard hard disk indicator light same-frequency synchronous control method and system. The method comprises the following steps: firstly, sending ACTIVE lighting signals of SAS / SATAMHDD and NVME SSD to a CPLD (Complex Programmable Logic Device), and carrying out clock domain synchronization in the CPLD; the lighting same-frequency synchronization module of the CPLD monitors the falling edges and the rising edges of the signals in real time and counts the number of times. And comparing the monitoring result with a preset time threshold N, and judging whether the hard disk has read-write actions or not. If the read-write action exists, a PWM (Pulse Width Modulation) module in the CPLD outputs a PWM square wave signal with a preset frequency, and an operation indicating lamp of the hard disk is controlled through GPIO (General Purpose Input / Output), so that the operation indicating lamps of the NVME SSD and the SAS / SATAHDD synchronously flicker at the same frequency; if no read-write action exists, the indicating lamp is normally on. According to the invention, the display consistency and readability of the indicator light are improved, the stability and reliability of the system are enhanced, the performance monitoring of the system is optimized, the read-write state of the hard disk can be more intuitively identified, and the operation efficiency of the system is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of server storage, and particularly to a method and system for synchronously controlling the same frequency of hard disk indicators on a server hybrid flash backplane. Background Art

[0002] Hybrid flash storage is a technology that uses NVME SSDs as a performance acceleration layer and SAS / SATA HDDs as the main storage medium. By mixing the use of SSDs and HDDs, the purpose of improving storage performance is achieved.

[0003] The RAID chip communicates with the CPLD through the SGPIO protocol. After the CPLD parses the SGPIO protocol, it lights up the operation indicator of the SAS / SATA HDD through its own GPIO. On the X86 platform, the CPU sends a VPP signal to the CPLD. After the CPLD parses the VPP protocol, it lights up the operation indicator of the NVME SSD through its own GPIO. However, due to the lack of the VPP signal in the Feiteng CPU, the NVME SSD can only use its own ACTIVE signal to light up the operation indicator of the NVME SSD.

[0004] Currently, the lighting frequencies of the current NVME SSD and SAS / SATA HDD are different. When a storage device using the Feiteng CPU uses both NVME SSDs and SAS / SATA HDDs at the same time, if the ACTIVE signal of the hard disk itself is used to light up the operation indicator of the NVME SSD, it will cause the flashing frequencies of the hard disks on the entire backplane to be inconsistent, and the lighting of the NVME hard disk and the SAS / SATA hard disk will not be synchronized. Summary of the Invention

[0005] Based on this, the embodiments of the present application provide a method and system for synchronously controlling the same frequency of hard disk indicators on a server hybrid flash backplane, which can solve the problems of the same frequency and synchronization of lighting of NVME SSDs and SAS / SATA HDDs.

[0006] In a first aspect, a method for synchronously controlling the same frequency of hard disk indicators on a server hybrid flash backplane is provided. The method includes:

[0007] On the hybrid flash backplane, the RAID chip sends a lighting signal to the CPLD through the SGPIO protocol and performs clock domain synchronization in the CPLD; wherein, the lighting signal includes the SAS / SATA HDD lighting ACTIVE signal and the NVME SSD ACTIVE lighting signal;

[0008] Monitor the synchronized SAS / SATA HDD lighting ACTIVE signal and the NVME SSD ACTIVE lighting signal in real time, detect the falling edge and rising edge of the signal, and count the number of times;

[0009] Compare the number of falling edges and rising edges of the hard disk ACTIVE signal obtained by real-time monitoring with the preset number threshold N in the CPLD code to determine whether there is a read / write operation on the hard disk at the current moment;

[0010] When there is a read / write operation on the hard disk at the current moment, the PWM module in the CPLD starts to work, outputs a PWM square wave signal with a preset frequency, and controls the operation indicator light of the hard disk through the GPIO of the CPLD, so that the operation indicator lights of the NVME SSD and SAS / SATA HDD flash synchronously at the same frequency.

[0011] Optionally, the method further includes:

[0012] When there is no read / write operation on the hard disk at the current moment, no PWM signal is output, and the operation indicator light of the hard disk will remain on constantly.

[0013] Optionally, on the mixed flash backplane, the RAID chip sends a lighting signal to the CPLD through the SGPIO protocol and performs clock domain synchronization in the CPLD, including:

[0014] The SGPIO protocol parsing module inside the CPLD first parses out the lighting ACTIVE signal of the SAS / SATA HDD, and at the same time, the NVME SSD hard disk also sends its own ACTIVE lighting signal to the CPLD.

[0015] Optionally, perform real-time monitoring on the synchronized SAS / SATA HDD lighting ACTIVE signal and the NVME SSD's ACTIVE lighting signal, detect the falling edges and rising edges of the signals, and count the number of times, specifically including:

[0016] Real-time monitor the level changes of these two signals, specifically detect the falling edges and rising edges of the signals; among them, the falling edge is used to represent the change from high level to low level, and the rising edge is used to represent the change from low level to high level;

[0017] Whenever a falling edge or a rising edge is detected, the counter inside the CPLD will increase by 1, so as to count the total number of falling edges and rising edges of each signal within a certain time interval.

[0018] Optionally, determine whether there is a read / write operation on the hard disk at the current moment, specifically including:

[0019] Compare the number of falling edges and rising edges of the hard disk ACTIVE signal obtained by real-time monitoring with the preset number threshold N in the CPLD code;

[0020] Among them, if within a preset time interval, the sum of the number of falling edges and rising edges of the ACTIVE signal of the hard disk exceeds the threshold N, the CPLD determines that there is a read / write operation on the hard disk at the current moment; if the sum of the number of times does not exceed the threshold N, it is determined that the hard disk has not performed a read / write operation.

[0021] Optionally, the number threshold N is artificially set according to the frequency characteristics of the change of the ACTIVE signal during normal read / write operations of the hard disk.

[0022] Optionally, the operation indicator light of the hard disk is controlled by the GPIO of the CPLD, specifically including:

[0023] When there is a read / write operation on the hard disk at the current moment, the PWM module will output a PWM square wave signal with a preset frequency; so that the operation indicator lights of all hard disks will flash synchronously at the same frequency, thereby achieving synchronous display with the same frequency.

[0024] Optionally, the NVME SSD hard disk and the SAS / SATA hard disk are specifically installed on the Feiteng CPU platform.

[0025] In a second aspect, a system for synchronous display with the same frequency of the hard disk indicator lights on a server hybrid flash backplane is provided, and the system includes:

[0026] A synchronization unit, on the hybrid flash backplane, the RAID chip sends a lighting signal to the CPLD through the SGPIO protocol and performs clock domain synchronization in the CPLD; among them, the lighting signal includes the SAS / SATA HDD lighting ACTIVE signal and the NVME SSD's ACTIVE lighting signal;

[0027] A statistics unit, used to monitor the synchronized SAS / SATA HDD lighting ACTIVE signal and the NVME SSD's ACTIVE lighting signal in real time, detect the falling edges and rising edges of the signals, and count the number of times;

[0028] A judgment unit, used to compare the number of falling edges and rising edges of the hard disk ACTIVE signal obtained by real-time monitoring with the number threshold N preset in the CPLD code to judge whether there is a read / write operation on the hard disk at the current moment;

[0029] A control unit, used when there is a read / write operation on the hard disk at the current moment, the PWM module in the CPLD starts to work, outputs a PWM square wave signal with a preset frequency, and controls the operation indicator light of the hard disk through the GPIO of the CPLD, so that the operation indicator lights of the NVME SSD and the SAS / SATA HDD both flash synchronously at the same frequency.

[0030] Optionally, the system further includes:

[0031] When there is no read / write operation on the hard disk at the current moment, no PWM signal is output, and the operation indicator light of the hard disk will remain constantly on.

[0032] The beneficial effects brought by the technical solutions provided in the embodiments of this application at least include:

[0033] (1) Through the lighting same-frequency synchronization module of the CPLD, it is ensured that the operation indicator lights of the NVME SSD and SAS / SATA HDD flash synchronously at the same frequency. It can more intuitively identify the read / write status of the hard disk, improving the maintainability and manageability of the system.

[0034] (2) Through clock domain synchronization and precise signal monitoring, errors and data competition problems caused by timing mismatches are reduced. The logical processing of the CPLD ensures the accurate detection and processing of signals, improving the overall stability and reliability of the system. Description of the Drawings

[0035] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings described below are only exemplary, and for those of ordinary skill in the art, without creative efforts, other implementation drawings can also be obtained based on the provided drawings.

[0036] Figure 1 It is a flow chart of the same-frequency synchronization control of the hard disk indicator lights on the server hybrid flash backplane provided in the embodiments of this application;

[0037] Figure 2 It is a flow chart of the implementation of the CPLD same-frequency synchronization module provided in the embodiments of this application;

[0038] Figure 3 It is a schematic flow chart of the indicator light display of the CPLD same-frequency synchronization module provided in the embodiments of this application. Detailed Embodiments

[0039] In order to make the purpose, technical solutions and advantages of this application more clear, the following further details this application in combination with the drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain this application and are not used to limit this application.

[0040] In the description of the present invention, the terms "include", "have" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device that includes a series of steps or units does not necessarily have to be limited to those steps or units that are explicitly listed, but may also include other steps or units that are inherent to these processes, methods, products or devices although not explicitly listed, or steps or units added based on further optimization schemes conceived in the present invention.

[0041] First, the terms in this application are explained:

[0042] RAID (Redundant Array of Independent Disks), that is, Redundant Array of Independent Disks. It is a technology that combines multiple independent hard disks (physical hard disks) in different ways into a logical hard disk, thereby providing higher storage performance, data redundancy and reliability than a single hard disk.

[0043] CPLD (Complex Programmable Logic Device), that is, Complex Programmable Logic Device. It is an integrated circuit chip that can be programmed by users according to their needs to achieve specific logic functions. CPLD has the characteristics of flexible programming, high integration and high speed, and is widely used in digital circuit design. It can be used to implement various complex logic control functions, such as signal processing, protocol parsing, clock management, etc. In this solution, the CPLD is used to parse the SGPIO protocol signals sent by the RAID chip and control the flashing of the hard disk indicator light.

[0044] SAS / SATA HDD: SAS (Serial Attached SCSI) and SATA (Serial ATA) are two different hard disk interface standards. SAS HDD is a serial attached SCSI hard disk, which has high transmission rate, high reliability and good scalability, and is often used in enterprise-level storage systems; SATA HDD is a serial ATA hard disk, which has the advantages of low cost and good compatibility, and is widely used in personal computers and some mid- to low-end storage devices. HDD (Hard Disk Drive) is a computer storage device that stores data using the magnetic storage principle.

[0045] NVME SSD: NVMe (Non-Volatile Memory Express) is a high-speed storage interface protocol designed specifically for solid-state drives (SSDs) to fully utilize their high-speed read and write performance. An NVMe SSD is a solid-state drive that uses the NVMe protocol. Compared with traditional SATA or SAS interface SSDs, NVMe SSDs have lower latency and higher data transfer rates, which can significantly improve the overall performance of computer systems, especially when dealing with a large number of data read and write operations.

[0046] Please refer to Figure 1 , which shows the schematic flowchart of a method for synchronous control of the operating indicators of hard drives on a server hybrid flash backplane provided by an embodiment of the present application. Specifically:

[0047] After the hard drives on the hybrid flash backplane start to work, the RAID chip sends a lighting signal to the CPLD through the SGPIO protocol. The SGPIO protocol parsing module inside the CPLD first parses out the SAS / SATA HDD lighting ACTIVE signal and then sends it to the lighting synchronous module; at the same time, the NVME SSD hard drive also sends the ACTIVE lighting signal to the lighting synchronous module of the CPLD. After being processed by the lighting synchronous module of the CPLD, a PWM square wave signal of a frequency is output through the GPIO of the CPLD, so that the operating indicators of the NVME SSD and the SAS / SATA SSD flash synchronously at the same frequency.

[0048] As Figure 2 , the implementation flowchart of the CPLD synchronous module is given as follows:

[0049] The first step: Send the SAS / SATA HDD lighting ACTIVE signal and the ACTIVE lighting signal of the NVME SSD to the lighting synchronous module and synchronize them to the clock domain of this module.

[0050] In this step, specifically on the hybrid flash backplane, the RAID chip sends a lighting signal to the CPLD through the SGPIO protocol and performs clock domain synchronization in the CPLD; among them, the lighting signal includes the SAS / SATA HDD lighting ACTIVE signal and the ACTIVE lighting signal of the NVMe SSD.

[0051] The second step: Detect the falling edge and rising edge of the hard drive ACTIVE signal and count the number of times.

[0052] In this step, the synchronized SAS / SATA HDD lighting ACTIVE signal and the ACTIVE lighting signal of the NVME SSD are monitored in real time to detect the falling edge and rising edge of the signal and count the number of times.

[0053] On the mixed flash backplane, after the lighting same-frequency synchronization module of the CPLD receives the SAS / SATA HDD lighting ACTIVE signal sent by the RAID chip through the SGPIO protocol and the ACTIVE lighting signal of the NVME SSD, these signals have been synchronized to the internal clock domain of the CPLD. Next, the monitoring module of the CPLD will monitor the level changes of these two signals in real time, specifically detecting the falling edge (changing from high level to low level) and rising edge (changing from low level to high level) of the signals. Whenever a falling edge or rising edge is detected, the counter inside the CPLD will increase by 1, thereby counting the total number of falling edges and rising edges of each signal within a certain time interval. These counting results will be used for subsequent read and write operation judgments.

[0054] Step 3: When the number of falling edges and rising edges of the hard disk ACTIVE detected exceeds the preset number N in the CPLD code, it is determined that the hard disk has read and write operations.

[0055] In this step, the number of falling edges and rising edges of the hard disk ACTIVE signal obtained through real-time monitoring is compared with the preset number threshold N in the CPLD code to determine whether the hard disk has read and write operations at the current moment.

[0056] The logic module inside the CPLD will compare the number of falling edges and rising edges of the hard disk ACTIVE signal obtained through real-time monitoring with the preset number threshold N in the CPLD code. This threshold N is preset according to the frequency characteristics of the ACTIVE signal change during normal read and write operations of the hard disk. If within the preset time interval, the sum of the number of falling edges and rising edges of the ACTIVE signal of a certain hard disk exceeds the threshold N, the CPLD determines that the hard disk has read and write operations at the current moment. If the sum of the times does not exceed the threshold N, it is determined that the hard disk has not performed read and write operations. In this way, the CPLD can accurately identify the current working state of the hard disk.

[0057] Step 4: If the hard disk performs read and write operations, the PWM module outputs a PWM signal with a preset frequency, and controls the operation indicator lights of the hard disks through the GPIO of the CPLD. The operation indicator lights of all hard disks are driven by the same PWM signal, so that the operation indicator lights of the NVME SSD and SAS / SATA SSD blink synchronously at the same frequency; if the hard disk does not perform read and write operations, the operation indicator light remains on.

[0058] In this step, when the hard disk has read and write operations at the current moment, the PWM module in the CPLD starts to work, outputs a PWM square wave signal with a preset frequency, and controls the operation indicator lights of the hard disks through the GPIO of the CPLD, so that the operation indicator lights of the NVME SSD and SAS / SATA HDD blink synchronously at the same frequency.

[0059] According to the judgment result of the second step, the PWM module in the CPLD will determine whether to output a PWM square wave signal. If it is judged that there is a read / write operation on the hard disk, the PWM module will output a PWM square wave signal with a preset frequency. This PWM signal is output through the GPIO port of the CPLD and is used to control the operation indicators of all hard disks (including NVME SSDs and SAS / SATA HDDs). Since the operation indicators of all hard disks are driven by the same PWM signal, they will blink synchronously at the same frequency, thus achieving synchronous display at the same frequency. On the contrary, if there is no read / write operation on the hard disk, the PWM module will not output a PWM signal, and the operation indicators of the hard disks will remain constantly on, intuitively reflecting the current working state of the hard disks. Through this control mechanism, the server administrator can easily understand the operation status of the hard disks through the status of the indicators. As Figure 3 Figure 4 shows the implementation flowchart of the indicator light display of the CPLD same-frequency synchronization module.

[0060] In summary, it can be seen that a same-frequency synchronization lighting module is added inside the backplane CPLD, and this module enables the NVME SSD hard disks and SAS / SATA hard disks on the Feiteng server platform to blink synchronously at the same frequency.

[0061] This application embodiment also provides a same-frequency synchronization control system for the indicator lights of the server's mixed-flash backplane hard disks. The system includes:

[0062] A synchronization unit. On the mixed-flash backplane, the RAID chip sends a lighting signal to the CPLD through the SGPIO protocol and performs clock domain synchronization in the CPLD; among them, the lighting signal includes the SAS / SATA HDD lighting ACTIVE signal and the NVME SSD's ACTIVE lighting signal;

[0063] A statistics unit, which is used to monitor the synchronized SAS / SATA HDD lighting ACTIVE signal and the NVME SSD's ACTIVE lighting signal in real time, detect the falling edge and rising edge of the signal, and count the number of times;

[0064] A judgment unit, which is used to compare the number of times of the falling edge and rising edge of the hard disk ACTIVE signal obtained by real-time monitoring with the preset number threshold N in the CPLD code to judge whether there is a read / write operation on the hard disk at the current moment;

[0065] A control unit. When there is a read / write operation on the hard disk at the current moment, the PWM module in the CPLD starts to work, outputs a PWM square wave signal with a preset frequency, and controls the operation indicators of the hard disks through the GPIO of the CPLD, so that the operation indicators of the NVME SSD and SAS / SATA HDD both blink synchronously at the same frequency.

[0066] In an optional embodiment of the present application, the system further includes: when there is no read / write operation on the hard disk at the current moment, no PWM signal is output, and the operation indicator light of the hard disk will remain constantly on.

[0067] The server hybrid flash backplane hard disk indicator light same-frequency synchronization control system provided by the embodiments of the present application is used to implement the above-mentioned server hybrid flash backplane hard disk indicator light same-frequency synchronization control method. For the specific limitations of the server hybrid flash backplane hard disk indicator light same-frequency synchronization control system, reference can be made to the limitations on the server hybrid flash backplane hard disk indicator light same-frequency synchronization control method in the above text, which will not be elaborated here. Each part in the above-mentioned server hybrid flash backplane hard disk indicator light same-frequency synchronization control system can be implemented in whole or in part through software, hardware, and their combination. The above-mentioned modules can be embedded in the processor in the device in hardware form or be independent of it, or can be stored in the memory in the device in software form, so as to facilitate the processor to call and execute the operations corresponding to the above-mentioned modules.

[0068] The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope recorded in this specification.

[0069] The above embodiments only represent several implementation manners of the present application. The description is relatively specific and detailed, but it should not be construed as a limitation on the scope of the patent application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application should be subject to the appended claims.

Claims

1. A method for synchronously controlling the flash backplane hard disk indicator lights of a server, characterized in that: The method comprises: On the hybrid flash backplane, the RAID chip sends a lighting signal to the CPLD through the SGPIO protocol and performs clock domain synchronization in the CPLD; wherein the lighting signal includes a SAS / SATA HDD lighting ACTIVE signal and an NVME SSD ACTIVE lighting signal; Real-time monitoring of the synchronized SAS / SATA HDD ACTIVE light-on signal and NVME SSD ACTIVE light-on signal, detecting the falling edge and rising edge of the signal, and counting the number of times; The number of falling and rising edges of the hard disk ACTIVE signal obtained by real-time monitoring is compared with the number threshold N preset in the CPLD code to determine whether the hard disk has a read or write action at the current moment; When the hard disk is reading or writing at the current moment, the PWM module in the CPLD starts working and outputs a PWM square wave signal with a preset frequency. The operation indicator light of the hard disk is controlled through the GPIO of the CPLD, so that the operation indicators of the NVME SSD and SAS / SATA HDD flash synchronously at the same frequency.

2. The method according to claim 1, characterized in that The method further comprises: When the hard disk does not have any reading or writing action at the current moment, no PWM signal is output and the hard disk operation indicator light will remain on.

3. The method according to claim 1, characterized in that On the hybrid flash backplane, the RAID chip sends a lighting signal to the CPLD through the SGPIO protocol and performs clock domain synchronization in the CPLD, including: The SGPIO protocol parsing module inside the CPLD first parses the ACTIVE light-on signal of the SAS / SATA HDD, and at the same time, the NVME SSD hard disk also sends its own ACTIVE light-on signal to the CPLD.

4. The method according to claim 1, characterized in that: The synchronized SAS / SATA HDD ACTIVE light-on signal and the NVME SSD ACTIVE light-on signal are monitored in real time, and the falling and rising edges of the signals are detected and the number of times is counted, including: Monitor the level changes of the two signals in real time, specifically detecting the falling edge and rising edge of the signals; wherein the falling edge is used to represent a change from a high level to a low level, and the rising edge is used to represent a change from a low level to a high level; Whenever a falling edge or rising edge is detected, the counter inside the CPLD will increase by 1, thereby counting the total number of falling edges and rising edges of each signal within a certain time interval.

5. The method according to claim 1, characterized in that Determine whether the hard disk has any read or write action at the current moment, including: The number of falling edges and rising edges of the hard disk ACTIVE signal obtained by real-time monitoring is compared with the number threshold N preset in the CPLD code; Among them, if the sum of the falling edge and rising edge times of the hard disk's ACTIVE signal exceeds the threshold N within the preset time interval, the CPLD determines that the hard disk has a read or write action at the current moment; if the sum of the times does not exceed the threshold N, it is determined that the hard disk is not performing a read or write operation.

6. The method according to claim 5, characterized in that The number threshold N is artificially set according to the frequency characteristics of the ACTIVE signal change during normal read and write operations of the hard disk.

7. The method according to claim 1, characterized in that The operation indicator light of the hard disk is controlled by the GPIO of the CPLD, including: When the hard disk is in read / write operation at the current moment, the PWM module will output a PWM square wave signal with a preset frequency; the operating indicators of all hard disks will flash synchronously at the same frequency, thereby achieving synchronous display at the same frequency.

8. The method according to claim 1, characterized in that NVME SSD hard drives and SAS / SATA hard drives are specifically installed on the Feiteng CPU platform.

9. A server mixed flash backplane hard disk indicator light synchronous control system, characterized in that: The system comprises: A synchronization unit, on the hybrid flash backplane, the RAID chip sends a lighting signal to the CPLD through the SGPIO protocol and performs clock domain synchronization in the CPLD; wherein the lighting signal includes a SAS / SATA HDD lighting ACTIVE signal and an NVME SSD ACTIVE lighting signal; A statistical unit is used to monitor the synchronized SAS / SATA HDD lighting ACTIVE signal and the NVME SSD lighting ACTIVE signal in real time, detect the falling edge and rising edge of the signal, and count the number of times; A judgment unit, used to compare the number of falling edges and rising edges of the hard disk ACTIVE signal obtained by real-time monitoring with the number threshold N preset in the CPLD code to judge whether the hard disk has a read or write action at the current moment; The control unit is used to start the PWM module in the CPLD to work when the hard disk has a read or write action at the current moment, output a PWM square wave signal with a preset frequency, and control the operation indicator light of the hard disk through the GPIO of the CPLD, so that the operation indicators of the NVME SSD and SAS / SATAHDD flash synchronously at the same frequency.

10. The system according to claim 9, characterized in that The system further comprises: When the hard disk does not have any reading or writing action at the current moment, no PWM signal is output and the hard disk operation indicator light will remain on.

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