Electronic device

Abstract

An electronic device includes a first panel including a first substrate, a second substrate, a plurality of first conductive pads, a first conductive ring, and a first electrostatic protection structure. The first substrate includes a first electronic component bonding region. The second substrate is arranged opposite to the first substrate. The plurality of first conductive pads are disposed on the first electronic component bonding region. The first conductive ring is disposed on the first substrate. The first electrostatic protection structure comprises a first line end part and a second line end part which are opposite to each other, the first line end part is connected to one of the plurality of first conductive pads, the second line end part is connected to the first conductive ring, and the first conductive ring is electrically connected to a ground potential.

Description

Technical Field

[0001] The present disclosure relates to an electronic device, and more particularly to an electronic device having an electrostatic protection structure. Background Art

[0002] Electronic devices have become essential necessities in life. Reflective electronic devices (display devices) have attracted increasing attention because they save power consumption and achieve green energy and environmental protection. Such devices can be applied to products such as e-books and display boards.

[0003] During the manufacturing process of electronic devices, many processes can cause electrostatic accumulation. For example, component bonding processes, cutting processes, and / or laminating processes may generate static charges. The discharge of these static charges (electrostatic discharge, ESD) may damage the components in the electronic device and affect the reliability of the electronic device.

[0004] Therefore, developing an electrostatic protection structure that can improve the reliability or performance of electronic devices remains one of the research topics that the industry is currently working on. Summary of the Invention

[0005] According to some embodiments of the present disclosure, an electronic device is provided, including a first panel. The first panel includes a first substrate, a second substrate, a plurality of first conductive pads, a first conductive ring, and a first electrostatic protection structure. The first substrate includes a first electronic component bonding area. The second substrate is disposed opposite to the first substrate. The plurality of first conductive pads are disposed on the first electronic component bonding area. The first conductive ring is disposed on the first substrate. The first electrostatic protection structure includes two opposite first line ends and second line ends. The first line end is connected to one of the plurality of first conductive pads, the second line end is connected to the first conductive ring, and the first conductive ring is electrically connected to the ground potential.

[0006] To make the features or advantages of the present disclosure more obvious and understandable, some embodiments are specifically described below in conjunction with the accompanying drawings as follows. Brief Description of the Drawings

[0007] Figure 1 Showing a top view structural schematic diagram of an electronic device according to some embodiments of the present disclosure;

[0008] Figure 2 Showing according to some embodiments of the present disclosure, corresponding Figure 1 A three-dimensional structural schematic diagram of the electronic device of the area R1;

[0009] Figure 3A Showing according to some embodiments of the present disclosure, corresponding Figure 2 A top view structural schematic diagram of the electronic device of the area R2;

[0010] Figure 3B A side view structural schematic diagram of an electronic device corresponding to region R2 in some embodiments of the present disclosure; Figure 2

[0011] Figure 3C A side view structural schematic diagram of an electronic device corresponding to region R2 in some embodiments of the present disclosure; Figure 2

[0012] Figure 4A An upward view structural schematic diagram of an electronic device corresponding to region R2 in some embodiments of the present disclosure; Figure 2

[0013] Figure 4B A side view structural schematic diagram of an electronic device corresponding to region R2 in some embodiments of the present disclosure; Figure 2

[0014] Figure 5A A partial upward view structural schematic diagram of an electronic device in some embodiments of the present disclosure;

[0015] Figure 5B A cross-sectional structural schematic diagram of an electronic device corresponding to section line A-A' in some embodiments of the present disclosure; Figure 5A

[0016] Figure 5C A cross-sectional structural schematic diagram of an electronic device corresponding to section line B-B' in some embodiments of the present disclosure; Figure 5A

[0017] Figure 5D An upward view structural schematic diagram of an electronic device corresponding to region R3 in some embodiments of the present disclosure; Figure 5A

[0018] Figure 5E A cross-sectional structural schematic diagram of an electronic device corresponding to section line C-C' in some embodiments of the present disclosure; Figure 5D

[0019] Figure 6A An upward view structural schematic diagram of an electronic device corresponding to region R4 in some embodiments of the present disclosure; Figure 1

[0020] Figure 6B An upward view structural schematic diagram of an electronic device corresponding to region R5 in some embodiments of the present disclosure; Figure 1

[0021] Figure 6C A cross-sectional structural schematic diagram of an electronic device corresponding to section line in some embodiments of the present disclosure; Figure 1Schematic top view structure diagram of the electronic device in area R6;

[0022] Figure 7A Show that in some embodiments according to the present disclosure, corresponding to Figure 1 Schematic top view structure diagram of the electronic device in area R7;

[0023] Figure 7B Show that in some embodiments according to the present disclosure, corresponding to Figure 1 Schematic top view structure diagram of the electronic device in area R8;

[0024] Schematic top view structure diagram of the sub-device;

[0025] Figure 7C Show that in some embodiments according to the present disclosure, corresponding to Figure 1 Schematic top view structure diagram of the electronic device in area R9;

[0026] Figure 8A Show that in some embodiments according to the present disclosure, schematic top view structure diagram of the electronic device;

[0027] Figure 8B Show that in some embodiments according to the present disclosure, schematic perspective structure diagram of the electronic device;

[0028] Figure 9A Show that in some embodiments according to the present disclosure, schematic top view structure diagram of the electronic device;

[0029] Figure 9B Show that in some embodiments according to the present disclosure, schematic perspective structure diagram of the electronic device;

[0030] Figure 10 Show that in some embodiments according to the present disclosure, schematic perspective structure diagram of the electronic device.

[0031]

Symbol description

[0032] 1, 2, 3, 4: Electronic device

[0033] 10A, 10B, 10C: Panel

[0034] 100a, 100b: Substrate

[0035] 110: Frame adhesive

[0036] 110P: Conductive particles

[0037] 120, 120O, 120I: Conductive pad

[0038] 130, 130-1: Electronic component

[0039] 160a, 160b: Electrode

[0040] 200, 200: Conductive ring

[0041] 300, 300-1: Circuit board

[0042] 320, 320i: Conductive pad

[0043] 400, 400-1: Control board

[0044] 400C, 400C-1: Connection component

[0045] A-A’, B-B’, C-C’: Cutting line

[0046] AA: Active area

[0047] AM: Alignment mark

[0048] BD: Electronic component bonding area

[0049] BP: Fracture structure

[0050] CL: Connection structure

[0051] D1, D200, Da, Dsl: Distance

[0052] DP: dummy conductive pad

[0053] DM: dummy conductive line

[0054] LC: Modulating material

[0055] LS: Laser cutting process

[0056] NAA: Peripheral area

[0057] OP: Opening area

[0058] PV1, PV2, PV3, PV4: Insulating layer

[0059] PS: Spacing component

[0060] PT: Electrostatic protection structure

[0061] R1, R2, R3, R4, R5, R6, R7, R8, R9: Region

[0062] Rp: Region

[0063] SL: Signal line

[0064] SP: Spacing region

[0065] TL1, TL2, TL2’: Line

[0066] TR1: First line end

[0067] TR2: Second circuit end

[0068] V1, V1-1, V1-2: Via holes

[0069] W110, W110’, W200, Wsp, Wsl, Wtr: Widths Detailed implementation manners

[0070] The following descriptions list multiple embodiments of this case to introduce the basic concepts of this case, and are not intended to limit the content of this case. The actual scope of the invention should be defined according to the claims. The following will refer in detail to the exemplary embodiments of the present disclosure, and examples of the exemplary embodiments are illustrated in the drawings. As long as possible, the same component symbols are used in the drawings and the description to represent the same or similar parts.

[0071] The following will make a detailed description of the electronic device according to the embodiments of the present disclosure. It should be understood that the following descriptions provide many different embodiments for implementing different aspects of some embodiments of the present disclosure. The specific components and arrangements described below are only for simply and clearly describing some embodiments of the present disclosure. Of course, these are only for illustration and not a limitation of the present disclosure. In addition, similar and / or corresponding reference numerals may be used in different embodiments to label similar and / or corresponding components to clearly describe the present disclosure. However, the use of these similar and / or corresponding reference numerals is only for simply and clearly describing some embodiments of the present disclosure, and does not represent any association between the different embodiments and / or structures discussed.

[0072] It should be understood that relative terms may be used in the embodiments, such as "lower" or "bottom" or "higher" or "top", to describe the relative relationship of one component shown in the drawings to another component. It can be understood that if the device in the drawings is flipped upside down, the component described on the "lower" side will become the component on the "higher" side. The embodiments of the present disclosure can be combined with the attached Figure 1 And it is understood that the drawings of the present disclosure are also regarded as part of the public description. It should be understood that the drawings of the present disclosure are not drawn to scale. In fact, the sizes of the components may be arbitrarily enlarged or reduced to clearly show the features of the present disclosure.

[0073] A structure (or layer, component, substrate) described in the present disclosure being located above / on another structure (or layer, component, substrate) may mean that the two structures are adjacent and directly connected, or may mean that the two structures are adjacent but not directly connected. Not being directly connected means that there is at least one intermediate structure (or intermediate layer, intermediate component, intermediate substrate, intermediate interval) between the two structures. The lower surface of one structure is adjacent to or directly connected to the upper surface of the intermediate structure, and the upper surface of the other structure is adjacent to or directly connected to the lower surface of the intermediate structure. And the intermediate structure can be composed of a single-layer or multi-layer solid structure or non-solid structure, without limitation. In the present disclosure, when a certain structure is disposed "on" other structures, it may mean that the certain structure is "directly" on the other structures, or may mean that the certain structure is "indirectly" on the other structures, that is, there is at least one structure interposed between the certain structure and the other structures.

[0074] In addition, it should be understood that the ordinal numbers such as "first", "second", etc. used in the specification and claims are used to modify components, and do not themselves imply or represent that the component (or these components) has any previous ordinal numbers, nor represent the order of one component and another component, or the order in the manufacturing method. The use of these ordinal numbers is only to clearly distinguish a component with a certain name from another component with the same name. The same terms may not be used in the claims and the specification. For example, the first component in the specification may be the second component in the claims.

[0075] In some embodiments of the present disclosure, terms related to joining and connecting, such as "connect" and "interconnect", unless otherwise defined, may mean that two structures are in direct contact, or may also mean that the two structures are not in direct contact, with other structures disposed between the two structures. And these terms related to joining and connecting may also include the cases where both structures are movable, or both structures are fixed. In addition, the term "electrically connected" or "coupled" includes any direct and indirect electrical connection means.

[0076] In the text, the terms "about", "substantially", and "essentially" generally mean within 10%, or within 5%, or within 3%, or within 2%, or within 1%, or within 0.5% of a given value or range. Unless otherwise specified, the term "ranging from a first value to a second value" means that the range includes the first value, the second value, and other values therebetween. Furthermore, there may be a certain error between any two values or directions being compared. If the first value is equal to the second value, it implies that there may be an error of about 10% between the first value and the second value; if the first direction is perpendicular to the second direction, the angle between the first direction and the second direction may range from 80 degrees to 100 degrees; if the first direction is parallel to the second direction, the angle between the first direction and the second direction may range from 0 degrees to 10 degrees. In the present disclosure, the terms "a given range is from a first value to a second value" and "a given range falls within the range from a first value to a second value" mean that the given range includes the first value, the second value, and other values therebetween.

[0077] Furthermore, according to embodiments of the present disclosure, an optical microscope (OM), a scanning electron microscope (SEM), an α-step, an ellipsometer, or other suitable means may be used to measure the thickness, length, width, or the distance or angle between components of each component. Specifically, according to some embodiments, a scanning electron microscope may be used to obtain a cross-sectional image of the structure and measure the thickness, length, width, or the distance or angle between components.

[0078] It should be understood that throughout the specification and the appended claims of the present disclosure, certain terms are used to refer to specific components. Those skilled in the art should understand that electronic device manufacturers may refer to the same component by different names. This document does not intend to distinguish components that have the same function but different names. In the following specification and claims, words such as "comprising", "including", and "having" are open-ended terms, and thus should be interpreted as meaning "including but not limited to...". Therefore, when the description of the present disclosure uses the terms "comprising", "including", and / or "having", it specifies the existence of corresponding features, regions, steps, operations, and / or components, but does not exclude the existence of one or more corresponding features, regions, steps, operations, and / or components.

[0079] It should be understood that, without departing from the spirit of the present disclosure, the features in several different embodiments may be replaced, reorganized, and combined to complete other embodiments. As long as the features between embodiments do not violate the inventive spirit or conflict with each other, they can be arbitrarily combined and used.

[0080] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meanings as those commonly understood by technicians in the technical field to which the present disclosure belongs. It is understood that these terms, such as the terms defined in commonly used dictionaries, should be interpreted as having a meaning consistent with the background or context of the relevant technology and the present disclosure, and should not be interpreted in an idealized or overly formal manner unless specifically defined in the embodiments of the present disclosure. The present disclosure can be understood by referring to the following detailed description in conjunction with the accompanying drawings. It should be noted that in order to make it easy for readers to understand and for the simplicity of the drawings, the multiple drawings in the present disclosure only depict a portion of the electronic device, and specific components in the drawings are not drawn according to actual proportions. In addition, the number and size of each component in the figure are only for illustration and are not intended to limit the scope of the present disclosure.

[0081] Certain words are used throughout the specification and the appended claims to refer to specific components. It should be understood by those skilled in the art that electronic device manufacturers may refer to the same components by different names. This document does not intend to distinguish between components that have the same function but different names.

[0082] According to an embodiment of the present disclosure, an electronic device is provided, comprising a conductive ring and an electrostatic protection structure electrically connected to the conductive ring, wherein the electrostatic charge accumulated in the electrostatic protection structure can be discharged by the conductive ring, thereby reducing component damage caused by electrostatic discharge, thereby improving the reliability of the electronic device. Furthermore, according to an embodiment of the present disclosure, the electrostatic protection structure may not use a semiconductor layer, thereby simplifying the manufacturing process or reducing production costs.

[0083] The electronic device of the present disclosure may include electronic components. The electronic components may include passive components, active components, or a combination of the above, such as capacitors, resistors, inductors, varactor diodes, variable capacitors, filters, diodes, transistors, sensors, microelectromechanical system components (MEMS), liquid crystal chips, etc., but are not limited thereto. The diodes may include light-emitting diodes or non-light-emitting diodes. The diodes include P-N junction diodes, PIN diodes, or constant current diodes. The light-emitting diodes may include, for example, organic light-emitting diodes (OLEDs), mini light-emitting diodes, micro light-emitting diodes, quantum dot light-emitting diodes, fluorescence, phosphorescence, or other suitable materials, or a combination of the above, but are not limited thereto. The sensors may include, for example, capacitive sensors, optical sensors, electromagnetic sensors, fingerprint sensors (FPS), touch sensors, antennas, or pen sensors, etc., but are not limited thereto. Hereinafter, a display device will be used as the electronic device to illustrate the present disclosure, but is not limited thereto.

[0084] The electronic device may include, but is not limited to, an imaging device, a bonding device, a display device, a backlight device, an antenna device, a splicing device, a touch display, a curved display, or a freeform display. The electronic device may include, for example, liquid crystal, light emitting diode, fluorescence, phosphor, other suitable display media, or a combination of the foregoing, but is not limited thereto. The display device may be a non-self-luminous display device or a self-luminous display device. The antenna device may be a liquid crystal type antenna device or a non-liquid crystal type antenna device. The sensing device may be a sensing device for sensing capacitance, light, heat, or ultrasonic waves, but is not limited thereto. The splicing device may be, for example, a display splicing device or an antenna splicing device, but is not limited thereto. It should be noted that the electronic device may be any permutation and combination of the foregoing, but is not limited thereto. The electronic device may be a bendable or flexible electronic device. It should be noted that the electronic device may be any permutation and combination of the foregoing, but is not limited thereto. In addition, the outer shape of the electronic device may be rectangular, circular, polygonal, a shape with curved edges, or other suitable shapes. The electronic device may have peripheral systems such as a driving system, a control system, a light source system, a shelf system, etc. to support the display device, the antenna device, or the splicing device. It should be understood that, without departing from the spirit of the present disclosure, the features in several different embodiments may be replaced, reorganized, and mixed to complete other embodiments in the following embodiments. As long as the features between the embodiments do not violate the inventive spirit or conflict with each other, they can be arbitrarily mixed and used.

[0085] Please refer to Figure 1 and Figure 2 , Figure 1 showing a top view structural diagram of the electronic device 1 in some embodiments of the present disclosure, Figure 2 showing in some embodiments of the present disclosure, Figure 1 a three-dimensional structural diagram of the electronic device 1 in the region R1 of. It should be understood that, for the sake of clarity, some components of the electronic device 1 may be omitted in the drawings, and only some components are schematically shown. According to some embodiments, additional features may be added to the electronic device 1 described below.

[0086] As Figure 1 and Figure 2 shown, the electronic device 1 may include a panel 10A. The panel 10A may include a substrate 100a, a substrate 100b, and a frame adhesive 110. The substrate 100a is disposed relative to the substrate 100b. The frame adhesive 110 is disposed between the substrate 100a and the substrate 100b and includes a plurality of conductive particles 110P (such as Figure 5BAs shown). It should be understood that, for the sake of clarity, the drawings do not illustrate the up-and-down positional relationship of the components, and the size relationship between the substrate 100a and the substrate 100b is not limited to that shown in the drawings. According to some embodiments, the panel 10A may have an active area AA and a peripheral area NAA adjacent to the active area AA, and the peripheral area NAA may be adjacent to at least one side of the active area AA. According to some embodiments, the peripheral area NAA may be disposed to surround the active area AA. According to some embodiments, the active area AA may include, for example, a display area, a detection area, a touch area, a light-emitting area, other suitable application areas, or a combination of the foregoing.

[0087] According to some embodiments, the substrate 100a may serve as a driving substrate (or an array substrate), and a driving circuit may be provided on the substrate 100a. For example, a passive driving circuit may be provided, but is not limited thereto. According to some embodiments (not shown), an active driving circuit (such as including transistors) may be provided on the substrate 100a. According to some embodiments, a color filter layer may be provided on the substrate 100b, but is not limited thereto. According to some embodiments, a color filter layer may be provided on the substrate 100a. According to some embodiments, the substrate 100a and / or the substrate 100b may include a flexible substrate, a rigid substrate, or a combination of the foregoing, but is not limited thereto. According to some embodiments, the substrate 100a and / or the substrate 100b may include a light-transmissive substrate, but is not limited thereto. According to some embodiments, the material of the substrate 100a and / or the substrate 100b may include glass, quartz, sapphire, ceramics, polyimide (PI), polycarbonate (PC), polyethylene terephthalate (PET), polypropylene (PP), other suitable materials, or a combination of the foregoing, but is not limited thereto. Furthermore, the material of the substrate 100a may be the same as or different from the material of the substrate 100b.

[0088] Specifically, the substrate 100a may include an electronic component bonding area BD. According to some embodiments, the electronic component bonding area BD may be located in the peripheral area NAA of the panel 10A. According to some embodiments, an electronic component 130 may be disposed on the electronic component bonding area BD, and the electronic component 130 may include, for example, an integrated circuit (IC) component, but is not limited thereto.

[0089] According to some embodiments, the circuit board 300 can be electrically connected to the panel 10A, and the circuit board 300 can be disposed on the substrate 100a. According to some embodiments, the circuit board 300 can be electrically connected to the electronic component 130. According to some embodiments, the circuit board 300 can include a flexible printed circuit (FPC) or a chip on film (COF), but is not limited thereto.

[0090] Furthermore, the panel 10A can include a plurality of conductive pads 120, and the conductive pads 120 can be disposed on the electronic component bonding region BD. According to some embodiments, the conductive pads 120 can be electrically connected to the electronic component 130 and the circuit board 300. According to some embodiments (such as Figure 2 ), a part of the conductive pads 120 (labeled as 120O) can be used as the conductive pads of the signal output terminals of the electronic component 130, and a part of the conductive pads 120 (labeled as 120I) can be used as the conductive pads of the signal input terminals of the electronic component 130. According to some embodiments, the panel 10A can include a plurality of conductive pads 320, and the circuit board 300 can be disposed on the conductive pads 320 and electrically connected to the conductive pads 320. According to some embodiments, the electronic component 130 can be electrically connected to the circuit board 300 through the conductive pads 120I, the conductive pads 320, and the lines (not labeled) disposed therebetween. The conductive pads 120 and / or the conductive pads 320 can include a metal material, a transparent conductive material, other suitable conductive materials, or a combination of the foregoing, but is not limited thereto. The metal material can, for example, include copper (Cu), silver (Ag), gold (Au), tin (Sn), aluminum (Al), molybdenum (Mo), tungsten (W), chromium (Cr), nickel (Ni), platinum (Pt), titanium (Ti), alloys of the foregoing metals, other suitable materials, or a combination of the foregoing, but is not limited thereto. The transparent conductive material can include a transparent conductive oxide (TCO), for example, can include indium tin oxide (ITO), antimony zinc oxide (AZO), tin oxide (SnO), zinc oxide (ZnO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), indium tin zinc oxide (ITZO), antimony tin oxide (ATO), other suitable transparent conductive materials, or a combination of the foregoing, but is not limited thereto.

[0091] The panel 10A may include a conductive ring 200, and the conductive ring 200 may be disposed on the substrate 100a. According to some embodiments (such as Figure 1 and Figure 2 ), the conductive ring 200 may be located in the peripheral region NAA and disposed around the active region AA. According to some embodiments, the conductive ring 200 may partially overlap with the bonding area BD of the electronic component and the circuit board 300. In the normal direction (Z direction) of the substrate 100a, a part of the conductive ring 200 may overlap with the frame adhesive 110, and the conductive ring 200 may be electrically connected to the ground potential. For example, the accumulated static charge may be led out of the active region AA to reduce the influence of the static charge on the circuits in the active region AA or the peripheral circuits. Specifically, the conductive ring 200 may be electrically connected to a designated conductive pad 320 (labeled as 320i, such as Figure 2 ) of the circuit board 300 and connected to the ground potential via the system end (not shown), but not limited thereto. The conductive ring 200 may be connected to the ground potential via other means. The conductive ring 200 may be formed of a conductive material, for example, a metal material with low impedance. According to some embodiments, the metal material with low impedance may include copper (Cu), silver (Ag), gold (Au), tin (Sn), aluminum (Al), molybdenum (Mo), tungsten (W), chromium (Cr), nickel (Ni), platinum (Pt), titanium (Ti), alloys of the foregoing metals, other suitable materials, or combinations of the foregoing, but not limited thereto. Furthermore, the conductive ring 200 may have a single-layer structure or a multi-layer structure. In some embodiments, in the normal direction (Z direction) of the substrate 100a, the conductive ring 200 may have an arc-shaped edge at the corner.

[0092] Such as Figure 2As shown, according to some embodiments, the panel 10A may include an insulating layer PV1 and an insulating layer PV2 disposed on the substrate 100a, and the insulating layer PV2 may be disposed on the insulating layer PV1. According to some embodiments, the conductive ring 200 may be disposed on the insulating layer PV1 and between the insulating layer PV1 and the insulating layer PV2, but is not limited thereto. The insulating layer PV1 and / or the insulating layer PV2 may include an organic material, an inorganic material, other suitable materials, or a combination of the foregoing, but is not limited thereto. According to some embodiments, the inorganic material may include silicon nitride, silicon oxide, silicon oxynitride, aluminum oxide, other suitable materials, or a combination of the foregoing, but is not limited thereto. According to some embodiments, the organic material may include epoxy resins, silicone resins, acrylic resins (such as polymethylmethacrylate (PMMA)), benzocyclobutene (BCB), polyimide, polyester, polydimethylsiloxane (PDMS), perfluoroalkoxy alkane (PFA), other suitable materials, or a combination of the foregoing, but is not limited thereto. Furthermore, the material of the insulating layer PV1 may be the same as or different from the material of the insulating layer PV2. By disposing the conductive ring 200 between the insulating layer PV1 and the insulating layer PV2, the influence of moisture on the conductivity of the conductive ring 200 can be reduced, and its performance can be reduced.

[0093] Next, please refer to Figure 3A , Figure 3B and Figure 3C , Figure 3A which shows a top view structural schematic diagram of the electronic device 1 corresponding to the region R2 corresponding to Figure 2 in some embodiments of the present disclosure, Figure 3B and Figure 3C which shows a side view structural schematic diagram of the electronic device 1 corresponding to the region R2 corresponding to Figure 2 in some embodiments of the present disclosure.

[0094] As Figure 3A , Figure 3B and Figure 3CAs shown, the panel 10A may include an electrostatic protection structure PT, and the electrostatic protection structure PT may be disposed on the electronic component bonding area BD. The electrostatic protection structure PT may include two opposite first line ends TR1 and a second line end TR2, the first line end TR1 is connected to one of a plurality of conductive pads 120, and the second line end TR2 is connected to the conductive ring 200. According to some embodiments, the two opposite first line ends TR1 and the second line end TR2 of the electrostatic protection structure PT may be, for example, two ends of the line TL2' after the line TL2 is disconnected. In detail, according to some embodiments, one end of the conductive pad 120 (for example, the conductive pad 120O as the signal output end of the electronic component 130) located on the electronic component bonding area BD may be connected to the line TL1, and the other end may be connected to the line TL2, the line TL1 may be a signal line (for example, a scan line or a data line, but not limited thereto) that transmits a signal to the active area AA, and the line TL2 may be electrically connected to the conductive ring 200. According to some embodiments, the line TL1 and the line TL2 may be disposed between the insulating layer PV1 and the insulating layer PV2. The line TL1 and the line TL2 may be, for example, the same material layer. The conductive pad 120 may be disposed on the insulating layer PV2 and electrically connected to the line TL2 through the conductive hole V1 of the insulating layer PV2. According to some embodiments, the line TL2 electrically connected to the conductive ring 200 may be disconnected by performing a laser cutting process LS to form a disconnected line TL2', thereby generating two opposite line ends TR as an electrostatic protection structure PT, but not limited thereto, the line TL2 electrically connected to the conductive ring 200 may be disconnected by other suitable methods to form a disconnected line TL2'. According to some embodiments, before the electronic component is bonded to the electronic component bonding area BD, the laser cutting process LS may be performed to disconnect the line TL2 into a disconnected line TL2'. In detail, the uncut line TL2 can be used, for example, to distribute static charge, reduce static electricity concentration at a specific location, and reduce the electrostatic damage to the circuit in the surface or the electronic component bonding area BD, while the cut line TL2' can induce static electricity to the end connected to the conductive ring 200 and conduct the static electricity through the conductive ring 200 electrically connected to the ground potential, thereby improving the effect of electrostatic protection. In addition, the above-mentioned line TL1 and line TL2 can be formed of a conductive material, for example, a metal material with low impedance. According to some embodiments, the metal material with low impedance can include copper (Cu), silver (Ag), gold (Au), tin (Sn), aluminum (Al), molybdenum (Mo), tungsten (W), chromium (Cr), nickel (Ni), platinum (Pt), titanium (Ti), alloys of the above metals, other suitable materials or combinations of the above, but not limited thereto. Furthermore, the line TL1 and / or the line TL2 can have a single-layer structure or a multi-layer structure.

[0095] like Figure 3CAs shown, according to some embodiments, there is a spacer region SP between two line ends (the first line end TR1 and the second line end TR2) of the disconnected line TL2'. The spacer region SP is at a distance Da from one of the plurality of conductive pads 120, and the distance Da can be greater than or equal to 200 micrometers and less than or equal to 600 micrometers (200μm ≤ distance Da ≤ 600μm), but is not limited thereto. According to some embodiments, the distance Da can be greater than or equal to 250 micrometers and less than or equal to 550 micrometers (250μm ≤ distance Da ≤ 550μm), but is not limited thereto. According to some embodiments, the distance Da can be greater than or equal to 250 micrometers and less than or equal to 500 micrometers (250μm ≤ distance Da ≤ 500μm). According to some embodiments, the distance Da can be greater than or equal to 250 micrometers and less than or equal to 450 micrometers (250μm ≤ distance Da ≤ 450μm). According to some embodiments, the distance Da can be greater than or equal to 250 micrometers and less than or equal to 400 micrometers (250μm ≤ distance Da ≤ 400μm). According to some embodiments, the distance Da refers to the minimum distance between the conductive pad 120 closest to the line end (such as the first line end TR1) and the spacer region SP in a direction perpendicular to the normal direction of the substrate 100a (for example, the X direction). It should be noted that if the distance Da between the spacer region SP and the conductive pad 120 is too small (for example, less than 200μm), there may be a risk of damage to the conductive pad 120 due to the precision of the laser cutting process, and thus the function of electrostatic protection cannot be achieved.

[0096] Furthermore, the spacer region SP has a width Wsp in the X direction. According to some embodiments, the width Wsp of the spacer region SP can be greater than or equal to 2.5 micrometers and less than or equal to 10 micrometers (2.5μm ≤ width Wsp ≤ 10μm), or greater than or equal to 3.5 micrometers and less than or equal to 9.5 micrometers, or greater than or equal to 4 micrometers and less than or equal to 9 micrometers, or greater than or equal to 4.5 micrometers and less than or equal to 8.5 micrometers, or greater than or equal to 5 micrometers and less than or equal to 8 micrometers, for example, 5.5 micrometers, 6 micrometers, 6.5 micrometers, 7 micrometers, or 7.5 micrometers, but is not limited thereto. According to some embodiments, the width Wsp refers to the minimum width of the spacer region SP measured at any cross-section in a direction perpendicular to the normal direction of the substrate 100a (for example, the X direction). The width Wsp can also be measured as the minimum width of the spacer region SP at any location in the direction of looking down at the electronic device. It should be noted that when the spacer region SP has a width Wsp within the aforementioned range, it can meet the precision limitations of the laser cutting process and can effectively conduct charges to the ground. According to some embodiments, the line ends (the first line end TR1 and the second line end TR2) on both sides of the spacer region SP can have arc-shaped edges or flat edges.

[0097] Next, please refer toFigure 4A and Figure 4B , Figure 4A show a top view structural schematic diagram of the electronic device 1 corresponding to the region R2 in some other embodiments of the present disclosure, Figure 2 and a side view structural schematic diagram of the electronic device 1 corresponding to the region R2 in some other embodiments of the present disclosure. Figure 4B show a top view structural schematic diagram of the electronic device 1 corresponding to the region R2 in some other embodiments of the present disclosure, Figure 2 and a side view structural schematic diagram of the electronic device 1 corresponding to the region R2 in some other embodiments of the present disclosure.

[0098] As Figure 4A and Figure 4B shown, the electrostatic protection structure PT may include two opposite first line ends TR1 and second line ends TR2. The first line end TR1 is connected to one of the plurality of conductive pads 120, and the second line end TR2 is connected to the conductive ring 200. According to some embodiments, the two opposite first line ends TR1 and second line ends TR2 of the electrostatic protection structure PT may be two ends of a disconnected line TL2'. According to some embodiments, one end of the conductive pad 120 (for example, the conductive pad 120O serving as the signal output end of the electronic component 130) located on the electronic component bonding region BD may be connected to the line TL1, and the other end may be connected to a part of the disconnected line TL2'. The line TL1 may be a signal line for transmitting signals to the active region AA (reference may be made to the foregoing description), and another part of the disconnected line TL2' may be electrically connected to the conductive ring 200. The disconnected line TL2' can induce static electricity to one end connected to the conductive ring 200 and export the static electricity through the conductive ring 200 electrically connected to the ground potential, thereby improving the effect of electrostatic protection. In this embodiment, the line TL2 may be patterned by one or more lithography processes and / or etching processes to form the disconnected line TL2', but it is not limited thereto. The lithography process may include photoresist coating (such as spin coating), soft baking, hard baking, mask alignment, exposure, post-exposure baking, photoresist development, cleaning, and drying, etc., but it is not limited thereto. The etching process may include a dry etching process or a wet etching process, but it is not limited thereto. In this embodiment, two opposite line ends (the first line end TR1 and the second line end TR2) can be directly formed by a patterning process, and there is no need to additionally perform a laser cutting process to disconnect the line TL2, so the process can be simplified.

[0099] As Figure 4BAs shown, the insulating layer PV2 can be disposed on the electrostatic protection structure PT. The insulating layer PV2 can have an opening region OP. The opening region OP can overlap the spacer region SP between the first line end TR1 and the second line end TR2 and expose a part of the first line end TR1 and the second line end TR2. Specifically, in the normal direction (Z direction) of the substrate 100a, the opening region OP of the insulating layer PV2 overlaps the spacer region SP between the first line end TR1 and the second line end TR2. As described above, the width Wsp of the spacer region SP can be greater than or equal to 2.5 micrometers and less than or equal to 10 micrometers (2.5μm ≤ width Wsp ≤ 10μm), or greater than or equal to 3.5 micrometers and less than or equal to 9.5 micrometers, or greater than or equal to 4 micrometers and less than or equal to 9 micrometers, or greater than or equal to 4.5 micrometers and less than or equal to 8.5 micrometers. For example, 5 micrometers, 5.5 micrometers, 6 micrometers, 6.5 micrometers, 7 micrometers, 7.5 micrometers or 8 micrometers, but not limited thereto.

[0100] According to some embodiments, the exposed parts of the first line end TR1 and the second line end TR2 can respectively have a width Wtr. The width Wtr can be greater than or equal to 1 micrometer and less than or equal to 6 micrometers (1μm ≤ width Wtr ≤ 6μm), or the width Wtr can be greater than or equal to 2 micrometers and less than or equal to 5 micrometers (2μm ≤ width Wtr ≤ 5μm), or the width Wtr can be greater than or equal to 2.5 micrometers and less than or equal to 4.5 micrometers (2.5μm ≤ width Wtr ≤ 4.5μm). For example, 3 micrometers, 3.5 micrometers or 4 micrometers, but not limited thereto. According to some embodiments, the width Wtr refers to the maximum width of the exposed line ends (the first line end TR1 and the second line end TR2) measured in an arbitrary cross-section in a direction perpendicular to the normal direction of the substrate 100a (for example, the X direction). According to some embodiments, the widths Wtr of the first line end TR1 and the second line end TR2 can be the same or different.

[0101] Next, please refer to Figure 5A , Figure 5B and Figure 5C , Figure 5A which shows a partial top view structural schematic diagram of the electronic device 1 according to some embodiments of the present disclosure. Figure 5B shows a cross-sectional structural schematic diagram of the electronic device 1 corresponding to the cut line A-A' (for example, corresponding to the peripheral region NAA) according to some embodiments of the present disclosure, Figure 5A and Figure 5C shows a cross-sectional structural schematic diagram of the electronic device 1 corresponding to the cut line B-B' (for example, corresponding to the active region AA) according to some embodiments of the present disclosure. It should be understood that, for clarity of illustration, Figure 5A the substrate 100b is omitted in Figure 5A .

[0102] As Figure 5A and Figure 5B shown, the frame adhesive 110 can be disposed between the substrate 100a and the substrate 100b and includes a plurality of conductive particles 110P. According to some embodiments, the width W200 of the conductive ring 200 can be greater than or equal to 20 microns and less than the width W110 of the frame adhesive 110 (20 μm ≤ width W200 ≤ width W110), but is not limited thereto. According to some embodiments, the width W200 of the conductive ring 200 can be greater than or equal to 30 microns (or 40 microns) and less than the width W110 of the frame adhesive 110. According to some embodiments, the width W200 of the conductive ring 200 can be greater than the width W110' of at least one of the plurality of conductive particles 110P (width W110' ≤ width W200). According to some embodiments, the width W200 refers to the average value of the widths of the conductive ring 200 measured at any three locations in a direction perpendicular to the normal direction of the substrate 100a (such as the X direction, but not limited). According to some embodiments, the width W110 refers to the average value of the widths of the frame adhesive 110 measured at any three locations in a direction perpendicular to the normal direction of the substrate 100a (such as the X direction, but not limited).

[0103] According to some embodiments, the width W110' of the conductive particle 110P can be greater than or equal to 5 microns and less than or equal to 10 microns (5 μm ≤ width W110' ≤ 10 μm), such as 6 microns, 7 microns, 8 microns or 9 microns, but is not limited thereto. According to some embodiments, the width W110' refers to the average value of the maximum widths measured for any three conductive particles 110P after bonding in a direction perpendicular to the normal direction of the substrate 100a (such as the X direction, but not limited).

[0104] According to some embodiments, the frame adhesive 110 can include a photocurable adhesive material, a thermosetting adhesive material, a photo-thermosetting adhesive material, other suitable materials, or a combination of the foregoing, but is not limited thereto.

[0105] According to some embodiments, the conductive particles 110P can be formed of a conductive material. For example, the conductive particles 110P can include copper (Cu), silver (Ag), gold (Au), tin (Sn), aluminum (Al), molybdenum (Mo), tungsten (W), chromium (Cr), nickel (Ni), platinum (Pt), titanium (Ti), alloys of the foregoing metals, other suitable materials, or a combination of the foregoing, but is not limited thereto.

[0106] As Figure 5A and Figure 5CAs shown, according to some embodiments, panel 10A may further include electrodes 160a, electrodes 160b, a modulation material LC (such as a liquid crystal material or an electrophoretic material), and a spacer component PS. Electrodes 160a, electrodes 160b, modulation material LC, and spacer component PS may be disposed between substrate 100a and substrate 100b and may be located in the active area AA. A plurality of electrodes 160a and a plurality of electrodes 160b may be interleaved with each other to form a plurality of overlapping regions. These overlapping regions (which may serve as pixel regions, but are not limited thereto), the active area AA may be defined as the area enclosing all the overlapping regions, and the peripheral area NAA may be defined as the area excluding the active area AA. According to some embodiments, electrodes 160a and electrodes 160b may partially extend into the peripheral area NAA and partially overlap with the sealant 110 in the normal direction (Z direction) of substrate 100a. According to some embodiments, the sealant 110 is disposed in the peripheral area NAA. According to some embodiments, the modulation material LC may be disposed between electrodes 160a and electrodes 160b. Furthermore (as Figure 5C ), panel 10A may include an insulating layer PV3 and / or an insulating layer PV4 disposed on substrate 100b. Insulating layer PV4 may be disposed between modulation material LC and insulating layer PV3. According to some embodiments, electrodes 160b may be disposed between insulating layer PV2 and modulation material LC, and electrodes 160a may be disposed between insulating layer PV4 and modulation material LC. According to some embodiments, spacer component PS may be disposed between insulating layer PV2 and insulating layer PV4. According to some embodiments, spacer component PS may be disposed between two adjacent electrodes 160a. According to some embodiments, spacer component PS may be disposed between two adjacent electrodes 160b. According to some embodiments, in the normal direction (Z direction) of substrate 100a, spacer component PS, for example, does not overlap with electrodes 160a and / or electrodes 160b. According to some embodiments, in the normal direction (Z direction) of substrate 100a, spacer component PS, for example, does not overlap with the overlapping regions (such as pixel regions) of electrodes 160a and electrodes 160b. Through this design, the modulation of the modulation material LC in the overlapping regions (such as pixel regions) by spacer component PS can be reduced.

[0107] According to some embodiments, electrode 160a may be electrically connected to line TL1 through connection structure CL and then electrically connected to an electronic component 130 (not shown) on the electronic component bonding region BD. Regarding the detailed structure of connection structure CL (such as Figure 5A , Figure 5C and Figure 5E ), it will be described in detail below. According to some embodiments, electrode 160b may be connected to a signal line SL ( Figure 5A not shown, reference may be made to subsequent Figure 6C) is electrically connected to the electronic component 130 on another electronic component bonding area BD. According to some embodiments, the electrode 160a and / or the electrode 160b may include a transparent conductive material. According to some embodiments, the transparent conductive material may include a transparent conductive oxide (transparent conductive oxide, TCO), for example, may include indium tin oxide (ITO), antimony zinc oxide (AZO), tin oxide (SnO), zinc oxide (ZnO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), indium tin zinc oxide (ITZO), antimony tin oxide (ATO), other suitable transparent conductive materials or combinations thereof, but are not limited thereto. Furthermore, the material of the electrode 160a may be the same as or different from the material of the electrode 160b.

[0108] According to some embodiments, an electric field may be applied to the modulation material LC by the electrodes 160a and 160b to change the optical properties (e.g., arrangement) of the modulation material LC. According to some embodiments, the modulation material LC may include a liquid crystal material, such as a cholesterol liquid crystal or other suitable liquid crystal material, but is not limited thereto. According to some embodiments, the material of the spacer element PS may include a photoresist material, but is not limited thereto.

[0109] Next, please refer to Figure 5D as well as Figure 5E , Figure 5D According to some embodiments of the present disclosure, Figure 5A A schematic diagram of the structure of the electronic device 1 in the region R3 is shown as a top view. Figure 5E According to some embodiments of the present disclosure, Figure 5D A schematic cross-sectional structural diagram of the electronic device 1 taken along the section line CC'.

[0110] like Figure 5D as well as Figure 5E As shown, according to some embodiments, the electrode 160a can be electrically connected to the circuit TL1 through the conductive particles 110P in the sealant 110 and the connection structure CL, and then electrically connected to the electronic component 130. According to some embodiments, the connection structure CL can be electrically connected to the circuit TL1 through the via hole V1-1 of the insulating layer PV2, and the electronic component 130 can also be electrically connected to the circuit TL1 through the via hole V1-2 of the insulating layer PV2.

[0111] Next, please refer to Figure 6A ,Figure 6A According to some embodiments of the present disclosure, Figure 1 The top view of the electronic device 1 in the area R4 is shown. Figure 6A As shown, according to some embodiments, the sealant 110 may cover part of the conductive ring 200, and the sealant 110 may be used to protect the conductive ring 200, reduce the risk of moisture affecting the performance of the conductive ring 200, and in addition, when the conductive ring 200 is subjected to a large instantaneous current, the sealant 110 may also be used to share the current flowing through. According to some embodiments, the panel may further include a plurality of dummy conductive pads DP, which may be disposed adjacent to the conductive ring 200, and these dummy conductive pads DP may improve the flatness of the sealant 110 coating. According to some embodiments, these dummy conductive pads DP may include metal conductive materials and / or transparent conductive materials, such as transparent conductive oxides, but not limited thereto. These dummy conductive pads DP are, for example, electrically floating. According to some embodiments, the panel may have more than one conductive ring 200, for example, the number of conductive rings 200 may be between 1 and 3, but not limited thereto. According to some embodiments, the configuration of the plurality of conductive rings 200 helps to disperse static charges at an equal potential.

[0112] Next, please refer to Figure 6B , Figure 6B According to some embodiments of the present disclosure, Figure 1 The top view of the electronic device 1 in the area R5 is shown. Figure 6B As shown, according to some embodiments, the panel may have multiple conductive rings 200. Specifically, the panel may include a conductive ring 200 and another conductive ring 200, and the other conductive ring 200 is connected in parallel with the conductive ring 200 (as shown in the area Rp in the figure). According to some embodiments, in the normal direction (Z direction) of the substrate 100a, the conductive ring 200 may partially overlap with these dummy conductive pads DP and the frame glue 110, and the position where the conductive ring 200 is connected in parallel may also overlap with the dummy conductive pad DP and the frame glue 110, but is not limited to this. According to other embodiments, the position where the conductive ring 200 and another conductive ring 200 are connected in parallel can be adjusted as needed. It should be understood that, Figure 1 Only one conductive ring 200 is shown schematically, but it includes a plurality of conductive rings, and these conductive rings are connected in parallel.

[0113] Next, please refer to Figure 6C , Figure 6C According to some embodiments of the present disclosure, Figure 1 The top view of the structure of the electronic device 1 in the area R6 is shown in FIG. Figure 6CAs shown, according to some embodiments, the panel may further include a signal line SL, the signal line SL is adjacent to the conductive ring 200, and the signal line SL may have a width Wsl. According to some embodiments, the ratio of the width W200 of the conductive ring 200 to the width Wsl of the signal line SL may be greater than or equal to 2 and less than or equal to 20 (2≤width W200 / Wsl≤20), or greater than or equal to 3 and less than or equal to 18, or greater than or equal to 4 and less than or equal to 16, or greater than or equal to 5 and less than or equal to 15, for example, 6, 7, 8, 9, 10, 11, 12, 13 or 14, but not limited thereto. According to some embodiments, the width Wsl refers to the average value of the width of the signal line measured at any three locations in a direction perpendicular to the normal direction Z of the substrate 100a (for example, the X direction, but not limited thereto).

[0114] Furthermore, the distance D1 between the conductive ring 200 and the signal line SL (the signal line that transmits the signal of the electronic component 130 to the active area AA) closest to the conductive ring 200 is greater than or equal to the distance Dsl between the signal lines SL (distance D1 ≥ distance Dsl). According to some embodiments, the distance D1 refers to the minimum distance between the conductive ring 200 and the signal line SL in a direction perpendicular to the normal direction Z of the substrate 100a (for example, the X direction, but not limited to). According to some embodiments, the distance D200 between two adjacent conductive rings 200, the distance Dsl between two adjacent signal lines SL, and the distance D200 between two adjacent conductive rings 200 may be greater than or equal to the distance Dsl between the signal lines SL (distance D200 ≥ distance Dsl). The distance D200 refers to the minimum distance between two adjacent conductive rings 200 in a direction perpendicular to the normal direction Z of the substrate 100a (for example, the X direction, but not limited to). The distance Ds1 refers to the minimum distance between two adjacent signal lines SL in a direction perpendicular to the normal direction of the substrate 100a.

[0115] Next, please refer to Figure 7A , Figure 7A According to some embodiments of the present disclosure, Figure 1 The top view of the electronic device 1 in the area R7 is shown. Figure 7A As shown, according to some embodiments, the panel may further include a dummy conductive line DM electrically connected to the dummy conductive pad DP, and the dummy conductive pad DP and the dummy conductive line DM may be adjacent to the conductive pad 120 connected to the line TL1 and the line TL2. The shape or size of the dummy conductive pad DP and the conductive pad 120 may be substantially the same. According to some embodiments, the dummy conductive pad DP and the dummy conductive line DM may be disposed on the electronic component bonding area BD, and the dummy conductive pad DP and the dummy conductive line DM may be electrically floating or connected to the ground potential.

[0116] Next, please refer to Figure 7B , Figure 7B to show a top view structural diagram of the electronic device 1 corresponding to the region R8 in some embodiments of the present disclosure. As Figure 1 shown, according to some embodiments, the conductive ring 200 can be connected in series with a designated conductive pad 320 (labeled 320i) of the circuit board 300, for example, to form an electrostatic discharge path connected to the system end. According to some embodiments, the alignment mark AM on the circuit board 300 can be disposed adjacent to the conductive pad 320. Figure 7B As shown, according to some embodiments, the conductive ring 200 can be serially connected to a designated conductive pad 320 (labeled 320i) of the circuit board 300, for example, to form an electrostatic discharge path connected to the system end. According to some embodiments, the alignment mark AM on the circuit board 300 can be disposed adjacent to the conductive pad 320.

[0117] Next, please refer to Figure 7C , Figure 7C to show a top view structural diagram of the electronic device 1 corresponding to the region R9 in some embodiments of the present disclosure. As Figure 1 shown, according to some embodiments, the conductive ring 200 can have a break structure BP, and the break structure BP is, for example, on a different side from the electronic component bonding region BD (such as the region R9 shown in Figure 7C ), and the conductive ring 200 can be discontinuous. By the design of the break structure BP, the antenna effect generated when the conductive ring 200 is in a ring shape can be reduced, and the influence on the performance of the capacitive electronic device can be lowered. According to some embodiments, the break structure BP can be located at the corner of the panel, but is not limited thereto. It should be noted that FIG. 7 schematically shows that the three conductive rings 200 located in the region R9 can have the break structure BP, but is not limited thereto. The number of conductive rings 200 having the break structure BP can be different according to the design, and the break structure BP can have an arc-shaped edge, and the break structure BP of different conductive rings 200 has a bending structure. Figure 1 As shown, according to some embodiments, the conductive ring 200 can have a break structure BP, and the break structure BP is, for example, on a different side from the electronic component bonding region BD (such as the region R9 shown), and the conductive ring 200 can be discontinuous. By the design of the break structure BP, the antenna effect generated when the conductive ring 200 is in a ring shape can be reduced, and the influence on the performance of the capacitive electronic device can be lowered. According to some embodiments, the break structure BP can be located at the corner of the panel, but is not limited thereto. It should be noted that FIG. 7 schematically shows that the three conductive rings 200 located in the region R9 can have the break structure BP, but is not limited thereto. The number of conductive rings 200 having the break structure BP can be different according to the design, and the break structure BP can have an arc-shaped edge, and the break structure BP of different conductive rings 200 has a bending structure.

[0118] Next, please refer to Figure 8A and Figure 8B , Figure 8A to show a top view structural diagram of the electronic device 2 in some other embodiments of the present disclosure, Figure 8B to show a three-dimensional structural diagram of the electronic device 2 in some embodiments of the present disclosure. It should be understood that the same or similar components (or components) as those in the foregoing will be denoted by the same or similar reference numerals hereinafter, and their materials, manufacturing methods, and functions are the same or similar to those described above, so this part will not be described in detail hereinafter.

[0119] As Figure 8A and Figure 8BAs shown, the electronic device 2 may include a plurality of panels, for example, panel 10A, panel 10B, and panel 10C. Panel 10A, panel 10B, and panel 10C may be stacked in sequence, with panel 10B disposed under panel 10A and panel 10C disposed under panel 10B. Attachment members (not shown) may be provided between panel 10A, panel 10B, and panel 10C to bond them to each other. Panel 10B and / or panel 10C may have a structure similar to or the same as that of panel 10A. According to some embodiments, panel 10B and / or panel 10C may respectively include a substrate 100a (refer to Figure 5B - 5C ), a substrate 100b (refer to Figure 5B - 5C ), a frame adhesive 110 (refer to Figure 5C ), a plurality of conductive pads 120 (refer to Figure 5B - 5C ), a conductive ring 200 (refer to Figure 2 ), and an electrostatic protection structure PT (refer to Figure 3C or Figure 4B ). The substrate 100a of panel 10B and / or panel 10C may include an electronic component bonding region BD as described above. The substrate 100b may be disposed relative to the substrate 100a. The frame adhesive 110 may be disposed between the substrate 100a and the substrate 100b and include a plurality of conductive particles 110P. The plurality of conductive pads 120 may be disposed on the electronic component bonding region BD. The conductive ring 200 may be disposed on the substrate 100a. The electrostatic protection structure PT may include two opposite first line ends TR1 and second line ends TR2. The first line end TR1 is connected to one of the plurality of conductive pads 120, the second line end TR2 is connected to the conductive ring 200, and the conductive ring 200 is electrically connected to the ground potential, and a part of the conductive ring 200 overlaps with the frame adhesive 110. Details of panel 10B and / or panel 10C may be referred to the foregoing panel 10A.

[0120] In addition, the electronic device 2 may include a plurality of circuit boards 300 and a control board 400. The plurality of circuit boards 300 may be electrically connected to the corresponding conductive rings 200 in the respective panels (panel 10A, panel 10B, or panel 10C). The control board 400 may be electrically connected to the conductive rings 200 in the panel (panel 10A, panel 10B, or panel 10C) through the plurality of circuit boards 300, and the lengths of the plurality of circuit boards 300 are, for example, different from each other. The plurality of circuit boards 300 may at least partially overlap each other. Specifically, the plurality of circuit boards 300 disposed in the electronic component bonding region BD may be electrically connected to the components or signal lines (such as the other of the electrodes 160a or 160b) in the active region AA via the corresponding electronic components 130. According to some embodiments, the electronic device 2 may include a plurality of circuit boards 300-1 and a control board 400-1. The plurality of circuit boards 300-1 may be electrically connected to the corresponding conductive rings 200 in the respective panels (panel 10A, panel 10B, or panel 10C). The control board 400-1 may be electrically connected to the conductive rings 200 in the panel (panel 10A, panel 10B, or panel 10C) through the plurality of circuit boards 300-1, and the lengths of the plurality of circuit boards 300-1 are, for example, different from each other. The plurality of circuit boards 300-1 may at least partially overlap each other. Specifically, the plurality of circuit boards 300-1 disposed in the electronic component bonding region BD may be electrically connected to the components or electrodes (such as the other of the electrodes 160a or 160b) in the active region AA via the corresponding electronic components 130-1.

[0121] According to some embodiments, the electronic component 130 is, for example, one of a scan driving chip and a data driving chip, and the electronic component 130-1 is, for example, the other of a scan driving chip and a data driving chip.

[0122] According to some embodiments, the panels 10A, 10B, and 10C may be array panels that reflect light of different colors. For example, an array panel of red, an array panel of green, and an array panel of blue, but not limited thereto. According to some embodiments, the control board 400 and / or the control board 400-1 may include a printed circuit board (PCB), but not limited thereto. According to some embodiments, the circuits (not shown) in the control board 400 and / or the control board 400-1 may be electrically connected to the ground potential, so that the conductive rings 200 in each panel are grounded. In addition, as Figure 8B shown, since the circuit board 300 and / or the circuit board 300-1 has flexibility and is conducive to bending, the circuit boards 300 having different lengths may overlap each other and be connected to the control board 400.

[0123] According to some embodiments, the control board 400 may include a plurality of connection components 400C. A plurality of circuit boards 300 may be electrically connected to the control board 400 respectively by the plurality of connection components 400C, and the plurality of connection components 400C may be arranged in sequence along a direction. In this embodiment, the aforementioned direction may be the extending direction of the short side of the control board 400 (e.g., the Y direction), but is not limited thereto. According to some embodiments, the control board 400-1 may include a plurality of connection components 400C-1. A plurality of circuit boards 300-1 may be electrically connected to the control board 400-1 respectively by the plurality of connection components 400C-1, and the plurality of connection components 400C-1 may be arranged in sequence along a direction. In this embodiment, the aforementioned direction may be the extending direction of the short side of the control board 400-1 (e.g., the X direction), but is not limited thereto. It should be noted that Figure 8B only the connection relationships of the connection components 400C of the control board 400 are illustrated by way of example, but the connection relationships of the connection components 400C-1 of the control board 400-1 may also have a similar design.

[0124] Next, please refer to Figure 9A and Figure 9B , Figure 9A which show a top view structural schematic diagram of the electronic device 3 in some other embodiments according to the present disclosure, Figure 9B and a three-dimensional structural schematic diagram of the electronic device 3 in some embodiments according to the present disclosure.

[0125] As Figure 9A and Figure 9B shown, similarly, the electronic device 3 may include a plurality of circuit boards 300 and a control board 400. The circuit boards 300 may be electrically connected to the conductive rings 200 in the panel 10A, the panel 10B, and the panel 10C respectively. The control board 400 may include a plurality of connection components 400C. A plurality of circuit boards 300 may be electrically connected to the control board 400 respectively by the plurality of connection components 400C, and the plurality of connection components 400C may be arranged in sequence along a direction. In this embodiment, the aforementioned direction may be the extending direction of the long side of the control board 400 (e.g., the X direction).

[0126] Similarly, the electronic device 3 may include a plurality of circuit boards 300-1 and a control board 400-1. The circuit boards 300-1 may be electrically connected to the conductive rings 200 in the panel 10A, the panel 10B, and the panel 10C respectively. The control board 400-1 may include a plurality of connection components 400C-1. A plurality of circuit boards 300-1 may be electrically connected to the control board 400-1 respectively by the plurality of connection components 400C-1, and the plurality of connection components 400C-1 may be arranged in sequence along a direction. In this embodiment, the aforementioned direction may be the extending direction of the long side of the control board 400-1 (e.g., the Y direction).

[0127] It should be noted that Figure 9BThe connection relationship of each connection component 400C of the control board 400 is shown as an example, but the connection relationship of each connection component 400C-1 of the control board 400-1 can also have a similar design.

[0128] In other embodiments, each connection component 400C or each connection component 400C- 1 may be arranged in other ways.

[0129] Next, please refer to Figure 10 , Figure 10 A schematic diagram of the structure of an electronic device 4 viewed from above is shown according to some other embodiments of the present disclosure.

[0130] like Figure 10 According to some embodiments, the circuit board 300 and the electronic component bonding area BD electrically connecting each panel 10A, panel 10B and panel 10C can be staggered. For example, the circuit board 300 electrically connecting each panel 10A, panel 10B and panel 10C does not substantially overlap or only partially overlaps in the normal direction (Z direction) of the substrate. According to some embodiments, the electronic component bonding areas BD of the panels 10A, panel 10B and panel 10C do not substantially overlap or only partially overlap in the normal direction (Z direction) of the substrate. According to some embodiments, a plurality of connection components 400C can be staggered.

[0131] In summary, according to the embodiments of the present disclosure, an electronic device is provided that includes a conductive ring and an electrostatic protection structure electrically connected to the conductive ring, and the static electricity accumulated in the electrostatic protection structure can be discharged by the conductive ring, thereby reducing component damage caused by electrostatic discharge, thereby improving the reliability of the electronic device. Furthermore, according to the embodiments of the present disclosure, the electrostatic protection structure may not use a semiconductor layer, thereby simplifying the process or reducing production costs.

[0132] Although the embodiments and advantages of the present disclosure have been disclosed as above, it should be understood that any person skilled in the art can make changes, substitutions and modifications without departing from the spirit and scope of the present disclosure. The features between the embodiments of the present disclosure can be mixed and matched as needed as long as they do not violate the spirit of the invention or conflict with each other. In addition, the scope of protection of the present disclosure is not limited to the processes, machines, manufacturing, material compositions, devices, methods and steps in the specific embodiments described in the specification. Any person skilled in the art can understand the current or future developed processes, machines, manufacturing, material compositions, devices, methods and steps from the disclosure of the present disclosure, as long as they can implement substantially the same functions or obtain substantially the same results in the embodiments described herein, they can all be used according to the present disclosure. Therefore, the scope of protection of the present disclosure includes the above-mentioned processes, machines, manufacturing, material compositions, devices, methods and steps. The scope of protection of the present disclosure shall be subject to the scope of the appended claims. Any embodiment or claim of the present disclosure does not need to achieve all the purposes, advantages and features disclosed in this disclosure.

Claims

1. An electronic device, It is characterized in that include: A first panel, comprising: A first substrate including a first electronic component bonding area; a second substrate, disposed opposite to the first substrate; A plurality of first conductive pads are disposed on the first electronic component bonding area; a first conductive ring, disposed on the first substrate; and A first electrostatic protection structure includes two opposite first line ends and a second line end, wherein the first line end is connected to one of the plurality of first conductive pads, the second line end is connected to the first conductive ring, and the first conductive ring is electrically connected to the ground potential.

2. The electronic device according to claim 1, It is characterized in that It further includes a first frame glue disposed between the first substrate and the second substrate and including a plurality of conductive particles, wherein a portion of the first conductive ring overlaps with the first frame glue, and a width of the first conductive ring is greater than a width of at least one of the plurality of conductive particles.

3. The electronic device according to claim 1, It is characterized in that The first panel further includes another first conductive ring connected in parallel with the first conductive ring.

4. The electronic device as claimed in claim 1, It is characterized in that The first panel further includes a signal line, the signal line is adjacent to the first conductive ring, and a ratio of a width of the first conductive ring to a width of the signal line is greater than or equal to 2 and less than or equal to 20.

5. The electronic device as claimed in claim 2, It is characterized in that The width of the first conductive ring is greater than or equal to 20 micrometers and smaller than the width of the first sealant.

6. The electronic device as claimed in claim 1, It is characterized in that There is a spacing area between the first line end and the second line end. The spacing area is at a distance from one of the plurality of first conducting pads, and the distance is greater than or equal to 200 micrometers and less than or equal to 600 micrometers.

7. The electronic device as claimed in claim 1, It is characterized in that There is a spacing area between the first circuit end and the second circuit end, and the width of the spacing area is greater than or equal to 2.5 microns and less than or equal to 10 microns.

8. The electronic device as claimed in claim 7, It is characterized in that The first panel further includes an insulating layer disposed on the first electrostatic protection structure. The insulating layer has an opening area that overlaps the spacing area between the first circuit end and the second circuit end and exposes a portion of the first circuit end and the second circuit end.

9. The electronic device as claimed in claim 1, It is characterized in that Also includes: A second panel is disposed under the first panel, wherein the second panel includes a second conductive ring electrically connected to the ground potential; A plurality of circuit boards electrically connecting the first conductive ring in the first panel and the second conductive ring in the second panel respectively; and A control board is electrically connected to the first conductive ring and the second conductive ring respectively through the plurality of circuit boards, and the lengths of the plurality of circuit boards are different from each other.

10. The electronic device as claimed in claim 9, It is characterized in that The control board includes a plurality of connection components, and the plurality of circuit boards are electrically connected to the control board through the plurality of connection components respectively. The plurality of connection components are arranged in sequence along a direction, which is the extension direction of the long side or the extension direction of the short side of the control board.

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