Restart delay circuit

Abstract

The invention relates to the technical field of electronic circuits, and particularly discloses a restart delay circuit which comprises a switch unit, the input end of the switch unit is connected with a voltage source, the output end of the switch unit is connected with a load, and the control end of the switch unit is connected with a switch control unit and a feedback control unit. The control end of the switch control unit is connected with the input end of the switch unit and the delay control unit, the control end of the feedback control unit and the control end of the delay control unit are connected with the output end of the switch unit, and the switch unit conducts connection between a voltage source and a load according to the control of the switch control unit or the feedback control unit during power-on; after power-off, the feedback control unit is turned off, and the delay control unit controls the switch control unit to be turned off within the preset delay time so as to keep the switch unit to disconnect the voltage source and the load within the preset delay time. The restart delay circuit ensures that the voltage fluctuation of the voltage source within the preset delay time does not affect the load end.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic circuits, and particularly to a restart delay circuit. Background Art

[0002] The power supply plays a crucial role in electronic devices. The quality of the power supply directly affects the performance, reliability, and lifespan of electronic devices. When the device is powered on repeatedly within a short period due to unstable voltage, frequent voltage fluctuations will increase the electrical stress borne by each component in the circuit. Especially for those components designed to operate within a specific working voltage range, operations beyond their rated values will lead to performance degradation or even permanent damage. Each time the circuit is powered on again, a transient process may occur. During this process, instantaneous large current and high voltage may impact the components inside the circuit, thereby causing circuit damage. Summary of the Invention

[0003] Based on this, it is necessary to provide a restart delay circuit for the problem that repeated power-on within a short time in the circuit may cause circuit damage.

[0004] A restart delay circuit includes a switch unit, a switch control unit, a feedback control unit, and a delay control unit. The input end of the switch unit is connected to a voltage source, the output end of the switch unit is connected to a load, the control end of the switch unit is respectively connected to the switch control unit and the feedback control unit, the control end of the switch control unit is connected to the input end of the switch unit and the delay control unit, and the control ends of the feedback control unit and the delay control unit are connected to the output end of the switch unit; when power is on, the switch unit conducts the connection between the voltage source and the load according to the control of the switch control unit or the feedback control unit; after power is off, the feedback control unit is turned off, and the delay control unit controls the switch control unit to be turned off within a preset delay time, so as to keep the switch unit disconnect the connection between the voltage source and the load within the preset delay time.

[0005] In one embodiment, the switch unit includes a first transistor, a first diode, and a first resistor. The first pole of the first transistor serves as the input end of the switch unit, the second pole of the first transistor serves as the output end of the switch unit, the gate of the first transistor serves as the control end of the switch unit, the positive pole of the first diode and the first end of the first resistor are connected to the gate of the first transistor, and the negative pole of the first diode and the second end of the first resistor are connected to the first pole of the first transistor.

[0006] In one embodiment, the switch control unit includes a second transistor, a second diode, and a second resistor. The first pole of the second transistor is connected to the control end of the switch unit, the second pole of the second transistor is grounded, the gate of the second transistor is connected to the input end of the switch unit, the positive pole of the second diode and the first end of the second resistor are connected to the second pole of the second transistor, and the negative pole of the second diode and the second end of the second resistor are connected to the gate of the second transistor.

[0007] In one embodiment, the feedback control unit includes a third transistor, a third diode, and a third resistor. The first pole of the third transistor is connected to the control end of the switch unit, the second pole of the third transistor is grounded, the gate of the third transistor is connected to the output end of the switch unit, the positive pole of the third diode and the first end of the third resistor are connected to the second pole of the third transistor, and the negative pole of the third diode and the second end of the third resistor are connected to the gate of the third transistor.

[0008] In one embodiment, the delay control unit includes a fourth transistor, a fourth diode, a fifth diode, a first capacitor, a fourth resistor, and a fifth resistor. The first pole of the fourth transistor is connected to the input end of the switch unit, the second pole of the fourth transistor is grounded, the positive pole of the fourth diode, the first end of the first capacitor, and the first end of the fourth resistor are connected to the second pole of the fourth transistor, the negative pole of the fourth diode, the second end of the first capacitor, and the second end of the fourth resistor are connected to the gate of the fourth diode, the first end of the fifth resistor is connected to the gate of the fourth diode, the second end of the fifth resistor is connected to the negative pole of the fifth diode, and the positive pole of the fifth diode is connected to the output end of the switch unit.

[0009] In one embodiment, the fourth resistor is an adjustable resistor.

[0010] In one embodiment, the discharge time of the first capacitor is adjusted by adjusting the resistance value of the fourth resistor.

[0011] In one embodiment, the preset delay time is determined according to the discharge time of the first capacitor.

[0012] In one embodiment, the fifth diode is a Schottky diode.

[0013] In one embodiment, the first transistor is a P-type transistor, and the second, third, and fourth transistors are N-type transistors.

[0014] In the above restart delay circuit, the switch unit is connected between the voltage source and the load. The control terminals of the switch unit are respectively connected to the switch control unit and the feedback control unit. The switch control unit and the feedback control unit can adjust the switching state of the switch unit by changing the voltage at the control terminal of the switch unit, thereby controlling the conduction or disconnection between the voltage source and the load. The delay control unit is connected to the control terminal of the switch control unit. The delay control unit can adjust the state of the switch control unit by changing the voltage at the control terminal of the switch control unit. When power is applied, the switch unit will be turned on according to the control of the switch control unit or the feedback control unit to conduct the connection between the voltage source and the load, and quickly charge the delay control unit through the load terminal voltage. After power is cut off, the feedback control unit is turned off, and the delay control unit controls the switch control unit to be turned off within a preset delay time to keep the switch unit disconnected from the voltage source and the load within the preset delay time. The above restart delay circuit, through the coordinated cooperation of the switch unit, the switch control unit, the feedback control unit and the delay control unit, after power is cut off, controls the switch unit to remain off within a preset delay time, that is, disconnects the connection between the voltage source and the load within the preset delay time, ensuring that the voltage fluctuation of the voltage source within the preset delay time will not affect the load terminal, and the load will not be damaged due to repeated power on and off in a short time. Description of the Drawings

[0015] In order to more clearly illustrate the embodiments of the present specification or the technical solutions in the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings described below are only some embodiments recorded in the present specification. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0016] Figure 1 It is a schematic structural diagram of the restart delay circuit in one embodiment of the present application; Figure 2 It is a schematic circuit diagram of the restart delay circuit in one embodiment of the present application; Figure 3 It is a schematic circuit diagram of the restart delay circuit in another embodiment of the present application; Figure 4 It is a schematic circuit diagram of the restart delay circuit in yet another embodiment of the present application; Figure 5 It is a schematic diagram of the timing waveforms at +VOUT and +VIN in one embodiment of the present application. Detailed Embodiments

[0017] To facilitate the understanding of the present invention, the present invention will be described more comprehensively below with reference to the relevant drawings. Preferred embodiments of the present invention are shown in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided to enable a more thorough and comprehensive understanding of the disclosure of the present invention.

[0018] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field to which this invention belongs. The terms used in the description of the present invention in this specification are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more of the related listed items.

[0019] Figure 1 It is a schematic structural diagram of a restart delay circuit in one embodiment of the present application. In one embodiment, the restart delay circuit may include a switch unit 100, a switch control unit 200, a feedback control unit 300, and a delay control unit 400.

[0020] The input end of the switch unit 100 may be connected to a voltage source 10, the output end of the switch unit 100 may be connected to a load 20, and the control end of the switch unit 100 may be respectively connected to the switch control unit 200 and the feedback control unit 300. The control end of the switch control unit 200 may be connected to the input end of the switch unit 100 and the delay control unit 400, and the control ends of the feedback control unit 300 and the delay control unit 400 may be connected to the output end of the switch unit 100.

[0021] When power is applied, the switch control unit 200 may control the switch unit 100 to conduct according to the voltage signal at the input end of the switch unit 100. After the switch unit 100 conducts, the voltage signal input by the voltage source 10 may be transmitted to the load 20 through the switch unit 100. At the same time, after the switch unit 100 conducts, the feedback control unit 300 may conduct according to the voltage signal at the output end of the switch unit 100. That is, after power is applied, the switch unit 100 is controlled to remain in the conducting state by using the switch control unit 200 and / or the feedback control unit 300 to conduct the connection between the voltage source 10 and the load 20.

[0022] After power-down, the feedback control unit 300 is turned off, and the delay control unit 400 controls the switch control unit 200 to turn off within a preset delay time T. Since both the feedback control unit 300 and the delay control unit 400 are turned off, the switch unit 100 is also turned off within the preset delay time T, so that the connection between the voltage source 10 and the load 20 is disconnected within the preset delay time T. It can be seen that even if the voltage source 10 powers on the restart delay circuit again within the preset delay time T, the load 20 will not receive a voltage signal. After the preset delay time T, the delay control unit 400 ends the delay control for the switch control unit 200, so that the switch control unit 200 can control the switch unit 100 to conduct again according to the signal input by the voltage source 10.

[0023] In the above restart delay circuit, the switch unit 100 is connected between the voltage source 10 and the load 20. The control terminals of the switch unit 100 are respectively connected to the switch control unit 200 and the feedback control unit 300. The switch control unit 200 and the feedback control unit 300 can adjust the switch state of the switch unit 100 by changing the voltage at the control terminal of the switch unit 100, so as to control the conduction or disconnection between the voltage source 10 and the load 20. The delay control unit 400 is connected to the control terminal of the switch control unit 200. The delay control unit 400 can adjust the state of the switch control unit 200 by changing the voltage at the control terminal of the switch control unit 200. After power-on, the switch unit 100 will be turned on according to the control of the switch control unit 200 or the feedback control unit 300 to conduct the connection between the voltage source 10 and the load 20, and quickly charge the delay control unit 400 through the load terminal voltage. After power-down, the feedback control unit 300 is turned off, and the delay control unit 400 controls the switch control unit 200 to turn off within a preset delay time T to keep the switch unit 100 disconnected from the voltage source 10 and the load 20 within the preset delay time T.

[0024] Through the coordinated cooperation of the switch unit 100, the switch control unit 200, the feedback control unit 300 and the delay control unit 400, the above restart delay circuit controls the switch unit 100 to remain off within a preset delay time T after power-down, that is, disconnects the connection between the voltage source 10 and the load 20 within the preset delay time T, so as to ensure that the voltage fluctuation of the voltage source 10 within the preset delay time T will not affect the load 20, and the load 20 will not be damaged due to repeated power-on and power-off in a short time.

[0025] Figure 2 FIG. is a circuit schematic diagram of the restart delay circuit in one embodiment of the present application. In one embodiment, the switch unit 100 may include a first transistor Q1, a first diode D1 and a first resistor R1.

[0026] In the embodiments of the present disclosure, a transistor refers to an element including at least a gate, a drain, and a source. In the present disclosure, the first pole of the transistor may be the drain, the second pole may be the source, or the first pole may be the source and the second pole may be the drain. In cases such as using transistors with opposite polarities or when the current direction changes during the operation of a circuit, the functions of the "source" and "drain" are sometimes swapped. In the embodiments of the present disclosure, the gates of all or some of the transistors may be the control poles of the transistors, and the first pole and the second pole can be swapped as needed.

[0027] The first pole of the first transistor Q1 can serve as the input terminal of the switching unit 100, the second pole of the first transistor Q1 can serve as the output terminal of the switching unit 100, and the gate of the first transistor Q1 can serve as the control terminal of the switching unit 100. The positive electrode of the first diode D1 and the first end of the first resistor R1 can be connected to the gate of the first transistor Q1, and the negative electrode of the first diode D1 and the second end of the first resistor R1 can be connected to the first pole of the first transistor Q1.

[0028] In a specific embodiment, the first diode D1 can be a zener diode, and the first resistor R1 can be an ordinary resistor. The first diode D1 can provide a stable voltage reference point to the gate of the first transistor Q1. When the input voltage exceeds the breakdown voltage of the zener diode, it will start to conduct and absorb the excess voltage, thereby preventing the first transistor Q1 from being damaged by excessive voltage. The first resistor R1 can act as a current-limiting resistor to limit the magnitude of the current flowing into the control terminal of the first transistor Q1, avoiding damage to the first transistor Q1 due to excessive current. At the same time, by appropriately selecting the resistance value, the influence of voltage fluctuations caused by external interference on the first transistor Q1 can be reduced, improving the stability and anti-interference ability of the switching unit 100.

[0029] In one of the embodiments, the switching control unit 200 may include a second transistor Q2, a second diode D2, and a second resistor R2. The first pole of the second transistor Q2 can be connected to the control terminal of the switching unit 100, the second pole of the second transistor Q2 is grounded (GND), and the gate of the second transistor Q2 can be connected to the input terminal of the switching unit 100. Specifically, the first pole of the second transistor Q2 can be connected to the gate of the first transistor Q1, and the gate of the second transistor Q2 can be connected to the first pole of the first transistor Q1. The positive electrode of the second diode D2 and the first end of the second resistor R2 are connected to the second pole of the second transistor Q2, and the negative electrode of the second diode D2 and the second end of the second resistor R2 are connected to the gate of the second transistor Q2.

[0030] Similarly, in the switch control unit 200, the second diode D2 can be a zener diode, and the second resistor R2 can be an ordinary resistor. The second diode D2 can prevent excessive voltage from damaging the second transistor Q2. The second resistor R2 can also act as a current-limiting resistor to limit the magnitude of the current flowing into the control terminal of the second transistor Q2, avoiding damage to the second transistor Q2 due to excessive current, and improving the stability and anti-interference ability of the switch control unit 200.

[0031] In one embodiment, the feedback control unit 300 can include a third transistor Q3, a third diode D3, and a third resistor R3. The first pole of the third transistor Q3 can be connected to the control terminal of the switch unit 100, the second pole of the third transistor Q3 can be grounded (GND), and the gate of the third transistor Q3 can be connected to the output terminal of the switch unit 100. Specifically, the first pole of the third transistor Q3 can be connected to the gate of the first transistor Q1, and the gate of the third transistor Q3 can be connected to the second pole of the first transistor Q1. The positive electrode of the third diode D3 and the first end of the third resistor R3 are connected to the second pole of the third transistor Q3, and the negative electrode of the third diode D3 and the second end of the third resistor R3 are connected to the gate of the third transistor Q3.

[0032] Similarly, in the feedback control unit 300, the third diode D3 can be a zener diode, and the third resistor R3 can be an ordinary resistor. The third diode D3 can prevent excessive voltage from damaging the third transistor Q3. The third resistor R3 can also act as a current-limiting resistor to limit the magnitude of the current flowing into the control terminal of the third transistor Q3, avoiding damage to the third transistor Q3 due to excessive current, and improving the stability and anti-interference ability of the feedback control unit 300.

[0033] Figure 3 This is a circuit schematic diagram of the restart delay circuit in another embodiment of the present application. In one embodiment, the feedback control unit 300 can further include a second capacitor C2. The first end of the second capacitor C2 is connected to the second pole of the third transistor Q3, and the second end of the second capacitor C2 is connected to the gate of the third transistor Q3. By providing the second capacitor C2 at the gate of the third transistor Q3, when a voltage signal is transmitted to the gate of the third transistor Q3, the second capacitor C2 will be charged first. After the second capacitor C2 is fully charged and the voltage at the gate of the third transistor Q3 reaches the turn-on voltage, the third transistor Q3 will turn on. That is, the second capacitor C2 can slow down the turn-on of the third transistor Q3 and prevent the parasitic capacitance in the first transistor Q1 from affecting the circuit.

[0034] Figure 4Schematic diagram of the restart delay circuit in another embodiment of the present application. In one embodiment, the feedback control unit 300 may further include a sixth resistor R6. The first end of the sixth resistor R6 is connected to the gate of the third transistor Q3, and the second end of the sixth resistor R6 is connected to the output end of the switch unit 100.

[0035] Specifically, the first end of the sixth resistor R6 is respectively connected to the gate of the third transistor Q3, the second end of the second capacitor C2, the cathode of the third diode D3, and the second end of the third resistor R3. The second end of the sixth resistor R6 is connected to the second pole of the first transistor Q1. The second capacitor C2 can be quickly discharged through the sixth resistor R6 to prevent the electrical signal stored in the second capacitor C2 from affecting the turn-off time of the third transistor Q3.

[0036] Please refer to Figure 4 , in one embodiment, the restart delay circuit may further include a seventh resistor R7. The switch control unit 200 and the feedback control unit 300 can be connected to the control end of the switch unit 100 through the seventh resistor R7. Specifically, the first end of the seventh resistor R7 can be respectively connected to the first pole of the second transistor Q2 and the first pole of the third transistor Q3, and the second end of the seventh resistor R7 can be respectively connected to the first end of the first resistor R1, the anode of the first diode D1, and the gate of the first transistor Q1. The seventh resistor R7 can be used as a current-limiting resistor to further protect the safety of the second transistor Q2 and the third transistor Q3. When the second transistor Q2 and the third transistor Q3 are turned on, the current will flow from the voltage source 10 through the seventh resistor R7 to the ground. The seventh resistor R7 limits the maximum current passing through the second transistor Q2 and the third transistor Q3 to prevent device damage caused by excessive current.

[0037] In one embodiment, the delay control unit 400 may include a fourth transistor Q4, a fourth diode D4, a fifth diode D5, a first capacitor C1, a fourth resistor R4, and a fifth resistor R5. The first pole of the fourth transistor D4 can be connected to the input end of the switch unit 100, and the second pole of the fourth transistor Q4 can be grounded (GND). The anode of the fourth diode D4, the first end of the first capacitor C1, and the first end of the fourth resistor R4 can be connected to the second pole of the fourth transistor Q4. The cathode of the fourth diode D4, the second end of the first capacitor C1, and the second end of the fourth resistor R4 can be connected to the gate of the fourth transistor Q4. The first end of the fifth resistor R5 is connected to the gate of the fourth transistor Q4, and the second end of the fifth resistor R5 can be connected to the cathode of the fifth diode D5. The anode of the fifth diode D5 can be connected to the output end of the switch unit 100. Specifically, the first pole of the fourth transistor D4 can be connected to the first pole of the first transistor Q1, and the anode of the fifth diode D5 can be connected to the second pole of the first transistor Q1.

[0038] The fourth diode D4 can prevent excessive voltage from damaging the fourth transistor Q4, and the fifth diode D5 can act as a protection component to prevent reverse current or voltage surges from damaging the fourth transistor Q4. Since the first capacitor C1 is connected to the gate of the fourth transistor Q4, when a voltage signal is transmitted to the gate of the fourth transistor Q4, the first capacitor C1 can be charged. When the voltage at the gate of the fourth transistor Q4 drops, the electrical signal stored in the first capacitor C1 can be discharged through the fourth resistor R4 to ensure that the voltage at the gate of the fourth transistor Q4 is maintained at the turn-on voltage. When the first capacitor C1 is discharging, after the voltage at the gate of the fourth transistor Q4 is less than the turn-on voltage of the fourth transistor Q4, the fourth transistor Q4 will turn off.

[0039] In one embodiment, the fifth diode D5 is a Schottky diode. A Schottky Diode is a special diode. Compared with an ordinary PN junction diode, it has a lower forward voltage drop and a faster switching speed. Due to its structural characteristics, the Schottky diode has a very short reverse recovery time, can quickly switch states at high frequencies without generating significant reverse current, and can also reduce energy loss and improve efficiency.

[0040] In one embodiment, the fourth resistor R4 can be selected as a variable resistor. The discharge time of the first capacitor C1 can be adjusted by adjusting the resistance value of the fourth resistor R4. Among them, the preset delay time T of the restart delay circuit can be determined according to the discharge time of the first capacitor C1. Therefore, in practical applications, according to different application requirements, the discharge time of the first capacitor C1 can be adjusted by adjusting the resistance value of the fourth resistor R4 to adjust the preset delay time T of the restart delay circuit.

[0041] In addition, in practical applications, the resistance values of the first resistor R1, the second resistor R2, the third resistor R3, the fifth resistor R5, the sixth resistor R6, the seventh resistor R7, and the eighth resistor R8 can be adaptively designed according to different application requirements. Similarly, the capacitance values of the first capacitor C1 and the second capacitor C2 can also be adaptively designed according to requirements. In a preferred embodiment, the charging time of the first capacitor C1 is much less than the discharge time.

[0042] Please refer to Figure 4, in one embodiment, the delay control unit 400 may further include an eighth resistor R8. The delay control unit 400 is connected to the input end of the switch unit 100 through the eighth resistor R8. Specifically, the first end of the eighth resistor R8 is connected to the first pole of the fourth transistor Q4, and the second end of the eighth resistor R8 is connected to the first pole of the first transistor Q1. The eighth resistor R8 can be used as a current-limiting resistor to further protect the safety of the fourth transistor Q4. When the fourth transistor Q4 is turned on, the current will flow from the voltage source 10 through the eighth resistor R8 to the ground. The eighth resistor R8 limits the maximum current passing through the fourth transistor Q4 and prevents device damage caused by excessive current.

[0043] In one embodiment, the first transistor Q1 is a P-type transistor, and the second transistor Q2, the third transistor Q3, and the fourth transistor Q4 are N-type transistors. That is, the first transistor Q1 is turned on according to a low level and turned off according to a high level, and the second transistor Q2, the third transistor Q3, and the fourth transistor Q4 are turned on according to a high level and turned off according to a low level. Thus, the restart delay circuit can utilize the conduction characteristics of each transistor in the circuit to prevent the problem of repeated power-on and power-off in a short time in the circuit.

[0044] In some other embodiments, the device selection of each unit in the restart delay circuit can also select other suitable functional elements according to actual application requirements.

[0045] In this embodiment, taking Figure 4 the shown restart delay circuit as an example, its working process is described. The description is relatively specific and detailed, but it should not be construed as a limitation on the scope of the invention patent. Figure 4 wherein, +VIN is the signal received at the input end of the switch unit 100, and +VOUT is the signal output at the output end of the switch unit 100. The first transistor Q1 is a P-type transistor, and the second transistor Q2, the third transistor Q3, and the fourth transistor Q4 are N-type transistors. In a specific embodiment, the resistance value of the first resistor R1 can be 1KΩ, the resistance value of the second resistor R2 can be 1000KΩ, the resistance value of the third resistor R3 can be 1000KΩ, the fourth resistor R4 can be an adjustable resistor, the maximum resistance value of the fourth resistor R4 can be 10MΩ, the resistance value of the fifth resistor R5 can be 1KΩ, the resistance value of the sixth resistor R6 can be 1KΩ, the resistance value of the seventh resistor R7 can be 100Ω, and the resistance value of the eighth resistor R8 can be 10KΩ.

[0046] Power-on process: After +VIN is powered on for the first time, the power signal output by the voltage source 10 is transmitted to the first pole of the first transistor Q1. Since the gate of the second transistor Q2 is connected to the first pole of the first transistor Q1 through the eighth resistor R8, the second transistor Q2 will turn on according to the voltage at its gate. After the second transistor Q2 is turned on, the gate of the first transistor Q1 will be grounded through the seventh resistor R7 and the second transistor Q2. That is, the potential at the gate of the first transistor Q1 will be pulled low, so that the first transistor Q1 is turned on. The power signal output by the voltage source 10 will be transmitted to the load 20 through the first transistor Q1, and at this time, +VOUT powers on the load 20.

[0047] After +VOUT is powered on, +VOUT charges the second capacitor C2 through the sixth resistor R6. During the process of charging the second capacitor C2 to full, the voltage at the gate of the third transistor Q3 gradually becomes the turn-on voltage, so that the third transistor Q3 is turned on. At the same time, +VOUT charges the first capacitor C1 through the fifth diode D5 and the fifth resistor R5. During the process of charging the first capacitor C1 to full, the voltage at the gate of the fourth transistor Q4 gradually becomes the turn-on voltage, so that the fourth transistor Q4 is turned on. After the fourth transistor Q4 is turned on, the voltage at the gate of the second transistor Q2 will be pulled low, so that the second transistor Q2 is turned off.

[0048] Power-down process: After +VIN is powered down for the first time, +VOUT is also powered down accordingly. The second capacitor C2 discharges quickly through the sixth resistor R6, and the voltage at the gate of the third transistor Q3 decreases, so the third transistor Q3 is turned off accordingly. At the same time, the first capacitor C1 starts to discharge through the fourth resistor R4. During the discharge process of the first capacitor C1, if the voltage at the gate of the fourth transistor Q4 is greater than the turn-on voltage of the fourth transistor Q4, the fourth transistor Q4 will remain turned on. During the period when the fourth transistor Q4 is turned on, the second transistor Q2 remains turned off. At the same time, since the third transistor Q3 is also turned off because of +VOUT, the first transistor Q1 does not meet the turn-on condition and is turned off. That is, after the first power-down, the time during which the second transistor Q2 remains turned on, and the third transistor Q3 and the first transistor Q1 remain turned off due to the discharge of the first capacitor C1 is the preset delay time T. During this period, since the first transistor Q1 remains turned off, no matter when +VIN is powered on, +VOUT cannot be powered on. Within the preset delay time T, the connection between the voltage source 10 and the load 20 is in a disconnected state, ensuring that the voltage fluctuation of the voltage source 10 within the preset delay time T will not affect the load 20, and the load 20 will not be damaged due to repeated power-on and power-off in a short time.

[0049] Among them, the discharge time of the first capacitor C1 can be adjusted by adjusting the resistance value of the fourth resistor R4, so as to adjust the preset delay time T.

[0050] During the discharging process of the first capacitor C1, when the voltage at the gate of the second transistor Q2 discharges to be less than the turn-on voltage of the second transistor Q2, the second transistor Q2 is turned off. After the second transistor Q2 is turned off, the restart delay circuit will be able to restart again according to the power-on of +VIN. If +VIN is powered on, the power-on timing repeats the above power-on process. If +VIN is powered off again after being powered on, the above power-off process is repeated. Figure 5 FIG. is a schematic diagram of the timing waveforms at +VOUT and +VIN in one embodiment of the present application. After +VIN is powered on, +VOUT is also powered on synchronously; when +VIN is powered off for the first time after being powered on, +VOUT is also powered off synchronously; within the preset delay time T, the switching unit 100 remains off, and the connection between the voltage source 10 and the load 20 also remains disconnected, so +VOUT also remains powered off. That is, within the preset delay time T, the repeated power-on and power-off of +VIN will not affect the load 20. After the preset delay time T has passed, the second transistor Q2 is turned off, and the restart delay circuit can be restarted again according to the power signal input by the voltage source 10, that is, +VOUT will be powered on synchronously with the power-on of +VIN.

[0051] The restart delay circuit provided by the present application can avoid the problem of device damage caused by repeated power-on due to unstable voltage. At the same time, since the restart delay circuit is all composed of discrete devices, it has the advantage of low cost. In addition, the restart delay circuit can actively defend against the problem of repeated power-on, without the participation of other circuits, and has strong circuit stability and is easy to implement.

[0052] In the description of this specification, the descriptions referring to terms such as "some embodiments", "other embodiments", "ideal embodiments", etc. mean that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.

[0053] The technical features of the above-described embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered to be within the scope described in this specification.

[0054] Each embodiment in this specification is described in a progressive manner. For the same or similar parts among the embodiments, reference can be made to each other. Each embodiment focuses on the differences from other embodiments. The above-described embodiments only represent several implementation manners of the present invention. Their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the invention patent. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present invention, several modifications and improvements can still be made, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the present invention patent shall be subject to the appended claims.

Claims

1. A restart delay circuit, characterized in that: It includes a switch unit, a switch control unit, a feedback control unit and a delay control unit, The input end of the switch unit is connected to a voltage source, the output end of the switch unit is connected to a load, the control end of the switch unit is connected to the switch control unit and the feedback control unit respectively, the control end of the switch control unit is connected to the input end of the switch unit and the delay control unit, and the control end of the feedback control unit and the control end of the delay control unit are connected to the output end of the switch unit; When powered on, the switch unit switches on the connection between the voltage source and the load according to the control of the switch control unit or the feedback control unit; After power-off, the feedback control unit is turned off, and the delay control unit controls the switch control unit to turn off within a preset delay time, so as to keep the switch unit disconnecting the voltage source and the load within the preset delay time.

2. The restart delay circuit according to claim 1, characterized in that: The switch unit includes a first transistor, a first diode and a first resistor, the first electrode of the first transistor serves as an input end of the switch unit, the second electrode of the first transistor serves as an output end of the switch unit, the gate of the first transistor serves as a control end of the switch unit, the anode of the first diode and the first end of the first resistor are connected to the gate of the first transistor, and the cathode of the first diode and the second end of the first resistor are connected to the first electrode of the first transistor.

3. The restart delay circuit according to claim 1, characterized in that: The switch control unit includes a second transistor, a second diode, and a second resistor. The first electrode of the second transistor is connected to the control end of the switch unit, the second electrode of the second transistor is grounded, the gate of the second transistor is connected to the input end of the switch unit, the anode of the second diode and the first end of the second resistor are connected to the second electrode of the second transistor, and the cathode of the second diode and the second end of the second resistor are connected to the gate of the second transistor.

4. The restart delay circuit according to claim 1, characterized in that: The feedback control unit includes a third transistor, a third diode, and a third resistor. The first electrode of the third transistor is connected to the control end of the switch unit, the second electrode of the third transistor is grounded, the gate of the third transistor is connected to the output end of the switch unit, the anode of the third diode and the first end of the third resistor are connected to the second electrode of the third transistor, and the cathode of the third diode and the second end of the third resistor are connected to the gate of the third transistor.

5. The restart delay circuit according to claim 1, characterized in that: The delay control unit includes a fourth transistor, a fourth diode, a fifth diode, a first capacitor, a fourth resistor, and a fifth resistor. The first electrode of the fourth transistor is connected to the input end of the switch unit, the second electrode of the fourth transistor is grounded, the anode of the fourth diode, the first end of the first capacitor, and the first end of the fourth resistor are connected to the second electrode of the fourth transistor, the cathode of the fourth diode, the second end of the first capacitor, and the second end of the fourth resistor are connected to the gate of the fourth diode, the first end of the fifth resistor is connected to the gate of the fourth diode, the second end of the fifth resistor is connected to the cathode of the fifth diode, and the anode of the fifth diode is connected to the output end of the switch unit.

6. The restart delay circuit according to claim 5, characterized in that: The fourth resistor is an adjustable resistor.

7. The restart delay circuit according to claim 6, characterized in that: The discharge time of the first capacitor is adjusted by adjusting the resistance value of the fourth resistor.

8. The restart delay circuit according to claim 5, characterized in that: The preset delay time is determined according to the discharge time of the first capacitor.

9. The restart delay circuit according to claim 5, characterized in that: The fifth diode is a Schottky diode.

10. The restart delay circuit according to any one of claims 2 to 5, characterized in that: The first transistor is a P-type transistor, and the second transistor, the third transistor, and the fourth transistor are N-type transistors.

Images