Photoelectric module, preparation method thereof and all-optical switching system

Abstract

The embodiment of the invention provides a photoelectric module, a preparation method thereof and an all-optical switching system, relates to the technical field of optical communication, and is used for improving the performance and reliability of the photoelectric module. The photoelectric module comprises a substrate, an optical chip, an electric chip and a heat conduction layer, and the optical chip and the electric chip are arranged on one side of the substrate in a stacked mode in the thickness direction of the substrate; the heat conduction layer is stacked between the optical chip and the electric chip. According to the photoelectric module provided by the embodiment of the invention, a local overheating condition is not easy to occur, so that the performance and the reliability of the photoelectric module can be improved.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of optical communication technologies, and in particular, to an optoelectronic module, a preparation method thereof, and an all-optical switching system. Background Art

[0002] In optical communication technologies, all-optical switching systems are widely used in multiple fields such as artificial intelligence (AI), high-performance computing (HPC), and data communication network (DCN) due to advantages such as large capacity, low power consumption, and small latency.

[0003] An all-optical switching system includes an optoelectronic module, which is used to directly switch an optical signal input from an optical input end to any optical output end for output. Currently, the performance and reliability of existing optoelectronic modules still need to be further improved. Summary of the Invention

[0004] The purpose of the embodiments of the present application is to provide an optoelectronic module, a preparation method thereof, and an all-optical switching system.

[0005] To achieve the above purpose, the embodiments of the present application provide the following solutions:

[0006] On the one hand, an optoelectronic module is provided, including: a substrate; an optical chip and an electrical chip, which are stacked on one side of the substrate along the thickness direction of the substrate; and a heat conduction layer, which is stacked between the optical chip and the electrical chip.

[0007] In the optoelectronic module provided by the embodiments of the present application, by providing a heat conduction layer between the optical chip and the electrical chip, the local high temperature of the electrical chip can be dissipated to the surroundings through the heat conduction layer and then transferred to the optical chip. In this way, the heat transferred to the optical chip can be reduced, making it difficult for the optical chip to be thermally damaged. Moreover, since the heat conduction layer can dissipate the local high temperature of the electrical chip, it is also beneficial to reduce the local high temperature of the electrical chip and improve the performance of the electrical chip. Therefore, the optoelectronic module of this embodiment has higher performance and reliability.

[0008] In some embodiments, the heat conduction layer includes connection through-holes that penetrate the surface of the heat conduction layer facing the optical chip and the surface of the heat conduction layer facing the electrical chip; the optoelectronic module further includes an electrical connection part, which passes through the connection through-holes, with one end of the electrical connection part connected to the optical chip and the other end connected to the electrical chip. In this embodiment, by providing the connection through-holes and the electrical connection part, it is convenient to realize the interconnection between the optical chip and the electrical chip.

[0009] In some embodiments, the optoelectronic module further includes an insulating dielectric layer located between the electrical connection portion and the heat-conducting layer. In this embodiment, by providing the insulating dielectric layer, the electrical connection portion and the heat-conducting layer can be well electrically isolated, so that the transmission signal between the electrical chip and the optical chip is stable.

[0010] In some embodiments, one side surface of the optical chip facing the electrical chip includes: a first surface overlapping with the electrical chip in the thickness direction; in the thickness direction, the heat-conducting layer at least overlaps with the first surface. In this way, the heat-conducting layer can at least cover the surface of the optical chip facing the electrical chip, thus well avoiding the situation of local high temperature of the optical chip and making the optical chip not easily damaged.

[0011] In some embodiments, one side surface of the optical chip facing the electrical chip further includes: a second surface not overlapping with the electrical chip in the thickness direction; in the thickness direction, the heat-conducting layer also overlaps with at least part of the second surface. In this way, the contact area between the heat-conducting layer and the optical chip is larger, so the heat-conducting layer has a better heat equalizing effect and the optical chip is more difficult to be damaged.

[0012] In some embodiments, one side surface of the electrical chip facing the optical chip further includes: a third surface not overlapping with the first surface of the optical chip in the thickness direction; in the thickness direction, the heat-conducting layer also overlaps with at least part of the third surface. In this way, the area of the heat-conducting layer is larger, which can cover more areas of the electrical chip, facilitating preventing the problem of heat concentration of the electrical chip and having a good heat dissipation and heat equalizing effect on the electrical chip.

[0013] In some embodiments, the thermal conductivity of the heat-conducting layer is greater than or equal to 200 W / (m·K). In this embodiment, by setting the thermal conductivity of the heat-conducting layer to be greater than or equal to 200 W / (m·K), the heat-conducting layer has a good temperature equalizing effect, that is, when the local contact of the heat-conducting layer is at a high temperature, the heat can spread along the direction parallel to the plate surface, thus well protecting the optical chip and the electrical chip.

[0014] In some embodiments, the thickness of the heat-conducting layer ranges from 10 μm to 300 μm. For example, the thickness d of the heat-conducting layer 40 can be 10 μm, 50 μm, 100 μm, 150 μm, 200 μm, 250 μm, 300 μm, etc. In this embodiment, by limiting the thickness of the heat-conducting layer to range from 10 μm to 300 μm, the heat-conducting layer has a good lateral heat transfer effect, that is, the heat can be effectively dispersed along the lateral direction parallel to the heat-conducting layer in the process of being transferred from the side of the heat-conducting layer close to the electric chip to the side of the heat-conducting layer close to the optical chip. In this way, the heat that is finally transferred to one side of the optical chip is not prone to local high-temperature areas. In addition, since the thickness of the heat-conducting layer is small (less than or equal to 300 μm), the overall thickness of the optoelectronic module will not be too large, and the flexibility is high.

[0015] In some embodiments, the heat conducting layer includes a copper layer. In this embodiment, the copper layer has good thermal conductivity and structural strength, and has high stability and reliability.

[0016] In some embodiments, the thickness of the copper layer is greater than or equal to 100 μm. Here, by designing the thickness of the copper layer to be greater than or equal to 100 μm, the copper layer has a good lateral heat transfer effect, avoiding heat concentration and damage to the optical chip.

[0017] In some embodiments, the heat-conducting layer includes a diamond layer. In this embodiment, the diamond layer has better heat-conducting performance and structural strength, and has higher stability and reliability.

[0018] In some embodiments, the heat conducting layer includes a diamond copper layer. In this embodiment, the diamond layer has better thermal conductivity and structural strength, and has higher stability and reliability.

[0019] In some embodiments, the optoelectronic module further includes: a heat sink located on the side of the optical chip and the electrical chip that is away from the substrate and away from the substrate. The heat sink here can be an air-cooled structure (with airflow flowing inside or outside), a liquid-cooled structure (such as a flowing coolant that can be exchanged with the outside), a temperature-averaging plate (such as an evaporative cooling medium that can circulate inside), etc. In this embodiment, by adding a heat sink, the chip located on the side away from the substrate can be well cooled, thereby improving the reliability of the optoelectronic module.

[0020] In some embodiments, the electric chip is further away from the substrate than the optical chip, and the heat sink contacts the surface of the electric chip away from the substrate. This arrangement can better dissipate heat from the electric chip, and since the electric chip usually has a high heat, this is conducive to greatly improving the stability of the electric chip, thereby improving the performance of the optoelectronic module.

[0021] On the other hand, a method for manufacturing an optoelectronic module is provided, including: providing a substrate; forming an optical chip, an electrical chip, and a heat conducting layer on one side of the substrate; and laminating the heat conducting layer between the optical chip and the electrical chip along the thickness direction of the substrate.

[0022] The method for manufacturing an optoelectronic module provided by the embodiments of the present application can form an optoelectronic module with a heat conducting layer. By providing a heat conducting layer between the optical chip and the electrical chip, the local high temperature on the electrical chip can be dissipated around through the heat conducting layer and then transferred to the optical chip. In this way, the heat transferred to the optical chip can be reduced, making the optical chip not easily thermally damaged. Moreover, since the heat conducting layer can dissipate the local high temperature of the electrical chip, it is also beneficial to reduce the local high temperature of the electrical chip and improve the performance of the electrical chip. Therefore, the optoelectronic module of this embodiment has higher performance and reliability.

[0023] On the further hand, an all-optical switching system is provided, including: an optical input end and a plurality of optical output ends; and the optoelectronic module in any one of the previous embodiments, coupled between the plurality of optical output ends of the optical input end.

[0024] Since the all-optical switching system provided by the embodiments of the present application has the optoelectronic module in any one of the previous embodiments, it has corresponding beneficial effects as described above, which will not be elaborated here. Description of the Drawings

[0025] Figure 1 It is a schematic block diagram of an all-optical switching system provided by an embodiment of the present application;

[0026] Figure 2 It is a structural diagram of an optoelectronic module provided in the related art;

[0027] Figure 3 It is a structural diagram of another optoelectronic module provided in the related art;

[0028] Figure 4 It is a structural diagram of an optoelectronic module provided by an embodiment of the present application;

[0029] Figure 5 It is a structural diagram of another optoelectronic module provided by an embodiment of the present application;

[0030] Figure 6 It shows a schematic diagram of the heat dissipation path of a diamond substrate;

[0031] Figure 7 It is Figure 5 the structural diagram of the heat conducting layer in

[0032] Figure 8 It is a structural diagram of yet another optoelectronic module provided by an embodiment of the present application. Detailed Embodiments

[0033] The technical solutions in the embodiments of the present application will be described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments.

[0034] Hereinafter, terms such as "first" and "second" are only used for convenience of description, and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first", "second", etc. may explicitly or implicitly include one or more of such features. In the description of the present application, unless otherwise stated, the meaning of "a plurality" is two or more.

[0035] In the embodiments of the present application, unless otherwise clearly specified and limited, the term "electrically connected" may be a direct electrical connection or an indirect electrical connection through an intermediate medium.

[0036] In the embodiments of the present application, words such as "exemplary" or "for example" are used to represent examples, illustrations or explanations. Any embodiment or design solution described as "exemplary" or "for example" in the embodiments of the present application should not be construed as being more preferred or having more advantages than other embodiments or design solutions. Rather, the use of words such as "exemplary" or "for example" is intended to present relevant concepts in a specific manner.

[0037] In the embodiments of the present application, "and / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B may represent: A exists alone, A and B exist simultaneously, and B exists alone, where A and B may be singular or plural. The character " / " generally represents an "or" relationship between the associated objects before and after.

[0038] In the embodiments of the present application, for example, the direction indicators such as up, down, left, right, front and back used to explain the structures and movement directions of different components in the present application are relative. When the components are in the positions shown in the figure, these indicators are appropriate. However, if the description of the component positions changes, then these direction indicators will also change accordingly.

[0039] Figure 1 It is a schematic block diagram of an all-optical switching system 1000 provided for the embodiments of the present application. As Figure 1 shown, the all-optical switching system 1000 provided for the embodiments of the present application includes an optoelectronic module 100, an optical input end 1001, and a plurality of optical output ends 1002. The optoelectronic module 100 can be respectively connected to the optical input end 1001 and the plurality of optical output ends 1002 through optical fibers 1003. The optoelectronic module 100 is configured to directly switch the optical signal input from the optical input end 1001 to any of the optical output ends 1002 for output.

[0040] The optoelectronic module 100 includes an optical chip (PIC) and an electrical chip (EIC). The optical chip may include an array composed of large-scale electro-optic switches. The electro-optic switches may be, for example, silicon optical switches, thin-film lithium niobate switches, semiconductor optical amplifier (SOA) switches, Mach Zehnder Interferometer (MZI) switches, etc. The electro-optic switches have the advantages of high switching speed, low power consumption, high integration, and low cost. The electrical chip (or called the electrical drive and control chip) is used to provide an electrical signal, and the electrical signal is used to drive the electro-optic switches in the optical chip to work, thereby realizing the exchange of optical signals.

[0041] Figure 2 It is a structural diagram of an optoelectronic module 91 provided in the related art. As Figure 2 shown, the optoelectronic module 91 includes a printed circuit board (PCB) 911, an optical chip 10, and an electrical chip 20. Among them, the optical chip 10 can be connected to an optical fiber 1003 for transmitting optical signals. The optical chip 10 and the electrical chip 20 are packaged on the same printed circuit board 911 in a two-dimensional (2D) manner. That is, the optical chip 10 and the electrical chip 20 are laid flat on one side surface of the PCB, and then the optical chip 10, the electrical chip 20, and the printed circuit board 911 are interconnected through wire bonds. At this time, in order to ensure the reliability of the wire bonds, the lead 01 between the optical chip 10 and the electrical chip 20 only connects the adjacent sides of the optical chip 10 and the electrical chip 20, and the lead between the optical chip (or electrical chip) and the substrate of the printed circuit board also only connects to the edge of the optical chip (or electrical chip) close to the pad.

[0042] Figure 3 It is a structural diagram of another optoelectronic module 92 provided in the related art. As Figure 3As shown, the optoelectronic module 92 includes a printed circuit board 921, an interposer 922, an optical chip 10, and an electrical chip 20. Among them, the optical chip 10 can be connected to an optical fiber 1003 for transmitting optical signals. The optical chip 10 and the electrical chip 20 are packaged on the same printed circuit board 921 in a 2.5D (Two pointfive - dimensional) manner through the interposer 922. That is to say, the optical chip 10 and the electrical chip 20 are laid flat on one side surface of the interposer 922 and are interconnected through the interposer 922. The other side surface of the interposer 922 can be connected to the silver printed circuit board 921 through a ball grid array 923 (Ball Grid Array, BGA). At this time, the interposer 922 is interconnected with the printed circuit board 921 through through - silicon vias and the ball grid array 923. One of the advantages of this solution is that multiple chips can be placed on an interposer 922 at the same time, not limited to Figure 3 the two chips in

[0043] . It should be noted that because the optical chip 10 (PIC) has a large size, high requirements for electrical control performance, and the electrical chip 20 (EIC) has a large number of input / output (Input / Output, I / O) interfaces, high speed, high power consumption, and large size. This results in the monolithic integration technology of EIC + PIC (i.e., integrating the functions of both into one chip) or 2D packaging technology (i.e., the example Figure 2 before Figure 3For example), it is no longer applicable. Specifically, in the all-optical switching application scenario, when the optical switching reaches a certain scale, the number of optical devices (i.e., electro-optical switches) is very large. For example, when the networking scale is 16×16, the number of MZI switches is 192; when the networking scale is 256×256, the number of MZI switches is 12,288; when the networking scale is 512×512, the number of MZI switches is 32,768; when the networking scale is 1024×1024, the number of MZI switches is 98,304. Further, the optical device (i.e., electro-optical switch) needs the electrical chip 20 (EIC) to provide electrical signals for driving. For example, one MZI switch requires 4 control signals, so a lot of control circuits also need to be set in the electrical chip. Moreover, the area occupied by the control circuit is relatively large. For example, in the networking scale of 128×128, the length of the layout area of the control circuit of a single MZI switch is greater than 53.2 mm, and the width is greater than 40.8 mm. Among them, the control circuit may include a temperature control circuit and an electrical control circuit. The length and width of the layout area of the temperature control circuit are 23.1 mm and 16 mm respectively, and the length and width of the layout area of the electrical control circuit are 30.1 mm and 24.8 mm respectively. Therefore, the size of the electrical chip is also very large.

[0044] Combined with the above analysis, the inventors further studied and found that Figure 2 the 2D packaging solution in Figure 3 and the 2.5D packaging solution in

[0045] Figure 4 The structure diagram of an optoelectronic module 100 provided by an embodiment of the present application is shown in Figure 4As shown, the optoelectronic module 92 includes a substrate 30, an optical chip 10, and an electrical chip 20. The optical chip 10 can be connected to an optical fiber 1003 for transmitting optical signals. The optical chip 10 and the electrical chip 20 are packaged on the same substrate 30 in a three-dimensional (3D) manner, that is, the optical chip 10 and the electrical chip 20 are stacked on one side of the substrate, as shown in FIG. Figure 4 As shown, the electrical chip 20 can be flipped on the optical chip 10, which can minimize the package size. The electrical chip 20 is interconnected with the optical chip 10 through copper pillars or micro-connection bumps, and then interconnected with the substrate 30 (such as PCB) through wire bonding. The copper pillars or micro-connection bumps can have an interconnection spacing range of 40μm to 50μm, which can realize dense I / O interfaces, short connections, and high-speed performance. Therefore, Figure 4 The 3D packaging solution shown can solve or improve the problems of the previous 2D packaging and 2.5D packaging, such as achieving a more dense, high-performance, and temperature-sensitive packaging technology. Figure 4 On the basis of the structure, the inventors of the present application further studied and found that: 1. The EIC has high power consumption (the EIC integrates functions such as driver, route mapping, interface management, etc., and the power consumption of 256×256 scale is about 50W), the EIC generates serious heat and the temperature is uneven (every 0.5W of power consumption may cause a temperature rise of 20°C, and there is local overheating). Since the EIC is stacked directly on the PIC, the heat generated by the EIC will be transferred to the PIC, resulting in uneven temperature of the PIC; 2. Since the PIC includes heat-sensitive components, such as the electro-optical switch therein, which has a thermo-optical effect and is very sensitive to temperature, temperature changes cause the electro-optical (EO) switch (such as MZI switch, SOA switch) to have problems of increased insertion loss and reduced isolation. The uneven temperature will affect at least some functions and performances of the PIC, resulting in unavailability of the functions of the optical switching array.

[0046] Figure 5 FIG. 1 is a structural diagram of another optoelectronic module 100 provided in an embodiment of the present application. Based on at least one of the above technical problems, another optoelectronic module 100 provided in an embodiment of the present application, such as Figure 6 As shown, the optoelectronic module 100 includes a substrate 30, an optical chip 10, an electrical chip 20 and a heat-conducting layer 40. The optical chip 10 and the electrical chip 20 are stacked on one side of the substrate 30 along the thickness direction Z of the substrate 30. The heat-conducting layer 40 is stacked between the optical chip 10 and the electrical chip 20.

[0047] The substrate 30 may be a PCB board, such as Figure 5As shown, wire bonding can also be used between the electrical chip 20 and the PCB board. The structures of the optical chip 10 and the electrical chip 20 can refer to the descriptions in the previous text. The heat-conducting layer 40 can be any plate-like structure with the function of transferring heat.

[0048] In the optoelectronic module 100 provided by the embodiment of the present application, by arranging the heat-conducting layer 40 between the optical chip 10 and the electrical chip 20, the local high temperature on the electrical chip 20 can be dissipated around through the heat-conducting layer 40 and then transferred to the optical chip 10. In this way, the heat transferred to the optical chip 10 can be reduced, making the optical chip 10 not easily thermally damaged. Moreover, since the heat-conducting layer 40 can disperse the local high temperature of the electrical chip 20, it is also beneficial to reduce the local high temperature of the electrical chip 20 and improve the performance of the electrical chip 20. Therefore, the optoelectronic module 100 of this embodiment has higher performance and reliability.

[0049] In some embodiments, the thermal conductivity of the heat-conducting layer 40 is greater than or equal to 200 W / (m·K). In this embodiment, by setting the thermal conductivity of the heat-conducting layer 40 to be greater than or equal to 200 W / (m·K), the heat-conducting layer 40 has a good temperature equalization effect. That is, when the local contact of the heat-conducting layer 40 is at a high temperature, the heat can spread in the direction parallel to the plate surface (such as the X direction), so as to protect the optical chip and the electrical chip well.

[0050] In some embodiments, the thickness d of the heat-conducting layer 40 ranges from 10 μm to 300 μm. For example, the thickness d of the heat-conducting layer 40 can be 10 μm, 50 μm, 100 μm, 150 μm, 200 μm, 250 μm, 300 μm, etc. In this embodiment, by limiting the thickness d of the heat-conducting layer 40 to range from 10 μm to 300 μm, the heat-conducting layer 40 has a good transverse heat transfer effect. That is, during the process of heat transferring from the side of the heat-conducting layer 40 close to the electrical chip 20 to the side close to the optical chip 10, the heat can effectively spread in the transverse direction parallel to the heat-conducting layer 40 (such as the X direction). In this way, it is not easy for the heat finally transferred to the side of the optical chip 10 to have a local high temperature area. Moreover, since the thickness d of the heat-conducting layer 40 is small (less than or equal to 300 μm), the overall thickness of the optoelectronic module 100 will not be too large, and the flexibility is relatively high.

[0051] The following provides several material structure examples of the heat-conducting layer 40:

[0052] Example 1 of the heat-conducting layer 40: The heat-conducting layer 40 includes a copper layer. In this embodiment, the copper layer has good heat-conducting performance and structural strength, and the stability and reliability are relatively high. Exemplarily, the thickness of the copper layer is greater than or equal to 100 μm. Here, by designing the thickness of the copper layer to be greater than or equal to 100 μm, the copper layer has a good transverse heat transfer effect and avoids the situation of heat concentration and damage to the optical chip.

[0053] Example 2 of the heat conduction layer 40: The heat conduction layer 40 includes a diamond layer. In this embodiment, the diamond layer has better heat conduction performance and structural strength, and is relatively high in stability and reliability.

[0054] Example 3 of the heat conduction layer 40: The heat conduction layer 40 includes a diamond copper layer. In this embodiment, the diamond layer has better heat conduction performance and structural strength, and is relatively high in stability and reliability.

[0055] As can be seen from the above examples, in the embodiments of the present application, the heat conduction layer 40 can adopt a series of high - thermal - conductivity materials such as diamond, alumina, thick copper (such as a thickness greater than or equal to 100 μm), diamond copper, etc. (greater than or equal to 200 W / (m·K)). Diamond has excellent insulation and ultra - high thermal conductivity. The thermal conductivity of single - crystal diamond is as high as 2400 W / (m·K) at room temperature, and the thermal conductivity of polycrystalline diamond is close to 2000 W / (m·K) at room temperature. After the heat source is integrated with diamond, relying on the ultra - high thermal conductivity of diamond, the heat generated by the heat source will quickly spread laterally on the heat conduction layer, increasing the effective heat - exchange area between the heat source and the outside, thereby greatly improving the heat - exchange capacity of the system. The heat dissipation path of the diamond substrate is as follows Figure 6 As shown by the dashed line in the figure, the electrical chip 20 may include a diamond substrate 81 (i.e., at least part of the heat conduction layer 40), a transistor structure 83, and a connection layer 82 (dielectric layer or adhesion layer) located between the diamond substrate 81 and the transistor structure 83. The transistor structure 83 includes a gate 831, a source 832, a drain 833, a buffer layer 834, and a channel layer (such as composed of a GaN layer 835 and an AlGaN layer 836). The heat at the channel layer can be quickly dissipated into the diamond substrate 81.

[0056] The above - mentioned high - thermal - conductivity materials, such as the copper layer, diamond layer, and diamond copper layer in Embodiments 1 to 3, can exist alone or in combination. For example, a laminated structure including different material layers can be formed.

[0057] In some embodiments, the heat conduction layer 40 includes a connection through - hole 401. The connection through - hole 401 penetrates the surface of the heat conduction layer 40 facing the optical chip 10 and the surface of the heat conduction layer 40 facing the electrical chip 20. The optoelectronic module 100 further includes an electrical connection portion 50. The electrical connection portion 50 passes through the connection through - hole 401. One end of the electrical connection portion 50 is connected to the optical chip 10, and the other end is connected to the electrical chip 20.

[0058] Here, if the material used for the heat conduction layer 40 is diamond, diamond drilling (i.e., the connection through hole) and copper plating (i.e., the electrical connection part) can be used to realize the interconnection between the optical chip 10 and the electrical chip 20. Currently, technologies such as laser ablation and reactive plasma etching can be used for the processing of diamond. Laser ablation is a serial processing technology, and its efficiency is low and cost is high when performing batch processing of large-size heat conduction layers. The advantage of the etching technology lies in the comprehensive utilization of the high resolution of photolithography, the parallelism of etching processing, and the low surface roughness after reactive plasma etching. This process method has been widely developed in the field of diamond microfabrication.

[0059] Exemplarily, referring to Figure 7 , Figure 7 is Figure 5 the structural diagram of the heat conduction layer 40 in

[0060] In some embodiments, the surface of the optical chip 10 facing the electrical chip 20 includes: a first surface a1 that overlaps with the electrical chip 20 in the thickness direction Z. In the thickness direction Z, the heat conduction layer 40 at least overlaps with the first surface a1. In this way, the heat conduction layer 40 can at least cover the surface of the optical chip 10 facing the electrical chip 20, thereby well avoiding the situation of local high temperature of the optical chip 10 and making the optical chip 10 not easily damaged.

[0061] Exemplarily, the surface of the optical chip 10 facing the electrical chip 20 further includes: a second surface a2 that does not overlap with the electrical chip 20 in the thickness direction Z; in the thickness direction Z, the heat conduction layer 40 also overlaps with at least part of the second surface a2 (for example, in the example of Figure 5 it can completely overlap). In this way, the contact area between the heat conduction layer 40 and the optical chip 10 is larger, so the heat conduction layer 40 has a better heat dissipation effect and the optical chip 10 is more difficult to be damaged.

[0062] In some embodiments, the surface of the electrical chip 20 facing the optical chip 10 further includes: a third surface a3 that does not overlap with the first surface a1 of the optical chip in the thickness direction; in the thickness direction Z, the heat conduction layer 40 also overlaps with at least part of the third surface a3 (for example, in the example of Figure 5 it can partially overlap). In this way, the area of the heat conduction layer 40 is larger, and it can cover more areas of the electrical chip 20, which is beneficial to preventing the problem of heat concentration of the electrical chip 20 and has a good heat dissipation and heat dissipation effect on the electrical chip 20.

[0063] It should be noted that the area range of the heat conduction layer 40 can be unrestricted. For example, in the direction parallel to the heat conduction layer 40 (such as the X direction), at least part of the edge of the heat conduction layer 40 can extend beyond at least part of the edge of the optical chip 10, and at least part of the edge of the heat conduction layer 40 can extend beyond at least part of the edge of the electrical chip 20.

[0064] Figure 8 It is a structural diagram of another optoelectronic module provided by an embodiment of the present application. Figure 8 And Figure 5 The difference is that the positions of the optical chip 10 and the electrical chip 20 are interchanged, and a heat sink 70 is added.

[0065] In some embodiments, as Figure 8 shown, the optoelectronic module 100 further includes: a heat sink 70, located on the side of the optical chip 10 and the electrical chip 20 that is away from the substrate 30 and facing away from the substrate 30. The heat sink 70 here can be an air-cooled structure (there can be air flow inside or outside), a liquid-cooled structure (such as there can be a coolant that can be exchanged with the outside flowing inside), a heat pipe (such as there is an evaporative cooling medium that can circulate inside), etc. In this embodiment, by adding the heat sink 70, the chip located on the side away from the substrate 30 (taking the electrical chip 20 in the figure as an example for illustration) can be well cooled, improving the reliability of the optoelectronic module 100.

[0066] Exemplarily, as Figure 8 shown, the electrical chip 20 is farther away from the substrate 30 than the optical chip 10, and the heat sink 70 is in contact with the surface of the electrical chip 20 facing away from the substrate 30. With such a setting, the electrical chip 20 can be better cooled. Since the electrical chip 20 usually generates more heat, this is beneficial to greatly improving the stability of the electrical chip 20, thereby improving the performance of the optoelectronic module 100.

[0067] On the other hand, a method for manufacturing an optoelectronic module 100 is provided, including: Step 1 and Step 2.

[0068] Step 1: Provide a substrate 30. The substrate 30 here can be, for example, the previous PCB board.

[0069] Step 2: Form an optical chip 10, an electrical chip 20, and a heat conduction layer 40 on one side of the substrate 30; along the thickness direction of the substrate 30, the heat conduction layer 40 is stacked between the optical chip 10 and the electrical chip 20.

[0070] Here, the heat conduction layer 40 can be formed together with any one of the chips in the front-end process of the chip; or, the heat conduction layer 40 can also be formed separately when forming the optoelectronic module 100. In some examples, the heat conduction layer 40 can be formed together with the electrical chip 20. For example, it can be directly used as the substrate of the electrical chip.

[0071] The manufacturing method of the optoelectronic module 100 provided by the embodiments of the present application can form the optoelectronic module 100 with a heat conduction layer 40. By arranging the heat conduction layer 40 between the optical chip 10 and the electrical chip 20, the local high temperature on the electrical chip 20 can be dissipated around through the heat conduction layer 40 and then transferred to the optical chip 10. In this way, the heat transferred to the optical chip 10 can be reduced, making it difficult for the optical chip 10 to be thermally damaged. Moreover, since the heat conduction layer 40 can dissipate the local high temperature of the electrical chip 20, it is also beneficial to reduce the local high temperature of the electrical chip 20 and improve the performance of the electrical chip 20. Therefore, the optoelectronic module 100 of this embodiment has higher performance and reliability.

[0072] In summary, in the present application, a heat conduction layer (including high thermal conductivity materials such as diamond, copper, diamond copper, etc.) is added between the EIC and the PIC. By drilling holes in the heat conduction layer, the electrical connection between the EIC and the PIC is realized. The heat generated by the EIC is transferred to the heat conduction layer 40, and the heat is laterally diffused by the heat conduction layer 40, making the temperatures at all positions of the PIC the same or basically the same. That is, the uneven heat generated by the EIC reaches the PIC with uniform heat through the high thermal conductivity layer, avoiding the influence of the heat generated by the EIC on the working performance and functions of some PIC devices and realizing the reliable and stable operation of the large-scale optical switch array.

[0073] The above is only the specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present application can easily think of changes or substitutions, which should all be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claimed rights.

Claims

1. An optoelectronic module, characterized in that, it includes: a substrate; an optical chip and an electrical chip, which are stacked on one side of the substrate along the thickness direction of the substrate; a heat conduction layer, which is stacked between the optical chip and the electrical chip.

2. The optoelectronic module according to claim 1, characterized in that, the heat conduction layer includes connecting through holes, and the connecting through holes penetrate the surface of the heat conduction layer facing the optical chip and the surface of the heat conduction layer facing the electrical chip; the optoelectronic module further includes an electrical connection part, and the electrical connection part passes through the connecting through hole, one end of the electrical connection part is connected to the optical chip, and the other end is connected to the electrical chip.

3. The optoelectronic module according to claim 2, characterized in that, it further includes an insulating dielectric layer located between the electrical connection part and the heat conduction layer.

4. The optoelectronic module according to any one of claims 1-3, characterized in that, on the side surface of the optical chip facing the electrical chip, it includes: a first surface that overlaps with the electrical chip in the thickness direction; in the thickness direction, the heat conduction layer at least overlaps with the first surface.

5. The optoelectronic module according to claim 4, characterized in that, on the side surface of the optical chip facing the electrical chip, it further includes: a second surface that does not overlap with the electrical chip in the thickness direction; in the thickness direction, the heat conduction layer also overlaps with at least part of the second surface.

6. The optoelectronic module according to claim 4 or 5, characterized in that, on the side surface of the electrical chip facing the optical chip, it further includes: a third surface that does not overlap with the first surface of the optical chip in the thickness direction; in the thickness direction, the heat conduction layer also overlaps with at least part of the third surface.

7. The optoelectronic module according to any one of claims 1-6, characterized in that, the thermal conductivity of the heat conduction layer is greater than or equal to 200 W / (m·K).

8. The optoelectronic module according to any one of claims 1-7, characterized in that, the thickness of the heat conduction layer ranges from 10 μm to 300 μm.

9. The optoelectronic module according to any one of claims 1-8, characterized in that, the heat conduction layer includes a copper layer.

10. The optoelectronic module according to claim 6, characterized in that, the thickness of the copper layer is greater than or equal to 100 μm.

11. The optoelectronic module according to any one of claims 1-10, characterized in that, the heat conduction layer includes a diamond layer.

12. The optoelectronic module according to any one of claims 1-11, characterized in that, the heat conduction layer includes a diamond copper layer.

13. The optoelectronic module according to any one of claims 1-12, characterized in that, it further includes: a heat sink, which is located on the side away from the substrate of the one of the optical chip and the electrical chip that is farther from the substrate.

14. The optoelectronic module according to claim 13, characterized in that, the electrical chip is farther from the substrate than the optical chip, and the heat sink is in contact with the surface of the electrical chip that is away from the substrate.

15. A method for manufacturing an optoelectronic module, characterized in that, it includes: providing a substrate; A optical chip, an electrical chip and a heat conducting layer are formed on one side of a substrate; In the thickness direction of the substrate, the heat conducting layer is stacked between the optical chip and the electrical chip.

16. An all-optical switching system, characterized in that, comprising: an optical input end and a plurality of optical output ends; The optoelectronic module as described in any one of claims 1-14, coupled between the optical input end and the plurality of optical output ends.

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