N-type TOPCon battery and preparation method thereof

By adopting wet oxidation treatment and multi-layer structure formation in the preparation process of N-type TOPCon batteries, the problem of difficult to achieve low surface boron atom concentration doping in the prior art is solved, and the process efficiency and battery performance are improved.

CN120051029APending Publication Date: 2025-05-27DAS SOLAR CO LTD
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Patent Information

Application Number
CN202311576586.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-11-23
Publication Date
2025-05-27

AI Technical Summary

Technical Problem

The existing N-type TOPCon battery process is difficult to efficiently achieve low surface boron atomic doping, resulting in large energy consumption and long process time, and aggravate the defects of boron-oxygen composite, resulting in finished batteries with a higher proportion of concentric circles.

Method used

After fleece making, front boron diffusion and laser doping on the N-type silicon wafer, the silicon wafer is oxidized by wet oxidation treatment, and mixed gas of oxygen and water vapor are used to oxidize the silicon wafer, the borosilicate glass layer on the back is removed and the tunnel oxide layer and polysilicon layer are formed, phosphorus doping is performed, and a variety of glass layers are gradually removed, and a passivation film layer and anti-reflection film layer are finally formed.

Benefits of technology

It effectively reduces the process temperature and time, significantly reduces the doping concentration of boron atoms on the surface of the silicon wafer, reduces impurity recombination, improves the opening pressure of the cell, and increases the short-wave light response in sunlight, improves the current, and reduces the blackening defect of the concentric ring.

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Abstract

The embodiment of the invention provides an N-type TOPCon battery and a preparation method thereof, and in the preparation method of the N-type TOPCon battery provided by the embodiment of the invention, after boron diffusion and laser doping, a silicon wafer is oxidized by adopting mixed gas of oxygen and water vapor, so that the oxidation rate is increased, the process temperature can be effectively reduced, the process time can be effectively shortened, and the production efficiency of the N-type TOPCon battery is improved. The doping concentration of boron atoms on the surface of the silicon wafer is remarkably reduced, impurity recombination is reduced, the open voltage of the cell is improved, the boron atom doping junction depth can be reduced, the short-wave light response in sunlight is improved, and the current is improved; in addition, the reduction of the oxidation temperature also reduces the generation of silicon substrate and boron-oxygen defect compound pairs, and reduces the blackening defect of concentric rings.
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Description

Technical Field

[0001] The present invention relates to the technical field of crystalline silicon solar cell manufacturing, and particularly to an N-type TOPCon battery and a preparation method thereof. Background Art

[0002] Currently, N-type TOPCon batteries in crystalline silicon solar cells are widely used due to their advantages such as small attenuation, obvious overall efficiency and power generation advantages of the battery.

[0003] In order to achieve low surface concentration doping of boron atoms, existing N-type TOPCon batteries are added with a laser doping process, that is, boron diffusion, SE laser and oxidation treatment are carried out in sequence. However, the existing oxidation process not only has high energy consumption and long process time, but also the long process exacerbates the defects of boron-oxygen composite pairs, resulting in a high concentric circle ratio under the EL detection of finished batteries. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to provide an N-type TOPCon battery and a preparation method thereof to solve the problem that the prior art cannot efficiently realize an N-type TOPCon battery with low surface boron atom concentration doping.

[0005] To solve the above problems, the present invention is realized by the following technical solutions:

[0006] The present invention provides a preparation method of an N-type TOPCon battery, which includes:

[0007] After texturing, front boron diffusion treatment and laser doping are sequentially carried out on an N-type silicon wafer, wet oxidation treatment is carried out on the silicon wafer;

[0008] After wet oxidation treatment, the boron-silicate glass layer on the back is removed, and a tunneling oxide layer and a polysilicon layer are sequentially formed on the back;

[0009] Phosphorus doping is carried out on the polysilicon layer to form a phosphorus-doped polysilicon layer;

[0010] The phosphorus-silicate glass layer on the front, the plated polysilicon layer on the front, the boron-silicate glass layer on the front and the phosphorus-silicate glass layer on the back are sequentially removed;

[0011] After removing the phosphorus-silicate glass layer on the back, a passivation film layer, a front antireflection film layer, a back antireflection film layer and electrodes are sequentially formed on the silicon wafer.

[0012] Further, in the preparation method, the wet oxidation treatment of the silicon wafer includes:

[0013] The silicon wafer is placed in a furnace tube at 920-960 °C, and oxygen and water vapor are introduced for mixed oxidation.

[0014] Further, in the preparation method, nitrogen is introduced into the water vapor by passing through a water container at 70-90 °C.

[0015] Further, in the preparation method, the liquid level height of the water in the container is 1 / 2-2 / 3 of the total height of the container.

[0016] Further, in the preparation method, the flow rate of the oxygen is 4000-8000 sccm / min, the flow rate of the nitrogen is 400-1000 sccm / min, and the oxidation time is 30-50 min.

[0017] Further, in the preparation method, the front boron diffusion treatment includes:

[0018] Depositing for 10-15 min at a temperature of 830-870 °C, with the flow rate of BCl 3 being 180-220 sccm / min, the oxygen flow rate being 700-900 sccm / min, the nitrogen flow rate being 1500-3000 sccm / min, and the pressure being 120-180 mbar, and then heating the silicon wafer to 900-940 °C and performing a high-temperature promotion treatment for 15-30 min under the conditions of a nitrogen flow rate of 5000-10000 sccm / min and a pressure of 700-950 mbar.

[0019] Further, in the preparation method, phosphorus doping is performed on the polysilicon layer to form a phosphorus-doped polysilicon layer, including:

[0020] Depositing for 14-20 min at a temperature of 785-805 °C, with the flow rate of POCl 3 being 1100-1500 sccm / min, the oxygen flow rate being 500-700 sccm / min, and the pressure being 120-180 mbar, and then heating the silicon wafer to 870-890 °C for a high-temperature promotion treatment for 25-35 min to obtain a phosphorus-doped polysilicon layer.

[0021] Further, in the preparation method, removing the phosphorus-silicate glass layer on the front, the plated polysilicon layer on the front, the boron-silicate glass layer on the front, and the phosphorus-silicate glass layer on the back in sequence includes:

[0022] Performing chain pickling on the front of the silicon wafer to remove the phosphorus-silicate glass layer on the front;

[0023] After removing the phosphorus-silicate glass layer on the front, performing alkali etching treatment on the front of the silicon wafer to remove the plated polysilicon layer on the front;

[0024] After removing the polycrystalline silicon layer with overplating on the front side, the front and back sides of the silicon wafer are subjected to chain pickling to remove the borosilicate glass layer on the front side and the phosphosilicate glass layer on the back side.

[0025] Further, in the preparation method, during the process of removing the phosphosilicate glass layer on the front side, chain pickling is carried out with hydrofluoric acid having a mass percentage of 8-15%; and / or

[0026] During the process of removing the polycrystalline silicon layer with overplating on the front side, the front side of the silicon wafer is subjected to alkali etching treatment with KOH and a texturing additive; and / or

[0027] During the process of removing the borosilicate glass layer on the front side and the phosphosilicate glass layer on the back side, the chain pickling is carried out with hydrofluoric acid having a mass percentage of 25-40.

[0028] The present invention also provides an N-type TOPCon battery, which is prepared by the above method.

[0029] Compared with the prior art, the embodiments of the present invention have the following advantages:

[0030] In the embodiments of the present invention, in the preparation method of the N-type TOPCon battery, after boron diffusion and laser doping, a mixed gas of oxygen and water vapor is used to oxidize the silicon wafer, which increases the oxidation rate, can effectively reduce the process temperature and time. It not only significantly reduces the doping concentration of boron atoms on the silicon wafer surface, reduces impurity recombination, thereby improving the open voltage of the cell, but also can reduce the doping junction depth of boron atoms, enhance the short-wavelength light response in sunlight, thereby increasing the current; in addition, the reduction of the oxidation temperature also reduces the generation of boron-oxygen defect pairs in the silicon matrix, reducing the blackening defect of concentric rings.

[0031] It should be understood that the above general description and the following detailed description are only exemplary and explanatory, and cannot limit the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 is a flowchart of the preparation method of the N-type TOPCon battery provided by the embodiment of the present invention;

[0033] Figure 2 is a schematic structural diagram of wet oxidation using nitrogen to carry water vapor in the embodiment of the present invention. DETAILED DESCRIPTION

[0034] To make the above objects, features and advantages of the present invention more obvious and understandable, the present invention will be further described in detail below with reference to the drawings and specific embodiments.

[0035] The applicant of the present invention has found that in order to achieve low surface concentration doping of boron atoms, the existing N-type TOPCon cells are added with a laser doping process. When preparing N-type TOPCon cells, boron diffusion, SE laser and oxidation treatment are carried out in sequence. However, the process of oxidation treatment by dry oxidation in the prior art not only has high energy consumption and long process time, but also the long process exacerbates the defects of boron-oxygen composite pairs, resulting in a relatively high proportion of concentric circles under the EL detection of the finished cells.

[0036] In order to solve the above problems, an embodiment of the present invention provides a method for preparing an N-type TOPCon cell, as Figure 1 shown, including steps 101 to 105:

[0037] Step 101, after texturing, front boron diffusion treatment and laser doping are sequentially carried out on an N-type silicon wafer, wet oxidation treatment is carried out on the silicon wafer;

[0038] Step 102, after wet oxidation treatment, the boron-silicate glass layer on the back is removed, and a tunneling oxide layer and a polysilicon layer are sequentially formed on the back;

[0039] Step 103, phosphorus doping is carried out on the polysilicon layer to form a phosphorus-doped polysilicon layer;

[0040] Step 104, the phosphorus-silicate glass layer on the front, the plated polysilicon layer on the front, the boron-silicate glass layer on the front and the phosphorus-silicate glass layer on the back are sequentially removed;

[0041] Step 105, after removing the phosphorus-silicate glass layer on the back, a passivation film layer, a front antireflection film layer, a back antireflection film layer and electrodes are sequentially formed on the silicon wafer.

[0042] In the method for preparing an N-type TOPCon cell provided by the embodiment of the present invention, after boron diffusion and laser doping, a mixed gas of oxygen and water vapor is used to oxidize the silicon wafer, which increases the oxidation rate, can effectively reduce the process temperature and time. It not only significantly reduces the doping concentration of boron atoms on the silicon wafer surface, reduces impurity recombination, thereby improving the open voltage of the cell, but also can reduce the doping junction depth of boron atoms, improve the short-wavelength light response in sunlight, thereby increasing the current. In addition, the reduction of the oxidation temperature also reduces the generation of boron-oxygen defect complexes in the silicon matrix, reducing the blackening defect of concentric rings.

[0043] In the above step 101, N-type raw silicon of a certain size is selected for double-sided texturing treatment, that is, the preparation of a double-sided pyramid structure is carried out to ensure that the surface reflectivity of the texture is between 9% and 10%, for example, 9.6%; among them, the N-type raw silicon can specifically be a silicon wafer of 182 mm × 182 mm. Optionally, the raw silicon wafer is subjected to double-sided texturing treatment with a texturing solution at 75-85 °C. Among them, by volume, the texturing solution includes 16-24 parts of a KOH solution with a mass percentage of 45%, 3-6 parts of a texturing additive, and 450-500 parts of water. Among them, the texturing additive includes a surfactant with a mass percentage of 2-3%, a defoaming agent with a mass percentage of 1-3%, a nucleating agent with a mass percentage of 1-1.5%, sodium benzoate with a mass percentage of 4-6%, and water with a mass percentage of 86.5-90%. The surfactant can be sodium lauryl polyoxyethylene sulfate or triglyceride, the defoaming agent can be oxypropylene glycerol ether or oxypropylene glycerol ether, and the nucleating agent can be sodium citrate.

[0044] In the above step 101, the textured silicon wafer is sent into a furnace tube for boron diffusion treatment to prepare a PN junction and make the surface boron doping concentration reach 8E18-2E19 atoms / cm 3 , and the diffusion junction depth reaches between 0.6 and 1.2 um, and the sheet resistance of the silicon wafer is 100-120 Ω.

[0045] Optionally, in an embodiment, the above-mentioned front boron diffusion treatment includes:

[0046] Depositing for 10-15 min under the conditions of a temperature of 830-870 °C, a flow rate of BCl 3 of 180-220 sccm / min, an oxygen flow rate of 700-900 sccm / min, a nitrogen flow rate of 1500-3000 sccm / min, and a pressure of 120-180 mbar, then heating the silicon wafer to 900-940 °C and performing a high-temperature push treatment for 15-30 min under the conditions of a nitrogen flow rate of 5000-10000 sccm / min and a pressure of 700-950 mbar to complete the boron diffusion treatment.

[0047] In the above step 101, the silicon wafer after boron diffusion treatment is subjected to laser doping. Among them, because after the boron diffusion treatment, a boron-rich borosilicate glass layer (BSG) is formed on the surface of the silicon wafer. The SE laser emitter uses this boron-rich BSG layer as a doping source and emits laser pulses at a high frequency to melt the surface layer of the silicon wafer, so that the boron atoms in the BSG layer are pushed into the inner layer of the silicon wafer, and after the doped boron atoms are solidified, they will quickly replace the position of the silicon atoms to achieve the purpose of doping atom diffusion and propulsion. Among them, the sheet resistance of the silicon wafer after laser doping treatment is 60-80 ohms, for example, 65 ohms.

[0048] Optionally, when laser doping the back side of the silicon wafer, a laser is used to perform laser doping in the way of laser marking with picosecond green light. The speed of laser marking is 28,000 - 32,000 mm / s, the laser power is 55 - 70 w, the frequency is 1,000 - 1,500 Hz, and the processing time is 0.3 - 0.5 s.

[0049] Exemplarily, the above-mentioned laser performs laser marking at a power of 67 w, the speed of laser marking is 30,000 mm / s, the frequency is 1,200 Hz, and the processing time is 0.45 s.

[0050] Optionally, in the preparation method provided by the embodiments of the present invention, wet oxidation treatment is performed on the above-mentioned silicon wafer, including:

[0051] Placing the silicon wafer in a furnace tube at 920 - 960 °C, and introducing oxygen and water vapor for mixed oxidation.

[0052] Since the doping concentration of boron atoms in the silicon matrix is related to the segregation coefficient, and the solubility of boron atoms in silicon dioxide is 3.3 times that in silicon, by growing a thicker silicon dioxide during the oxidation process, the boron atoms in the silicon matrix can be precipitated, so that the boron atoms on the surface layer form BSG with silicon dioxide, and the BSG is washed away by the subsequent cleaning process, thereby realizing low surface concentration doping of boron atoms.

[0053] In the embodiments of the present invention, by introducing the wet oxidation technology, at a process temperature of 920 - 960 °C, the silicon wafer is oxidized by a mixed gas of water vapor and oxygen. It only takes 30 - 50 min of oxidation to grow a BSG with a thickness of 120 - 150 nm. Not only is the total process time shortened, but the process temperature required is also reduced by about 100 °C. It can significantly improve the concentric circle ratio of the finished battery on the premise of effectively reducing the doping concentration of boron atoms in the silicon matrix.

[0054] Optionally, in one implementation manner, nitrogen is used to introduce the above-mentioned water vapor through a water container at 70 - 90 °C.

[0055] In this implementation manner, as Figure 2 shown, the silicon wafer is oxidized by mixing oxygen with water vapor carried by nitrogen. First, the container 11 filled with water is heated to 70 - 90 °C, and then a certain amount of nitrogen is introduced. After the nitrogen is wetted, it carries the water vapor into the furnace tube 12 containing the silicon wafer after boron diffusion treatment.

[0056] Optionally, in a specific implementation manner, the liquid level height of the water in the above-mentioned container is 1 / 2 - 2 / 3 of the total height of the container.

[0057] In an embodiment of the present invention, the furnace tube 12 is provided with an intake pipe 13 and an extraction pipe 14. The intake pipe 13 is arranged near the bottom layer of the furnace tube 12, and the extraction pipe 14 is arranged above the intake pipe 13, so that water vapor can pass through the silicon wafer more fully and wet it.

[0058] Optionally, in a specific embodiment, the flow rate of the above-mentioned oxygen is 4000-8000 sccm / min, the flow rate of nitrogen is 400-1000 sccm / min, and the oxidation time is 30-50 min. Then, a silicon dioxide layer with sufficient thickness can be grown on the front side of the silicon wafer, which can fully precipitate the boron atoms in the silicon matrix and form a borosilicate glass layer. Compared with the conventional dry oxidation treatment method, the service life of the quartz furnace tube can be extended by one year in the above-mentioned embodiment. The reduction of the high-temperature time and temperature in the process can reduce the concentric circle ratio by 0.3-0.8%. Moreover, after oxidation, a high sheet resistance process can be carried out, and the oxidation sheet resistance of the laser doping area is increased from 200±20 Ω to 300±20 Ω, improving the efficiency of the battery chip.

[0059] In an embodiment of the present invention, due to the change of the crystal lattice in the laser doping area, the change of the sheet resistance after wet oxygen oxidation is small, and it is still between 60 and 80 Ω.

[0060] In the above step 102, removing the borosilicate glass layer on the back includes:

[0061] Performing chain pickling and alkali polishing on the back of the silicon wafer after wet oxidation treatment. Among them, by volume, the chain pickling solution includes 500-600 parts of hydrofluoric acid with a mass percentage of 49%, 50-100 parts of water. The temperature of the above alkali polishing treatment is 70-80 °C, and the alkali polishing solution includes 19-26 parts of KOH solution with a mass percentage of 45%, 3-6 parts of alkali polishing additives, and 450-500 parts of water. Among them, the alkali polishing additives include a surfactant with a mass percentage of 2-3%, a defoaming agent with a mass percentage of 2-3%, an antifoaming agent with a mass percentage of 2-4%, glucose with a mass percentage of 2-3%, sodium polystyrene sulfonate with a mass percentage of 2-3%, and water with a mass percentage of 80-85%. The surfactant can be sodium lauryl polyoxyethylene ether or triglyceride, the defoaming agent can be polyoxypropylene glycerol ether or polyoxypropylene glycerol ether, and the antifoaming agent can be octylphenol polyoxyethylene ether.

[0062] In the above step 102, the N-type silicon wafer after removing the borosilicate glass layer on the back is subjected to low pressure chemical vapor deposition (LPCVD), first forming an ultra-thin silicon dioxide layer on the back of the N-type silicon wafer as an ultra-thin tunneling oxide layer, and then preparing a polysilicon layer with a thickness that can meet the transition passivation effect on both sides. Among them, because the preparation of the polysilicon layer on both sides is conducive to the subsequent removal of the front polysilicon layer, it is not easy to have the two extreme situations of excessive removal or insufficient removal, and the yield is better controlled.

[0063] Optionally, in one embodiment, a tunnel oxide layer and a polysilicon layer are sequentially formed on the back side, including:

[0064] forming a silicon dioxide layer with a thickness of 2 to 3 nm on the back side as the tunneling oxide layer;

[0065] A polysilicon layer with a thickness of 110-130 nm is formed on the surface of the tunnel oxide layer as the polysilicon layer.

[0066] In this embodiment, the N-type silicon wafer after forming the PN junction and removing the borosilicate glass layer on the back is subjected to low pressure chemical vapor deposition (LPCVD) and subjected to an oxygen amount of 250-350L, a temperature of 600-640°C, and a pressure of 650-900mbar for 15-30min to form a silicon dioxide layer with a thickness of 2-3nm on the back as a tunneling oxide layer. The oxygen inlet flow rate is 40L / min.

[0067] In this embodiment, after the tunneling oxide layer is formed, silane is introduced at a flow rate of 800 to 1200 sccm for 1700 to 2100 seconds at a temperature of 600 to 630°C and a pressure of 25 to 30 mbar, and a polycrystalline silicon layer having a thickness sufficient for the passivation effect is prepared on both sides or on one side as the above-mentioned polycrystalline silicon passivation layer; the thickness can specifically be 110 to 130 nm.

[0068] Optionally, in one implementation, in the above step 103, phosphorus-doping the polysilicon layer to form a phosphorus-doped polysilicon layer includes:

[0069] At a temperature of 785-805°C, POCl 3 The deposition is carried out for 14 to 20 minutes under the conditions of a flow rate of 1100 to 1500 sccm / min, an oxygen flow rate of 500 to 700 sccm / min, and a pressure of 120 to 180 mbar, and then the silicon wafer is heated to 870 to 890°C for high-temperature push-in treatment for 25 to 35 minutes to obtain a phosphorus-doped polysilicon layer.

[0070] In this embodiment, by depositing for 14 - 20 min under the conditions of a temperature of 785 - 805 °C, a flow rate of POCl 3 of 1100 - 1500 sccm / min, an oxygen flow rate of 500 - 700 sccm / min, and a pressure of 120 - 180 mbar, and then heating the silicon wafer to 870 - 890 °C for high-temperature promotion treatment for 25 - 35 min, high-concentration doping of the polysilicon passivation layer can be completed, and a phosphorus-doped polysilicon layer with a phosphorus atom doping concentration of 6E20 - 8E20 / cm 3 can be obtained.

[0071] Optionally, in one embodiment, step 104 described above includes:

[0072] Performing chain pickling on the front side of the silicon wafer to remove the phosphosilicate glass layer on the front side;

[0073] After removing the phosphosilicate glass layer on the front side, performing alkali etching treatment on the front side of the silicon wafer to remove the deposited polysilicon layer on the front side;

[0074] After removing the deposited polysilicon layer on the front side, performing chain pickling on the front and back sides of the silicon wafer to remove the borosilicate glass layer on the front side and the phosphosilicate glass layer on the back side.

[0075] In this embodiment, the silicon wafer after phosphorus doping is placed face down and undergoes chain pickling to remove the phosphosilicate glass layer on the front side. Among them, the pickling solution in the chain pickling can be hydrofluoric acid with a mass percentage of 8 - 15%.

[0076] In this embodiment, after removing the phosphosilicate glass layer on the front side, alkali etching treatment is continued to remove the deposited polysilicon layer on the front side. Among them, by volume, the above alkali etching solution includes 16 - 24 parts of a 45% KOH solution, 3 - 7 parts of an etching additive, and 400 - 500 parts of water. The etching additive includes a surfactant with a mass percentage of 1 - 2%, a defoaming agent with a mass percentage of 2 - 3%, an antifoaming agent with a mass percentage of 1 - 3%, glucose with a mass percentage of 2 - 4%, sodium dodecyl sulfate with a mass percentage of 1 - 3%, and water with a mass percentage of 80 - 90%. The surfactant can be sodium lauryl polyoxyethylene ether or triglyceride, the defoaming agent can be oxypropylene glycerol ether or oxypropylene glycerol ether, and the antifoaming agent can be octylphenol polyoxyethylene ether.

[0077] In this embodiment, since a borosilicate glass layer is also formed on the front side of the silicon wafer during boron doping, which can protect the internal textured surface from damage during alkali polishing or alkali etching treatment, after removing the polysilicon layer plated around the front side, a chain acid pickling is used to remove the borosilicate glass layer on the front side of the silicon wafer; in addition, a phosphosilicate glass layer is also formed on the back side of the silicon wafer during phosphorus doping, which also needs to be removed by chain acid pickling after removing the polysilicon layer plated around the front side. Among them, the pickling solution in the chain acid pickling can be hydrofluoric acid with a mass percentage of 25% to 40%.

[0078] In the above step 105, an aluminum oxide film layer is deposited on the front side or both the front and back sides of the product by Atomic Layer Deposition (ALD) process as a passivation layer to form field passivation. Among them, the thickness of the aluminum oxide film layer can be 2.5 to 5 nm;

[0079] After forming the aluminum oxide film layer, a silicon nitride layer is first deposited on the front side of the battery, with a comprehensive refractive index between 1.98 and 2.1 and the film thickness controlled between 70 and 86 nm; then a silicon nitride layer is deposited on the back side, with a comprehensive refractive index between 1.98 and 2.1 and the film thickness controlled between 74 and 90 nm; then positive and negative metal electrodes are prepared by printing and sintering. Among them, silver paste is used for the main grids on the positive and negative sides, silver-aluminum paste is used for the sub-grids on the front side, and silver paste is used for the sub-grids on the back side. The sintering temperature is 780 to 840 °C and the time is 40 to 70 s, and the total consumption is controlled between 90 and 200 mg.

[0080] The present invention also proposes an N-type TOPCon battery, which is prepared by the above method.

[0081] For the above N-type TOPCon battery embodiment, it is prepared by the above method and can achieve the same technical effects. To avoid repetition, it will not be elaborated here. For relevant parts, refer to the partial description of the preparation method embodiment.

[0082] In order to make the invention purpose, technical solution and beneficial effects of the present invention clearer, the present invention will be further described below in conjunction with embodiments. It should be understood that these embodiments are only used to illustrate the present invention and not to limit the scope of the present invention.

[0083] Example 1

[0084] (1) Select an N-type silicon wafer with a size of 182 mm × 182 mm, and perform double-sided texturing treatment on the original silicon wafer with a texturing solution at 80 °C. Among them, by volume, the texturing solution includes 22 parts of a KOH solution with a mass percentage of 45%, 4.5 parts of a texturing additive, and 460 parts of water. Among them, the texturing additive includes a surfactant with a mass percentage of 3%, a defoaming agent with a mass percentage of 1.8%, a nucleating agent with a mass percentage of 1.2%, sodium benzoate with a mass percentage of 5.0%, and water with a mass percentage of 89%. The surfactant is sodium lauryl polyoxyethylene ether sulfate, the defoaming agent is oxypropylene glycerol ether, and the nucleating agent is sodium citrate;

[0085] (2) Feed the textured silicon wafer into the furnace tube, and deposit for 10 min under the conditions of a temperature of 850 °C, a BCl 3 flow rate of 210 sccm / min, an oxygen flow rate of 700 sccm / min, a nitrogen flow rate of 2000 sccm / min, and a pressure of 160 mbar. Then, heat the silicon wafer to 920 °C and treat it for 20 min under a pressure of 800 mbar and a nitrogen flow rate of 6000 sccm / min to complete the boron diffusion treatment;

[0086] (3) Perform laser doping on the back of the silicon wafer after boron diffusion treatment, control the laser power at 67 W, and ensure that the sheet resistance of the SE region is 65 Ω;

[0087] (4) Perform wet oxidation on the silicon wafer after laser doping: Place the silicon wafer in the furnace tube, heat it to 950 °C, introduce oxygen at a flow rate of 6000 sccm / min, and send nitrogen with a flow rate of 600 sccm / min into the furnace tube after passing through a water bottle with a liquid level height of 2 / 3 of the total height and a temperature of 80 °C for mixed oxidation of water vapor and oxygen. The oxidation time is 45 min, and the growth thickness of BSG is in the range of 120 - 150 nm;

[0088] (5) Perform chain pickling and alkali polishing treatment on the back of the silicon wafer after wet oxidation to remove the boron-silicate glass layer on the back. Among them, by volume, the chain pickling solution includes 570 parts of hydrofluoric acid with a mass percentage of 49% and 30 parts of water; the temperature of the above alkali polishing treatment is 75 °C, and the alkali polishing solution includes 20 parts of a KOH solution with a mass percentage of 45%, 4.3 parts of an alkali polishing additive, and 480 parts of water. Among them, the alkali polishing additive includes a surfactant with a mass percentage of 3%, a defoaming agent with a mass percentage of 2.2%, an antifoaming agent with a mass percentage of 3%, glucose with a mass percentage of 2.5%, sodium polystyrene sulfonate with a mass percentage of 2%, and water with a mass percentage of 87.3%. The surfactant is sodium lauryl polyoxyethylene ether sulfate, the defoaming agent is oxypropylene glycerol ether, and the antifoaming agent is octylphenol polyoxyethylene ether;

[0089] (6) The N-type silicon wafers after alkaline polishing are subjected to Low Pressure Chemical Vapor Deposition (LPCVD). Oxygen is introduced at a flow rate of 40 L / min with a total amount of 320 L, and it acts for 20 min at a temperature of 615 °C and a pressure of 800 mbar, thereby forming a silicon dioxide layer with a thickness of 2.5 nm on the back surface as the tunneling oxide layer.

[0090] (7) After forming the tunneling oxide layer, silane is introduced at a flow rate of 1150 sccm and lasts for 1900 s at a temperature of 605 °C and a pressure of 28 mbar to prepare a polysilicon layer with a thickness of 120 nm. The sheet resistance of the non-SE area is measured to be 300 Ω, while that of the SE area is 70 Ω.

[0091] (8) The silicon wafers are deposited for 18 min at a temperature of 795 °C, with a flow rate of POCl 3 of 1350 sccm / min, an oxygen flow rate of 600 sccm / min, and a pressure of 160 mbar. Then the silicon wafers are heated to 885 °C for 25 min of high-temperature drive-in treatment to complete high-concentration doping of the polysilicon layer, obtaining a phosphorus-doped polysilicon layer with a surface concentration of phosphorus atoms of 6.1E20 / cm 3 .

[0092] (9) The silicon wafers after phosphorus doping are placed face-down and subjected to chain pickling to remove the phosphosilicate glass layer on the front surface. In the chain pickling, the pickling solution uses hydrofluoric acid with a mass percentage of 10%.

[0093] (10) After removing the phosphosilicate glass layer on the front surface, the silicon wafers are subjected to alkaline etching treatment to remove the polysilicon layer plated around the front surface. The temperature of the above alkaline etching solution is 75 °C. By volume, the above alkaline etching solution includes 19 parts of KOH solution with a mass percentage of 45%, 3.8 parts of etching additive, and 480 parts of water. The etching additive includes a surfactant with a mass percentage of 1.5%, a defoaming agent with a mass percentage of 2.5%, an antifoaming agent with a mass percentage of 1.5%, glucose with a mass percentage of 3%, sodium dodecyl sulfate with a mass percentage of 2%, and water with a mass percentage of 89.5%. The surfactant is sodium lauryl polyoxyethylene ether sulfate, the defoaming agent is oxypropylene glycerol ether, and the antifoaming agent is octylphenol polyoxyethylene ether.

[0094] (11) After removing the polysilicon layer plated around the front surface, the front and back surfaces of the silicon wafers are subjected to chain pickling to remove the borosilicate glass layer on the front surface and the phosphosilicate glass layer on the back surface. In the chain pickling, the pickling solution uses hydrofluoric acid with a mass percentage of 30%.

[0095] (12) Perform the ALD process on the silicon wafer to deposit alumina film layers on both sides with a thickness of 3.5 nm;

[0096] (13) Deposit a silicon nitride layer with a thickness of 77 nm on the front side; deposit a silicon nitride layer with a thickness of 80 nm on the back side;

[0097] (14) Prepare the front and back metal electrodes. Use silver paste for the front and back main grids, silver-aluminum paste for the front sub-grid, and silver paste for the back sub-grid, and then sinter at 840 °C for 45 s.

[0098] Repeat the above Example 1 to fabricate 7500 N-type TOPCon cells. Perform electrical performance tests on each cell and calculate the average value. The results are shown in Table 1.

[0099] Comparative Example 1

[0100] (1) Select an 182 mm × 182 mm N-type silicon wafer and perform double-sided texturing treatment on the original silicon wafer with the texturing solution at 80 °C. Among them, by volume, the above texturing solution includes 22 parts of KOH solution with a mass percentage of 45%, 4.5 parts of texturing additive, and 460 parts of water. Among them, the texturing additive includes a surfactant with a mass percentage of 3%, a defoaming agent with a mass percentage of 1.8%, a nucleating agent with a mass percentage of 1.2%, sodium benzoate with a mass percentage of 5.0%, and water with a mass percentage of 89%. The surfactant is sodium lauryl polyoxyethylene ether sulfate, the defoaming agent is oxypropylene glycerol ether, and the nucleating agent is sodium citrate;

[0101] (2) Feed the textured silicon wafer into the furnace tube and deposit for 10 min under the conditions of a temperature of 840 °C, a flow rate of BCl 3 of 200 sccm / min, an oxygen flow rate of 750 sccm / min, a nitrogen flow rate of 2000 sccm / min, and a pressure of 160 mbar. Then raise the temperature of the silicon wafer to 920 °C and treat for 20 min under a pressure of 800 mbar and a nitrogen flow rate of 6000 sccm / min to complete the boron diffusion treatment;

[0102] (3) Perform laser doping on the back side of the silicon wafer after boron diffusion treatment, control the laser power at 62 W, and ensure that the sheet resistance of the SE region is 70 Ω;

[0103] (4) Oxidize the silicon wafer after laser doping: Place the silicon wafer in the furnace tube, raise the temperature to 1050 °C, introduce oxygen at a flow rate of 18000 sccm / min, and the oxidation time is 80 min. The growth thickness of BSG is between 90 and 120 nm; test that the sheet resistance of the non-SE region is 200 Ω, while the sheet resistance of the SE region is 72 Ω;

[0104] (5) Chain pickling and alkali polishing are performed on the back of the oxidized silicon wafer to remove the borosilicate glass layer on the back. Among them, by volume, the chain pickling solution includes 530 parts of hydrofluoric acid with a mass percentage of 49% and 70 parts of water; the temperature of the above alkali polishing treatment is 78 °C, and the alkali polishing solution includes 20 parts of KOH solution with a mass percentage of 45%, 4.5 parts of alkali polishing additive, and 480 parts of water. Among them, the alkali polishing additive includes a surfactant with a mass percentage of 3%, a defoaming agent with a mass percentage of 2.2%, an antifoaming agent with a mass percentage of 3%, glucose with a mass percentage of 2.5%, sodium polystyrene sulfonate with a mass percentage of 2%, and water with a mass percentage of 87.3%. The surfactant is sodium lauryl polyoxyethylene ether sulfate, the defoaming agent is oxypropylene glycerol ether, and the antifoaming agent is octylphenol polyoxyethylene ether;

[0105] (6) The N-type silicon wafer after alkali polishing is subjected to Low Pressure Chemical Vapor Deposition (LPCVD), and oxygen is introduced at a flow rate of 40 L / min with an oxygen volume of 320 L, and it acts for 20 min at a temperature of 615 °C and a pressure of 800 mbar, and a silicon dioxide layer with a thickness of 2.5 nm can be formed on the back as a tunneling oxide layer;

[0106] (7) After the tunneling oxide layer is formed, silane is introduced at a flow rate of 1150 sccm and continues for 1900 s at a temperature of 605 °C and a pressure of 28 mbar to prepare a polysilicon layer with a thickness of 120 nm;

[0107] (8) The silicon wafer is placed face down and undergoes chain pickling to remove the phosphosilicate glass layer on the front. Among them, the pickling solution in the chain pickling uses hydrofluoric acid with a mass percentage of 10%; 3 with a flow rate of 1350 sccm / min, an oxygen flow rate of 600 sccm / min, and a pressure of 160 mbar for 18 min, and then the silicon wafer is heated to 885 °C for high-temperature drive-in treatment for 25 min to complete high-concentration doping of the polysilicon layer, and a phosphorus-doped polysilicon layer with a surface concentration of phosphorus atoms of 6.1E20 / cm 3 is obtained;

[0108] (9) The silicon wafer after phosphorus doping is placed face down and undergoes chain pickling to remove the phosphosilicate glass layer on the front. Among them, the pickling solution in the chain pickling uses hydrofluoric acid with a mass percentage of 10%;

[0109] (10) After removing the phosphosilicate glass layer on the front side, the silicon wafer is subjected to alkaline etching treatment to remove the polysilicon layer electroplated around the front side. Among them, the temperature of the above alkaline etching solution is 75 °C. By volume, the above alkaline etching solution includes 19 parts of KOH solution with a mass percentage of 45%, 3.8 parts of etching additive, and 480 parts of water. Among them, the etching additive includes a surfactant with a mass percentage of 1.5%, a defoaming agent with a mass percentage of 2.5%, an antifoaming agent with a mass percentage of 1.5%, glucose with a mass percentage of 3%, sodium dodecyl sulfate with a mass percentage of 2%, and water with a mass percentage of 89.5%. The surfactant is sodium lauryl polyoxyethylene ether sulfate, the defoaming agent is oxypropylene glycerol ether, and the antifoaming agent is octylphenol polyoxyethylene ether;

[0110] (11) After removing the polysilicon layer electroplated around the front side, the front and back sides of the silicon wafer are subjected to chain pickling to remove the borosilicate glass layer on the front side and the phosphosilicate glass layer on the back side. Among them, the pickling solution in the chain pickling uses hydrofluoric acid with a mass percentage of 30%;

[0111] (12) The silicon wafer is subjected to ALD process to deposit alumina film layers on both sides, and the thickness is maintained at 3.5 nm;

[0112] (13) Deposit a silicon nitride layer with a thickness of 77 nm on the front side; deposit a silicon nitride layer with a thickness of 80 nm on the back side;

[0113] (14) Prepare the front and back metal electrodes. The front and back main grids use silver paste, the front sub-grid uses silver-aluminum paste, and the back sub-grid uses silver paste, and then sinter at 840 °C for 45 s.

[0114] Repeat the above Comparative Example 1 to prepare 6,600 N-type TOPCon cells, perform electrical performance tests on each cell and calculate the average value, and the results are shown in Table 1.

[0115] Table 1

[0116] Experiment Qty Eta(%) Uoc(mv) Isc(A) FF(%) Concentric circle ratio Example 1 7500 25.63 726.7 13.9215 84.43 0.31% Comparative Example 1 6600 25.56 725.4 13.9015 84.50 0.88%

[0117] Experiments show that compared with the conventional dry oxidation process, the N-type TOPCon cells provided by the embodiments of the present invention have an open-circuit voltage increase of 1.3 mV, a current increase of 20 mA, a photoelectric conversion efficiency increase of 0.07%, and a concentric circle defect reduction of 0.56%.

[0118] Analysis shows that the wet oxidation process increases the oxidation sheet resistance from 200 Ω to 300 Ω, reduces the doping concentration of boron atoms on the silicon wafer surface, decreases impurity recombination, and improves the open voltage of the cell; moreover, the oxidation temperature is reduced, resulting in a decrease in the junction depth of boron atom doping, thereby enhancing the short-wavelength light response in sunlight and increasing the current; at the same time, the reduction of the oxidation temperature reduces the generation of boron-oxygen defect complexes in the silicon matrix, thus reducing the blackening defect of the concentric rings.

[0119] In summary, in this embodiment, in the provided method for preparing an N-type TOPCon cell, after boron diffusion and laser doping, a mixed gas of oxygen and water vapor is used to oxidize the silicon wafer, which increases the oxidation rate, can effectively reduce the process temperature and time. It not only significantly reduces the doping concentration of boron atoms on the silicon wafer surface, decreases impurity recombination, thereby improving the open voltage of the cell, but also can reduce the junction depth of boron atom doping, enhance the short-wavelength light response in sunlight, and thus increase the current; in addition, the reduction of the oxidation temperature also reduces the generation of boron-oxygen defect complexes in the silicon matrix and reduces the blackening defect of the concentric rings.

[0120] Although the preferred embodiments of the embodiments of the present invention have been described, those skilled in the art can make additional changes and modifications once they know the basic creative concept. Therefore, the claims are intended to be interpreted to include the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present invention.

[0121] The above provides a detailed introduction to an N-type TOPCon cell and its preparation method provided by the present invention. Specific examples are used in this article to elaborate on the principle and implementation manner of the present invention. The description of the above embodiments is only used to help understand the method and its core idea of the present invention; at the same time, for those of ordinary skill in the art, according to the idea of the present invention, there will be changes in the specific implementation manner and application scope. In summary, the content of this specification should not be construed as a limitation to the present invention.

Claims

1. A method for preparing an N-type TOPCon battery, It is characterized in that include: After the N-type silicon wafer is subjected to texturing, front boron diffusion treatment and laser doping in sequence, the silicon wafer is subjected to wet oxidation treatment; After wet oxidation treatment, the borosilicate glass layer on the back is removed, and a tunneling oxide layer and a polysilicon layer are sequentially formed on the back; performing phosphorus doping on the polysilicon layer to form a phosphorus doped polysilicon layer; The phosphosilicate glass layer on the front side, the polysilicon layer on the front side, the borosilicate glass layer on the front side and the phosphosilicate glass layer on the back side are removed in sequence; After removing the phosphorus silicon glass layer on the back side, a passivation film layer, a front anti-reflection film layer, a back anti-reflection film layer and an electrode are sequentially formed on the silicon wafer.

2. The preparation method according to claim 1, It is characterized in that The silicon wafer is subjected to a wet oxidation treatment, comprising: The silicon wafer is placed in a furnace tube at 920-960° C., and oxygen and water vapor are introduced for mixed oxidation.

3. The preparation method according to claim 2, It is characterized in that The water vapor is introduced by nitrogen through a container containing water at 70-90°C.

4. The preparation method according to claim 3, It is characterized in that The liquid level of water in the container is 1 / 2 to 2 / 3 of the total height of the container.

5. The preparation method according to claim 3, It is characterized in that The flow rate of the oxygen gas is 4000-8000 sccm / min, the flow rate of the nitrogen gas is 400-1000 sccm / min, and the oxidation time is 30-50 min.

6. The preparation method according to claim 1, It is characterized in that Front side boron diffusion treatment, including: At a temperature of 830-870°C, BCl 3 The deposition is carried out for 10 to 15 minutes under the conditions of a flow rate of 180 to 220 sccm / min, an oxygen flow rate of 700 to 900 sccm / min, a nitrogen flow rate of 1500 to 3000 sccm / min, and a pressure of 120 to 180 mbar. The silicon wafer is then heated to 900 to 940°C and subjected to a high-temperature push treatment for 15 to 30 minutes under the conditions of a nitrogen flow rate of 5000 to 10000 sccm / min and a pressure of 700 to 950 mbar.

7. The preparation method according to claim 1, It is characterized in that The polysilicon layer is phosphorus-doped to form a phosphorus-doped polysilicon layer, comprising: At a temperature of 785-805°C, POCl 3 The deposition is carried out for 14 to 20 minutes under the conditions of a flow rate of 1100 to 1500 sccm / min, an oxygen flow rate of 500 to 700 sccm / min, and a pressure of 120 to 180 mbar, and then the silicon wafer is heated to 870 to 890°C for high-temperature push-in treatment for 25 to 35 minutes to obtain a phosphorus-doped polysilicon layer.

8. The preparation method according to claim 1, It is characterized in that The front phosphosilicate glass layer, the front coated polysilicon layer, the front borosilicate glass layer and the back phosphosilicate glass layer are removed in sequence, including: Performing chain pickling on the front side of the silicon wafer to remove the phosphorus-silicate glass layer on the front side; After removing the phosphorus silicon glass layer on the front side, performing alkali etching on the front side of the silicon wafer to remove the polysilicon layer on the front side; After removing the coated polysilicon layer on the front side, the front side and the back side of the silicon wafer are chain pickled to remove the borosilicate glass layer on the front side and the phosphosilicate glass layer on the back side.

9. The preparation method according to claim 8, It is characterized in that In the process of removing the front phosphosilicate glass layer, chain pickling is performed using hydrofluoric acid with a mass percentage of 8 to 15%; and / or In the process of removing the front polysilicon layer, the front side of the silicon wafer is subjected to alkaline etching treatment using KOH and a texturing additive; and / or In the process of removing the borosilicate glass layer on the front side and the phosphosilicate glass layer on the back side, the chain pickling is performed using hydrofluoric acid with a mass percentage of 25 to 40.

10. An N-type TopCon battery, It is characterized in that The invention is prepared by the method described in claims 1 to 9.

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