Preparation method of transverse p-n junction BC solar cell

Abstract

The invention relates to the field of solar cells, and discloses a preparation method of a transverse p-n junction BC solar cell. Through ingenious step design, the BC solar cell with the novel transverse p-n junction structure can be obtained, the front face of the cell is free of grid lines, the two transverse portions are the n area and the p area respectively, and therefore the transverse p-n junction BC solar cell can be formed. According to the cell, the optical performance of the cell can be improved through simple structure adjustment without a complex laser graphical design process. In addition, a boundary groove of the p region and the n region is formed in the surface of the silicon wafer in advance through laser grooving treatment, in the boron diffusion process, even if boron doping atoms cross the designed boundary, the boron doping atoms cannot be longitudinally and inwards expanded to the surface of the silicon wafer substrate of the n region, and therefore for the back face of the silicon wafer, the boron doping atoms cannot be longitudinally and inwards expanded. After boron diffusion, the boundary between the n region and the p region can be highly consistent with the preset boundary, so that the problem of subsequent electrode printing accurate positions corresponding to the p region and the n region does not need to be worried about.

Description

Technical Field

[0001] The present invention relates to the field of solar cells, and in particular to a method for manufacturing a lateral p-n junction BC solar cell. Background Art

[0002] Conventional solar cells such as BSF, PERC, TOPCon, etc. all have a vertical p-n junction structure (as shown in Figure 8 ), but due to the existence of grid lines on the front of the cell, which hinder the improvement of the optical performance of the cell and limit the final conversion efficiency. While for BC solar cells, the front grid lines are moved to the back, completely eliminating the shading loss of the grid lines (~3%), further improving the optical performance of the cell, and it is the next generation of solar cells with the most potential for mass production.

[0003] However, BC solar cells currently also encounter many problems: Firstly, the cell manufacturing process is relatively complex and the technical difficulty is high, resulting in a high product price and a low yield; Secondly, the back grid lines of the cell are in a cross-finger structure with staggered p-regions and n-regions, which is quite difficult for laser patterning design. At the same time, the sizes of the p-region and the n-region and the insulating isolation structure between the two pose higher precision requirements for technicians and laser equipment.

[0004] In summary, for current BC solar cells, it is of great significance to reduce the difficulty of the cell manufacturing process and improve the yield. Summary of the Invention

[0005] In order to solve the above technical problems, the present invention provides a method for manufacturing a lateral p-n junction BC solar cell. Through ingenious step design, the present invention can obtain a BC solar cell with a novel lateral p-n junction structure. The front of this cell has no grid lines, and the two lateral parts are respectively an n-region and a p-region, thus forming a lateral p-n junction BC solar cell. This cell does not require a complex laser patterning design process, and by simple structural adjustment, the optical performance of the cell can be increased.

[0006] The specific technical solution of the present invention is: a method for manufacturing a lateral p-n junction BC solar cell, which includes the following specific steps: S1. Double-side polish the n-type silicon wafer.

[0007] S2. Through laser grooving, process the boundary region between the preset p-region and n-region on the back of the silicon wafer (the p-region and n-region are horizontally designed). Using a laser to groove in the boundary region between the preset p-region and n-region can lay the foundation for accurately distinguishing the p-region and the n-region in the subsequent process.

[0008] S3. Alkaline cleaning. The silicon wafer is placed in an alkaline solution for cleaning. Due to the laser treatment, compared with the non-laser-treated area, the bottom silicon wafer substrate in the laser-grooved area will be corroded deeper during the alkaline cleaning process, resulting in an obvious height difference from the non-laser silicon wafer substrate area.

[0009] S4. Depositing a mask on the silicon wafer surface. A mask is pre-formed on the silicon wafer surface, which can lay the foundation for the subsequent alkaline cleaning in S6.

[0010] S5. Laser removing the mask on the p-region surface. Laser treatment is used to preliminarily remove the mask on the preset p-region surface of the silicon wafer, exposing the silicon wafer substrate in this area, thus laying the foundation for the subsequent boron diffusion.

[0011] S6. Alkaline cleaning. The laser-treated silicon wafer is put into an alkaline solution for cleaning, which can thoroughly clean and remove the mask on the p-region surface.

[0012] S7. Boron diffusion, which transforms the surface layer and interior of the silicon wafer in the p-region into a boron-doped region and generates a BSG layer on the p-region surface. During the boron diffusion process, the surface of the silicon wafer in the p-region is exposed, and boron atoms can diffuse and dope into the interior of the silicon wafer substrate, thus realizing the boron doping of the silicon wafer substrate in this area, changing from the original n-type to p-type; while the preset n-region of the silicon wafer remains n-type because the surface is protected by the mask and boron atoms cannot diffuse into it, thus forming a lateral p-n junction structure.

[0013] In addition, it is found during the experiment of the present invention that if the laser grooving treatment in S2 is not carried out, during the boron diffusion process, it is very difficult to precisely control the region where boron atoms diffuse and dope, and it is very difficult to make the boundary line between the p-region and the n-region after boron diffusion exactly coincide with the preset boundary line between the n-region and the p-region. This will make it difficult for us to judge the actual boundary line position between the p-region and the n-region on the back of the silicon wafer, so it is difficult to determine the precise printing position of the electrodes, and finally it will increase the risk of short circuit of the connecting wires. Therefore, the present invention cleverly forms a boundary line groove between the p-region and the n-region through laser grooving treatment after double-sided polishing of the silicon wafer (S2). During the boron diffusion process, even if the boron-doped atoms cross the designed boundary line (basically expanding inward horizontally), they will not expand longitudinally to the surface of the n-region silicon wafer substrate. Therefore, for the back of the silicon wafer, the boundary line between its n-region and p-region can be highly consistent with the preset boundary line after boron diffusion, thus eliminating the worry about the precise printing position of the corresponding p-region and n-region electrodes in the subsequent process.

[0014] S8. Chain removal of the BSG layer and the remaining mask on the front / side of the silicon wafer.

[0015] S9. Front-side wet texturing: The silicon wafer after the treatment in S8 is put into an alkaline texturing tank for wet texturing treatment. Since the mask and the BSG layer still exist on the back of the silicon wafer, the back of the silicon wafer will not be damaged by the alkaline solution, and only a pyramid-shaped textured surface is formed on the front of the silicon wafer.

[0016] S10. Double-sided coating: Generate a passivation and antireflection layer on the front and back of the silicon wafer.

[0017] S11. Screen printing, sintering, and optical injection. Since there is a boundary line between the p-region and the n-region on the back of the silicon wafer, it is easy to distinguish the corresponding printing position area during this process, and there is no need to worry about the short-circuit problem of the subsequent component terminal connection lines. Subsequently, a lateral p-n junction BC solar cell is obtained through processes such as sintering and optical injection.

[0018] Through the above preparation steps, the present invention can obtain a BC solar cell with a novel lateral p-n junction structure, and its structure is as Figure 7 shown. There are no grid lines on the front of the cell, and the left and right parts are silicon wafer substrates of different doping types respectively, thus forming a left-right p-n junction full-back electrode contact structure cell. This cell does not require a complex laser patterning design process, and the optical performance of the cell can be increased through simple structural adjustment. In addition, this cell structure can also be stacked with gold-semiconductor passivation contact technologies such as TOPCon and HJT to prepare a passivated contact lateral p-n junction back contact cell. At the same time, this structure can also be applied to perovskite, tandem, and other cells.

[0019] Preferably, in S7, the conditions for boron diffusion are as follows: First, introduce a mixed gas of BCl 3 and O 2 , with a temperature of 900 - 950 °C, a diffusion time of 20 - 100 min, a BCl 3 flow rate of 500 - 2000 sccm, and an O 2 flow rate of 1000 - 5000 sccm; then introduce O 2 for oxidation and push, with a temperature of 1000 - 1050 °C, a push time of 50 - 200 min, and an O 2 flow rate of 8000 - 50000 sccm.

[0020] After boron diffusion, the silicon wafer substrate of the above preset n-region can be transformed into a boron-doped region. Different from conventional boron diffusion that only simply transforms the surface of the silicon wafer into a boron-doped region, in this process of the present invention, the surface layer and the interior of the entire laser-treated region need to be transformed into a boron-doped layer, so as to form a silicon wafer substrate with opposite lateral doping types on the left and right of the silicon wafer, constituting a lateral p-n junction.

[0021] Preferably, in S7, the thickness of the BSG layer is 50 - 100 nm.

[0022] Preferably, in S2, the conditions for laser grooving are as follows: laser wavelength 400 - 600 nm, spot size 50 - 200 μm, frequency 500 - 700 KHz, marking speed 40000 - 50000 mm / s, power 10 - 50 W, and processing time 1 - 5 s.

[0023] Preferably, in S3, the conditions for the alkali cleaning are as follows: the concentration of the alkali solution is 1.7 - 2.2 wt%, the temperature is 75 - 85 °C, and the corrosion depth is 2 - 10 μm.

[0024] Preferably, in S4, the mask is a dense SiO mask with a thickness of 50 - 500 nm. 2 mask.

[0025] Preferably, in S4, the mask is deposited by a high-temperature oxidation process, and the conditions are as follows: the oxidation temperature is 700 - 900 °C, the O 2 flow rate is 5000 - 30000 sccm, and the oxidation time is 10 - 80 mmin.

[0026] Preferably, S5 specifically includes: first, laser patterning is used to remove the masks on both the front and back sides of the p region, the silicon wafers are stacked in layers, and then laser treatment is used to remove the mask on the side of the p region.

[0027] Preferably, in S5, the laser wavelength is 400 - 600 nm, the frequency is 500 - 700 KHz, the marking speed is 40000 - 50000 mm / s, the power is 10 - 50 W, and the processing time is 1 - 5 s.

[0028] Preferably, in S8, a chain machine is used to remove the BSG layer and the remaining mask on the front / side of the silicon wafer.

[0029] Compared with the prior art, the beneficial effects of the present invention are as follows: (1) Through ingenious step design, the present invention can obtain a BC solar cell with a novel lateral p-n junction structure. There are no grid lines on the front of this cell, and the two lateral parts are the n region and the p region respectively, thus a lateral p-n junction BC solar cell can be formed. This cell does not require a complex laser patterning design process, and the optical performance of the cell can be improved through simple structural adjustment.

[0030] (2) The present invention ingeniously preforms a boundary groove between the p region and the n region through laser grooving treatment after double-sided polishing of the silicon wafer (S2). During the boron diffusion process, even if the boron-doped atoms cross the designed boundary (basically expanding laterally), they will not expand longitudinally to the surface of the n-region silicon wafer substrate. Therefore, for the back side of the silicon wafer, after boron diffusion, the boundary between the n region and the p region can be highly consistent with the preset boundary, thus eliminating the need to worry about the accurate printing positions of the subsequent corresponding p-region and n-region electrodes. Description of the Drawings

[0031] Figure 1 It is a schematic structural diagram of the silicon wafer after double-sided polishing.

[0032] Figure 2 It is a schematic structural diagram of the silicon wafer after laser grooving + alkali cleaning of the preset boundary between the p region and the n region on the front / back side.

[0033] Figure 3 It is a schematic structural diagram after the deposition mask on the silicon wafer.

[0034] Figure 4 It is a schematic structural diagram after laser grooving + alkali cleaning around the preset p-region of the silicon wafer dividing line.

[0035] Figure 5 It is a schematic structural diagram after boron diffusion of the silicon wafer.

[0036] Figure 6 It is a schematic structural diagram after texturing the silicon wafer.

[0037] Figure 7 It is a schematic structural diagram of a lateral p-n junction BC solar cell.

[0038] Figure 8 It is a schematic structural diagram of a conventional vertical p-n junction solar cell.

[0039] The reference numerals are: n-type single crystal silicon wafer 1; mask 2; boron-doped region 3; BSG layer 4; pyramid texture 5; passivation and antireflection layer 6; electrode 7. Specific Embodiments

[0040] The present invention will be further described below in conjunction with embodiments.

[0041] General Embodiment A preparation method of a lateral p-n junction BC solar cell, which comprises the following specific steps: S1. Double-side polish the n-type silicon wafer.

[0042] In some preferred embodiments, S1 specifically includes: First, select an n-type single crystal silicon wafer after wire sawing, with a thickness of 100-200 μm, and then put it into an alkaline polishing tank containing alkaline solution, and double-side polish it at 75-85 °C for 6-8 min, the polishing thickness is 3-7 μm, and the thinning amount is 0.35-0.45 g.

[0043] S2. Treat the dividing line area (the p-region and the n-region are horizontally designed) between the preset p-region and the n-region on the back of the silicon wafer by laser grooving. Laser grooving is carried out in the preset dividing line area between the p-region and the n-region, which can lay a foundation for accurately distinguishing the p-region and the n-region subsequently.

[0044] In some preferred embodiments, the conditions of laser grooving are: the laser wavelength is 400-600 nm, the spot is 50-200 μm, the frequency is 500-700 KHz, the marking speed is 40000-50000 mm / s, the power is 10-50 W, and the processing time is 1-5 s.

[0045] S3. Alkaline cleaning: The silicon wafer is placed in an alkaline solution for cleaning. Due to the effect of laser treatment, compared with the non-laser-treated area, the bottom silicon wafer substrate in the laser-grooved area will be corroded deeper during the alkaline cleaning process, resulting in an obvious height difference from the non-laser silicon wafer substrate area.

[0046] In some preferred embodiments, the conditions for the alkaline cleaning are: the concentration of the alkaline solution is 1.7 - 2.2 wt%, the temperature is 75 - 85 °C, and the corrosion depth is 2 - 10 μm.

[0047] S4. Deposition of a mask on the silicon wafer surface. A mask is pre-formed on the silicon wafer surface, which can lay the foundation for the subsequent alkaline cleaning in S6.

[0048] In some preferred embodiments, the mask is a dense SiO mask with a thickness of 50 - 500 nm. 2 mask.

[0049] In some preferred embodiments, the mask is deposited by a high-temperature oxidation process, and the conditions are: the oxidation temperature is 700 - 900 °C, the O 2 flow rate is 5000 - 30000 sccm, and the oxidation time is 10 - 80 min.

[0050] S5. Laser removal of the mask on the p-region surface. Laser treatment is used to preliminarily remove the mask on the preset p-region surface of the silicon wafer, exposing the silicon wafer substrate in this area, thus laying the foundation for subsequent boron diffusion.

[0051] In some preferred embodiments, S5 specifically includes: first, laser patterning is used to remove the masks on the front and back sides of the p-region, the silicon wafers are stacked in layers, and then laser treatment is used to remove the mask on the side of the p-region.

[0052] In some preferred embodiments, the parameters of the laser treatment are: the laser wavelength is 400 - 600 nm, the frequency is 500 - 700 KHz, the marking speed is 40000 - 50000 mm / s, the power is 10 - 50 W, and the treatment time is 1 - 5 s.

[0053] S6. Alkaline cleaning: The laser-treated silicon wafer is placed in an alkaline solution for cleaning, which can thoroughly clean and remove the mask on the p-region surface.

[0054] In some preferred embodiments, the conditions for the alkaline cleaning are: the concentration of the alkaline solution is 1.7 - 2.2 wt%, and the temperature is 75 - 85 °C.

[0055] S7. Boron diffusion is carried out to transform the surface layer and the interior of the silicon wafer in the p-region into a boron-doped region, and a BSG layer is formed on the surface of the p-region. During the boron diffusion process, the surface of the silicon wafer in the p-region is exposed, and boron atoms can diffuse and dope into the interior of the silicon wafer substrate, thereby achieving boron doping of the silicon wafer substrate in this region, and converting the original n-type to p-type; since the preset n-region of the silicon wafer is protected by a mask on the surface, boron atoms cannot diffuse into it, so it remains n-type, thus forming a lateral p-n junction structure. In addition, during the experiment of the present invention, it is found that if the laser grooving treatment of S2 is not carried out, during the boron diffusion process, it is very difficult to precisely control the region where boron atoms diffuse and dope, and it is very difficult to make the boundary line between the p-region and the n-region after boron diffusion exactly coincide with the preset boundary line between the n-region and the p-region. This will make it difficult for us to judge the actual boundary line position between the p-region and the n-region on the back surface of the silicon wafer, and thus it is difficult to determine the precise printing position of the electrodes. For this reason, the present invention ingeniously preforms a boundary line groove between the p-region and the n-region through laser grooving treatment after double-sided polishing of the silicon wafer (S2). During the boron diffusion process, even if the boron-doped atoms cross the designed boundary line (basically expanding laterally), they will not expand longitudinally to the surface of the n-region silicon wafer substrate. Therefore, for the back surface of the silicon wafer, the boundary line between its n-region and p-region after boron diffusion can be highly consistent with the preset boundary line, thus eliminating the worry about the subsequent precise printing positions of the corresponding p-region and n-region electrodes.

[0056] In some preferred embodiments, the conditions for the boron diffusion are as follows: first, a mixed gas of BCl 3 and O 2 is introduced, the temperature is 900 - 950 °C, the diffusion time is 20 - 100 min, the flow rate of BCl 3 is 500 - 2000 sccm, and the flow rate of O 2 is 1000 - 5000 sccm; then O 2 is introduced for oxidation and promotion, the temperature is 1000 - 1050 °C, the promotion time is 50 - 200 min, the flow rate of O 2 is 8000 - 50000 sccm, and a BSG layer with a thickness of 50 - 100 nm is obtained.

[0057] After boron diffusion, the silicon wafer substrate in the above-mentioned preset n-region can be transformed into a boron-doped region. Different from the conventional boron diffusion that only simply transforms the surface of the silicon wafer into a boron-doped region, in this process of the present invention, the surface layer and the interior of the entire laser-treated region need to be transformed into a boron-doped layer, so as to form a silicon wafer substrate with opposite lateral doping types on the silicon wafer, constituting a lateral p-n junction.

[0058] S8. Chain-removing the BSG layer and the remaining mask on the front / side surface of the silicon wafer.

[0059] In some preferred embodiments, the concentration of the HF solution in the chain machine is 20 - 80 wt%, and the belt speed is 0.5 - 5 m / min.

[0060] S9, Front - side wet chemical texturing: The silicon wafers after S8 treatment are placed in an alkaline texturing bath for wet chemical texturing. Since the mask and BSG layer still exist on the back side of the silicon wafers, the back side of the silicon wafers will not be damaged by the alkaline solution, and only a pyramidal textured surface is formed on the front side of the silicon wafers.

[0061] In some preferred embodiments, the conditions for wet chemical texturing are: the temperature is maintained at 75 - 85 °C, and the time is 6 - 12 min.

[0062] S10, Double - side coating: A passivation and antireflection layer is formed on the front and back sides of the silicon wafers.

[0063] In some preferred embodiments, the passivation and antireflection layer includes an AlO x film with a thickness of 8 - 10 nm, and a SiN x film with a thickness of 80 - 120 nm deposited on the AlO x film.

[0064] S11, Screen printing, sintering, and light injection. Since there is a boundary line between the p - region and n - region on the back side of the silicon wafer, it is easy to distinguish the corresponding printing position area during this process, and there is no need to worry about the short - circuit problem of the subsequent component - end connection wires. Subsequently, through processes such as sintering and light injection, a lateral p - n junction BC solar cell is obtained.

[0065] Through the above preparation steps, the present invention can obtain a BC solar cell with a novel lateral p - n junction back - contact battery structure. There are no grid lines on the front side of the battery, and the left and right parts are silicon wafer substrates of different doping types respectively, thereby forming a left - right p - n junction full - back - electrode contact structure battery. This battery does not require a complex laser patterning design process. By simple structural adjustment, the optical performance of the battery can be increased. In addition, this battery structure can also be stacked with gold - semiconductor passivation contact technologies such as TOPCon and HJT to prepare a passivated - contact lateral p - n junction back - contact battery. At the same time, this structure can also be applied to perovskite, tandem, etc. batteries.

[0066] Specific examples and comparative examples.

[0067] Example 1 A preparation method of a lateral p - n junction BC solar cell, which includes the following specific steps: S1, Double - side polishing: First, select an n - type monocrystalline silicon wafer 1 after wire - saw cutting, and then place it in an alkaline polishing bath containing an alkaline solution. Double - side polishing is carried out at 75 °C for 6 min, and the polishing thickness is about 4 μm, and the thinning amount is 0.42 g, as Figure 1 shown.

[0068] S2. Treat the boundary region between the preset p-region and n-region on the back surface of the silicon wafer by laser grooving (the p-region and n-region are horizontally designed). Among them, the conditions for laser grooving are: laser wavelength is 532 nm, spot size is 60 μm, frequency is 600 KHz, marking speed is 45000 mm / s, power is 40 W, and treatment time is 2.5 s.

[0069] S3. Alkaline cleaning: Place the silicon wafer in an alkaline solution for cleaning. Due to the effect of laser treatment, compared with the non-laser-treated area, the bottom silicon wafer substrate in the laser-grooved area will be corroded deeper during the alkaline cleaning process, resulting in an obvious height difference from the non-laser silicon wafer substrate area, as Figure 2 shown. Among them, the conditions for alkaline cleaning are: alkaline solution concentration is 2.0 wt%, and temperature is 80 °C.

[0070] S4. Deposit a mask on the silicon wafer surface: Deposit a mask using a high-temperature oxidation process. The conditions are: oxidation temperature is 850 °C, O 2 flow rate is 20000 sccm, oxidation time is 60 min, and a mask 2 (dense SiO 2 mask) with a thickness of about 80 nm is formed, as Figure 3 shown.

[0071] S5. Laser removal of the mask on the p-region surface: First, laser pattern to remove the masks on both the front and back sides of the p-region. Stack the silicon wafers in layers, and then laser treat to remove the mask on the side of the p-region. Among them, the parameters for laser treatment are: laser wavelength is 532 nm, frequency is 600 KHz, marking speed is 45000 mm / s, power is 50 W, and treatment time is 3 s.

[0072] S6. Alkaline cleaning: Place the laser-treated silicon wafer in an alkaline solution for cleaning, which can thoroughly clean and remove the mask on the p-region surface, as Figure 4 shown. Among them, the conditions for alkaline cleaning are: alkaline solution concentration is 2.0 wt%, and temperature is 75 °C.

[0073] S7. Boron diffusion, which transforms the surface layer and interior of the silicon wafer in the p-region into a boron-doped region 3, and generates a BSG layer 4 on the surface of the p-region, as Figure 5 shown. During the boron diffusion process, the surface of the silicon wafer in the p-region is exposed, and boron atoms can diffuse and dope into the interior of the silicon wafer substrate, thereby realizing the boron doping of the silicon wafer substrate in this region, changing from the original n-type to p-type, becoming the boron-doped region 3; while the preset n-region of the silicon wafer remains n-type because the surface is protected by the mask and boron atoms cannot diffuse in, thus forming a lateral p-n junction structure. Among them, the conditions for boron diffusion are: first introduce a mixed gas of BCl 3 and O 2 , temperature is 920 °C, diffusion time is 50 min, BCl 3 flow rate is 1000 sccm, O2 The flow rate is 3000 sccm; then introduce O 2 Perform oxidation propulsion at a temperature of 1020 °C for a propulsion time of 80 min, with O 2 The flow rate is 30000 sccm to obtain a BSG layer with a thickness of about 75 nm.

[0074] S8. Chain-remove the BSG layer on the front / side of the silicon wafer and the remaining mask. Among them, the concentration of the HF solution in the chain machine is 60 wt%, and the belt speed is 3 m / min.

[0075] S9. Front-side wet texturing: Place the silicon wafer after S8 treatment into an alkaline texturing tank for wet texturing treatment. Since there are still masks and BSG layers on the back of the silicon wafer, the back of the silicon wafer will not be damaged by the alkaline solution, and only a pyramid-shaped textured surface 5 is formed on the front of the silicon wafer, as Figure 6 shown. Among them, the conditions for wet texturing treatment are: the temperature is maintained at 75 °C and the time is 7 min.

[0076] S10. Double-sided coating: Generate a passivation and antireflection layer 6 on the front and back of the silicon wafer. Among them, the passivation and antireflection layer 6 includes an AlO x film with a thickness of about 8 nm, and a SiN x film with a thickness of about 90 nm deposited on the AlO x film.

[0077] S11. Screen printing electrodes 7, sintering, and light injection. Since there is a boundary line between the p-region and the n-region on the back of the silicon wafer, it is easy to distinguish the corresponding printing position area during this process, and there is no need to worry about the short-circuit problem of the subsequent component terminal connection wires. Subsequently, a lateral p-n junction BC solar cell is obtained through processes such as sintering and light injection.

[0078] Through the above preparation steps, a BC solar cell with a novel lateral p-n junction structure can be obtained, and its structure is as Figure 7 shown. There are no grid lines on the front of the cell, and the left and right parts are silicon wafer substrates of different doping types respectively, thus forming a left-right p-n junction full-back electrode contact structure cell.

[0079] Comparative Example 1 (Conventional Longitudinal p-n Junction TOPCon Cell Process) S1. Perform double-sided alkaline texturing on the cut n-type monocrystalline silicon wafer, where the alkaline concentration is 1.7 wt%, the temperature is 80 °C, and the time is 7 min, so as to form pyramid-shaped textured surfaces on the front / back of the silicon wafer simultaneously.

[0080] S2. Deposit a tunneling oxide layer and an intrinsic amorphous silicon layer on the front of the silicon wafer in sequence, specifically including: depositing a tunneling oxide layer on the textured front of the silicon wafer by LPCVD, O 2Flow rate: 40000 sccm, temperature: 600 °C, time: 600 s, the thickness of the tunneling oxide layer is about 3 nm; deposit an intrinsic amorphous silicon layer on the tunneling oxide layer: SiH 4 Flow rate: 920 sccm, temperature: 550 °C, time: 3.3 h, working pressure: 300 mTorr, the thickness of the intrinsic amorphous silicon layer is about 290 nm.

[0081] S3. Generate a boron diffusion layer and a BSG layer on the front side of the silicon wafer. Boron diffusion conditions: boron diffusion temperature: 930 °C, diffusion time: 25 min, BCl 3 gas flow rate: 200 sccm, O 2 gas flow rate: 1200 sccm, oxidation push temperature: 1050 °C, O 2 gas flow rate: 20000 sccm, push time: 60 min, the thickness of the obtained BSG layer is about 48 nm.

[0082] S4. Place the silicon wafer face up and use a chain acid etcher to remove the BSG layer formed by over-diffusion on the side and back of the silicon wafer during boron diffusion; the concentration of the HF solution in the chain acid etcher is 40 wt%, and the belt speed is 3 m / min.

[0083] S5. Subsequently, use alkali polishing to remove the boron diffusion layer over-diffused on the side and back of the silicon wafer, and at the same time make the back of the silicon wafer form a relatively flat polished surface, laying the foundation for depositing a phosphorus-doped amorphous silicon layer later; the alkali polishing conditions are: 2.0 wt%, temperature: 75 °C, time: 5 min; during the process, due to the presence of the BSG layer on the front side of the silicon wafer, the boron diffusion layer at the bottom of the BSG layer can be effectively protected from being damaged by the alkali solution.

[0084] S6. Use PECVD to deposit a tunneling oxide layer, a phosphorus-doped amorphous silicon layer, and a mask layer on the polished back of the silicon wafer in sequence; the deposition conditions of the tunneling oxide layer are: power: 9500 W, reaction gas: N 2 O, its flow rate: 20000 sccm, temperature: 450 °C, time: 300 s, working pressure: 1800 mTorr, the thickness of the generated tunneling oxide layer is about 3 nm. The deposition conditions of the phosphorus-doped amorphous silicon layer are: PH 3 flow rate: 1700 sccm, SiHH 4 flow rate: 2300 sccm, H 2 flow rate: 7000 sccm, temperature: 460 °C, time: 18 min, working pressure: 2200 mTorr, the thickness of the generated boron-doped amorphous silicon layer is about 280 nm; during the process, due to the presence of the BSG layer on the front side of the silicon wafer, phosphorus atoms can be effectively blocked from diffusing into the boron diffusion layer, preventing this layer from being inverted. The deposition conditions of the mask layer are: SiH 4 flow rate: 2500 sccm, N 2O flow rate is 9300 sccm, temperature is 460 °C, time is 15 min, working pressure is 2700 mTorr, and the thickness of the mask layer is about 220 nm.

[0085] S7. Then, the silicon wafer is subjected to high-temperature crystallization to convert the phosphorus-doped amorphous silicon into a phosphorus-containing polycrystalline silicon layer. The conditions for high-temperature crystallization are as follows: N 2 The flow rate is 5000 sccm, the temperature is 890 °C, and the time is 55 min.

[0086] S8. The silicon wafer is placed with the back side up, and a chain acid etching machine is used to remove the mask layer formed by over-diffusion on the front and side surfaces of the silicon wafer during the deposition of phosphorus-doped amorphous silicon. The concentration of the HF solution in the chain acid etching machine is 30 wt%, and the belt speed is 5 m / min.

[0087] S9. Subsequently, the silicon wafer after removing the front and side mask layers is put into an alkaline polishing solution again for de-bypass plating treatment. The alkali concentration is 2.2 wt%, the temperature is 72 °C, the time is 4 min, and the weight loss is 0.017 g. During the process, due to the existence of the BSG layer on the front surface of the silicon wafer and the mask layer on the back surface, the boron diffusion layer and the phosphorus-containing polycrystalline silicon layer can be effectively protected from being damaged by the alkaline solution respectively. Subsequently, the front BSG layer and the back mask layer are removed by pickling.

[0088] S10. The atomic layer deposition (ALD) method is used to deposit AlO x thin films on both sides of the treated silicon wafer. It is formed by the reaction of Al(CH 3 ) 3 with water vapor, and the thickness is about 8 nm. The process temperature is controlled at 250 °C. Subsequently, a tube-type PECVD equipment is used to deposit SiN x thin films on both sides of the silicon wafer. The thickness of the SiN x thin film is about 90 nm, and the refractive index is 2.0. When depositing the SiN x thin film, the reaction gases in the tube cavity are SiH 4 , NH 3 , the working pressure is 1600 mTorr, the power is 12000 W, the temperature is 440 °C, the flow rate of the SiH 4 gas is 980 sccm, the flow rate of the NH 3 gas is 8000 sccm, and the deposition time is 10 min.

[0089] S11. The coated silicon wafer is screen-printed on the back to form a metal contact, then sintered at 780 °C to form an Ag-Si ohmic contact, and finally obtained the final longitudinal p-n junction TOPCon finished solar cell through optical injection repair.

[0090] Comparative Example 2 (Process steps of conventional lateral p-n junction back contact battery) S1. First, select n-type monocrystalline silicon wafers after being cut by diamond wire, and then put them into an alkaline polishing tank containing alkaline solution. Double-sided polish them at 75°C for 6 minutes. The polishing thickness is about 4 μm, and the thinning amount is 0.42 g.

[0091] S2. Use high-temperature oxidation to form a dense SiO layer with a thickness of about 80 nm on the surface of the above double-sided polished silicon wafers. The oxidation temperature is 850°C, the gas flow rate of O is 20000 sccm, and the oxidation time is 60 minutes. 2 layer, where the oxidation temperature is 850°C, and the gas flow rate of O 2 is 20000 sccm, and the oxidation time is 60 minutes.

[0092] S3. Use laser patterning to groove the subsequent preset boron diffusion surface (front / back sides) mask SiO 2 layer, and then stack the processed silicon wafers in a "layered" manner. Again, use laser to process the side mask SiO 2 layer of the entire silicon wafer. The laser wavelength is 532 nm, the frequency is 600 KHz, the marking speed is 45000 mm / s, the power is 50 W, and the processing time is 3 s.

[0093] S4. Put the laser-processed silicon wafers into an alkaline solution for cleaning. The concentration of the alkaline solution is 2.0 wt%, and the temperature is 75°C; the non-laser-treated area is protected by the mask SiO 2 layer and will not be damaged during the alkaline cleaning process.

[0094] S5. Subsequently, perform boron diffusion to transform the above laser-treated area into a boron-doped area. Different from the conventional boron diffusion that only simply transforms the surface of the silicon wafer into a boron-doped area, in this process, the surface layer and the interior of the entire laser-treated area need to be transformed into boron-doped layers, so as to form a silicon substrate with opposite doping types on the left and right sides of the silicon wafer, constituting a lateral p-n junction. The boron diffusion conditions are as follows: First, introduce a mixed gas of BCl 3 and O 2 , the temperature is 920°C, the diffusion time is 50 minutes, the flow rate of BCl 3 is 1000 sccm, and the flow rate of O 2 is 3000 sccm; then introduce O 2 for oxidation and promotion, the temperature is 1020°C, the promotion time is 80 minutes, the flow rate of O 2 is 30000 sccm, and a BSG layer with a thickness of about 75 nm is obtained.

[0095] S6. Then use a chain machine to remove the mask SiO 2 layer and the BSG layer existing on the front and side of the silicon wafer. The concentration of the HF solution in the chain machine is 60 wt%, and the belt speed is 3 m / min.

[0096] S7. Place the silicon wafers after removing the wrap plating into an alkaline texturing bath for wet texturing treatment, where the temperature is maintained at 75 °C and the time is 7 min. Since the mask SiO 2 layer and the BSG layer still exist on the back of the silicon wafer, the back of the silicon wafer will not be damaged by the alkaline texturing.

[0097] S8. Then, double-sided coating is performed to form a passivation and antireflection layer on the front and back of the silicon wafer, including an AlO x film with a thickness of about 8 nm, and a SiN x film with a thickness of about 90 nm deposited on the AlO x film.

[0098] S9. Screen printing, sintering, and light injection are carried out to obtain a finished BC solar cell with a lateral p-n junction.

[0099] Comparative Example 3 The difference between Comparative Example 3 and Example 1 is only that the conventional boron diffusion process is used in step S7, which is specifically as follows: S7. The conditions for boron diffusion are as follows: First, a mixed gas of BCl 3 and O 2 is introduced. The boron diffusion temperature is 850 °C, the diffusion time is 10 min, the gas flow rate of BCl 3 is 200 sccm, the gas flow rate of O 2 is 1200 sccm, the oxidation promotion temperature is 950 °C, the O 2 flow rate is 7000 sccm, and the promotion time is 30 min. The thickness of the BSG layer is about 45 nm.

[0100] Performance Test The electrical performance of the solar cells prepared in each example and comparative example was tested, and the data are shown in the following table: Serial number η(%) <![CDATA[V oc (mV)]]> <![CDATA[J sc (mA / cm 2 )]]> FF(%) Example 1 26.45 744.2 42.20 84.21 Comparative Example 1 26.19 744.1 41.78 84.17 Comparative Example 2 25.23 742.5 41.25 82.38 Comparative Example 3 24.08 739.1 40.34 80.79 From the above data, it can be seen that: First, for Example 1, the lateral p-n junction back contact cell moves the front grid line to the back, reducing the shading loss, and the optical performance of the corresponding cell is the best. In addition, since a groove is preset at the boundary line between the p-region and the n-region on the back of the cell, on the one hand, it can accurately position the printing boundary line of different doping regions, and on the other hand, it can also avoid the risk of boron atoms in the boron diffusion region diffusing into the surface of the n-type silicon substrate. Therefore, the performance of the cell in Example 1 is the best.

[0101] For Comparative Example 1, since there is still grid line occlusion on the front of the conventional vertical p-n junction cell, it is difficult to further improve the optical performance, and the J sc value of the corresponding cell is lower than that of Example 1, and the overall electrical performance is lower than that of Example 1.

[0102] For Comparative Example 2, since there is no groove for the boundary line between the p-region and the n-region on the back of the battery, it causes a high risk of over-diffusion of boron atoms to the n-region during the boron diffusion process. Subsequently, the printing grid lines cannot distinguish the actual boundary line between the p-region and the n-region, which is very likely to cause mixed printing, and the corresponding battery performance is lower than that of Example 1 and Comparative Example 1.

[0103] For Comparative Example 3, due to the low temperature, source amount and short pushing time of the conventional boron diffusion process, the p-type doping region after diffusion is too narrow, resulting in too small a printing area of the subsequent screen at this position and unable to fully collect the carriers in the body. Therefore, the corresponding battery performance is the lowest.

[0104] The raw materials and equipment used in the present invention are all common raw materials and equipment in the art without special instructions; the methods used in the present invention are all conventional methods in the art without special instructions.

[0105] The above are only the preferred embodiments of the present invention, and do not limit the present invention in any way. Any simple modifications, changes and equivalent transformations made to the above embodiments according to the technical essence of the present invention still belong to the protection scope of the technical solution of the present invention.

Claims

1. A method for preparing a lateral pn junction BC solar cell, characterized in that include: S1, double-sided polishing of n-type silicon wafer; S2, laser grooving on the back of the silicon wafer to preset the boundary area between the p-region and the n-region; The p-region and n-region are designed horizontally; S3, alkali cleaning; S4, depositing a mask on the surface of the silicon wafer; S5, laser removal of the p-region surface mask; S6, alkali cleaning; S7, boron diffusion, so that the surface and the interior of the silicon wafer in the p-region are transformed into a boron-doped region, and a BSG layer is generated on the surface of the p-region; S8, chain-type removal of the BSG layer and remaining mask on the front and side surfaces of the silicon wafer; S9, front wet velveting; S10, double-sided coating; S11, screen printing, sintering, light injection.

2. The preparation method according to claim 1, characterized in that: In S7, the conditions for boron diffusion are: first, a mixed gas of BCl3 and O2 is introduced at a temperature of 900~950°C, a diffusion time of 20~100 min, a BCl3 flow rate of 500~2000 sccm, and an O2 flow rate of 1000~5000 sccm; then, O2 is introduced for oxidation advancement at a temperature of 1000~1050°C, a advancement time of 50~200 min, and an O2 flow rate of 8000~50000 sccm.

3. The preparation method according to claim 2, characterized in that: In S7, the thickness of the BSG layer is 50-100 nm.

4. The preparation method according to claim 1, characterized in that: In S2, the conditions of the laser grooving are: laser wavelength 400~600 nm, spot size 50~200 μm, frequency 500~700 KHz, marking speed 40000~50000 mm / s, power 10~50 W, and processing time 1~5 s.

5. The preparation method according to claim 1, characterized in that: In S3, the alkaline cleaning conditions are: alkaline solution concentration 1.7-2.2 wt%, temperature 75-85°C.

6. The preparation method according to claim 1, characterized in that: In S4, the mask is a dense SiO2 mask with a thickness of 50-500 nm.

7. The preparation method according to claim 1 or 6, characterized in that: In S4, a high temperature oxidation process is used to deposit the mask, and the conditions are: oxidation temperature 700~900°C, O2 flow rate 5000~30000 sccm, and oxidation time 10~80 min.

8. The preparation method according to claim 1, characterized in that: S5 specifically includes: firstly removing the masks on the front and back sides of the p-region by laser patterning, stacking the silicon wafers in layers, and then removing the side masks of the p-region by laser processing.

9. The preparation method according to claim 8, characterized in that: In S5, the laser wavelength is 400~600 nm, the frequency is 500~700 KHz, the marking speed is 40000~50000 mm / s, the power is 10~50 W, and the processing time is 1~5 s.

10. The preparation method according to claim 1, characterized in that: In S8, a chain machine is used to remove the BSG layer and the remaining mask on the front and side surfaces of the silicon wafer.

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